File compression method, upgrade method, device, electronic device and storage medium

Abstract

The present application provides a file compression method, an upgrade method, an apparatus, an electronic device, and a storage medium, and relates to the field of data processing technology. The file compression method includes: converting the upgrade file to obtain a target code segment and a target data segment; performing instruction replacement on the target code segment to obtain target instruction data; compressing the target instruction data and the target data segment to obtain a target file. The file upgrade method includes: receiving a target file, the target file being a file compressed by the file compression method; decompressing the target file to obtain target instruction data and a target data segment; performing instruction restoration on the target instruction data to obtain an upgrade file composed of a target code segment and a target data segment; and upgrading the firmware based on the upgrade file. The present application can save the storage space occupied by the target file during the upgrade and save storage costs by replacing the instructions in the upgrade file.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to a file compression method, an upgrade method, a device, an electronic device, and a storage medium. Background Art

[0002] The RISC-V instruction set (an open source instruction set architecture based on the principles of the Reduced Instruction Set (RISC)) is suitable for modern computing devices (such as warehouse-scale cloud computers, high-end mobile phones, and tiny embedded systems) and has a wide range of supported software. When upgrading the firmware of various devices based on the RISC-V instruction set, such as the Internet of Things (IoT) and various embedded devices, the firmware in various devices needs to be updated regularly due to the rapid software update speed.

[0003] In the prior art, when upgrading the firmware corresponding to the RISC-V instruction set, the upgrade is usually carried out through OTA. The updated firmware usually includes a complete executable binary file. During the update, this part of the file and the updated binary file require the same amount of storage space. Although it is currently possible to compress the firmware corresponding to the RISC-V instruction set to reduce the file size, the compression effect is poor due to the small compression, resulting in larger files during the upgrade, more storage space required for the upgrade, and high storage costs in the device. Summary of the Invention

[0004] In view of this, the purpose of the embodiments of the present application is to provide a file compression method, an upgrade method, an apparatus, an electronic device and a storage medium to improve the problem of high storage costs in devices in the prior art.

[0005] In order to solve the above problems, in a first aspect, the present application provides a file compression method, which is applied to a compression terminal, and the method includes:

[0006] Convert the upgrade file to obtain the target code segment and target data segment;

[0007] Performing instruction replacement on the target code segment to obtain target instruction data;

[0008] The target instruction data and the target data segment are compressed to obtain a target file.

[0009] In the above implementation method, by converting the upgrade file when upgrading the firmware, the target code segment and the target data segment can be obtained. Since the data in the target code segment is relatively regular and has a strong regularity, while the data in the target data segment is relatively disordered and has a weak regularity, and the volume of the target code segment is much larger than the target data segment, the target code segment and the target data segment are processed separately, the target code segment is replaced with instructions, and the instructions with longer code length in the target code segment are replaced with target instruction data with the same function and shorter code length, and then the target instruction data and the target data segment are compressed, a smaller target file can be obtained, which effectively improves the compression ratio and compression effect when compressing the upgrade file, thereby saving the storage space occupied by the target file during the upgrade and saving storage costs.

[0010] Optionally, performing instruction replacement on the target code segment to obtain target instruction data includes:

[0011] Performing format conversion on the initial instructions in the target code segment to obtain standard instructions whose instruction formats meet the preset format;

[0012] Identifying a plurality of consecutive, associated instructions in the standard instructions and identifying them as consecutive instructions in the target code segment;

[0013] The plurality of consecutive instructions are replaced based on an instruction template dictionary to generate the target instruction data.

[0014] In the above implementation, since the instruction formats of the multiple initial instructions in the target code segment are different before compression, it may be impossible to decompress and run the multiple instructions with different instruction formats normally during decompression. Therefore, the instruction formats of the multiple initial instructions with different instruction formats can be transformed before the instructions are replaced. After the transformation, multiple standard instructions with multiple instruction formats that meet the preset format can be obtained. By transforming the format, the decompressed file can be decompressed and run normally. The standard instructions are identified, and the multiple continuous and related standard instructions identified are used as continuous instructions in the target code segment. The continuous instructions with longer code lengths are replaced by the instruction template dictionary, which can effectively reduce the size of the target code segment, thereby reducing the size of the file during the upgrade.

[0015] Optionally, replacing the plurality of consecutive instructions based on an instruction template dictionary to generate the target instruction data includes:

[0016] Determining the instruction template dictionary corresponding to the target code segment, wherein the instruction template dictionary includes a plurality of virtual instructions whose code lengths meet a preset length;

[0017] According to the plurality of virtual instructions in the instruction template dictionary, a plurality of corresponding consecutive instructions are replaced with a plurality of target virtual instructions to generate the target instruction data.

[0018] In the above implementation, when replacing instructions in a target code segment, by determining the instruction template dictionary corresponding to the target code segment, it is possible to replace a matching set of instructions containing multiple instructions with a single target virtual instruction based on multiple code lengths in the instruction template dictionary. This generates target instruction data that is smaller than the target code segment. The target instruction data includes multiple replaced target virtual instructions and multiple unreplaced consecutive instructions. By replacing consecutive instructions with target virtual instructions, the file size during the upgrade can be reduced, thereby reducing storage space.

[0019] Optionally, determining the instruction template dictionary corresponding to the target code segment includes:

[0020] determining a plurality of instruction templates based on the target code segment;

[0021] Traversing the target code segment according to each instruction template to obtain an instruction sequence corresponding to a plurality of consecutive instructions;

[0022] Determining a plurality of storage space values based on a plurality of the instruction sequences and a corresponding plurality of the instruction templates;

[0023] The instruction templates corresponding to the plurality of storage space values are screened according to a preset storage space threshold to obtain a plurality of target instruction templates, and the plurality of target instruction templates are used as the instruction template dictionary.

[0024] In the above implementation, the instruction template dictionary corresponding to the target code segment can be determined by an algorithm. Based on the input target code segment, multiple instruction templates are determined, and the target code segment is traversed based on the instruction template, and multiple instruction sequences corresponding to multiple continuous instructions that can match the instruction template are statistically obtained. The storage space value can be calculated based on the size of the instruction sequence and the instruction template. The storage space value is the size of the storage space that can be saved when the instruction template is used to replace the continuous instructions. After the traversal of multiple instruction templates is completed, the instruction templates corresponding to the multiple calculated storage space values are screened according to the preset storage space threshold to obtain multiple target instruction templates that can save storage space when upgrading. The multiple target instruction templates are used as the instruction template dictionary corresponding to the target code segment to replace the target code segment accordingly.

[0025] Optionally, the replacing a plurality of corresponding consecutive instructions with a plurality of target virtual instructions according to the plurality of virtual instructions in the instruction template dictionary to generate the target instruction data includes:

[0026] Analyzing and processing the plurality of consecutive instructions to determine, from the plurality of virtual instructions in the instruction template dictionary, a plurality of target virtual instructions that the plurality of consecutive instructions match;

[0027] The plurality of matching continuous instructions are replaced based on the plurality of virtual instructions to obtain the replaced target instruction data.

[0028] In the above implementation, since the continuous instructions in the target code segment can be multiple different types of instructions, and the instruction template dictionary also has multiple different types of virtual instructions, the multiple continuous instructions in the target code segment can be analyzed and processed and matched with the multiple virtual instructions in the instruction template dictionary. When the analysis result matches the virtual instruction, the continuous instruction can be replaced with the corresponding virtual instruction as the target virtual instruction corresponding to the continuous instruction. Different types of continuous instructions can be replaced with corresponding virtual instructions, so that multiple continuous instructions in the target code segment can be replaced accordingly.

[0029] Optionally, converting the upgrade file to obtain a target code segment and a target data segment includes:

[0030] Obtain the corresponding upgrade file when upgrading the firmware;

[0031] The upgrade file is compiled based on the target tool chain to obtain the target code segment and the target data segment.

[0032] In the above implementation method, the upgrade file can be a binary file for updating corresponding to the firmware. After the upgrade file is developed and obtained, the binary data in the upgrade file can be compiled or linked through the target tool chain, and the target code segments with more regular data and stronger regularity and the target data segments with more disordered data and weaker regularity can be determined, so as to process the target code segments and target data segments with different regularity and regularity of the binary data separately, thereby improving the compression efficiency and compression effect of the file.

[0033] In a second aspect, the present application further provides a file compression device, the device comprising:

[0034] The conversion module is used to convert the upgrade file to obtain the target code segment and the target data segment;

[0035] An instruction replacement module, configured to perform instruction replacement on the target code segment to obtain target instruction data;

[0036] The compression module is used to compress the target instruction data and the target data segment to obtain a target file.

[0037] In a third aspect, the present application provides a file upgrade method, which is applied to a decompression terminal, and the method includes:

[0038] Receiving a target file, wherein the target file is a file compressed using any one of the file compression methods described above;

[0039] Decompressing the target file to obtain target instruction data and target data segments;

[0040] Performing instruction restoration on the target instruction data to obtain an upgrade file consisting of a target code segment and the target data segment;

[0041] The firmware is upgraded based on the upgrade file.

[0042] In the above implementation, when the decompression terminal is upgrading the firmware, it can receive the compressed target file sent from the compression terminal, decompress the target file, obtain the target instruction data and target data segment, and perform an instruction restoration operation on the target instruction data to obtain the restored target code segment. The target code segment and target data segment serve as the upgrade file for the firmware upgrade based on the upgrade file. When upgrading based on the target file, the corresponding upgrade file can be obtained, eliminating the need to set up specific hardware in the decompression terminal to decompress the target file, effectively improving upgrade efficiency and saving storage costs.

[0043] In a fourth aspect, the present application further provides a file upgrade device, the device comprising:

[0044] A receiving module, configured to receive a target file, wherein the target file is a file compressed using any one of the file compression methods described above;

[0045] A decompression module, used for decompressing the target file to obtain target instruction data and target data segments;

[0046] An instruction restoration module, configured to perform instruction restoration on the target instruction data to obtain an upgrade file consisting of a target code segment and the target data segment;

[0047] An upgrade module is used to upgrade the firmware based on the upgrade file.

[0048] In a fifth aspect, the present application also provides an electronic device, which includes a memory and a processor, wherein the memory stores program instructions, and when the processor reads and runs the program instructions, it executes the steps in any implementation of the above-mentioned file compression method and file upgrade method.

[0049] In a sixth aspect, the present application also provides a computer-readable storage medium, in which computer program instructions are stored. When the computer program instructions are read and executed by a processor, the steps in any implementation of the above-mentioned file compression method and file upgrade method are executed.

[0050] In summary, the present application provides a file compression method, upgrade method, device, electronic device and storage medium. By replacing and restoring the instructions of the file during the upgrade, the compression ratio and compression effect of the upgraded file are effectively improved, and the storage space occupied by the file during the upgrade in the device is reduced, thereby saving storage costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0052] Figure 1 A block diagram of an electronic device provided in an embodiment of the present application;

[0053] Figure 2 A flowchart of a file compression method provided in an embodiment of the present application;

[0054] Figure 3 A detailed flowchart of step S300 provided in an embodiment of the present application;

[0055] Figure 4a-4b A schematic diagram of instruction format conversion provided in an embodiment of the present application;

[0056] Figure 5 A detailed flowchart of step S330 provided in an embodiment of the present application;

[0057] Figure 6 A detailed flowchart of step S331 provided in an embodiment of the present application;

[0058] Figure 7 A detailed flowchart of step S332 provided in an embodiment of the present application;

[0059] Figure 8a1-Figure 8a2 A schematic diagram of the format of the first target virtual instruction provided in an embodiment of the present application;

[0060] Figure 8b A schematic diagram of the format of the second target virtual instruction provided in an embodiment of the present application;

[0061] Figure 8c A schematic diagram of the format of the third target virtual instruction provided in an embodiment of the present application;

[0062] Figure 8d A schematic diagram of the format of the fourth target virtual instruction provided in an embodiment of the present application;

[0063] Figure 8e A schematic diagram of the format of the fifth target virtual instruction provided in an embodiment of the present application;

[0064] Figure 9 A detailed flowchart of step S200 provided in an embodiment of the present application;

[0065] Figure 10 A flowchart of a file upgrade method provided in an embodiment of the present application;

[0066] Figure 11 A schematic diagram of the module structure of a file compression device provided in an embodiment of the present application;

[0067] Figure 12 A schematic diagram of the module structure of a file upgrade device provided in an embodiment of the present application.

[0068] Icons: 100-electronic device; 111-memory; 112-storage controller; 113-processor; 114-peripheral interface; 115-input and output unit; 116-display unit; 600-file compression device; 610-conversion module; 620-instruction replacement module; 630-compression module; 700-file upgrade device; 710-receiving module; 720-decompression module; 730-instruction restoration module; 740-upgrade module; F3-third function code; F7-seventh function code. DETAILED DESCRIPTION

[0069] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of them. Based on the embodiments of the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the embodiments of the present application.

[0070] Currently, the RISC-V instruction set is commonly used in a variety of computing devices, such as various types of IoT (Internet of Things), and various embedded devices. When compressing firmware upgrade files, although the RISC-V instruction set can provide 16-bit compressed instructions, due to its limited number of instructions, the size of the compiled binary executable file is still larger than that of similar RISC instruction sets, such as ARM (Advanced RISC Machines, a RISC microprocessor) and MIPS (Microprocessor without Interlocked Piped Stages architecture, a RISC processor). Therefore, the RISC-V instruction set needs to be compressed when used in practice.

[0071] In the prior art, due to the rapid software update speed in devices, the firmware in the devices needs to be regularly updated for upgrades. During upgrades, to save storage space, the firmware corresponding to the RISC-V instruction set is compressed. During upgrades, the RISC-V instruction set is usually compressed based on the CCRP (Compressed Code RISC Processor) method, and the compressed firmware is upgraded using an OTA method. However, the compression principle of CCPR is that when the upgraded device executes the instructions, it can decompress the instructions in the compressed file through specific hardware. During the upgrade, the updated firmware includes a complete executable binary file, and the original file and the updated binary file require the same amount of storage space. Therefore, the compression ratio when compressing the RISC-V instruction set affects the file size during the firmware upgrade. Currently, the compression ratio during compression is relatively low, resulting in poor compression effect after compression. The file size during the upgrade is still large, the storage space required for the upgrade is large, the storage cost in the device is high, and specific hardware is required for decompression, which cannot meet current compression requirements.

[0072] In order to solve the above problems, the embodiments of the present application provide a file decompression method and a file upgrade method. The file decompression method is applied to a compression terminal, and the file upgrade method is applied to a decompression terminal. Both the compression terminal and the decompression terminal can be electronic devices with logical computing functions such as servers, personal computers (PCs), tablet computers, smart phones, personal digital assistants (PDAs), etc., which can compress and decompress files during upgrades with a higher compression ratio to reduce the storage space occupied by the files and save storage costs.

[0073] Optionally, the compression terminal and the decompression terminal may be respectively arranged in different electronic devices, or may be arranged in the same electronic device.

[0074] Optionally, see Figure 1 , Figure 1 This is a block diagram of an electronic device provided in an embodiment of the present application. The electronic device 100 may include a memory 111, a storage controller 112, a processor 113, a peripheral interface 114, an input and output unit 115, and a display unit 116. It will be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the electronic device 100. For example, the electronic device 100 may further include Figure 1 More or fewer components than shown, or with Figure 1 Different configurations shown.

[0075] The aforementioned memory 111, storage controller 112, processor 113, peripheral interface 114, input / output unit 115, and display unit 116 are electrically connected to each other, directly or indirectly, to enable data transmission or interaction. For example, these components may be electrically connected to each other via one or more communication buses or signal lines. The aforementioned processor 113 is used to execute the executable modules stored in the memory.

[0076] The memory 111 may be, but is not limited to, a random access memory (RAM), a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), etc. The memory 111 is used to store programs, and the processor 113 executes the programs after receiving an execution instruction. The method executed by the electronic device 100 defined by the process disclosed in any embodiment of the present application can be applied to the processor 113 or implemented by the processor 113.

[0077] The processor 113 may be an integrated circuit chip with signal processing capabilities. The processor 113 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The methods, steps, and logic block diagrams disclosed in the embodiments of the present application may be implemented or executed. The general-purpose processor may be a microprocessor or any conventional processor.

[0078] The peripheral interface 114 couples various input / output devices to the processor 113 and the memory 111. In some embodiments, the peripheral interface 114, the processor 113, and the memory controller 112 can be implemented in a single chip. In other embodiments, they can be implemented in separate chips.

[0079] The input and output unit 115 is used to provide input data to the user. The input and output unit 115 can be, but is not limited to, a mouse and a keyboard.

[0080] The above-mentioned display unit 116 provides an interactive interface (such as a user operation interface) between the electronic device 100 and the user or is used to display image data for the user's reference. In this embodiment, the display unit can be a liquid crystal display or a touch display. If it is a touch display, it can be a capacitive touch screen or a resistive touch screen that supports single-point and multi-touch operations. Supporting single-point and multi-touch operations means that the touch display can sense touch operations generated simultaneously from one or more positions on the touch display, and hand over the sensed touch operations to the processor for calculation and processing. In an embodiment of the present application, the display unit 116 can display the status of file compression or decompression, etc.

[0081] The electronic device in this embodiment can be used to execute each step in each file compression method and file upgrade method provided in the embodiment of this application. The implementation process of the file compression method and file upgrade method is described in detail below through several embodiments.

[0082] See also Figure 2 , Figure 2 A flowchart of a file compression method provided in an embodiment of the present application is provided. The method may include steps S200-S400.

[0083] Step S200: convert the upgrade file to obtain a target code segment and a target data segment.

[0084] The upgrade file is a file corresponding to the original file in the device during a firmware upgrade. It can be a binary file updated after software development and debugging, including the source code used during the upgrade. Because the upgrade file contains multiple different types of data, by converting the source code in the upgrade file, the upgrade file can be converted and classified to obtain target code segments with more regular and orderly data and target data segments with less regular and disordered data, so that different types of target code segments and target data segments can be processed separately.

[0085] Step S300: performing instruction replacement on the target code segment to obtain target instruction data.

[0086] Among them, when generating the target code segment, since the instructions in the RISC-V instruction set are streamlined instructions, when the multiple instructions after conversion are arranged in sequence, there will be a certain correlation between the consecutive instructions, and multiple consecutive instructions with correlation can be used as continuous instructions. Since the continuous instructions in the target code segment contain multiple instructions, the code length (code size) of the continuous instructions is long, and the storage space occupied in the target code segment is large. By replacing the continuous instructions containing multiple instructions and having a long code length with a virtual instruction with a shorter code length, the target instruction data with an overall code length shorter than the target code segment after replacement is obtained, which can reduce the storage space occupied by the target code segment.

[0087] Step S400: compress the target instruction data and the target data segment to obtain a target file.

[0088] After the replacement of the instructions in the target code segment is completed, the replaced target instruction data and the target data segment are compressed together, so that a target file with a smaller size and smaller storage space can be obtained after compression.

[0089] Optionally, a standard compression method may be used, i.e., a lossless compression algorithm may be used to compress the target instruction data and target data segments, so that the compressed target file can be decompressed and restored to the target instruction data and target data segments before compression, without loss of information after the data is compressed. For example, lossless compression algorithms may include LZ77 encoding, LZSS encoding, LZMA encoding, and other lossless compression algorithms.

[0090] exist Figure 2In the embodiment shown, different types of target code segments and target data segments in the upgrade file can be processed separately, effectively improving the compression ratio and compression effect when compressing the upgrade file, thereby saving the storage space occupied by the target file during the upgrade and saving storage costs.

[0091] Optionally, see Figure 3 , Figure 3 A detailed flow chart of step S300 is provided in an embodiment of the present application. Step S300 may further include steps S310-S330.

[0092] Step S310 , performing format conversion on the initial instructions in the target code segment to obtain standard instructions whose instruction formats meet a preset format.

[0093] Among them, since the instruction formats of multiple initial instructions in the target code segment may be different, and the different formats may cause the device to be unable to normally decompress and run multiple instructions with different instruction formats when decompressing the file, the multiple initial instructions in the target code segment can be formatted, and the multiple standard instructions with different instruction formats can be converted into standard instructions that meet the preset format, so that the file can be normally decompressed and run. Among them, the preset format can be a specified instruction format, for example, the lowest bit is the opcode, the next bit is the function code, etc. After the format of the instruction is converted, the format of the instruction can be made more regular, and the specific operation represented by the current instruction can be replaced with the low bit. It can also be used to quickly find the unused opcodes in the instruction when replacing the instruction.

[0094] For example, see Figure 4a-4b , Figure 4a-4b A schematic diagram of instruction format conversion provided in an embodiment of the present application, wherein: Figure 4a It is a 32-bit initial instruction format. Figure 4b For Figure 4a The instruction format of the standard instruction after the format transformation of a 32-bit initial instruction. Among them, there are multiple basic instruction formats in the initial instruction, namely R-type, I-type, S-type, B-type, U-type and J-type. Each basic instruction format has multiple data such as operation code (opcode), function code (funct3: represents a 3-bit function code, funct7: represents a 7-bit function code), register (rs1 and rs2) and immediate value (imm represents immediate value of different lengths). The multiple data are located in different bits. Figure 4aIn the embodiment shown, the third function code F3 is in a higher bit position separated from the register or immediate value, and the seventh function code F7 is in the highest bit position. During the format conversion, the positions of the third function code F3 and the seventh function code F7 can be adjusted, and other data can be adjusted accordingly so that the third function code F3 and the seventh function code F7 can be in a lower bit position, thereby obtaining multiple standard instructions whose instruction formats conform to the preset format.

[0095] Step S320 , identifying a plurality of consecutive and associated instructions in the standard instructions, and identifying them as consecutive instructions in the target code segment.

[0096] Among them, the standard instructions after compilation and linking are arranged in sequence, and there will be a certain correlation between several consecutive standard instructions. By identifying the standard instructions, multiple consecutive and correlated standard instructions can be used as consecutive instructions in the target code segment, so that multiple standard instructions can be replaced with one instruction during replacement.

[0097] Step S330 : replacing the plurality of consecutive instructions based on an instruction template dictionary to generate the target instruction data.

[0098] Among them, multiple consecutive instructions in the target code segment can be replaced according to the instruction template dictionary, and the consecutive instructions can be replaced with matching virtual instructions, thereby effectively reducing the size of the target code segment.

[0099] exist Figure 3 In the illustrated embodiment, by performing format conversion and instruction replacement on the instructions in the target code segment, the size of the target code segment can be effectively reduced, thereby obtaining target instruction data with a smaller size.

[0100] Optionally, see Figure 5 , Figure 5 A detailed flow chart of step S330 is provided in an embodiment of the present application. Step S330 may further include steps S331-S332.

[0101] Step S331: Determine the instruction template dictionary corresponding to the target code segment.

[0102] The instruction template dictionary includes multiple virtual instructions whose code lengths meet preset limits. These virtual instructions are not restricted by hardware, architecture performance, or instruction code length, and can be flexibly defined and generated by algorithms. High-frequency instruction sequences can be generated using shorter encoding formats. The algorithm can determine the instruction template dictionary used to replace consecutive instructions in a target code segment. Based on the specific instructions in the target code segment, the corresponding instruction template dictionary can be generated for replacement, satisfying a variety of application scenarios and suitable for various firmware upgrades.

[0103] Step S332 : According to the plurality of virtual instructions in the instruction template dictionary, a plurality of corresponding continuous instructions are replaced with a plurality of target virtual instructions to generate the target instruction data.

[0104] When performing instruction replacement on consecutive instructions in a target code segment, multiple consecutive instructions are replaced with corresponding multiple target virtual instructions. The target instruction data includes the replaced target virtual instructions and multiple consecutive instructions that have not been replaced. Thus, the consecutive instructions in the target code segment are compressed through instruction replacement, resulting in target instruction data with a shorter code length.

[0105] exist Figure 5 In the illustrated embodiment, the target instruction data composed of a plurality of replaced target virtual instructions is smaller than the target code segment, thereby reducing the file size during the upgrade and saving storage space.

[0106] Optionally, see Figure 6 , Figure 6 A detailed flow chart of step S331 is provided in an embodiment of the present application. Step S331 may further include steps S3311-S3314.

[0107] Step S3311: Determine multiple instruction templates based on the target code segment.

[0108] The target code segment is input into the algorithm for calculation, and a search is performed in the instruction template database based on the input target code segment to determine a plurality of instruction templates corresponding to the target code segment.

[0109] Optionally, when performing instruction replacement, an instruction template database corresponding to the upgraded firmware can be called, or a corresponding instruction template database can be established based on the firmware upgrade file. The instruction template database can include templates corresponding to multiple types of continuous instructions. The instruction template database can be updated in real time based on the type of continuous instructions, and templates in the instruction template database can be added or deleted to maintain the real-time and validity of the instruction template database.

[0110] Step S3312: traverse the target code segment according to each instruction template to obtain an instruction sequence corresponding to a plurality of the consecutive instructions.

[0111] Among them, by traversing the target code segment according to each determined instruction template, multiple instruction sequences corresponding to multiple consecutive instructions matching multiple instruction templates in the target code segment can be obtained, and the number of instruction sequences obtained by counting is recorded as N (N>0 and is an integer), and the consecutive instructions corresponding to the multiple instruction sequences are used as instructions that need to be replaced in the target code segment.

[0112] Step S3313: Determine multiple storage space values based on the multiple instruction sequences and the corresponding multiple instruction templates.

[0113] Among them, the byte size of any instruction template is denoted as T, and the byte size of the continuous instructions corresponding to the instruction template is denoted as S. Combined with the byte size of the instruction template, the corresponding number of instruction sequences and the byte size of the continuous instructions, the size of the storage space that can be saved when using the instruction template to replace the continuous instructions can be calculated, that is, the storage space value, and the storage space value R = N (ST) bytes.

[0114] Optionally, the amount of storage space that can be saved when each instruction template replaces the corresponding continuous instructions is calculated to obtain multiple storage space values. The multiple storage space values can be stored in the entry (key-value pair object) corresponding to each instruction template in the instruction template database to store the multiple storage space values accordingly.

[0115] Step S3314 , screening the instruction templates corresponding to the plurality of storage space values according to a preset storage space threshold to obtain a plurality of target instruction templates, and using the plurality of target instruction templates as the instruction template dictionary.

[0116] Among them, after calculating the storage space values corresponding to all instruction templates that can match the target code segment, multiple instruction templates can be sorted according to multiple storage space values stored in the instruction template database. The sorting order can be in order from large to small according to the storage space value or from small to large. On the basis of this sorting, multiple instruction templates are screened according to a preset storage space threshold. The storage space threshold can be the size of the minimum storage space saved when improving the compression ratio and compression effect of the instruction. Multiple instruction templates with storage space values greater than the storage space threshold are screened out as multiple target instruction templates that meet the compression conditions. Multiple instruction templates with storage space values less than the storage space threshold are non-target instruction templates that do not meet the compression conditions. The instruction template dictionary for instruction replacement is composed of multiple target instruction templates, and each target instruction template is a corresponding virtual instruction.

[0117] Optionally, you can first determine the storage space value of an instruction template, then determine the second instruction template, and determine the storage space value of the second instruction template, repeat the steps of instruction templates and corresponding storage space values until all instruction templates in the instruction template database are traversed.

[0118] exist Figure 6 In the illustrated embodiment, multiple target instruction templates that save a large storage space during upgrading can be obtained, and the multiple target instruction templates are used as instruction template dictionaries corresponding to the target code segments to correspondingly replace the target code segments.

[0119] Optionally, see Figure 7 , Figure 7 A detailed flow chart of step S332 is provided in an embodiment of the present application. Step S332 may further include steps S3321-S3322.

[0120] Step S3321 : Analyze and process the plurality of consecutive instructions to determine, from the plurality of virtual instructions in the instruction template dictionary, a plurality of target virtual instructions that match the plurality of consecutive instructions.

[0121] Among them, since the continuous instructions in the target code segment can be instructions of multiple different types, and the instruction template dictionary also has multiple different types of virtual instructions, the multiple continuous instructions in the target code segment can be analyzed and processed and matched with the multiple virtual instructions in the instruction template dictionary. The analysis and processing can be to perform semantic analysis on the continuous instructions, scan the continuous instructions, and match them with the operations in the multiple virtual instructions in the instruction template dictionary. When a consistent virtual instruction is matched, the virtual instruction is used as the target virtual instruction corresponding to the continuous instruction. When no consistent virtual instruction is matched, the continuous instruction cannot be replaced.

[0122] Step S3322: Replace the multiple matching continuous instructions based on the multiple virtual instructions to obtain the replaced target instruction data.

[0123] Wherein, based on the determined target virtual instructions, multiple consecutive instructions matching each target virtual instruction can be replaced to obtain target instruction data consisting of the replaced target virtual instruction and multiple unreplaced consecutive instructions.

[0124] Optionally, the replacement may include the following:

[0125] When the matched target virtual instructions include push instructions and pop instructions, for example, refer to Figure 8a1-Figure 8a2 , Figure 8a1-Figure 8a2A schematic diagram of the format of the first target virtual instruction provided in an embodiment of the present application is shown below. Figure 8a1 The instruction format when the target virtual instruction is pushed into the stack, Figure 8a2 This is the instruction format for when the target virtual instruction is popped. The opcode of the target virtual instruction occupies 7 bits, and excluding the RA register, there are five other registers, each occupying 5 bits. Because compilers, such as GCC (GNU Compiler Collection), keep the position of the RA register in the code relatively fixed when pushing and popping consecutive instructions, the RA register in the virtual instruction can be ignored during replacement. The other five registers correspond to the 32 general registers in the RISC-V instruction set, and the consecutive instructions can be replaced using the 5 bits of the five registers in the virtual instruction.

[0126] When the matched target virtual instruction is related to a function call, for example, when calling a function through a C language function pointer, the compiler generates 3 instructions as continuous instructions, and the continuous instructions include 10 bytes. Therefore, the 3-byte pcall (call) virtual instruction can be used as the target virtual instruction to replace the continuous instructions. For example, see Figure 8b , Figure 8b A schematic diagram of the format of the second target virtual instruction provided in an embodiment of the present application, wherein the opcode (pcall) of the target virtual instruction occupies 7 bits, and the index (the value or reference to the value in the return table or area) points to the actual address of the called function in the instruction template dictionary, so that it can be replaced with a smaller pcall instruction, and can be called by multiple functions. The actual address of the called function is placed in the instruction template dictionary, and the process of being used by other calling instructions can be repeated to further save storage space. Optionally, due to the characteristics of the RISC-V instruction set in the upgrade file, direct function calls with a relative range greater than 1MiB can be made, and the target code segment obtained will generate two 4-byte instructions as continuous instructions, a total of 8 bytes, which can be replaced by one 3-byte pcall virtual instruction. The specific format is similar to Figure 8b The format shown in will not be described again.

[0127] When the matched target virtual instruction includes linkage variables, such as global variables, static variables, etc., for example, when there are linkage variables in the target code segment, two 4-byte instructions can be generated as consecutive instructions, totaling 8 bytes to access, and load the global variable g_value into register a5. See Figure 8c , Figure 8cA format diagram of the third target virtual instruction provided in an embodiment of the present application, in which the opcode in the matching target virtual instruction is 5 bits, and the register num can be specified as one of the 32 general registers in the RISC-V instruction set. Since the 14 bits in the index function point to the address of the global variable in the instruction template dictionary, it is similar to the replacement method when calling a function. Continuous instructions can be replaced with a 3-byte virtual instruction. When the pointed global variable is frequently used multiple times, the global variable can also be added to the instruction template dictionary as a new instruction template.

[0128] When the matched target virtual instruction includes array access in a high-level language, such as array access in C language, the compiler usually multiplies the size of the array element to be accessed by a register and adds the address of the array element to be accessed by another register, so that two consecutive 6-byte instructions can be obtained as continuous instructions. For example, see Figure 8d , Figure 8d A format diagram of the fourth target virtual instruction provided in an embodiment of the present application, wherein the opcode of the target virtual instruction used is 5 bits, and the 5 bits in the register base and the register num correspond to the registers in the 32 general registers in the RISC-V instruction set. The size of the immediate number in the target virtual instruction, 9 bits, is used to represent the size of the array element at the time of access to replace consecutive instructions.

[0129] When the matched target virtual instruction includes displacement and arithmetic instructions, in the target code segment, the displacement operation is first performed on a certain register, and then the arithmetic operation is performed on another register to obtain two 6-byte consecutive instructions. For example, see Figure 8e , Figure 8e The format diagram of the fifth target virtual instruction provided in the embodiment of the present application can use a target virtual instruction with 3 bytes, an operation code of 4 bits, 4 registers with each register having 5 bits, and a displacement of 5 bits to replace continuous instructions.

[0130] When the matched target virtual instructions include several consecutive load (loading data from memory into registers) or store (storing data from registers into memory) instructions, since the RISC-V instruction set does not have multiple load and multiple store instructions similar to the ARM architecture, for structure access in high-level languages, multiple consecutive load and store instructions will be generated in the target code segment as continuous instructions. When replacing such continuous instructions, similar to the replacement of push and pop instructions, multiple load instructions and store instructions can be replaced by one multiple-load virtual instruction.

[0131] It is worth noting that when replacing instructions in the target code segment, including but not limited to the above replacement situations, when there are some consecutive instructions that appear repeatedly in the target code segment, matching and searching can also be performed through algorithms for replacement. Other replacement situations will not be described in detail.

[0132] exist Figure 7 In the embodiment shown, continuous instructions of different types and situations can be replaced using the replacement methods in the corresponding instruction functions, so that multiple instructions in the target code segment can be replaced accordingly, which increases the replacement range during instruction replacement and improves the effectiveness and efficiency of instruction replacement.

[0133] Optionally, see Figure 9 , Figure 9 A detailed flow chart of step S200 is provided in an embodiment of the present application. Step S200 may further include steps S210-S220.

[0134] Step S210: Obtain the upgrade file corresponding to the firmware upgrade.

[0135] When the firmware needs to be upgraded, the upgrade file for upgrading the firmware can be obtained by acquiring the binary executable file of the source code for updating determined when the software development has stabilized to a certain stage.

[0136] Step S220 , compiling the upgrade file based on the target tool chain to obtain the target code segment and target data segment.

[0137] Among them, the upgrade file is compiled or linked through the tool chain. While developing and debugging the upgrade file, it is also possible to determine the target code segments with relatively regular data and relatively disordered data and relatively weakly regular data included therein, so as to process the target code segments and target data segments with different regularity and regularity of binary data separately, thereby improving the compression efficiency and compression effect of the file.

[0138] Optionally, the tool chain may be a GNU tool chain, which can simultaneously compile and link multiple languages such as Java and C++.

[0139] exist Figure 9 In the illustrated embodiment, target code segments and target data segments in a binary executable file can be obtained through compilation and linking, so that the two types of data can be processed separately.

[0140] Optionally, see Figure 10 , Figure 10 A flowchart of a file upgrade method provided in an embodiment of the present application, the method may include steps S500-S530.

[0141] Step S500: receiving a target file.

[0142] The target file is a file compressed using a file compression method. The compression terminal that compresses the file and the decompression terminal that upgrades the file are communicatively connected so that the decompression terminal can receive the compressed target file sent from the compression terminal in real time.

[0143] Step S510: decompress the target file to obtain target instruction data and target data segments.

[0144] Among them, since the compression method for compressing the target file is a lossless compression method using a lossless compression algorithm, when the decompression terminal decompresses the target file, it can decompress the target instruction data and target data segment before compression, effectively reducing the storage space occupied by the file.

[0145] Step S520: Perform instruction restoration on the target instruction data to obtain an upgrade file consisting of a target code segment and the target data segment.

[0146] Among them, since the target instruction data contains multiple virtual instructions, it is necessary to perform instruction restoration processing on the target instruction data to restore the multiple virtual instructions to corresponding standard instructions, obtain the restored target code segment, and use the target code segment and target data segment as upgrade files during upgrade.

[0147] Step S530: Upgrade the firmware based on the upgrade file.

[0148] The restored upgrade file is used as a binary executable file to perform an upgrade operation on the firmware.

[0149] exist Figure 10 In the embodiment shown, the corresponding upgrade file can be obtained by decompressing the target file and performing instruction restoration processing. There is no need to set up specific hardware in the decompression terminal to decompress the target file, which effectively improves the efficiency of the upgrade and saves storage costs.

[0150] See also Figure 11 , Figure 11 This is a schematic diagram of the module structure of a file compression device provided in an embodiment of the present application. The file compression device 600 may include:

[0151] The conversion module 610 is used to convert the upgrade file to obtain a target code segment and a target data segment;

[0152] An instruction replacement module 620 is configured to perform instruction replacement on the target code segment to obtain target instruction data;

[0153] The compression module 630 is used to compress the target instruction data and the target data segment to obtain a target file.

[0154] In an optional embodiment, the instruction replacement module 620 may further include a format conversion submodule, an identification submodule and an instruction replacement submodule;

[0155] A format conversion submodule, configured to convert the format of the initial instructions in the target code segment to obtain standard instructions whose instruction formats meet a preset format;

[0156] an identification submodule, configured to identify a plurality of consecutive and associated instructions in the standard instructions, and identify them as consecutive instructions in the target code segment;

[0157] The instruction replacement submodule is used to replace the plurality of consecutive instructions based on an instruction template dictionary to generate the target instruction data.

[0158] In an optional embodiment, the instruction replacement submodule may further include a dictionary determination unit and a replacement unit;

[0159] a dictionary determining unit, configured to determine the instruction template dictionary corresponding to the target code segment, wherein the instruction template dictionary includes a plurality of virtual instructions whose code lengths meet a preset length;

[0160] A replacement unit is used to replace a plurality of corresponding continuous instructions with a plurality of target virtual instructions according to the plurality of virtual instructions in the instruction template dictionary to generate the target instruction data.

[0161] In an optional embodiment, the dictionary determination unit may further include a template determination subunit, a traversal subunit, a value determination subunit, and a screening subunit;

[0162] a template determination subunit, configured to determine a plurality of instruction templates based on the target code segment;

[0163] a traversal subunit, configured to traverse the target code segment according to each instruction template to obtain an instruction sequence corresponding to a plurality of the consecutive instructions;

[0164] a determination subunit, configured to determine a plurality of storage space values based on a plurality of the instruction sequences and a corresponding plurality of the instruction templates;

[0165] The screening subunit is used to screen the instruction templates corresponding to the multiple storage space values according to a preset storage space threshold to obtain multiple target instruction templates, and use the multiple target instruction templates as the instruction template dictionary.

[0166] In an optional embodiment, the replacement unit may further include an analysis subunit and a replacement subunit;

[0167] an analyzing subunit, configured to analyze and process the plurality of consecutive instructions to determine, from the plurality of virtual instructions in the instruction template dictionary, a plurality of target virtual instructions that match the plurality of consecutive instructions;

[0168] The replacement subunit is used to replace the multiple matching continuous instructions based on the multiple virtual instructions to obtain the replaced target instruction data.

[0169] In an optional embodiment, the conversion module 610 may further include an acquisition submodule and a compilation submodule;

[0170] The acquisition submodule is used to obtain the corresponding upgrade file when upgrading the firmware;

[0171] The compiling submodule is used to compile the upgrade file based on the target tool chain to obtain the target code segment and target data segment.

[0172] Since the principle of solving the problem by the file compression device 600 in the embodiment of the present application is similar to that of the embodiment of the aforementioned file compression method, the implementation of the file compression device 600 in this embodiment can refer to the description in the embodiment of the aforementioned file compression method, and the repeated parts will not be repeated.

[0173] See also Figure 12 , Figure 12 This is a schematic diagram of the module structure of a file upgrade device provided in an embodiment of the present application. The file upgrade device 700 may include:

[0174] A receiving module 710 is configured to receive a target file, where the target file is a file compressed using a file compression method;

[0175] A decompression module 720 is used to decompress the target file to obtain target instruction data and target data segments;

[0176] An instruction restoration module 730 is configured to perform instruction restoration on the target instruction data to obtain an upgrade file consisting of a target code segment and the target data segment;

[0177] The upgrade module 740 is configured to upgrade the firmware based on the upgrade file.

[0178] Since the principle of solving the problem by the file upgrade device 700 in the embodiment of the present application is similar to that in the embodiment of the aforementioned file upgrade method, the implementation of the file upgrade device 700 in this embodiment can refer to the description in the embodiment of the aforementioned file upgrade method, and the repeated parts will not be repeated.

[0179] An embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer program instructions. When the computer program instructions are read and executed by a processor, the steps of any one of the file compression method and file upgrade method provided in this embodiment are executed.

[0180] In summary, the embodiments of the present application provide a file compression method, upgrade method, device, electronic device and storage medium. By replacing and restoring the instructions of the file during the upgrade, the compression ratio and compression effect of the upgraded file are effectively improved, the storage space occupied by the file during the upgrade in the device is reduced, and storage costs are saved.

[0181] In the several embodiments provided in this application, it should be understood that the disclosed devices can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices according to the multiple embodiments of the present application. In this regard, each box in the block diagram can represent a module, a program segment or a part of a code, and the module, program segment or a part of the code contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in an order different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram, and the combination of the block diagrams, can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0182] In addition, the functional modules in each embodiment of the present application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0183] If the function is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Therefore, this embodiment also provides a computer program instruction stored in a readable storage medium, and when the computer program instruction is read and executed by a processor, the steps in any one of the methods described in the block data storage method are executed. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program code, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0184] The foregoing is merely an embodiment of the present application and is not intended to limit the scope of protection of the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included within the scope of protection of the present application. It should be noted that similar reference numerals and letters represent similar items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined or explained in subsequent figures.

[0185] The above is only a specific implementation method of the present application, but the scope of protection of the present application is not limited thereto. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed in this application, which should be covered by the scope of protection of the present application.

[0186] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, the elements defined by the phrase "comprising..." do not exclude the presence of other identical elements in the process, method, article, or device comprising the elements.

Claims

1. A file compression method, characterized in that: Applied to a compression terminal, the method includes: Convert the upgrade file to obtain the target code segment and target data segment; Performing instruction replacement on the target code segment to obtain target instruction data; compressing the target instruction data and the target data segment to obtain a target file; The step of replacing the target code segment with instructions to obtain target instruction data includes: performing format conversion on the initial instructions in the target code segment to obtain standard instructions whose instruction formats satisfy a preset format; identifying a plurality of continuous and associated instructions in the standard instructions and identifying them as continuous instructions in the target code segment; and replacing the plurality of continuous instructions based on an instruction template dictionary to generate the target instruction data. The replacing the plurality of consecutive instructions based on an instruction template dictionary to generate the target instruction data includes: determining the instruction template dictionary corresponding to the target code segment, wherein the instruction template dictionary includes a plurality of virtual instructions whose code lengths meet a preset length; replacing the plurality of corresponding consecutive instructions with a plurality of target virtual instructions based on the plurality of virtual instructions in the instruction template dictionary to generate the target instruction data; The method of determining the instruction template dictionary corresponding to the target code segment includes: determining multiple instruction templates based on the target code segment; traversing the target code segment according to each instruction template to obtain instruction sequences corresponding to multiple consecutive instructions; determining multiple storage space values based on the multiple instruction sequences and the corresponding multiple instruction templates; screening the instruction templates corresponding to the multiple storage space values according to a preset storage space threshold to obtain multiple target instruction templates, and using the multiple target instruction templates as the instruction template dictionary.

2. The method according to claim 1, characterized in that The step of replacing a plurality of corresponding continuous instructions with a plurality of target virtual instructions according to the plurality of virtual instructions in the instruction template dictionary to generate the target instruction data includes: Analyzing and processing the plurality of consecutive instructions to determine, from the plurality of virtual instructions in the instruction template dictionary, a plurality of target virtual instructions that the plurality of consecutive instructions match; The plurality of matching continuous instructions are replaced based on the plurality of virtual instructions to obtain the replaced target instruction data.

3. The method according to claim 1, characterized in that The conversion process of the upgrade file to obtain the target code segment and the target data segment includes: Obtain the corresponding upgrade file when upgrading the firmware; The upgrade file is compiled based on the target tool chain to obtain the target code segment and the target data segment.

4. A file compression device, characterized in that: The device comprises: The conversion module is used to convert the upgrade file to obtain the target code segment and the target data segment; An instruction replacement module, configured to perform instruction replacement on the target code segment to obtain target instruction data; A compression module, configured to compress the target instruction data and the target data segment to obtain a target file; The instruction replacement module includes a format conversion submodule, an identification submodule, and an instruction replacement submodule; the format conversion submodule is used to perform format conversion on the initial instructions in the target code segment to obtain a standard instruction whose instruction format meets a preset format; the identification submodule is used to identify multiple continuous and related instructions in the standard instruction and identify them as continuous instructions in the target code segment; the instruction replacement submodule is used to replace the multiple continuous instructions based on the instruction template dictionary to generate the target instruction data; The instruction replacement submodule includes a dictionary determination unit and a replacement unit; the dictionary determination unit is used to determine the instruction template dictionary corresponding to the target code segment, wherein the instruction template dictionary includes multiple virtual instructions whose code lengths meet a preset length; the replacement unit is used to replace multiple corresponding consecutive instructions with multiple target virtual instructions based on the multiple virtual instructions in the instruction template dictionary to generate the target instruction data; The dictionary determination unit includes a template determination subunit, a traversal subunit, a determination subunit and a screening subunit; the template determination subunit is used to determine multiple instruction templates based on the target code segment; the traversal subunit is used to traverse the target code segment according to each instruction template to obtain instruction sequences corresponding to multiple continuous instructions; the determination subunit is used to determine multiple storage space values based on multiple instruction sequences and corresponding multiple instruction templates; the screening subunit is used to screen the instruction templates corresponding to multiple storage space values according to a preset storage space threshold to obtain multiple target instruction templates, and use the multiple target instruction templates as the instruction template dictionary.

5. A file upgrade method, characterized in that: Applied to a decompression terminal, the method includes: receiving a target file, wherein the target file is a file compressed using the file compression method according to any one of claims 1 to 3; Decompressing the target file to obtain target instruction data and target data segments; Performing instruction restoration on the target instruction data to obtain an upgrade file consisting of a target code segment and the target data segment; The firmware is upgraded based on the upgrade file.

6. A file upgrade device, characterized in that: The device comprises: A receiving module, configured to receive a target file, wherein the target file is a file compressed using the file compression method according to any one of claims 1 to 3; A decompression module, used for decompressing the target file to obtain target instruction data and target data segments; An instruction restoration module, configured to perform instruction restoration on the target instruction data to obtain an upgrade file consisting of a target code segment and the target data segment; An upgrade module is used to upgrade the firmware based on the upgrade file.

7. An electronic device, characterized in that: The electronic device includes a memory and a processor, wherein program instructions are stored in the memory, and when the processor runs the program instructions, the steps in the method according to any one of claims 1 to 3 are executed.

8. A computer-readable storage medium, characterized in that: The readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the steps of the method according to any one of claims 1 to 3 are executed.

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