Pixel circuit with reduced crosstalk

Abstract

An active matrix display comprising: a power supply V DD ; an array of pixels comprising columns and rows, each pixel for emitting light having a separately controlled segmented electrode and an opposing electrode; a drive circuit comprising at least one data line providing a data signal for each pixel along a column and at least one scan line providing a scan signal for each pixel along a row, wherein the data signal controls a gate of a drive transistor, a source and a drain of the drive transistor being connected between the power supply V DD and the segmented electrode, the scan signal controls a gate of a scan transistor to load the data signal from the data line to the gate of the drive transistor; and a pixel control circuit in electrical contact with the segmented electrode, wherein the pixel control circuit prevents light emission of the pixel based on a value of the data signal of the pixel. The pixel control circuit comprises a decision circuit outputting a signal controlling a branch transistor, thereby preventing emission whenever the data signal indicates that the pixel should not emit. Crosstalk effects are reduced, in particular in OLED microdisplays.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 067516, filed on August 19, 2020, under Agent No. OLWK-0023-USP1.

[0003] References include PCT / US21 / 15031, entitled “STACKED OLED MICRODISPLAY WITH LOW-VOLTAGE SILICONBACKPLANE”, filed January 26, 2021, under Attorney General’s No. OLWK-0021-A-PCT; and PCT / US21 / 15038, entitled “OLED DISPLAY WITH PROTECTION CIRCUIT”, filed January 26, 2021, under Attorney General’s No. OLWK-0021-B-PCT. Also references U.S. Non-Provisional Application 16 / 695,191, entitled “MULTIMODAL MICROCAVITY OLED WITH MULTIPLE BLUE-EMITTING LAYERS”, filed November 26, 2019, under Attorney General’s No. OLWK-0020-US, now U.S. Patent 11,031,577. Technical Field

[0004] This invention relates to a pixel circuit, and more specifically, to a pixel circuit with reduced crosstalk. Background Technology

[0005] Crosstalk in a display refers to the unintended impact of one pixel's emitted brightness on another. This is undesirable because the affected pixel no longer provides the precise brightness required by the image signal, thus degrading image quality. Depending on the degree and nature of the crosstalk, important factors such as color reproduction, contrast (the difference between the highest and lowest brightness), grayscale, resolution, and "ghosting" in the display can all be negatively affected.

[0006] Any and all types of displays that include individually controlled pixels to produce an image can be affected by crosstalk to some extent. For example, crosstalk can affect image quality in LED, quantum dot, and OLED devices. The crosstalk problem tends to be independent of the type of display. For example, electroluminescent displays (ELD), backlit liquid crystal displays (LCD), light emitting diode displays (LED) including MicroLED displays, organic light emitting diode displays (OLED), plasma displays (PDP), stereoscopic displays, and quantum dot displays (QLED) can all suffer from some level of image degradation from crosstalk. The crosstalk problem also tends to be independent of the type of light emitting engine in the display, for example, displays based on LEDs, OLEDs, quantum dots, etc. can all be affected. Typically, pixels in flat panel displays (i.e., non-CRT) are controlled by some type of matrix addressing such as active matrix or passive matrix design. Both of these designs can suffer from crosstalk problems.

[0007] In some cases, crosstalk can be caused by the control circuitry of the display itself, for example, parasitic capacitance or residual current. However, for most designs, this tends not to be a large problem.

[0008] Not all displays are affected by crosstalk to the same degree, and some types of displays can be more susceptible to crosstalk problems. In particular, micro-displays, which are typically active matrix devices, in which individual pixels are small and relatively close together, are susceptible to crosstalk problems. Likewise, OLED displays, which depend on charge migration through vertically stacked organic layers, can also be susceptible to crosstalk problems due to lateral migration. Discussion of these types of crosstalk effects can be found in Diethelm et al., “Quantitative analysis of pixel crosstalk in AMOLED displays”, Journal of Information Display, 19(2), 61 (2018), Pennick et al., “Modelling crosstalk through common semiconductor layers in AMOLED displays”, J. Soc. Info. Display, 26(9), 546 (2018), and Braga et al., “Modeling Electrical and Optical Cross-Talk between Adjacent Pixels in Organic Light-Emitting Diode Displays”, Soc. Info. Display Digest, 50(S1), Paper 3.3 (2019).

[0009] Typically, micro-displays have a diagonal size of less than two inches, and pico-displays have a diagonal size of less than 0.25 inches. In most cases, micro-displays have high resolution, and the pixel pitch is typically 5-15 microns. They were first commercialized in the late 1990s and are ubiquitous in back-projection televisions, head-mounted displays (HMDs), head-up displays (HUDs), electronic viewfinders (EVFs), near-eye displays, augmented reality devices, virtual reality devices, smartwatches and other wearable devices, and digital cameras. Micro-displays can be made from a variety of light-emitting technologies, including MicroLEDs (light-emitting diodes) and organic light-emitting diodes (OLEDs), among others.

[0010] Currently, micro-LED micro-displays are based on standard gallium nitride (GaN) wafers, using standard LEDs. This approach has the potential to provide high-brightness display devices at a relatively low price without the issue of lifetime. Typically, the standard GaN wafer is patterned into a micro-LED array. A micro-LED display is then fabricated by integrating the micro-LED array and transistors. However, this approach has several manufacturing issues, including monolithic formation of micro-LEDs on transistors, pixel pitch, color generation, and spatial uniformity due to variations in color and brightness between individual micro-LEDs.

[0011] OLED technology has many attractive features of micro-LED technology for micro-displays. It is self-emissive, has excellent image quality, is efficient and has ultra-high color reproduction capability and extended color space. Furthermore, forming OLEDs on transistors is much easier and less costly than forming micro-LEDs, as the OLED layers can be placed in vacuum or coated directly on the transistor backplane. On the other hand, OLEDs can have limited brightness and limited lifetime.

[0012] OLED micro-displays are therefore very attractive from a cost and manufacturability perspective. Such devices typically use active matrix TFT circuitry on a non-conductive substrate such as glass or a silicon backplane to control individual pixels. Typically, these will be fabricated using OLEDs with individually controlled electrodes controlled by the circuitry in the backplane. As for the OLEDs, they can be configured so that each pixel is configured differently (i.e. each individual pixel emits red (R), green (G) or blue (B) light), or the OLEDs are configured collectively for all pixels and emit white light so that when used in conjunction with a color filter array (CFA), individual R, G or B pixels are formed. Of these, OLEDs that are collectively configured for all pixels are preferred as they are less expensive and easier to manufacture.

[0013] Crosstalk can be caused by optical and chemical / electrical mechanisms. Some optical processes that can increase the degree of crosstalk include waveguiding and light scattering within the device. Optical crosstalk can occur in any type of device that generates light internally. For OLEDs with a common layer for all pixels, some chemical / electrical processes that can increase crosstalk include lateral carrier migration from an active pixel region to an adjacent passive pixel region within the same layer. This migration of charge can generate voltages and currents in the adjacent pixel and result in unwanted and unintentional emission from the pixel.

[0014] It is desirable that the amount of crosstalk between pixels from all sources is 10% or less of the total emission from the pixel, preferably 3% or less, and most preferably 1% or less.

[0015] It is generally believed that multiple mechanisms contribute to crosstalk. Short-range mode interactions (0.2 μm to 0.7 μm) can be a combination of lateral charge carrier migration and optical mechanisms. Mid-range mode interactions (3 μm to 7 μm) can be primarily due to lateral charge carrier migration, but partly due to optical mechanisms. Long-range mode interactions (50 μm to 200 μm) can be primarily due to light scattering from the active pixel region to the passive region. It is also believed that waveguides based on pixel spacing contribute to even longer-range optical crosstalk.

[0016] Some useful methods for minimizing crosstalk problems caused by optical processes within display devices include:

[0017] Using pixel-limiting layers, scattering layers, or other types of optical barriers or structures between pixels helps to confine light propagation within the pixel and minimize light propagation across different pixels. See, for example, US10483310B2, US20170038597A1, US20190056618A1, CN110416247A, and CN110429196A.

[0018] - In devices with a color filter array (CFA), optimized color filters are used to reduce the optical waveguide between the air / glass interface and the reflective anode, including the use of optical filter layers specifically designed to absorb light propagating at high angles from the substrate normal direction. See, for example, US20160065914.

[0019] - Light scattering is reduced by minimizing the number of scattering sites. In particular, the amount of small particulate debris on or near the bottom electrode should be minimized. Scattering can also be caused by the roughness of the cathode or anode, depending on the composition and process used for deposition (see, for example, Shen et al., “Efficient Upper-Excited State Fluorescence in an Organic Hyperbolic Metamaterial”, Nano Lett., 18(3), 1693–1698 (2018).

[0020] - The entire electrode surface should be as flat and smooth as possible over the active pixel area and between pixels. In particular, it is known that protrusions, bumps or other structures forming the PDL (pixel defining layer) between pixels and extending over the anode surface within the pixel area help to scatter light back into the pixel area and prevent it from entering the adjacent (non-emitting) pixels. However, this approach is not very effective when there are thicker OLED layers over the structures. Light trapped within the thicker layers is more likely to be internally reflected within the layer so that it can pass through the structure to the other side. If the electrode and OLED layers are uniformly flat, waveguide light within the display layers is likely to continue uninterrupted until it is absorbed or reaches the edge of the display.

[0021] - Use of interlayer absorbers for waveguide light.

[0022] - Light absorption by the dielectric of the backplane.

[0023] Some useful approaches to minimize the problem of cross-talk in OLED devices due to carrier migration include:

[0024] - Use of pixel defining layers, trenches, separators, dividers or other types of physical barriers or structures between pixels, to help limit carrier migration to the initial pixel and minimize any carrier migration to different pixels. See, for example, US 20210151714, US 2020388658, US 2020 / 0066815, US 20190280062 Al, US 20190006443 A, US 20180180951 Al, CN 110148619 A and CN 110634922 A.

[0025] - Use of a ground plane under the segmented anode of the OLED. See, for example, US 10128317.

[0026] - Reducing lateral charge carrier migration by changing the layer thickness and composition of layers with high carrier mobility (e.g. HIL, HTL, CGL, ETL and EIL) to increase the “sheet resistance”. In particular, charge carriers (holes or electrons) are generated within the active area and can move laterally over the gap between the light emitting and non-light emitting areas. This problem can mainly occur in layers adjacent or close to one electrode. In some cases, CGLs (charge generating layers) can also play a role as they have very high carrier mobility. It is generally believed that the ordinary HIL and HTL layers on the anode can contribute most to this problem. It can be seen that once a hole is generated in the powered area of the HIL on one anode pad, it can migrate to the adjacent anode pad and the voltage generated by the hole can exceed the threshold voltage Vth of the OLED, so that the (not nominally light emitting) pixel emits light, irrespective of the image signal of that pixel. Furthermore, the hole can enter the conductive anode pad as an electron and flow laterally through the anode with very small lateral resistance. At the far side of the anode pad, the current can return to the HIL (as a hole) for jumping to the next non-light emitting anode pad. Thus, the problem of carrier migration is not only limited to the short distance between adjacent anode pads but can also have a component of longer distances. For this reason, special attention should be paid to the thickness and composition of both electrodes, in particular the anode. Thinner organic layers with smaller carrier mobility help to minimize these unwanted carrier migration processes. See, for example, US 20170317308 Al.

[0027] - Reducing lateral charge carrier migration by modifications to the layers to have a higher resistance in the area between electrode segments. See, for example, US 20201772651.

[0028] - Selecting materials with high carrier mobility for the organic layers. In particular, materials can be selected that contribute to minimize cross-talk. In this regard, the type and level of p-dopant added to the HIL (e.g. F4-TCNQ, F6-TCNNQ or HAT-CN) and the selection of HTM in the HIL or HTL (e.g. an aromatic amine compound such as NPB or spiro-TTB) can be important. P-doped or undoped HILs can also be effective. In some cases, an undoped HIL and a p-doped HTL can be used. Inorganic HIL materials such as Mo03, which can be mixed with organic materials, can also have advantages. See, for example, US 20170330918 Al, US 20170301864 Al and US 20170301861 Al.

[0029] - In OLEDs, it is advantageous to design the HIL and anode to create a barrier for charge from the HIL into the anode.

[0030] Cross-talk can also be reduced by compensation of the drive signals. The original image signals can be adjusted to compensate for the difference in light emission of each pixel due to cross-talk, to achieve the desired emission. However, this requires that the amount of cross-talk present in each pixel of each image is predictable, and that the image signals are recalculated for each image frame. This greatly increases the demand on computation and total computation time. This increases the cost of the device, and also impacts the response time. In this approach, a display relying solely on this approach cannot reproduce the partial color amounts in the high color saturation regions.

[0031] Generally, cross-talk is most noticeable and of most concern for pixels that should have minimal light emission or no light emission ("black") or relatively low emission. This is because even a small amount of additional unintended light due to cross-talk becomes a very large percentage of the total emission compared to the low level of emission or no emission from the pixel. For pixels with high emission, a small amount of light due to cross-talk should be less noticeable.

[0032] Cross-talk is also more problematic where there is a large difference in emission between a pixel and an adjacent or spatially proximate pixel. This can be a pixel of low luminance or "black" (no emission or minimal amount of emission) adjacent to a pixel of high luminance or at its maximum emission level. Cross-talk problems can also exist where a monochromatic emitting pixel (e.g., a red pixel) is adjacent to a pixel that emits a different color (e.g., a green pixel), even if the luminance values of both are similar. Furthermore, if a non-emitting pixel of a different color than an adjacent emitting pixel emits a different color due to cross-talk, the display cannot achieve high saturation of the primary and secondary colors.

[0033] There are two common situations where pixels with low level emission or no emission are located near pixels of high level emission. The first situation is on an image-by-image basis. It should be noted that most images are correlated, i.e., pixels close to each other typically have similar amounts of emission, so the degree of cross-talk is relatively low in that region. For example, in the center of a large black region or in the center of a large white region there will be little cross-talk. Only at the edges or boundaries within an image will there be a large difference in emission between pixels. Thus, a correlated emission region can not be uniform due to cross-talk, and be different in the center versus along the boundaries. The same problem occurs for correlated monochromatic pixels, where the color mixing along the edges and boundaries will be more pronounced.

[0034] The second case is a display in which the emission is generated by scanning individual pixels rather than all pixels emitting light at the same time. Examples of such devices include passive matrix and active matrix displays. In such displays, the pixels are arranged in a matrix of rows and columns. In an active matrix display, a data signal corresponding to the desired luminance is created based on the image for each pixel along a particular row. A scan line then allows the data signal to be passed to the pixels along that particular row, and the pixels produce the desired luminance according to the data signal. A data signal is then generated for the next row, and a scan line for the next row is activated so that the pixels in the next row can produce luminance. This row-by-row scanning is repeated to create the entire image, and this row-by-row scanning occurs within the threshold of visual perception. However, crosstalk causes some pixels to produce light when they should be in an “off’ state.

[0035] Therefore, it is desirable to prevent the emission of pixels in a pixelated display device due to crosstalk by eliminating or dissipating any voltage or current provided to the light generating portion of the pixel when the pixel should be in an “off’ or minimum emission state. While this solution can be applied to any type of display, it is particularly suitable when applied to OLED microdisplays, and even more desirably, to multi-mode (white) microcavity OLEDs used in combination with a CFA. This is due to the common layers in multi-mode microcavity OLEDs allowing for the migration of charge carriers from one “on’ pixel to another adjacent pixel that can be “off’, resulting in a sufficient voltage in the adjacent “off’ pixel to cause emission, and due to the layers in microcavity OLEDs having to be thick (to create the microcavity), which facilitates lateral charge carrier migration, and for multi-mode OLED microdisplays with 3 or more light emitting units stacked due to the high voltage required to drive these multi-stacked OLEDs. This also applies to OLED microdisplays having individually arranged R, G, and B emissive materials within a given pixel, but where all pixels share at least one common OLED layer.

[0036] US 20100091001 Al and US 8035580 describe a pixel circuit for digital driving of an OLED. When the pixel is in an “off’ state, a branch transistor connecting the anode of the OLED to a voltage source (whose potential can be set to be less than the potential at the cathode of the OLED) is used to prevent pixel emission due to current leakage through the drive transistor. When the scan line for that row of pixels is activated, the same data signal is applied to the gate of the branch transistor and the drive transistor.

[0037] CN107134257B describes a pixel circuit for an OLED microdisplay in which a branch transistor is used to prevent pixel emission due to current leakage through the drive transistor when the pixel is in an “off’ state. When the scan line for that row of pixels is activated, the same data signal is applied to the gate of the branch transistor and the drive transistor. The branch transistor is then turned on to allow the data signal to pass to the drive transistor, and the drive transistor is then turned on to allow the data signal to pass to the OLED. SENSEUS20180180951 describes a display device having a pixel circuit with a transistor whose source is connected to a node between a drive transistor and an anode of a light emitting device, and whose drain is connected to a potential supply line, which can be a ground line. The gate of the transistor is controlled by a scan line.

[0038] US10665161B2 describes a pixel circuit for preventing pixel emission due to current leakage through the drive transistor, in which there is a discharge section capable of causing the drive current to bypass the light emitting element. The discharge section comprises a transistor whose gate is controlled by a scan signal separate from the scan signal that controls the drive transistor.

[0039] US9324264B2 describes a pixel circuit for preventing pixel emission when the pixel is in an "off' state, which uses a bypass unit with a bypass transistor that connects the anode of the OLED to V VAR (which can be set to a potential less than that at the cathode of the OLED). In various embodiments, the gate of the bypass transistor is controlled by a scan line or a separate DC voltage source.

[0040] US9123294B2 describes a pixel circuit for compensating for the threshold voltage of the drive TFT. As part of the circuit, there is a transistor that allows the drive current to bypass the OLED so that there is no emission from the pixel. The gate of this transistor is controlled by the same scan line that is used to control the gate of the drive transistor or a different scan line.

[0041] US20030112205A1 describes a pixel circuit that can use a discharge circuit to reduce the occurrence of the residual image phenomenon, which discharges charge accumulated on the pixel. The discharge circuit comprises a bypass transistor whose gate is controlled by a scan line.

[0042] US202000066815 discloses a pixel circuit with a leakage current sink to prevent cross-talk between pixels, which includes a leakage current control transistor between a connection and a ground line, the connection being between a drive transistor and an emission transistor connected in series. The gate of the leakage current control transistor is controlled by V BIAS instead of a data signal, V BIAS which is the same for all pixels in the display.

[0043] US20180180951 describes a display device having a pixel circuit with a transistor whose source is connected to a node between a drive transistor and an anode of a light emitting device, and whose drain is connected to a potential supply line, which can be a ground line. The gate of the transistor is controlled by a scan line.

[0044] US20100253666 describes a pixel circuit with a discharge transistor connected between a node between the driving transistor and the pixel, the gate of which is controlled by a scan signal.

[0045] Lin et al. “UHD AMOLED Driving Scheme of Compensation Pixel and Gate Driver Circuits Achieving High-Speed Operation”, J. Elec. Devices Soc. 6 , 26 (2017) describes a pixel circuit for compensating Vth variations. As part of the circuit, there is a transistor in electrical contact with the OLED and V SS gate of the driving transistor, which allows the driving current to bypass the OLED. The gate of this branch transistor is controlled by a different scan line than the scan line used to control the scan transistor that controls the gate of the driving transistor.

[0046] Kimura et al. “New pixel driving circuit using self-discharging compensation method for high resolution OLED micro displays on a silicon backplane”, J. Soc. Info. Display, 25 (3), 167 (2017) discloses a pixel circuit for brightness uniformity, which includes a branch circuit between the anode of the OLED and V SS gate to improve contrast. This branch circuit has a transistor, the gate of which is controlled by a different scan line than the scan line used to control the scan transistor that controls the gate of the driving transistor.

[0047] Kwak et al, "Organic Light-Emitting Diode-on-Silicon Pixel Circuit Using the Source Follower Structure with Active Load for Microdisplays", Japanese Journal of Applied Physics, 50, 03CC05 (2011) describes a pixel circuit for improved uniformity which includes a shunt circuit between a node between the light emitting transistor and the anode of the OLED and ground. The gate of the shunt transistor is connected to the node so that Vg = Vs to limit the drain voltage at the emission transistor. The aim is not to exceed the maximum allowed V ds .

[0048] Vogel et al, "OLED microdisplays in near-to-eye applications: challenges and solutions", Proc. SPIE 10335, Digital Optical Technologies, 1022502 (2017) describes the problems of manufacturing OLED microdisplays. It states "The challenge of high brightness is to provide and modulate a forward voltage at each OLED pixel at a dynamic range level of 2 to 7 V (or even higher, depending on the OLED stack structure); this requires integrated drive transistors capable of withstanding voltage swings of 5 V or higher. This is a high voltage for advanced mixed-signal CMOS processes...". The reference also states "Due to the opaque CMOS backplane with a feasible voltage scan of about 5 V, only top-emitting single-cell and double-cell can be integrated". It describes OLED configurations which require higher operating voltages which leads to the need for transistors with a higher than 5 V nominal operating voltage and that such higher voltage transistors have an impact on aperture ratio and pixel size. SUMMARY

[0049] Some important features of the invention include but are not limited to:

[0050] An active matrix display comprising: a power supply V DD (1); an array of pixels (2) each for emitting light, composed of columns and rows, each pixel (2) having a separately controlled segmented electrode (109) and a counter electrode (125); a drive circuit comprising at least one data line (3) providing a data signal (V DATA ) for each pixel (2) along a column and at least one scan line (4) providing a scan signal (V SCAN ) for each pixel (2) along a row, wherein the data signal (VDATA ) controlling a gate of the drive transistor (T1), the source and drain of the drive transistor (T1) being connected between a power supply V DD (1) and the segmented electrode (109), a scan signal (V SCAN ) controlling a gate of the scan transistor (T4) such that a data signal (V DATA ) is loaded from a data line (3) to the gate of the drive transistor (T1); and a pixel control circuit (5) in electrical contact with the segmented electrode (109), wherein the pixel control circuit (5) prevents light emission of the pixel (2) based on a value of the data signal (V DATA ) of the pixel (2).

[0051] The pixel control circuit (5) can be attached to a node (NODE1) positioned between the drive transistor (T1) and the segmented electrode (109) along the power line. The pixel control circuit (5) prevents light emission by having a bypass transistor (T3) that allows an electrical connection between the segmented electrode (109) and a sink (6) to reduce voltage and / or current to a level below that required for light emission whenever the data signal (V DATA ) indicates that the pixel (2) should be non-emissive or have an emission below a threshold value. The pixel control circuit (5) is disabled when the value of the data signal (V DATA ) of the pixel (2) indicates that the emission exceeds the threshold value.

[0052] The pixel control circuit (5) can comprise a decision subunit (9) that compares a voltage of the data signal V DATA to a reference voltage V REF and provides an output voltage V OUTPUT based on a result of the comparison; and a latch subunit (10) that receives the output voltage V OUTPUT from the decision subunit (9) and controls the bypass transistor (T3) to enable or disable the electrical connection between the segmented electrode (109) and the sink (6) based on the output voltage V OUTPUT .

[0053] Additionally, the bypass transistor (T3) allows the electrical connection between the segmented electrode (109) and the sink (6) to reduce voltage and / or current to a level below that required for light emission whenever the scan signal (V SCAN ) indicates that the scan transistor (T4) should prevent the data signal (V DATA ) from being loaded to the gate of the drive transistor (T1) and the output voltage V OUTPUT is set to disable the bypass transistor (T3).

[0054] The pixel control circuit (5) can comprise a decision subunit (9) that compares a voltage of the data signal V DATAThe voltage and the reference voltage V REF The comparison is performed, and based on the comparison result, the output voltage V is provided. OUTPUT ; and a transistor (TB), the gate of which is scanned by a signal V. SCAN The control is connected in series between the gate of the decision subunit (9) and the branch transistor (T3), whenever the scan signal V SCAN Enables the transistor (TB) to output voltage V OUTPUT When applied to the gate of the branch transistor (T3), based on the output voltage V OUTPUT The value enables or disables the electrical connection between the segment electrode (109) and the receiver (6).

[0055] For any of the pixel control circuits mentioned above, where V REF and power supply V DD (1) The voltage is the same.

[0056] The aforementioned display can be an OLED microdisplay, specifically wherein the pixels (2) for emitting light are formed using a multimode microcavity OLED with a color filter array (129A, 129B, 129C), and may additionally have a stack of three or more light-emitting units (113, 117, 121), or may have a threshold voltage V of 5V or greater. th .

[0057] For any of the above displays, a switching transistor (T6) is connected in series between the driving transistor (T1) and the segment electrode (109), such that the driving transistor (T1) and the switching transistor (T6) are connected in series between the power supply (1) and the segment electrode (109). Both the driving transistor (T1) and the switching transistor (T6) can be p-channel transistors, and the branch transistor (T3) can be an n-channel transistor.

[0058] The aforementioned display has reduced crosstalk effects. Attached Figure Description

[0059] Figure 1 shows a simple prior art control circuit for OLEDs.

[0060] Figure 2 The basic pixel circuit of the present invention, having a basic pixel control circuit, is shown. 100 .

[0061] Figure 3 The pixel circuit of the present invention, with more detailed pixel control circuitry, is shown. 150 .

[0062] Figure 4 An embodiment of the determination circuit portion of a pixel control circuit using BJT components is shown.

[0063] Figure 5 Another embodiment of the decision circuit portion of the pixel control circuit using a BJT component is shown.

[0064] Figure 6 Another embodiment of the decision circuit portion of the pixel control circuit using a CMOS component is shown.

[0065] Figure 7 A pixel circuit of the present invention with a more detailed pixel control circuit is shown 200 .

[0066] Figure 8 An operational flowchart of the pixel circuit 200 is shown.

[0067] Figure 9A A pixel circuit of the present invention with a pixel control circuit that adds a circuit with a transistor T5 controlled by a scan line is shown 250 .

[0068] Figure 9B A pixel circuit of the present invention as a variant of 250 is shown 300 .

[0069] Figure 9C A pixel circuit of the present invention as another variant of 250 is shown 350 .

[0070] Figure 10A A pixel circuit of the present invention is shown 275 .

[0071] Figure 10B Details of one embodiment of the decision circuit 275 of the pixel circuit 9 are shown.

[0072] Figure 11 A pixel circuit of the present invention is shown 285 .

[0073] Figure 12 A cross-section of an OLED microdisplay 400 is shown, where the OLED is a multimode microcavity.

[0074] Figure 13 A pixel circuit of the present invention suitable for a microdisplay is shown 450 . DETAILED DESCRIPTION

[0075] It should be noted that any of the described features can be combined in any order or degree without limitation, unless incompatible.

[0076] For the purposes of the present disclosure, the term "over" or "above" means that the structure involved is located above another structure, i.e., on the side opposite the substrate. "Top," "uppermost," or "upper" means the side or surface that is farthest from the substrate, while "bottom," "lowermost," or "bottom" means the side or surface closest to the substrate. "Above" should be interpreted unless otherwise stated as meaning that the two structures can be in direct contact or there can be intervening layers between them. A "layer" is to be understood as having two sides or surfaces (uppermost and lowermost), and there can be multiple layers, not limited to a single layer.

[0077] For light-emitting units or layers, R denotes a layer that emits primarily red light (> 600 nm, ideally in the range of 620 nm to 660 nm), G denotes a layer that emits primarily green light (500 nm to 600 nm, ideally in the range of 540 nm to 565 nm), and B denotes a layer that emits primarily blue light (< 500 nm, ideally in the range of 440 nm to 485 nm). It is important that the R, G, and B layers can produce some light outside the indicated ranges, but the amount produced is always less than the primary color. Y (yellow) denotes a layer that emits a substantial amount of R and G light and a small amount of B light. "LEL" means light-emitting layer. Unless otherwise stated, wavelengths are expressed in vacuum values, not in situ values.

[0078] The threshold voltage (Vth) of an OLED stack can be estimated after the onset of significant light emission returns to the voltage axis by linear extrapolation of the I-V curve. This method is not precise because the I-V response curves of OLEDs can not be perfectly linear over their response range, so the value calculated in this way is not precise. The general range is + / - 10%. th ). This method is not precise because the I-V response curves of OLEDs can not be perfectly linear over their response range, so the value calculated in this way is not precise. The general range is + / - 10%.

[0079] Active matrix displays are generally understood to have an array of individually controlled pixels arranged in a two-dimensional array of orthogonal columns and rows. However, it is also understood that "columns" and "rows" are subjective terms and do not imply any particular orientation, but rather two groups of individual pixels that only overlap at a single pixel. In active matrix technology, "columns" are generally depicted as aligned in a vertical direction in the array, while "rows" are generally depicted as aligned in a horizontal direction in the array. Likewise, for all pixels along a "column", there is a common electrical connection, generally referred to as a "data line" and depicted in the vertical direction, and for all pixels along a "row", there is a common electrical connection, generally referred to as a "scan line" or "select line" and depicted in the horizontal direction. However, these conventional terms can or can not reflect the actual physical location of the pixels. It is understood that a "data signal" sent to a pixel controls the amount of brightness required for that pixel, while a "scan or select signal" controls the timing of sending the "data signal" and the receipt of the "data signal" by the pixel.

[0080] In active matrix displays, each pixel must have at least one individually controlled electrode that is separate and distinct from the individually controlled electrodes of other pixels in order to operate. In other words, the individually controlled electrode portion of each pixel is "segmented" or divided into individually controlled portions as compared to being common or continuous across all pixels. Typically, the electrical connection of the pixel circuitry to the light emitting element is achieved through the segmented electrodes. It is noted that in the context of this specification, a "pixel" is a single, unitary, and smallest unit and is not further subdivided. For example, a color pixel (i.e., a discrete dot in a color image) that can produce white light can be composed of three separate but spatially related "pixels", each emitting one of R, G, or B light, which collectively act as sub-pixels of the color pixel. It is also noted that a pixel can be composed of a single light emitting element or multiple jointly controlled light emitting elements that act together.

[0081] In the following, the terms "off and "on" are generally used for specific elements or features and can have different requirements depending on the kind of element. For a pixel, "off means no (or a minimum amount below a threshold value) light is emitted from the pixel, while "on" means at least some light above a minimum level (above a threshold value) is emitted. "On" can mean full emission or partial emission, i.e., some emission level above a minimum (ideally zero). For a light emitting engine in a pixel (i.e., an OLED or LED), "off means no measurable brightness above a minimum brightness, while "on" means there is a measurable brightness above a minimum brightness. For NMOS / PMOS circuit elements such as p-channel and n-channel transistors, "off means I ds essentially zero; "on" means I dsNon-zero, and at least some current flows through the transistor. This applies to all transistors including scan transistors, drive transistors, emission transistors and leg transistors, regardless of the type of transistor. In such elements, the "off' or "on" is controlled by the voltage applied to the device gate. By "off' in the case of a data signal or scan signal, it is meant that the data value applied to the pixel circuit, in particular the gate of the transistor, is such that any / all of the "off conditions described below are produced; likewise, by "on" it is meant that the data value applied to the pixel circuit, in particular the gate of the transistor, is such that any / all of the "on" conditions described below are produced.

[0082] The emission of an "off' pixel should not exceed 1% of the maximum emission, more preferably not exceed 0.01% of the maximum emission. Ideally, an "off' pixel should have no emission at all. An "off' pixel can also be referred to as a "dark" or "black" pixel, which are equivalent.

[0083] The minimum emission can be defined or set in terms of a threshold emission value, which will depend on the type and characteristics of the particular display. Typically, the threshold can be 1% or less of the maximum emission that a pixel is capable of, ideally less than 0.1% of the maximum emission, most ideally zero emission.

[0084] The data signals or image signals in a display are sent by the control circuit to each sub-pixel to control its emission level. Typically, these image signals are not continuous, but are quantized into a certain number of levels between a signal that produces the upper limit or maximum level of emission and a signal that produces no emission or a minimum amount of emission. These levels are referred to as Code Values or CVs (among other names). A common system used in displays is that CV=0 represents no emission and CV=255 represents maximum emission, so there are 254 discrete intermediate levels between the two extremes. For example, in 8-bit, sRGB-like color encoding, 1% intensity corresponds to about CV 26, while 0.01% corresponds to less than one CV. Note that with more than 8 bits or with a different non-linear encoding, 1% or 0.01% will correspond to different CVs. Ideally, the emission threshold of the PCC circuit should be <30 CV in CV terms, ideally <5 CV, and most ideally <0 CV, or equivalent if not 8-bit, sRGB-like color encoding.

[0085] The data signals or image signals in a display are sent by control circuitry to each sub-pixel to control its emission level. Typically, these image signals are not continuous, but are quantized into a certain number of levels between a signal that produces an upper limit or maximum level of emission and a signal that produces no emission or a minimum amount of emission. These levels are referred to as code values or CVs (among other names). A common system used in displays is that CV=0 represents no emission and CV=255 represents maximum emission, so there are 254 discrete intermediate levels between the two extremes. Thus, in a system that uses CV values between 0 and 255 to control the brightness of each pixel cell, the threshold value of the PCC used to activate that pixel cell can be CV=3 or less, and most desirably a CV of zero.

[0086] The purpose of the active matrix pixel circuit described above is to turn the light emitting element on (to cause emission to some extent) or off (no emission or minimal emission) based on the signal from the data line. The signal from the scan line only controls the timing of when the data signal is applied to the pixel. There will be no emission from the pixel when the value of the data signal meets any one of the following criteria:

[0087] - where the value of the data signal is not sufficient for the pixel circuit to allow light emission from the pixel;

[0088] - where the voltage at the segment electrode is less than or equal to the voltage at the opposing electrode;

[0089] - where the voltage at the segment electrode minus the voltage at the opposing electrode is less than the threshold voltage of the light emitting element;

[0090] - where the current provided by the pixel circuit according to the data signal at the segment electrode is not sufficient to cause light emission from the pixel. The current at the segment electrode can be less than 1 microampere per square centimeter of anode pad.

[0091] Thus, for the purposes of this invention, a pixel is considered to be “off’ whenever the data signal has a value that the display controller intended such that any one of the above criteria is met, and a pixel is considered to be “on” whenever the data signal has a value that the display controller intended such that none of the above criteria are met. It should be noted that even if a pixel is “off’ according to the value of the data signal, there can still be some emission due to cross-talk or other factors such as current leakage through the transistor.

[0092] The pixel circuit of the present invention is ideally part of a silicon backplane. Silicon backplanes are from silicon wafers (also called dies or substrates). They are thin slices of a semiconductor (such as crystalline silicon (c-Si)) used to manufacture integrated circuits. The wafers serve as the substrate for the microelectronic devices built into and on the wafer. They undergo many microfabrication processes such as doping, ion implantation, etching, thin film deposition of various materials, and photolithographic patterning. Finally, the individual microcircuits are separated by wafer dicing and packaged as integrated circuits. The wafers are grown from crystals with a regular crystal structure, where silicon has a diamond cubic structure with a lattice spacing. When cut into wafers, the surface is aligned in one of several relative directions called crystal orientations. Silicon wafers are not typically 100% pure silicon, but are formed with an initial impurity doping concentration of boron, phosphorus, arsenic, or antimony added to the melt and which defines the wafer as either a bulk n-type or p-type. See Chapter 7 of Flat Panel Display Manufacturing by Souk, L., Ed., 2018 for background. Ideally, the silicon backplane is a single crystal Si wafer.

[0093] To provide control circuitry for operation of the stacked OLEDs, thin film transistors (TFTs) and other components such as capacitors, resistors, connection lines, etc. are provided on the surface of the silicon wafer. See, for example, “High Performance TFT Technologies for the AM-OLED Display manufacturing” by T. Arai, Thesis, Nara Institute of Science and Technology, 2016, M. K. Han, Proc. of ASID’06, 8-12 Oct, New Delhi, US 9066379, and US 10163998. It is understood that the TFTs can or can not include the silicon wafer as part of the TFT structure, or can be made from a separate material deposited on the surface.

[0094] TFTs can be made using a variety of semiconductor materials. The properties of silicon-based TFTs depend on the crystalline state of the silicon, i.e., the semiconductor layer can be amorphous silicon, microcrystalline silicon, or can be annealed into polycrystalline silicon (including low temperature polysilicon (LTPS) and laser annealing).

[0095] The fabrication of silicon backplanes with appropriate control circuitry is a well-known, known, and predictable technology. However, due to the cost and complexity of the manufacturing processes and equipment, it is often not practical to build a facility to manufacture a particular backplane. Instead, a foundry model is widely adopted in the industry where the functional characteristics of microelectronic devices have become more standardized. This standardization allows the separation of design from fabrication. Designs that comply with appropriate design rules can be more easily and less expensively manufactured by different companies with compatible manufacturing methods. To this end, the control circuitry on a silicon backplane is often limited to the use of standard components selected from a range of options provided by the backplane manufacturer. For example, a manufacturer of silicon backplanes can offer the option to incorporate various designs of transistors such as 1.8V, 2.5V, 3.3V, 5V, 8V, and 12V into a customer's design, but would not be able to (without incurring significant expense) provide a transistor that is not included in the offered designs.

[0096] For the purposes of this application, "low voltage" (LV) is defined as an analog microelectronic component that is categorized and designed to operate safely and reliably at 5V or less. "Medium voltage" (MV) microelectronic devices are generally considered to be in the range of 9V to 12V, while "high voltage" (HV) microelectronic devices are generally considered to be in the range of 18V to 25V. It should be noted that these voltage ratings are set by the manufacturer and the manufacturer does not recommend exceeding the maximum voltage set for each transistor.

[0097] Active matrix displays that produce light (luminescence) upon electrical activation are deposited or integrated onto thin film transistor (TFT) arrays that are located on a silicon chip, where the TFT array acts as a series of switches to control the current flow to each individual pixel. Typically, this continuous current is controlled by at least two TFTs at each pixel (to trigger luminescence), with one TFT used to start and stop charging of a storage capacitor, and a second TFT used to provide a voltage source at the level required to produce a constant current for the pixel.

[0098] As shown in Figure 1, which represents the simplest form of an active matrix pixel design of the prior art. In an active matrix display, there is a separate pixel circuit that controls each individual pixel and is located within the display area of the backplane. The simplest active matrix pixel circuit with pixel memory uses two transistors and a capacitor. A current drive transistor MP2 is typically connected from a supply voltage VDD to a segment electrode of a luminescent element. As shown, one TFT (MP2) drives the current of the element, while the other TFT MP1 acts as a switch to sample and hold the voltage on the storage capacitor CI. There is a data line (V VDD or I SD ) that controls the current (I DATA). There is a select line that controls the scan (select) transistor MP1 and thus the charging of the capacitor C1. Typically, transistors have intrinsic capacitances, so no additional capacitance can be needed depending on the intrinsic capacitance of the transistor and the leakage current through the transistor. For the sake of clarity, in the figures following figure 1, any present capacitor can be omitted from the figures.

[0099] Figure 2 A basic pixel circuit is shown 100 for controlling the amount of cross-talk in a display by ensuring that the voltage and / or current at the segment electrode of a pixel always remains below the level required for emission when the data signal for that pixel dictates that the pixel should not emit any light. As noted, various sources of cross-talk can cause a sufficient amount of voltage and / or current to appear at the segment electrode of a pixel to achieve some degree of emission regardless of whether that pixel received a data signal sufficient to cause emission. In particular, the voltage and / or current produced by cross-talk sufficient to cause emission is problematic in pixels that are determined by the data signal to not emit.

[0100] In a basic pixel circuit 100 for a single pixel, there is a power source 1 connected to the source of a drive transistor T1 and a segment electrode of a light emitting element 2 connected to the drain of T1. The gate of T1 is connected to a data line 3 through the source and drain of a scan (select) transistor T4. The gate of T4 is connected to a scan line 4 . Data line 3 provides a data signal V DATA , typically a voltage. Scan line 4 provides a scan signal V SCAN , typically a voltage. A pixel control circuit (PCC) 5 is attached to NODE1 located between the drain of T1 and the segment electrode of light emitting element 2. PCC 5 is also connected to data line 3 and to receiver 6. The opposite electrode of light emitting element 2 is connected to a second power source 7. In this example, T1 and T4 are p-channel transistors.

[0101] NODE1 is an electrical connection located along a power line between a drive transistor and a pixel (2). Ideally, there are no other electrical components connected in series between NODE1 and the light emitting element (2). Ideally, there is at least one drive transistor connected in series between NODE1 and the power source (1).

[0102] In terms of operation, whenever the data signal passed through data line 3 and select transistor T4 to the gate of T1 causes current to flow through T1, the power source 1 will cause the light emitting element 2The segmented electrode is supplied with sufficient power and, therefore, the pixel will emit according to the size of the data signal. The selection transistor T4 is controlled by the scan line 4 to select individual pixel rows. In unselected pixel rows, T4 prevents the voltage from the data line 3 from flowing to the gate of the drive transistor Tl and, therefore, Tl cannot cause current to flow from the power supply 1 to the segmented electrode of the light emitting element 2 and, therefore, the pixel does not change its emission until the scan line reconnects the pixel to the data line.

[0103] The PCC 5 helps to prevent an increase in emission in the pixel from cross-talk by maintaining the voltage and / or current at the segmented electrode 2 below the voltage and / or current necessary to cause light emission when the data signal does not allow current to flow through Tl (i.e. emission from the pixel is not desired). The PCC 5 uses the data signal as input. Whenever the data signal will not cause the pixel to emit or cause the pixel to have only very low emission, the PCC 5 electrically connects the segmented electrode 2 to a receiver 6 which maintains the voltage and / or current below the level necessary to cause the pixel to emit. However, whenever the data signal will cause the pixel to emit, the PCC 5 does not connect the segmented electrode 2 to the receiver 6. In this way, even if there is sufficient voltage and / or current at the pixel to emit due to cross-talk, the pixel can be prevented from having an emission if the data signal makes it that the pixel should be non-emitting. The PCC 5 does not involve the driving of the pixel. It should be noted that whether the PCC 5 connects the segmented electrode 2 to the receiver 6 is determined by the value of the data signal received from the data line 3 and is independent of whether the row is selected by the scan line 4 or not.

[0104] The PCC 5 is an integral part of the pixel circuit 100 . By integral part of the pixel circuit is meant that the PCC 5 is locally located in the backplane together with the drive transistor and other components of the pixel circuit, under the pixel and within the active display area. The PCC 5 controls only one pixel at a time within a frame period, the control being according to the data signal of that pixel. It does not control other pixels along the same row which are normally selected by the scan or select lines.

[0105] The PCC 5This is not part of the device circuitry (display controller) that determines and controls the timing of data signals and scan / select signals; the controller circuitry is typically located outside the active display area. Generally, the display (image) controller converts multiple image signals into multiple image data signals and sends them to the data driver. The controller receives a vertical sync signal Vsync, a horizontal sync signal Hsync, and a clock signal, generates control signals for controlling the scan driver, transmit control driver, and data driver, and sends them to the appropriate lines. Additionally, the controller generates power control signals for controlling the power supply and sends them to the power source. Although the internal operation of the controller can use data signals and scan signals to turn specific pixels on or off, this differs from the present invention, in which the activation of a branch of a "turn-off" pixel is determined in a local, individual pixel circuit and based on the data signal.

[0106] Receiver 6 is a pixel circuit component that controls the voltage at the segmented electrodes of the pixel. It may include components that maintain the voltage at the V-shaped electrode of the pixel. th The following power supply V BIAS Electrical connections are used to prevent emission. For V BIAS The power supply wiring is preferably common to all pixels to make the backplane simpler, more compact, and with lower cost (lower mask level). Receiver 6 can also be connected to ground or have a relative electrode 125 (typically V) with the pixel. SS Electrical connection.

[0107] Figure 3 It shows the relationship with Figure 2 The circuit in 100 Similar basic pixel circuits 150 In particular, PCC 5 (Within the dashed box) There is a connection between NODE1 and the receiver. 6 The branch transistor T3 is connected to the data line. 3 Determination circuit 9 To control. When the determination circuit 9 When the value of the data signal is determined to be sufficient to cause the pixel to emit light above a predetermined amount, the voltage at the gate of T3 is set such that T3 does not transfer current from NODE1 to receiver 6. However, when the determination circuit 9 determines that the data signal causes the pixel not to emit light (or to emit less than a predetermined amount), the voltage at the gate of T3 is set such that NODE1 and receiver 6 make electrical contact, and therefore any voltage and / or current present at the segmented electrodes (e.g., due to electrical crosstalk from any cause) will be removed, and thus the pixel will not emit light. In this embodiment, the determination circuit... 9The data signal from data line 3 alone is used as input to determine how to set the voltage at the gate of T3. In general, branch transistor T3 is controlled to be either fully "on" (allowing electrical connection) or fully "off (no electrical connection) by appropriate control of the gate voltage.

[0108] As noted, decision circuit 9 determines, based on the data signal for the pixel, whether the pixel should be "on" or "off, and then appropriately activates T3 to allow or not allow the potential to pass from segmented electrode 2 to receiver 6. This control of T3 can be based on the data signal alone, without other inputs. This decision based on the data signal alone can be made in a variety of ways or methods.

[0109] For example, consider an example of a display having pixel circuits in which the data signal, denoted as voltage V DATA is zero when the emission from the pixel should be "off, and is high (non-zero) when the emission from the pixel should be "on". In this case, V DATA can be used directly as the input to latch circuit 10 as shown in Figure 7 200 . The output V LATCH from latch circuit 10 will then be the same as V DATA (zero or high), although it is fixed at that value for the remainder of the frame until reset. If the drive transistor and scan transistor (and shutter transistor T6 if present, see Figure 11 ) are p-channel transistors and T3 is an n-channel transistor, then if the output voltage V LATCH to the gate of T3 is zero, T3 will be "off, but if V LATCH is high, T3 will be "on". However, in some drive methods, V DATA may not be sufficient to fully "turn on" T3. This is undesirable because when the pixel is "off, it will not be able to bypass any current that exists around the pixel. In this case, as part of decision circuit 9, the non-zero V DATA can activate a switch that connects the gate of T3 to another power supply (e.g. the voltage V DD of power supply 1) that has a sufficient level to turn T3 on, or V DATA can be converted to a higher voltage by including a voltage multiplication circuit. If desired, a voltage limiter circuit (typically including a Zener diode) can additionally be present.

[0110] Figure 3 The decision circuit 9 and reference source 8 ​An electrical connection can exist between them. In one embodiment, it can be determined whether the data signal is sufficient to cause a transmission by comparing the data signal to a reference signal. For example, if the data signal from data line 3 is a voltage signal V DATA and the reference signal from reference line 8 is a voltage V REF , then the difference between V DATA and V REF can be used to set the voltage at the gate of branch transistor T3 to allow or not allow an electrical connection between NODE1 and receiver 6. In some cases, the power supply 1 can be used as a reference signal. For example, the power supply 1 is held at a voltage V DD , then V DD can be used as a reference signal to compare to V DATA (V REF = V DD ). The value of the reference signal can be higher or lower than the data signal. The reference signal 8 is common to all pixels.

[0111] In general, the decision circuit 9 can comprise a decision circuit with the function of informing whether an input voltage is higher or lower than a given threshold. The decision circuit can also compare two voltages and provide an output result indicating which is greater. Decision circuits (sometimes called comparators or comparator circuits) are commonly used, for example, to check whether an input has reached a certain predetermined value. Comparator circuits for OLEDs are well known. See, for example, US 9786209 B2, US 20060082528 Al, US 20190088205, US 7595596 B2, In et al., “P-8: A Novel Feedback-Type AMOLEDs Driving Method for Large-Size Panel Applications”, Society for Information Display, 36 (1), 252 (2005), and Neha et al., “Design and Analysis of Comparators using 180 nm CMOS Technology”, International J. of Elec. And Comm. Tech., 7 (2), 122 (2016).

[0112] One example of a suitable decision circuit 9 that requires a reference signal is shown in Figure 4 , where a comparator circuit 20 (which is part of the decision circuit) uses bipolar junction transistors (BJTs). In Figure 4In the simple comparator 20, there are two operating states: either BJT Q1 is "on" and BJT Q2 is "off," or Q1 is "off" and Q2 is "on." The threshold "on / off" voltages of Q1 and Q2 are the V0 of those transistors. be The "turn-on" voltage is the voltage difference (Vdifference) between the base and emitter. For Q1 to be "on" and Q2 to be "off," Von... REF V DATA A large amount of V makes Q1 be V compared to Q2 be Large. Resistor R3 (V) R3 The voltage at the connection point between the emitters of Q1 and Q2 becomes equal to V. REF -V be (Q1). This is sufficient to make V DATA -V R3 Insufficient to keep Q2 "on". If V DATA Greater than V REF For the same reason, Q2 is "on" and Q1 is "off". The "on" / "off" state of Q2 controls the "on" / "off" state of T3 through the connection between the output of Q2 and the gate of T3. When Q2 is "on" / "off", T3 is "on" / "off". CC and V EE Provides the external operating voltage source necessary for the operation of the circuit components. V CC It should be more than V that can be connected to ground. EE The potential is higher (more positive).

[0113] Figure 5 This shows the circuit where R3 is replaced by R3, R4, Z1 (Zener diode), and Q4, in order to... Figure 4 Another comparator circuit 21 operates in the same manner. This circuit provides a constant Q4 current (V). Z1 -V be Q4-Vee) / R4, which determines V before the switch between Q1 and Q2. REF Must be more than V DATA How much larger. It should provide more than Figure 4 The comparator circuit provides a more accurate output.

[0114] Figure 6 An example of another comparator circuit 22 based on CMOS components is shown. Functionally, T11 and T12 replace R1 and R2. T13 and T14 replace Q1 and Q2. T15 replaces R3, R4, Q4, and Z1. T15 sets the bias current, which is equal to V BIAS -V EE Gate-to-source voltage (V) of T15 gsT11 and T12 provide active load current mirrors for T13 and T14. The drain-source current (Id) of T12... ds The value of this current is equal to the drain-source current of T11. The value of this current is determined by the gate-source current of T11 (Vd). gs Voltage determined. V of T11 gs V equal to T13 CC -V drain T13 and T14 will have two states: T13 "off" and T14 "on", or T13 "on" and T14 "off". The common drain connection (N1) of T12 and T14 drives the gate of branch transistor T3.

[0115] If the voltage V connected to the gate of T13 REF Less than V connected to the gate of T14 DATA If the voltage V decreases, then T13 is turned off, T14 is turned on, and the potential of N1 decreases, causing T3 (branch transistor) to turn on. The mechanism is that as V... DATA Increase to greater than V REF The voltage at N2 becomes V at T14. DATA -V gs T14's V gs Make T14's I ds =T15 of I ds (Bias current). At this point, the V of T13 gs =V REF -V N2 The voltage is less than the threshold voltage of T13, and T13 is "off". When T13 is "off", the I of T13... ds = "Shut down", therefore I of T11 and T12 ds = "Shut down". T14 will turn its I ds Set to I BIAS However, T13 is "shut down", and T14's V... DRAIN Reduce the voltage to enable T3.

[0116] If the voltage V connected to the gate of T13 REF V greater than the gate connected to T14 DATA If T13 is turned on and T14 is turned off, the potential of N1 will increase, causing T3 (branch transistor) to turn off. The mechanism is now reversed; the voltage at N2 becomes Vref - V of T13. gs Among them, V of T13 gs Make T13's I ds =T15 of I ds (Bias current). I of T11 and T12 ds =T13 of I ds T14's Vgs The voltage decreases until it is less than the threshold voltage of T14, and T14 is "turned off". The drain voltage of T14 now rises to make T3 "turn off".

[0117] Figure 7 It shows something similar to Figure 3 The circuit in 150 Basic pixel circuit 200 Although T1 and T4 are shown as p-channel transistors and T3 as an n-channel transistor in this embodiment, this is not limiting and other arrangements are possible. PCC 5 (Within the dashed box) A latch circuit 10 is located between the gate of the decision circuit 9 and the branch transistor T3. The output signal of the decision circuit 9 (e.g., voltage V) OUTPUT The input to latch circuit 10 is a "on" or "off" signal that indicates whether tributary transistor T3 allows or disallows the electrical connection between segment electrode 2 and receiver 6. The purpose of latch circuit 10 is to lock the control of tributary transistor T3 to the pixel setting determined by decision circuit 9 for the entire remainder of the frame and to prevent any further changes to that setting due to changes in the data signal when writing subsequent lines. Latch circuit 10 also receives an input from split clock 11, which provides the timing for latching.

[0118] The use and operation of latching circuits (also known as trigger circuits) are well known and have been used in OLEDs. See, for example, US 8068072, US 20090295770, and US 10546541.

[0119] Pixel circuit 200 The general order of operations is as follows: Figure 8 The flowchart illustrates this. In the first step, the display controller circuitry (located outside the display area) determines the appropriate data signal that will generate the required light emission from each pixel along the row during a single image frame. It also initializes all pixels to prepare for receiving data according to the image signal. This initialization includes resetting the scan clock and shunt clock, which are part of the display controller.

[0120] In the second step, the display controller sends a scan signal via scan line 4, which sets scan transistor T4 to "on" for the entire first row of pixels. The scan clock controls the timing of which rows the scan signal activates.

[0121] In a third step, which is performed simultaneously with the second step, a data signal is sent for each individual pixel along the first row via the data line 3. The data signal serves as an input for two different parts of the pixel circuit. In the first part, the signal data reaches the gate of the drive transistor Tl via T4. The data signal controls the gate of the drive transistor Tl to allow a suitable amount of power to pass from the power supply 1 to the light emitting element 2. In the second part, the data signal is input to the PCC 5 which controls the gate of the branch transistor T3.

[0122] Step 4 depends on the data signal. If the data signal is such that Tl is "on", and thus power can flow from the power supply 1 to the light emitting element 2, the pixel will emit light. At the same time, the decision circuit 9 of the PCC 5 determines whether the data signal is sufficient to cause Tl to be "on". In the case of the pixel circuit 200 , this determination is made by comparing the data signal with a reference signal. If the difference between the data signal and the reference signal determines that the data signal will cause the pixel to emit, an "off signal is sent as an output from the decision circuit 9 to the latch circuit 10. The latch circuit 10 then passes the output signal to the gate of the branch transistor T3, so that T3 is "off, and no electrical connection between the segmented electrode of 2 and the sink 6 is allowed. The latch circuit 10 also "latches" the "off signal and holds this signal throughout the frame, until it is reset during the initialization of a new frame. In this way, the presence of the branch transistor T3 has no effect on the operation of the emitting pixel, and the display works in a normal manner.

[0123] However, if the difference between the data signal and the reference signal determines that the data signal will not allow the pixel to emit, an "on signal is sent as an output from the decision circuit 9 to the latch circuit 10. The latch circuit 10 then "latches" the "on signal at the gate of T3, and holds this signal throughout the frame, until it is reset during the initialization of a new frame. In this way, whenever the data signal indicates that the pixel should not emit light, the branch transistor T3 is "on, and thus any power at the segmented electrode of the light emitting element 2 will be shunted to the sink 6, and there will be no emission from the pixel. In this case, the pixel is protected from emission caused by electrical cross-talk, as well as any current leakage through the drive transistor Tl.

[0124] The timing of the latch circuit 10 is controlled by a shunt clock 11, which is part of the display controller, and activates the latch circuit 10 during the time that data and scan signals are written to that pixel and determined by the PCC 5. The shunt clock 11 is with respect to a row, and the latch circuit 10 prevents data written to subsequent rows from affecting data written to previous rows. Although the shunt clock 11 can be different from the timing of the scan clock that controls the scan signal sent to the gate of T4 to allow the data signal to pass to the gate of Tl, ideally they are the same. It can also be started at the same time as the scan signal, and end before the scan signal ends.

[0125] Importantly, the latch circuit 10 keeps the “on” or “off’ signal at T3 throughout the time of an image frame until reinitialization. This is because the data line provides a data signal to each individual pixel of a column once or another time. In normal operation, the data signal is not received by pixels in any row not selected by the scan signal because the scan transistor T4 is “off’. However, in this case, the PCC 5 will receive data signals for other pixels in different rows regardless of whether their row receives a scan signal that activates T4. By “locking” the signal that controls T3 when the pixel is effectively receiving the intended data signal, the data signal for other pixels will not affect whether the shunt transistor is “on” or “off’ for that individual pixel.

[0126] This is one of the advantages of using the PCC to control the shunt transistor based on the value of the data signal only and not directly involving the scan signal. As part of the initialization of step 1, a data signal can be sent to all pixels at the same time that indicates that the pixel should be “off’, so that the PCC 5 makes the shunt transistor T3 “on”, and therefore, there is no emission by the pixel for any reason. Then, in steps 2 to 7, as each row is scanned in turn, the shunt transistor T3 in each pixel is “off’ or “on” (determined by the data signal). This means that any adjacent pixel rows that have not been activated will have the shunt transistor “on”. For example, when the Nth row is activated and the shunt transistor T3 is “on” or “off’ depending on the data signal whether the pixel should emit or not, the shunt transistor T3 will be “on” for the entire (N+l)th, (N+2)th, etc. row. Since some of the pixels in the Nth row will emit, then crosstalk will cause a potential at the segment electrode in the adjacent pixels in the (N+l)th, (N+2)th, etc. row, even though they have not been activated yet. However, since the shunt transistor T3 is “on” in these unactivated rows, they cannot emit. In this way, the effects of crosstalk can be reduced.

[0127] Another advantage of using PCC is that a rolling scan can be used for crosstalk minimization, where the active ("on") display line is bordered by "off" lines. Thus, for lines N, (N+1), (N+2), the pixels in line (N+1) will be "on", while lines N and (N+2) will be "off. In this way, crosstalk effects can also be reduced.

[0128] It is also possible to resend the data signal indicating that all pixels along the row should be "off after each pixel in the row has been scanned and activated. This would require a second scan signal to activate the most recently activated row to send the "off data signal. For example, the scan signal activates the Nth row to receive the appropriate "on" or "off data signal for the pixels in that row. Then, when the scan signal moves down the row and activates the (N+1)th row, the scan signal is resent to the Nth row, but the data signal indicates that all pixels should be "off. However, the timing of the two scan signals must not overlap so that the Nth and (N+1)th rows can each receive the correct data signal at the correct time. For example, the timing can be adjusted so that the display controller sends a scan signal to activate the Nth row with a data signal that sets the Nth row pixels to "off after activating the (N+1)th row, but before activating the (N+2)th row. In this way, more pixels will be prevented from emitting light due to crosstalk.

[0129] To make Figure 7 the operation of the circuit shown in Figure 8 and described in the detailed description, one embodiment can be where the drive scheme is analog and the signals and power can be represented in voltages, and the drive transistor Tl and the scan transistor T4 are p-channel transistors and the leg transistor T3 is an n-channel transistor. Note that for n-channel transistors, a high voltage applied to the gate (i.e., Vg greater than Vs) allows the transistor to turn on, while a low voltage applied to the gate (i.e., Vgs = 0) turns off. For p-channel transistors the case is reversed. In this embodiment, the power supply 1 is a voltage V DD , the scan signal is a voltage V SCAN , the data signal is a voltage V DATA , the reference signal 8 is a voltage V REF , the output of the decision circuit 9 is a voltage V OUTPUT , and the output of the latch circuit 10 is a voltage V LATCH . In this case, when V DATA is high (e.g., equal to V DD ), the pixel should not emit. When V DATA is low (e.g., equal to zero or negative), then the pixel will emit at its maximum level. When 0 < V DATA < V DD , the emission will be at an intermediate level.

[0130] In this embodiment, Figure 7 The circuit operation of the pixel circuit shown (see Figure 8 ) can be described as:

[0131] - Step 1 : The shunt clock 11 is set to zero. The initialization includes sending V DATA HIGH data signal so that the PCC 5 turns T3 "on" and thus bypasses the light emitting element.

[0132] - Step 2 and Step 3: The scan signal V SCAN is applied to the gate of T4, which is a p-channel transistor, so that the data signal V DATA is subsequently connected to the gate of the drive transistor T1, which is a p-channel transistor. At the same time, V DATA is sent directly from the data line 3 to the decision circuit 9 inside the PCC 5.

[0133] - Step 4: The decision circuit then compares V DATA with V REF to determine whether V DATA is greater than, equal to, or less than V REF , in this case determining that V DATA is LOW or zero. If V DATA is greater than V REF (indicating in this embodiment that the pixel should not emit (because a high V DATA would turn T1 "off")), then V OUTPUT at the decision circuit 9 is at a high level. If V DATA is less than or equal to V REF (indicating in this embodiment that the pixel should emit (because a low or zero V DATA would turn T1 on)), then V OUTPUT will be LOW or zero.

[0134] When the shunt clock 11 changes from zero to a high (non-zero) value, the latch circuit 10 receives V OUTPUT . Then, the output V LATCH of the latch circuit 10 is set to be the same as V OUTPUT . Then, the shunt clock 11 changes back from the high value to zero. This "locks" V LATCH to be the same value as V OUTPUT , and if V OUTPUT subsequently changes, it no longer changes. Then V LATCH is applied to the gate of the shunt transistor T3, which is an n-channel transistor. When V LATCH is LOW / zero (when the shunt clock 11 is at a high value, V LATCH is the same as VOUTPUT ), T3 is "off", and the pixel emits light normally. When V LATCHFor high (non-zero) times, T3 is "on" and the pixel will not emit, as any current is shunted to sink 6.

[0135] One of the advantages of using the PCC in accordance with the signal data is to allow any voltage and / or current shunting at the segment electrode of any "off" pixel along the entire column, regardless of whether the pixel is in the selected row or not, without being affected by any cross-talk. Prior art solutions to shunt voltage and / or current at the segment electrode in accordance with the scan signal only apply to the active row. In this way, the total number of possible "off" pixels with cross-talk protection will increase and the total amount of cross-talk will decrease.

[0136] However, not all pixels that can be "off" during the frame time will be restored by using the data signal to shunt any voltage and / or current at the segment electrode to prevent emission. For this, the method of using the data signal to cause shunting can be used together with any known method where the shunting is based on the scan signal. When used in combination, any pixel that will be "off" according to the image will be shunted and will not emit.

[0137] Figure 9A and Figure 9B A pixel circuit is shown 250 As an example of such a combination. In addition to the additional circuit connecting the scan line 4 to the gate of T5 connected to NODE1, Figure 9A With Figure 2 Similar. In this additional circuit, the second branch transistor T5 will control whether any voltage and / or current at the segment electrode / NODE1 is shunted to the power source 12, which will hold the voltage at V th The following prevents emission. The power supply wiring for 12 is preferably common for all pixels. Source 12 can also be connected to the receiver 6, directly to ground or electrically to the opposite electrode of the pixel, typically V SS ). However, transistors T4 and T5 cannot be "on" at the same time, although both can be "off" at the same time. Since both T4 and T5 are controlled by the same signal from the scan line 4, it can be necessary to invert the signal so that transistor T5 is "on" to connect NODE1 to source 12 when T4 is "off". There are several ways of inverting the scan signal, for example, it can pass through an optional inverter circuit 18A, or transistor T5 can be of a different type than the scan transistor T4 (e.g. T4 is a p-channel transistor and T5 is an n-channel transistor). It is also possible to incorporate the additional circuit that allows shunting in accordance with the scan signal from the scan line 4 into the PCC 5.

[0138] Figure 9B A pixel circuit is shown 250 ( Figure 9A ) as a variant of the pixel circuit​300 In the pixel circuit 300 , the gate of the second branch transistor T5 is directly controlled by a separate signal line 13. In this embodiment, the signal from signal line 13 can have the same timing as the scan signal from scan line 4, but is inverted at the controller level. Alternatively, the signal from signal line 13 can have different timing from the signal from scan line 4.

[0139] In any case, the purpose of scan line 4 or 13 is to control the gate of the second branch transistor T5 so that it is“off’ when the pixel is emitting, and“on’ when the pixel is not emitting, regardless of whether the first branch transistor T3 is“on’ or“off’. Ideally, T5 is“on’ when the pixel is not emitting and T3 is“off’.

[0140] Figure 9C Another variant of the pixel circuit 250 and 300 is shown 350 , in which the additional circuitry is incorporated directly as part of the PCC 5, and uses a single branch transistor T3 to bypass the light emitting element 2 when it is not emitting light. In this case, the gate of the branch transistor T3 can be controlled by the output of the latch circuit 10 (which depends only on the data signal) or by a signal from signal line 14. The signal from signal line 14 can be the same as scan line 4, or can be inverted by optional inverter circuit 18B (similar to optional inverter circuit 18A in 250 ). In these cases, scan line 4 can be used as signal line 14. Alternatively, signal line 14 can be controlled independently by the display controller and the timing so that it does not interfere with the control of T3. In this case, desirably T3 is“on’ by either the latch circuit 10 or signal line 14 (but not both) whenever the pixel is not emitting.

[0141] Figure 10A A basic pixel circuit Figure 3 is shown which is similar to the circuit 150 in 275 . In particular, the decision circuit 9 in the PCC 5 (within the dashed box) is connected to scan line 4 rather than data line 3In this embodiment, whenever scan signal 4 causes scan transistor T4 to "turn off" and drive transistor T1 does not receive a data signal, NODE1 and receiver 6 will make electrical contact (through branch transistor T3). In an active matrix device, the entire pixel row is activated by the scan transistor of each pixel, and then data signals are allowed to be loaded into each pixel by the drive transistor. However, since this process is performed row by row, there are rows where data signals have not yet been transmitted to pixels, and therefore, these pixels should not be emitted. However, such unactivated pixels may be spatially close to the pixels that are emitting. By allowing electrical connection between segment electrode 109 and receiver 6 when T4 is "off", potential emission from these unactivated pixels due to crosstalk or similar problems can be prevented.

[0142] However, this is not entirely sufficient on its own, because whenever scan signal 4 instructs scan transistor T4 to "turn on" causing drive transistor T1 to activate according to data signal 3, some pixels may "turn on" (with at least some emission), while some pixels may "turn off" (no emission) according to data signal (based on image). To further prevent emission of any "turn-off" pixels in the active row, branch line 17 is used to indicate whether a pixel should emit.

[0143] Branch route 17 can be an operation and 150 ( Figure 3 The reference source 8 is the same as that in the reference source 8. In this case, there is a separate electrical connection (not shown) between the determination circuit 9 and the data line 3. In this case, the determination circuit 9 compares the signal from the data line with the signal from the reference source 8 to determine whether the data signal 3 is sufficient to cause emission. If it is determined that the pixel should emit, the determination circuit 9 sets T3 to "off" to allow the pixel to emit at the expected level. If it is determined that the pixel should not emit, the determination circuit 9 sets T3 to "on" to prevent unintended emission.

[0144] Alternatively, the comparison between the data signal from 3 indicating whether a pixel should emit and the reference signal does not need to be performed within PCC5, but rather in a different part of the circuit. In this case, the determination circuit 9 can directly use the signal from branch 17.

[0145] Figure 10 shows the use of 275 PCC 5 ( Figure 10A Details of a possible circuit. In this example of PCC 5, the decision circuit 9 includes a transistor TB connected in series between the gates of branch line 17 and T3. In this particular embodiment, the signal from branch line 17 reflects a comparison of the data signal and the reference signal to determine whether the pixel should emit. The operating mode of this PCC is as follows:

[0146] - the scan line 4 connected to the gate of T4 is "off, and therefore T4 is "off, and therefore no data signal is provided to the gate of Tl, and therefore Tl is "off.

[0147] - the scan line 4 connected to the gate of TB is "off, and therefore TB is "off, and therefore no data signal is provided to the gate of T3, and therefore T3 is "off.

[0148] - the scan line 4 connected to the gate of T4 is "on, and therefore T4 is "on, and therefore a data signal is provided from 3 to the gate of Tl. Tl is "on" or "off depending on the amplitude of the data signal from 3.

[0149] - the scan line 4 connected to the gate of TB is "on, and therefore TB is "on, and therefore a signal is provided from branch line 17 to the gate of T3.

[0150] - if the amplitude of the data signal from 3 is such that Tl is "off (no emission), then the signal from branch line 17 will cause T3 to be "on, and therefore any charge at the segmented electrode of pixel 2 will be shunted to the sink 6, so that pixel 2 does not emit light.

[0151] - if the amplitude of the data signal from 3 is such that Tl is "on (some degree of light emission), then the signal from branch line 17 will cause T3 to be "off, and therefore pixel 2 will emit light according to the amplitude of the data signal from 3.

[0152] In both of the above options, the decision circuit 9 is located within the PCC 5. It controls the operation of T3 based on some combination of the scan signal from 4 and the data signal from 3. Figure 11 The rest of the circuit is shown in 275 a similar alternative circuit 285 is provided. The decision circuit 19, which provides the same functionality as the decision circuit 9 in 275 is located outside the PCC 24. Ideally, the decision circuit 19 is part of the image controller which provides the appropriate signal to T3.

[0153] In 275 and 285Of the two, the decision circuit 9 will output a signal to the gate of T3 that will properly enable or disable T3. If the value of the data signal from 3 is such that Tl will "turn off" either because Tl did not receive a data signal (T4 "off) or because it received a data signal from 3 that did not fire (drive value = 0), the signal from 9 will turn T3 on. If the value of the data signal from 3 is such that Tl will "turn on", the signal from 9 will disable T3. Ideally, each pixel should have a separate and independent leg 17 that controls the gate of T3 through a decision circuit.

[0154] In 275 and 285 , ideally Tl is a P-channel transistor and / or T3 is a P-channel transistor. Tl and T3 can also be N-channel transistors, or Tl can be a P-channel transistor and T3 can be an N-channel transistor.

[0155] Figure 2 , Figure 3 , Figure 7 and Figure 9A through Figure 9C shows an embodiment in which the data line 3 is connected directly to the PCC 5. In other embodiments, the data signal can be received by the PCC 5 after the data signal passes through the scan transistor T4. The connection to the PCC 5 can be between T4 and the gate of Tl. With this type of connection, the PCC 5 will only receive the data signal for this pixel along the selected row and not the other data signals because T4 will "turn off" whenever the data signal is sent to other pixel rows. Although the data signal can be used directly to control the gate of T3, this will only be valid if the value of the data signal is sufficient to fully "turn on" (when the pixel is "off) or "turn off" (when the pixel is "on) T3 (such as when using digital driving). In other driving methods, such as analog driving, the value of the data signal controls the magnitude of the brightness of the pixel, and therefore intermediate data signal values (values that are fully "off / values of the pixel / values that are fully "on) are common. Thus, for these types of driving methods, the data signal cannot be used to directly control T3 because T3 can not be fully "turned on" or "turned off". If the pixel is not fully "turned on", T3 will not be fully "turned off" and some current will be shunted, thus the pixel will not emit the required brightness of light. This is undesirable. In these embodiments, the PCC 5 can include a switch that connects the gate of T3 to another power supply (e.g. the voltage V DD of power supply 1) that has a sufficient level to "turn on" T3. This switch can operate based on the value of the data signal. Alternatively, V DATA can be converted to a higher voltage by including a voltage multiplier circuit or a level shifter circuit. If desired, a voltage limiter circuit (typically including a Zener diode) can be additionally provided.

[0156] In some embodiments, the PCC can require a power supply. The PCC power supply can be the same as power supply 1 (i.e., V DD ) or it can be a separate and independent power supply.

[0157] The PCC can be activated for the entire frame time. In some cases, depending on the image requirements, the PCC can be activated for multiple consecutive frames or for a limited number of frames out of a certain number of frames. For example, the PCC can be activated for only 5 out of 10 frames, for example, the first 5 frames activated and the last 5 frames deactivated or activated in an alternating manner (such as 10 frames alternating on / off, or 2 frames on / 2 frames off for 10 frames). In some cases, it can be desirable to activate the PCC for only a portion of a single frame. For example, the PCC can be activated for half a frame and deactivated for the remaining portion of the frame.

[0158] Although the above pixel circuits can be used for any type of display, particularly active matrix displays, they are particularly suitable for active matrix OLED microdisplays and even more desirably for high voltage multi-mode (white) microcavity OLEDs. This is due to the high voltages necessary to operate such OLEDs and the common layer that allows the migration of carriers from one “on” pixel to another possibly “off’ adjacent pixel, thus creating a voltage in the adjacent “off’ pixel sufficient to cause emission, and the layers in the microcavity OLED need to be sufficiently thick (in order to create the microcavity) which facilitates lateral carrier migration.

[0159] Microdisplays require very high luminance for use in all environmental conditions, such as strong sunlight outdoors. Even in controlled environmental conditions, such as VR googles, very high luminance is required to create an immersive visual experience. Very high luminance of the display allows the use of smaller, lighter, cheaper, less efficient optical devices, resulting in a more competitive headset.

[0160] Currently, prior art OLED microdisplays are unable to provide the required luminance. For example, a press release by a tandem OLED microdisplay manufacturer describes a full color product that can be capable of providing up to 2.5k nits, but acknowledges that 5k nits would be a more desirable goal (see https: / / www.kopin.com / kopin-to-showcase-latest- advances-in-its-lightning-oled-microdisplay-line-up-at-ces-2020 / https: / / hdguru.com / calibration- expert-is-10000-nits-of-brightness-enough / , January 7, 2020). Some manufacturers suggest that the goal should be 10k nits or higher (see https: / / www.businesswire.com / news / home / 20200630005205 / en / Kopin- Announces-Breakthrough-ColorMax% E2 % 84 % A2-Technology-Unparalleled-Color https: / / www.ravepubs.com / oled-silicon-come-new- joint-ribture / , July 26, 2018). A press release dated June 20, 2020 (see Figure 12 Figure 12) describes a tandem (2-stack) OLED display emitting > 1000 nits. It also reports that “further improvements in brightness (> 2000 nits) and color fidelity are expected by optimizing OLED deposition conditions. By combining structures that enhance the out-coupling efficiency, the brightness of OLED microdisplays can be increased to > 5000 nits in a few years.”

[0161] One solution to increase the total amount of light emitted from an OLED device is to stack multiple OLED units on top of each other, such that the total amount of light emitted from the stack is the sum of the light emitted from each individual layer. However, while the total amount of light emitted from such an OLED stack is additive based on the total number of individual OLED light emitting units, the voltage required to drive the OLED stack is additive based on the voltage required to drive each individual OLED unit. For example, if a light emitting OLED unit requires 3V at a given current to produce 250 nits, a stack of two such units will require 6V to produce 500 nits at the same current, a stack of three units will require 9V to produce 750 nits, etc.

[0162] Such OLED stacks are known, see, for example, US 7273663, US 9379346, US 9741957, US 9281487, and US 2020 / 0013978, all of which describe OLED stacks having multiple light emitting OLED unit stacks, wherein each light emitting OLED unit stack is separated by an intervening connecting layer or charge generation layer. Springer et al., Optics Express, 24 (24), 28131 (2016) report on OLED stacks having 2 and 3 light emitting units, wherein each unit has a different color. OLED stacks having up to six light emitting units have been reported (Spindler et al., “High Brightness OLED Lighting”, SID Display Week 2016, San Francisco CA, May 23-27, 2016). In addition, silicon backplanes with low voltage 5V drive transistors using tandem OLED stacks (two light emitting OLED units separated by one CGL) for light emission are available. See, for example, Cho et al., Journal of Information Display, 20 (4), 249-255, 2019, Figure 2 https: / / www.blurbusters.com / faq / oled-motion-blur / , published in 2018, and Xiao “Recent Developments in Tandem White Organic Light-Emitting Diodes”, Molecules,24 151 (2019).

[0163] However, such a method that requires higher drive voltages is difficult to apply in microdisplay applications. The problem is that microdisplays also need to have high resolution, requiring that the size of individual pixels must be as small as possible, and the active (light emitting) area of the microdisplay includes as many pixels as possible. This requires that the transistors in the control circuitry of the backplane be small, but still have sufficient size to handle the required voltages and currents without permanent damage or current leakage. Furthermore, using circuitry with smaller, low voltage transistors allows a higher pixel density to be set within a given size of device. However, while having a high density of individually controlled pixels is desirable for high resolution devices, it exacerbates the problem of cross-talk, where powering one pixel can cause light emission from adjacent pixels.

[0164] Another difficulty with using microcavity OLEDs with multiple stacks, which have increased emission, is that higher voltages are also required for operation. High voltages only encourage the creation of carrier migration within the pixel, and thus, can increase migration to adjacent pixels, increasing cross-talk, with unintended emission occurring.

[0165] Suitable multi-mode microcavity OLED solutions have been described in provisional U.S. applications 62 / 966,757 and 63 / 054,387 and non-provisional U.S. application 16 / 695,191. Any solution, illustration or embodiment described in these references can be applied to the present invention. https: / / www.soundandvision.com / content / motion-resolution-issue-oled-tvs Suitable multi-mode microcavity OLED microdisplays are shown in FIGS. 400 .

[0166] Figure 13 Microdisplays using multi-mode (white) OLED microcavities are shown in FIGS. 400 The multi-mode OLED produces more than one color of light. Ideally, the multi-mode OLED produces white light with approximately equal amounts of R, G and B light. Typically, this corresponds to CIE x and CIE y values of about 0.33 and 0.33. However, depending on the characteristics of the color filters used to produce the RGB pixels, some deviation from these values is still acceptable or even desirable. Microdisplays 40 0 also include the microcavity effect. In this embodiment, the multi-mode OLED stack includes three OLED light emitting units that emit different colors of light, with each unit vertically spaced apart from another unit by a CGL, where the distance between the reflective surface and the top electrode is constant in the active area.

[0167] In microdisplays 400In this embodiment, the silicon backplane 103 includes an array of control circuitry as shown in Figure 3 and necessary components to supply power to the sub-pixels according to input signals. On the layer 103 with transistors and control circuitry, there can be an optional planarization layer 105. Individual first electrode segments 109 are connected by electrical contacts 107 that extend through the optional planarization layer to make electrical contact between the individual bottom electrode segments 109 and the control circuitry in the layer 103. In this embodiment, the bottom electrode segments 109 include a reflective layer 109B closer to the substrate and an electrode layer 109A closer to the OLED layers. The individual bottom electrode segments 109 are laterally electrically insulated from each other. Non-emissive OLED layers 111, such as electron or hole injection layers or electron or hole transport layers, are on the segmented bottom electrode segments 109. Red OLED light emitting units 113 are on the OLED layers 111. Layer 115 is a first charge generation layer that is between and separates the red OLED light emitting units 113 and green OLED light emitting units 117. A second charge generation layer 119 is on the green light producing units 117, the second charge generation layer 119 is between and separates the green OLED light producing units 117 and blue OLED light producing units 121. Non-emissive OLED layers 123, such as electron or hole transport layers or electron or hole injection layers, and a semi-transparent top electrode (opposite electrode) 125 are on the blue OLED light emitting units 121. This forms OLED microcavities 130 that extend from the uppermost surface of the reflective surface 109B to the lowermost surface of the semi-transparent top electrode 125, which is also a semi-reflective electrode. An encapsulation layer 127 protects the OLED microcavities from the environment. In this embodiment, there is an array of color filters with color filters 129B, 129G, and 129R that filter the multi-mode emission produced by the OLED microcavities 130 so that the B, G, and R light is emitted according to the power supplied to the underlying electrode segments.

[0168] In control circuitry for OLED microdisplays that are sample-and-hold type displays, it is important to address the problem of motion blur (see Figure 13 “Why Do Some OLEDs Have Motion Blur?” December 28, 2018, and Figure 2 Parts List “Is Motion Resolution an Issue with OLED TVs”, January 15, 2015.

[0169] The only way to reduce motion blur caused by sampling and hold is to shorten the time of the display frame. This can be achieved by using extra refresh (higher Hz) or via black periods between refreshes (flicker). For OLED microdisplays, the best solution is to "shutter" the display image, either by shutting down the entire active area at the same time or by "shuttering" the display image by "rolling" techniques, where only a portion of the display image is turned off in a sequential manner at a time. "Rolling" techniques are preferred. In order to avoid perceptible flicker, the time the pixel is turned off is very short and well below the detectable threshold of the human eye. This is achieved in the control circuit by including a shutter transistor that, when activated by a select line, prevents current from flowing through the OLED and turns "off" the emission of the OLED pixel for the desired time period. In other words, the shutter transistor is an on-off transistor, as it only "turns on" or "turns off" the pixel, not regulating the voltage or current. However, this solution of turning off the pixel for part of the time in the display image (generally referred to as frame period) time period only increases the need for increased brightness when the OLED is "turned on" as it is the average brightness of the frame that is perceived by the eye. This shuttering for reducing motion blur can be applied to any method of powering the OLED stack, for example, current control or PWM.

[0170] To this end, the microdisplay typically has at least two transistors in series between the power supply and the light emitting engine. The first (drive) transistor passes the desired power (voltage and / or current) to the light emitting engine and is controlled by a scan line that "turns on" or "turns off" the transistor. The second (switch) transistor controls the duration of the light emitting engine "turning off" to control the motion blur problem. Ideally, both transistors are low voltage (5V or less) transistors. Preferably, both transistors are p-channel transistors. A circuit with two or more transistors in the path between the power supply and the light emitting element is sometimes referred to as having "stacked" transistors.

[0171] Suitable backplanes for OLED microdisplays are known. See, for example, Ali et al., “Recent advances in small molecule OLED-on-Silicon microdisplays”, Proc. of SPIE Vol. 7415 74150Q-1, 2006, Ying, W., “Silicon Backplane Design for OLED-on-Silicon Microdisplay”, MsE Thesis, Nanying Technology University, 2011, Jang et al., J. Information Display, 20(1), 1-8 (2019), Fujii et al., “4032ppi High-Resolution OLED Microdisplay”, SID 2018 DIGEST, p. 613, US 2019 / 0259337, Prache, Display, 22(2), 49 (2001), and Vogel et al., 2018 48 th th International Display Workshops, 2018, p. 1, 2018.

[0172] Some suitable pixel circuit designs for OLED microdisplays can be found in Zeng et al., “A Novel Pixel Circuit with Threshold Voltage Variation Compensation in Three-Dimensional AMOLED on Silicon Microdisplays,” P-27, SID 2019 Digest, p. 1313, US 9,066,379, Kimura et al., “New Pixel Driving Circuit Using Self-Discharging Compensation Method for High-Resolution OLED Microdisplays on a Silicon Backplane,” 28-3, SID 2017 Digest, p. 399, Dawson et al., “The Impact of the Transient Response of Organic Light Emitting Diodes on the Design of Active Matrix OLED Displays,” International Electronic Devices Mtg 1998, 875-878, Kwak et al., “Organic Light-Emitting Diode-on-Silicon Pixel Circuit Using the Source Follower Structure with Active Load for Microdisplays,” Japanese Journal of Applied Physics, 50, 03CC05 (2011), Vogel et al., SID 2017 DIGEST, Article 77-1, pp 1125-1128, Liu et al., J. Cent. South Univ., 19Hong et al., SID 2019 DIGEST, Article 9-4, 105 (2019), and Fan et al., International Journal of Photoenergy, Article ID 543273 (2011). Overall, all of these references describe pixel circuits that use a drive transistor and a switching transistor in series to deliver power to the anode of an OLED. They also describe the use of p-channel transistors, and in some cases, the use of protection circuits to prevent overvoltage. None of these references address the crosstalk problem.

[0173] ​ Pixel circuit suitable for OLED microdisplays 450 where the OLED is a multi-mode microcavity OLED such as shown in Fig. 10. It is similar to the pixel circuit shown in ​ except that it includes an additional switching transistor T6 whose source is connected to the drain of drive transistor T1 and whose drain is connected to the light emitting element 2. 150 Thus, T1 and T6 are in series between the power supply 1 and the light emitting element 2. The gate of T6 is connected to a scan line 15 that is different from the scan line 4. The addition of switching transistor T6 / scan line 15 provides a shutter function that minimizes motion blur. Thus, switching transistor T6 controlled by scan line 15 can turn off the light emitting element 2 for a period of time during a frame.

[0174] ​ The embodiment shown in Fig. 10 shows the preferred location of NODE1, which is between one of the source or drain of switching transistor T6 and the light emitting element 2. However, in other embodiments, it can also be located between T1 and T6, i.e., between the source or drain of T1 and the source or drain of T6. Some pixel circuit designs include more than two transistors in series in the drive portion of the circuit between the power supply and the light emitting element; in such cases, the ideal location of NODE1 is between the last transistor in the series and the light emitting element.

[0175] In the pixel circuit 450In particular, ideally, T1 and T6 are low voltage (nominal 5V or lower) p-channel transistors. Ideally, T1 and T6 are located in a floating n-well, where the well voltage is controlled. For example, US 5764077 describes a low voltage output buffer that uses a floating n-well for low voltage transistors to protect the circuit from overvoltage conditions. In addition, US 9066379 and US 7,768,299 describe the use of floating n-wells. In some cases, any of the transistors in the entire pixel circuit can be located in their own independent n-well. See, for example, Shimazaki et al., "A Shared-Well Dual-Supply-Voltage 64-bit ALU", IEEE J. of Solid-State Circuits, 39(3), 494 (2004).

[0176] Ideally, the pixel circuit 450 Additional circuitry (not shown) is also included to protect the drive and switch transistors from momentary overvoltage damage. See, for example, Kwak et al., US 9,066,379 and Vogel et al., Proc. SPIE 10335, Digital Optical Technologies, 1022502 (2017). This additional overvoltage protection method can be incorporated into the PCC.

[0177] It is well known to add various types of compensation circuitry (with associated gate lines, reference voltages, and power supply voltages, etc.) to correct for variations in Vth from pixel to pixel and between pixels, leakage current, aging effects, and other problems that result in non-uniformity. This additional compensation method can be incorporated as part of the PCC.

[0178] The above-described circuit of the present invention can also be applied in any transistor-controlled device that operates a load, where it is necessary to reduce the voltage or current delivered to the load depending on the amount of current delivered to the control transistor and / or whether the control transistor is "turned on" or "turned off" by a separate control line.

[0179] While crosstalk can be of particular concern for micro-displays, it can also be a serious problem for larger size display devices such as mobile phones and televisions, as larger size display devices also require high resolution. The above-described pixel circuit is suitable for reducing crosstalk in display devices of any size.

[0180] Active matrix displays can be driven with constant luminance throughout the frame period (often referred to as analog programming). The pixels are typically programmed once per individual frame period and the data is held constant by a storage capacitor until the next frame period when the pixel data is refreshed. In most active matrix devices, during a frame period, each pixel along a column will receive a data signal. Each row will receive a scan signal in turn which allows the data signal to pass to the pixel drive circuit in each pixel along that row. The data signal can be stored in a capacitor which is part of the pixel circuit (see Figure 1). This data signal causes the pixels along the selected row to emit fully, not fully or not at all depending on the data signal. It should be noted that the data signal provided to each pixel along each column is specific to that pixel and determines the ideal luminance of that pixel, thus the data signal varies depending on which row is selected. The scan signal is constant and the same for each pixel along that row.

[0181] Active matrix displays can also be driven digitally. This method involves representing the total luminance provided by a pixel by dividing the individual image frame into a number of sub-frames and setting the emission period of each sub-frame to be different. In this driving method, the scan signal is provided by a scan line, thus depending on the scan signal, the pixels along each row receive a data signal from a data line. Since the total emission of the pixel in this driving method is dependent on time rather than the level of the data signal, only two data signal levels are required. The first data signal allows the pixel to emit light fully, the second data signal causes the pixel to not emit light.

[0182] It should be noted that the pixel circuit can be the same for both analog and digital methods and any driving method based on current, any method of driving the light emitting element can be used to drive the pixel circuit. ​ The pixel circuit shown, and other devices herein.

[0183] A display having the pixel circuit of the present invention can be full color, bi-color or monochrome.

[0184] It will be appreciated by those skilled in the art that the signal types and levels can be adjusted to suit the type of circuit used. In particular, transistors such as n-channel and p-channel transistors behave differently in nature and require different signals to work as intended. Examples in this specification can refer to specific transistors to describe specific signals, but this should not be seen as limiting. The examples have been described in terms of the performance required to achieve the benefits desired, modifications which result in the same benefits are within the skill of the art.

[0185] In the foregoing description, reference has been made to the accompanying drawings, which form a part of this specification, and specific embodiments that can be practiced are illustrated by way of illustration in the drawings. These embodiments are described in detail to enable those skilled in the art to practice the invention, and it should be understood that other embodiments can be utilized, and structural, logical, and electrical changes can be made without departing from the scope of the invention. Therefore, the description of any exemplary embodiment should not be considered limiting. Although the invention has been described for illustrative purposes, it should be understood that such details are for illustrative purposes only, and modifications can be made by those skilled in the art without departing from the spirit and scope of the invention.

[0186] ​

[0187]

[0188]

[0189]

Claims

1. An active matrix display, including: Power supply V DD (1); A pixel array consisting of columns and rows, each pixel (2) used for emitting light has a separately controlled segmented electrode (109) and a relative electrode (125). The driving circuit includes: At least one data line (3) provides a data signal (V) for each pixel (2) along the column. DATA ), wherein the data signal (V) DATA The gate of the control driving transistor (T1) is connected to the power supply V. DD (1) and the segmented electrode (109), and At least one scan line (4) provides a scan signal (V) for each pixel (2) along the row. SCAN The scanning signal (V) SCAN The gate of the scanning transistor (T4) is controlled to make the data signal (V) DATA ) is loaded from the data line (3) to the gate of the driving transistor (T1); and Pixel control circuit (5) is electrically contacted with the segmented electrode (109), wherein the pixel control circuit (5) is based on the data signal (V) of the pixel (2). DATA The value of ) is used to prevent light emission from the pixel (2). The pixel control circuit (5) is attached to a node (NODE1) located along the power line between the driving transistor (T1) and the segmented electrode (109). The pixel control circuit (5) prevents light emission by having a branch transistor (T3) whenever the data signal (V) DATA When the pixel (2) is indicated to be non-emitting or having emission below a threshold, the branch transistor (T3) allows electrical connection between the segment electrode (109) and the receiver (6) to reduce the voltage and / or current at the segment electrode below the level required for light emission. The pixel control circuit (5) includes: The determination subunit (9) will determine the data signal (V) DATA The voltage of ) and the reference voltage V REF The comparison is performed, and an output voltage V is provided based on the result of the comparison. OUTPUT ;as well as The latch subunit (10) receives the output voltage V from the determination subunit (9). OUTPUT And control the branch transistor (T3) to adjust the output voltage V based on the output voltage V. OUTPUT To enable or disable the electrical connection between the segmented electrode (109) and the receiver (6).

2. The display according to claim 1, wherein, When the data signal (V) of the pixel (2) DATA The value of ) indicates that the pixel control circuit (5) is disabled when the emission exceeds the threshold.

3. The display according to claim 1, wherein, Whenever the scan signal (V) SCAN The scanning transistor (T4) is instructed to prevent the data signal (V) from being transmitted. DATA The output voltage V is applied to the gate of the driving transistor (T1) and the output voltage V OUTPUT When the branch transistor (T3) is set to disable, the branch transistor (T3) allows electrical connection between the segment electrode (109) and the receiver (6) to reduce the voltage and / or current below the level required for light emission.

4. The display according to claim 3, wherein, The pixel control circuit (5) further includes: Transistor (TB), the gate of which is scanned by a scan signal (V). SCAN The control is connected in series between the gate of the determination subunit (9) and the gate of the branch transistor (T3). Whenever the scan signal (V) SCAN This enables the transistor (TB) to turn on the output voltage V. OUTPUT When applied to the gate of the branch transistor (T3), based on the output voltage V OUTPUT The value enables or disables the electrical connection between the segmented electrode (109) and the receiver (6).

5. The display according to claim 1, wherein, The reference voltage V REF and the power supply V DD (1) The voltages are the same.

6. The display according to claim 1 is an OLED microdisplay.

7. The display according to claim 6, wherein, The pixels (2) used for emitting light are formed using a multimode microcavity OLED with a color filter array (129A, 129B, 129C).

8. The display according to claim 7, wherein, The multimode microcavity OLED has a stack of three or more light-emitting units (113, 117, 121).

9. The display according to claim 8, wherein, The pixel (2) has a threshold voltage of 5V or greater. th .

10. The display according to claim 1, wherein, A switching transistor (T6) is connected in series between the driving transistor (T1) and the segmented electrode (109), such that the driving transistor (T1) and the switching transistor (T6) are connected in series between the power supply (1) and the segmented electrode (109).

11. The display according to claim 10, wherein, The driving transistor (T1) and the switching transistor (T6) are both p-channel transistors, and the branch transistor (T3) is an n-channel transistor.

12. The display according to claim 2, wherein, Whenever the scan signal (V) SCAN The scanning transistor (T4) is instructed to prevent the data signal (V) from being transmitted. DATA The output voltage V is applied to the gate of the driving transistor (T1) and the output voltage V OUTPUT When the branch transistor (T3) is set to disable, the branch transistor (T3) allows electrical connection between the segment electrode (109) and the receiver (6) to reduce the voltage and / or current below the level required for light emission, and The pixel control circuit (5) includes: Transistor (TB), the gate of which is scanned by a scan signal (V). SCAN The control is connected in series between the gate of the determination subunit (9) and the gate of the branch transistor (T3). Whenever the scan signal (V) SCAN This enables the transistor (TB) to turn on the output voltage V. OUTPUT When applied to the gate of the branch transistor (T3), based on the output voltage V OUTPUT The value enables or disables the electrical connection between the segmented electrode (109) and the receiver (6).

13. The display according to claim 4, wherein, The reference voltage V REF and the power supply V DD (1) The voltages are the same.

Images