Power conversion device

Abstract

In a first interval in which the instantaneous value of the voltage source (|Vin|) is higher than the DC voltage command value Vdc*, a first conversion operation is performed, and the capacitor (C4) is charged through the rectified voltage via the clamping diode (D42), in the first conversion operation, the second switch (Sc) is turned off, the first duty ratio drec and the third duty ratio dz are selected in such a manner that the DC voltage Vdc input to the current source (Idc) becomes equal to the DC voltage command value Vdc*, and power is supplied from the voltage source (|Vin|) to the current source (Idc). On the other hand, in a second interval in which the instantaneous value of the voltage source (|Vin|) is lower than the DC voltage command value Vdc*, a second conversion operation is performed, in the second conversion operation, the first switch (Srec) is turned off, the second duty ratio dc and the third duty ratio dz are selected in such a manner that the DC voltage Vdc input to the current source (Idc) becomes equal to the DC voltage command value Vdc*, and power is supplied from the capacitor (C4) to the current source (Idc).

Description

Technical Field

[0001] This invention provides a power conversion device. Background Technology

[0002] Conventionally, as a power conversion device, there exists a device that includes a first power line, a second power line to which a lower potential than the first power line is applied, a diode rectifier, a charging and discharging circuit disposed between the first power line and the second power line, and an inverter that operates based on a voltage vector by being input with the rectified voltage between the first power line and the second power line (see Japanese Patent No. 5629885 (Patent Document 1)).

[0003] In the power conversion device, power is supplied and received between the first power line and the second power line through a charging and discharging circuit to reduce power pulsation and improve voltage utilization.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent No. 5629885 Summary of the Invention

[0007] The problem that the invention aims to solve

[0008] However, the power conversion device has the following problem: at low load, the peak current of the charging current to the charging and discharging circuit is large, which in turn leads to insufficient improvement in partial load efficiency due to the voltage drop during discharge from the charging and discharging circuit.

[0009] In this disclosure, a power conversion device capable of improving partial load efficiency is proposed.

[0010] Methods for solving problems

[0011] The power conversion device disclosed herein includes a circuit represented by an equivalent circuit, said equivalent circuit having:

[0012] A voltage source that converts single-phase AC voltage into rectified voltage;

[0013] A first switch, one end of which is connected to the output terminal of the voltage source, is turned on with a predetermined first duty cycle drec;

[0014] A second switch, one end of which is connected to the other end of the first switch, is turned on with a predetermined second duty cycle dc;

[0015] A capacitor, one end of which is connected to the other end of the second switch, and the other end of which is connected to the common terminal of the voltage source;

[0016] A clamping diode, which is connected in parallel with the second switch;

[0017] A third switch, the first end of which is connected to the other end of the first switch, the second end of which is connected to the common terminal of the voltage source, and either the first end or the second end is selectively connected to the third end of the third switch, with the first end and the third end connected with a predetermined third duty cycle dz;

[0018] A current source, one end of which is connected to the other end of the first switch, and the other end of which is connected to the third end of the third switch Sz.

[0019] The power conversion device is characterized in that...

[0020] The third switch Sz and the current source Idc constitute a 3n-phase voltage-source inverter (n is a positive integer).

[0021] In a first interval where the instantaneous value of the voltage source is higher than the DC voltage command value Vdc*, a first conversion operation is performed, and the capacitor is charged via the clamping diode using the rectified voltage. During the first conversion operation, the second switch is opened, and the first duty cycle drec and the third duty cycle dz are selected such that the DC voltage Vdc input to the current source is equal to the DC voltage command value Vdc*, thereby supplying power from the voltage source to the current source.

[0022] On the other hand, in the second interval where the instantaneous value of the voltage source is below the DC voltage command value Vdc*, a second conversion operation is performed. In the second conversion operation, the first switch is turned off, and the second duty cycle dc and the third duty cycle dz are selected in such a way that the DC voltage Vdc input to the current source is equal to the DC voltage command value Vdc*, so that power is supplied from the capacitor to the current source.

[0023] According to this disclosure, in a first interval where the instantaneous value of the voltage source is higher than the DC voltage command value Vdc*, a first conversion operation is performed, and the capacitor is charged via a clamping diode using rectified voltage. During the first conversion operation, a second switch is opened, and a first duty cycle drec and a third duty cycle dz are selected such that the DC voltage Vdc input to the current source is equal to the DC voltage command value Vdc*, thereby supplying power from the voltage source to the current source. On the other hand, in a second interval where the instantaneous value of the voltage source is lower than the DC voltage command value Vdc*, a second conversion operation is performed. In this second conversion operation, the first switch is opened, and a second duty cycle dc and a third duty cycle dz are selected such that the DC voltage Vdc input to the current source is equal to the DC voltage command value Vdc*, thereby supplying power from the capacitor to the current source.

[0024] In this way, by alternating the first and second switching operations in conjunction with the power cycle to perform a voltage reduction operation, in partial load applications, such as when the power cycle is divided into a first interval and a second interval, the discharge charge from the capacitor is halved, the peak current of the charging current to the capacitor in the first interval is reduced, the input power factor is improved, and the period of voltage drop caused by the discharge from the capacitor is halved. Therefore, partial load efficiency can be improved.

[0025] In addition, the power conversion device involved in one aspect of this disclosure includes:

[0026] A reactor, one end of which is connected to the output terminal of the voltage source;

[0027] A diode, the anode of which is connected to the other end of the reactor, and the cathode of which is connected to the second switching side of the capacitor; and

[0028] A fourth switch, one end of which is connected to the anode of the diode and the other end of which is connected to the common terminal of the voltage source, is turned on with a predetermined fourth duty cycle dl.

[0029] According to this disclosure, in a load larger than a partial load, by turning on a fourth switch with a predetermined fourth duty cycle dl, the charging voltage of the capacitor charged via the reactor and diode is boosted, enabling a switching operation to improve voltage utilization efficiency through a boost operation.

[0030] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0031] The first duty cycle drec, the second duty cycle dc, and the third duty cycle dz satisfy the following conditions:

[0032] drec + dc + dz = 1

[0033] The conditions, and

[0034] Let the maximum value of the single-phase AC voltage be Vm, the angular velocity of the single-phase AC voltage be ω, and the time be t.

[0035] The first duty cycle drec and the second duty cycle dc during the first switching action are represented by the following formula:

[0036] [Mathematical Expression 1]

[0037]

[0038] d c =0

[0039] The first duty cycle drec and the second duty cycle dc during the second switching action are represented by the following formula:

[0040] [Mathematical Expression 2]

[0041] d rec =0

[0042]

[0043] The boundary phase angle φ between the first interval and the second interval is expressed by the following formula:

[0044] [Mathematical Expression 3]

[0045]

[0046] According to this disclosure, by alternating the first and second conversion operations in accordance with the power cycle in a manner that satisfies the conditions of the first duty cycle drec, the second duty cycle dc, and the third duty cycle dz during the period of the first and second conversion operations, partial load efficiency can be improved.

[0047] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0048] It has a first mode for performing the first conversion action and the second conversion action, and a second mode for performing other conversion actions besides the first conversion action and the second conversion action.

[0049] Starting from the first mode where the output frequency of the 3n-phase voltage source inverter is below a first threshold, when the output frequency of the 3n-phase voltage source inverter is higher than the first threshold, the system switches to the second mode.

[0050] Starting from the second mode where the output frequency of the 3n-phase voltage source inverter is higher than the second threshold, when the output frequency of the 3n-phase voltage source inverter falls below the second threshold, the system switches to the first mode.

[0051] The second threshold is equal to the first threshold, or the second threshold is lower than the first threshold by a predetermined value.

[0052] According to this disclosure, by switching between a first mode performing a first switching operation, a second switching operation, and a second mode performing other switching operations based on the current frequency of a current source that has an interphase relationship with the load, efficient switching operations can be performed according to the load. Furthermore, by setting a hysteresis in the switching between the first and second modes by making the second threshold a predetermined value lower than the first threshold, stable switching operations can be performed.

[0053] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0054] It has a first mode for performing the first conversion action and the second conversion action, and a second mode for performing other conversion actions besides the first conversion action and the second conversion action.

[0055] Starting from the first mode state where the modulation rate of the 3n-phase voltage source inverter is below a first threshold, when the modulation rate of the 3n-phase voltage source inverter is higher than the first threshold, the system switches from the first mode to the second mode.

[0056] From the state of the second mode where the modulation rate of the 3n-phase voltage source inverter is higher than the second threshold, when the modulation rate of the 3n-phase voltage source inverter falls below the second threshold, the system switches from the second mode to the first mode.

[0057] The second threshold is equal to the first threshold, or the second threshold is lower than the first threshold by a predetermined value.

[0058] According to this disclosure, by switching between a first mode performing a first switching operation, a second switching operation, and a second mode performing other switching operations based on the modulation rate of a current source that has an interphase relationship with the load, efficient switching operations can be performed according to the load. Furthermore, by setting a hysteresis during the switching between the first and second modes, stable switching operations can be achieved.

[0059] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0060] In the first mode, the DC voltage command value Vdc* is set to correspond to the output frequency of the 3n-phase voltage source inverter.

[0061] According to this disclosure, by setting a DC voltage command value Vdc* corresponding to the output frequency of the 3n-phase voltage source inverter, the ratio of the second zone to the first zone is reduced, which can further reduce the peak current of the charging current to the capacitor in the first zone, further improve the input power factor, and further improve the partial load efficiency because the voltage drop period caused by the discharge of the capacitor is further shortened.

[0062] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0063] In the first mode, the DC voltage command value Vdc* is set to correspond to the modulation rate of the 3n-phase voltage source inverter.

[0064] According to this disclosure, by setting a DC voltage command value Vdc* corresponding to the modulation rate of the 3n-phase voltage source inverter, the ratio of the second zone to the first zone is reduced, which can further reduce the peak current of the charging current to the capacitor in the first zone, further improve the input power factor, and further improve the partial load efficiency because the period of voltage drop caused by the discharge of the capacitor is further shortened.

[0065] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0066] The voltage source includes a bridge circuit composed of switching elements, which synchronously rectifies the single-phase AC voltage by turning on each switching element during the first switching operation and turning it off during the second switching operation, thereby outputting the rectified voltage.

[0067] According to this disclosure, each switching element of the bridge circuit is turned on during the first switching operation and turned off during the second switching operation in sync with the single-phase AC voltage, thereby synchronously rectifying the single-phase AC voltage and outputting a rectified voltage from the voltage source. Therefore, even when using reactors with small inductance for power factor improvement, high-order harmonic suppression, etc., partial load efficiency can be improved while suppressing efficiency reduction at rated load.

[0068] In addition, the power conversion device disclosed herein includes:

[0069] The converter section converts single-phase AC voltage into rectified voltage;

[0070] The first power supply line is connected to the positive output terminal of the converter section;

[0071] The second power supply line is connected to the negative output terminal of the converter section;

[0072] The inverter section is controlled by a PWM (Pulse Width Modulation) circuit. The positive input terminal of this PWM-controlled inverter section is connected to the positive output terminal of the converter section via the first power line, and the negative input terminal of this PWM-controlled inverter section is connected to the negative output terminal of the converter section via the second power line. It outputs an AC voltage converted from the rectified voltage.

[0073] A buffer circuit is connected between the first power line and the second power line.

[0074] In a first interval where the absolute value of the instantaneous value of the single-phase AC voltage is higher than the DC voltage command value Vdc*, a first conversion operation is performed, and the buffer circuit is charged by the rectified voltage. During the first conversion operation, the output terminal of the buffer circuit is disconnected from the first power line, and the switching mode of the PWM control of the inverter section is selected such that the DC voltage calculated from the output voltage when the inverter section is saturated is equal to the DC voltage command value Vdc*. Power is supplied to the inverter section by the rectified voltage output from the converter section.

[0075] On the other hand, in the second interval where the absolute value of the instantaneous value of the single-phase AC voltage is below the DC voltage command value Vdc*, a second conversion operation is performed. In the second conversion operation, the output terminal of the buffer circuit is connected to the first power line, and the switching mode of the PWM control of the inverter section is selected such that the DC voltage calculated from the output voltage when the inverter section is saturated is equal to the DC voltage command value Vdc*, and power is supplied from the buffer circuit to the inverter section.

[0076] According to this disclosure, in a first interval where the absolute value of the instantaneous value of the single-phase AC voltage is higher than the DC voltage command value Vdc*, a first conversion operation is performed, and the buffer circuit is charged using the rectified voltage. In this first conversion operation, the output terminal of the buffer circuit is disconnected from the first power line, and the switching mode of the inverter's PWM control is selected such that the DC voltage calculated from the output voltage when the inverter is saturated is equal to the DC voltage command value Vdc*, and power is supplied to the inverter using the rectified voltage output from the converter. On the other hand, in a second interval where the absolute value of the instantaneous value of the single-phase AC voltage is lower than the DC voltage command value Vdc*, a second conversion operation is performed. In this second conversion operation, the output terminal of the buffer circuit is connected to the first power line, and the switching mode of the inverter's PWM control is selected such that the DC voltage calculated from the output voltage when the inverter is saturated is equal to the DC voltage command value Vdc*, and power is supplied to the inverter from the buffer circuit.

[0077] In this way, by alternating the first and second switching operations in conjunction with the power cycle to perform a voltage reduction operation, in partial load applications, such as when the power cycle is divided into a first interval and a second interval, the discharge charge from the buffer circuit is halved, the peak current of the charging current to the buffer circuit in the first interval is reduced, the input power factor is improved, and the period of voltage drop caused by discharge from the buffer circuit is halved. Therefore, partial load efficiency can be improved.

[0078] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0079] The first duty cycle drec, which is the duty cycle of the current flowing from the converter section without passing through the buffer circuit, the second duty cycle dc, which is the duty cycle of the current flowing through the buffer circuit, and the third duty cycle dz, which is the duty cycle of the zero-phase current flowing in the inverter section, satisfy the following conditions:

[0080] drec + dc + dz = 1

[0081] The conditions, and

[0082] Let the maximum value of the single-phase AC voltage be Vm, the angular velocity of the single-phase AC voltage be ω, and the time be t.

[0083] The first duty cycle drec and the second duty cycle dc in the first interval are represented by the following formula.

[0084] [Mathematical Expression 4]

[0085]

[0086] d c =0

[0087] The first duty cycle drec and the second duty cycle dc during the second interval are represented by the following formula:

[0088] [Mathematical Expression 5]

[0089] d rec =0

[0090]

[0091] The inverter is PWM controlled based on the phase voltage command values ​​Vu*, Vv*, Vw*, the first duty cycle drec, the second duty cycle dc, and the third duty cycle dz.

[0092] According to this disclosure, by performing PWM control on the inverter section based on phase voltage command values ​​Vu*, Vv*, Vw*, a first duty cycle drec, a second duty cycle dc, and a third duty cycle dz, the first and second conversion operations are performed alternately in accordance with the power cycle to satisfy the conditions of the first duty cycle drec, the second duty cycle dc, and the third duty cycle dz during the period of the first and second conversion operations, thereby improving the efficiency of partial loads.

[0093] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0094] A charging circuit is provided that charges the buffer circuit with the rectified voltage in the first interval.

[0095] According to this disclosure, the buffer circuit is charged by a rectified voltage in the first interval through the charging circuit, thereby suppressing the shunting of the charging current to the charging path outside the charging circuit and reducing charging losses.

[0096] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0097] It has a first mode for performing the first conversion action and the second conversion action, and a second mode for performing other conversion actions besides the first conversion action and the second conversion action.

[0098] From the first mode state where the output frequency of the inverter section is below a first threshold, when the output frequency of the inverter section is higher than the first threshold, the system switches to the second mode.

[0099] From the state of the second mode where the output frequency of the inverter section is higher than the second threshold, when the output frequency of the inverter section falls below the second threshold, the system switches to the first mode.

[0100] The second threshold is equal to the first threshold, or the second threshold is lower than the first threshold by a predetermined value.

[0101] According to this disclosure, by switching between a first mode performing a first conversion operation, a second conversion operation, and a second mode performing other conversion operations based on the output frequency of the inverter section, which has an alternating relationship with the increase or decrease of the load, efficient conversion operations can be performed according to the load. Furthermore, by setting a hysteresis during the switching between the first and second modes by making the second threshold a predetermined value lower than the first threshold, stable switching operations can be performed.

[0102] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0103] It has a first mode for performing the first conversion action and the second conversion action, and a second mode for performing other conversion actions besides the first conversion action and the second conversion action.

[0104] Starting from the first mode state where the modulation rate of the inverter section is below a first threshold, when the modulation rate of the inverter section is higher than the first threshold, the system switches to the second mode.

[0105] From the state of the second mode where the modulation rate of the inverter section is higher than the second threshold, when the modulation rate of the inverter section falls below the second threshold, the system switches to the first mode.

[0106] The second threshold is equal to the first threshold, or the second threshold is lower than the first threshold by a predetermined value.

[0107] According to this disclosure, by switching between a first mode performing a first conversion operation, a second conversion operation, and a second mode performing other conversion operations based on the modulation rate of the inverter section, which has an interphase relationship with the increase or decrease of the load, efficient conversion operations can be performed according to the load. Furthermore, by setting a hysteresis during the switching between the first and second modes, stable switching operations can be achieved.

[0108] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0109] In the first mode, the DC voltage command value Vdc* corresponding to the output frequency of the inverter section is set.

[0110] According to this disclosure, by setting a DC voltage command value Vdc* corresponding to the output frequency of the inverter section, the ratio of the second zone to the first zone is reduced, the peak current of the charging current to the buffer circuit in the first zone is further reduced, the input power factor is further improved, the period of voltage drop caused by discharge from the buffer circuit is further shortened, and the partial load efficiency can be further improved.

[0111] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0112] In the first mode, the DC voltage command value Vdc* corresponding to the modulation rate of the inverter section is set.

[0113] According to this disclosure, by setting a DC voltage command value Vdc* corresponding to the modulation rate of the inverter section, the ratio of the second zone to the first zone is reduced, the peak current of the charging current to the buffer circuit in the first zone is further reduced, the input power factor is further improved, the period of voltage drop caused by discharge from the buffer circuit is further shortened, and the partial load efficiency can be further improved.

[0114] Furthermore, in one embodiment of the power conversion device disclosed herein,

[0115] The converter section includes a bridge circuit composed of switching elements. By synchronously turning on each switching element during the first conversion operation and turning it off during the second conversion operation in sync with the single-phase AC voltage, the single-phase AC voltage is synchronously rectified to output the rectified voltage.

[0116] According to this disclosure, each switching element of the bridge circuit is turned on during the first switching operation and turned off during the second switching operation in sync with the single-phase AC voltage, thereby synchronously rectifying the single-phase AC voltage and outputting a rectified voltage from the converter section. Therefore, even if a reactor with small inductance is used in a reactor used for power factor improvement, high-order harmonic suppression, etc., the efficiency under partial load can be improved and the efficiency reduction under rated load can be suppressed. Attached Figure Description

[0117] Figure 1 This is a circuit diagram of a power conversion device according to the first embodiment of this disclosure.

[0118] Figure 2 This is a diagram showing the equivalent circuit of the power conversion device according to the first embodiment.

[0119] Figure 3A This is a diagram showing the waveform of the current ratio of the equivalent circuit of the power conversion device of the first embodiment.

[0120] Figure 3B This is a diagram showing the average voltage waveform and average current waveform of each part of the equivalent circuit of the power conversion device of the first embodiment.

[0121] Figure 3C This is a diagram showing the current waveforms of each part of the equivalent circuit of the power conversion device according to the first embodiment.

[0122] Figure 3D This is a diagram showing the instantaneous power waveforms of each part of the equivalent circuit of the power conversion device of the first embodiment.

[0123] Figure 4 This is a diagram showing the simulated waveforms of voltage and current in each part of the power conversion device according to the first embodiment.

[0124] Figure 5 This is a diagram showing the simulated waveforms of voltage and current in various parts of the power conversion device of a modified example of the first embodiment.

[0125] Figure 6 This is a block diagram of the control device of the power conversion device according to the first embodiment.

[0126] Figure 7 This is a diagram illustrating the operation of the power conversion device according to the first embodiment.

[0127] Figure 8 This is a graph showing the relationship between the rotational speed and conversion efficiency when the power conversion device of the first embodiment is used to drive a motor as an inductive load.

[0128] Figure 9This is a graph showing the relationship between the rotational speed and the input power factor when the power conversion device of the first embodiment is used to drive a motor as an inductive load.

[0129] Figure 10 This is a graph showing the relationship between the rotational speed of the motor and the motor input voltage when the power conversion device of the first embodiment is used to drive the motor as an inductive load.

[0130] Figure 11 This is a circuit diagram of a power conversion device according to a second embodiment of the present disclosure.

[0131] Figure 12 This is a diagram showing the simulated waveforms of voltage and current in each part of the power conversion device according to the second embodiment.

[0132] Figure 13 This is a circuit diagram of a power conversion device according to a third embodiment of the present disclosure.

[0133] Figure 14 This is a circuit diagram of a power conversion device according to the fourth embodiment of this disclosure.

[0134] Figure 15 This is a circuit diagram of a power conversion device according to the fifth embodiment of this disclosure.

[0135] Figure 16 This is a diagram showing the simulated waveforms of voltage and current in each part of the power conversion device according to the fifth embodiment.

[0136] Figure 17 It is a diagram showing the relationship between inductance and loss in a power conversion device.

[0137] Figure 18 This is a graph showing the relationship between inductance and peak current in a power conversion device. Detailed Implementation

[0138] The embodiments will now be described. Furthermore, in the accompanying drawings, the same reference numerals denote the same or equivalent parts.

[0139] [First Implementation Method]

[0140] Figure 1 This is a circuit diagram of a power conversion device according to the first embodiment of this disclosure.

[0141] like Figure 1 As shown, the power conversion device of this first embodiment includes a converter section 2, a filter section 3, a buffer circuit 4a, a charging circuit 4b, a current blocking section 4c, an inverter section 5, and a control device 10. Figure 6(As shown). Furthermore, the positive output terminal of the converter section 2 of the power conversion device is connected to the first power line LH, and the negative output terminal of the converter section 2 is connected to the second power line LL. The first power line LH consists of a power line section LH1 connected at one end to the positive output terminal of the converter section 2, a power line section LH2 connected at one end to the other end of the power line section LH1 via a reactor L3, and a power line section LH3 connected at one end to the other end of the power line section LH2 via a diode D43.

[0142] The converter section 2 includes a bridge circuit composed of diodes D21 to D24 connected to the single-phase AC power supply 1. Diodes D21 to D24 perform single-phase full-wave rectification of the single-phase AC voltage Vin input from the single-phase AC power supply 1, converting it into a rectified voltage, which is output between the power line portion LH1 of the first power line LH and the second power line LL. A higher potential than that of the second power line LL is applied to the power line portion LH1 of the first power line LH. The input current Iin flows from the single-phase AC power supply 1 into the converter section 2.

[0143] The filter section 3 includes a reactor L3 and a capacitor C3. The capacitor C3 is disposed between the power line portion LH2 of the first power line LH and the second power line LL. The reactor L3 is connected between the power line portions LH1 and LH2 of the first power line LH and is disposed on the converter section 2 side, compared to the capacitor C3. The reactor L3 and the capacitor C3 constitute a so-called LC filter.

[0144] Here, capacitor C3 is, for example, a film capacitor with a smaller electrostatic capacitance than that of an electrolytic capacitor. Such a capacitor C3 hardly smooths the rectified voltage output from converter section 2. Therefore, the voltage v3 across capacitor C3 pulsates with the same period as the pulsation period of the rectified voltage.

[0145] <Structure of Buffer Circuit>

[0146] A buffer circuit 4a is connected between the power line portion LH3 of the first power line LH and the second power line LL, and includes a clamping diode D42 and a transistor Sc connected in reverse parallel with the clamping diode D42. Here, the transistor Sc is, for example, an IGBT (Insulated Gate Bipolar Transistor). The transistor Sc is connected in series with the capacitor C4 on the power line portion LH3 side between the power line portion LH3 of the first power line LH and the second power line LL. Here, reverse parallel connection means a parallel connection with the forward directions opposite to each other. Specifically, the forward direction of the transistor Sc is from the second power line LL toward the power line portion LH3, and the forward direction of the clamping diode D42 is from the power line portion LH3 toward the second power line LL.

[0147] When transistor Sc is turned on, the buffer circuit 4a outputs a voltage approximately the same as the voltage v4 across capacitor C4. Furthermore, when transistor Sc is not turned on, the DC link voltage Vdclink becomes approximately the same as the voltage v3 across capacitor C3.

[0148] <Structure of the charging circuit>

[0149] Charging circuit 4b includes diode D40, reactor L4, and transistor SI. The cathode of diode D40 is connected between transistor SI and capacitor C4. Reactor L4 is connected between the power line portion LH2 of the first power line LH and the anode of diode D40. Transistor SI is connected between the second power line LL and the anode of diode D40. Diode D41 is connected in reverse parallel to transistor SI. Since the potential of the power line portion LH2 of the first power line LH is higher than the potential of the second power line LL, essentially no current flows through diode D41.

[0150] Under partial load conditions, charging circuit 4b disconnects transistor SI and charges capacitor C4 via reactor L4 and diode D40.

[0151] Furthermore, in the case of a load larger than a partial load, the charging circuit 4b charges capacitor C4 by turning on transistor SI with a predetermined fourth duty cycle dl, thereby boosting the rectified voltage from converter section 2 (more specifically, the voltage v3 across capacitor C3). At this time, a voltage v4 higher than the voltage v3 is generated in capacitor C4. Specifically, energy is stored in reactor L4 by allowing current to flow from power line section LH2 of the first power line LH through transistor SI to the second power line LL. Then, by turning off transistor SI, this energy is stored in capacitor C4 via diode D40. Since the voltage v4 across capacitor C4 is higher than the voltage v3, current essentially does not flow to clamping diode D42.

[0152] <Structure of the current blocking part>

[0153] A current blocking section 4c is disposed between power line sections LH2 and LH3 of the first power line LH and between the buffer circuit 4a and the filter section 3, preventing current from flowing from capacitor C4 in the buffer circuit 4a to capacitor C3. In this embodiment, by utilizing diode D43 to implement the current blocking section 4c, the filter section 3 can be disposed on the DC link side. In the following embodiments, the converter section 2 also performs this function. Figure 1 In this configuration, the forward direction of diode D43 is from the converter section 2 toward the inverter section 5. Furthermore, the current blocking section 4c may also be provided between the buffer circuit 4a and the charging circuit 4b of the second power line LL.

[0154] <Structure of the Inverter Section>

[0155] The positive output terminal of converter section 2 is connected to the positive input terminal of inverter section 5 via power line section LH1 of the first power line LH, reactor L3, power line section LH2, diode D43, and power line section LH3. The negative output terminal of converter section 2 is connected to the negative input terminal of inverter section 5 via the second power line LL. Inverter section 5 outputs a three-phase AC voltage converted from the DC link voltage Vdclink applied to the positive and negative input terminals from its output terminals Pu, Pv, and Pw.

[0156] Inverter section 5 includes six switching elements: Sup, Svp, Swp, Sun, Svn, and Swn. Sup, Svp, and Swp are connected between the output terminals Pu, Pv, and Pw and the power line section LH3 of the first power line LH, respectively. Sun, Svn, and Swn are connected between the output terminals Pu, Pv, and Pw and the second power line LL, respectively. Inverter section 5 constitutes a so-called voltage-source inverter with PWM control, and includes six diodes: Dup, Dvp, Dwp, Dun, Dvn, and Dwn.

[0157] Diodes Dup, Dvp, Dwp, Dun, Dvn, and Dwn all have their cathodes facing the power line portion LH3 of the first power line LH, and their anodes facing the second power line LL. Diode Dup is connected in parallel with the switching element Sup between the output terminal Pu and the power line portion LH3. Similarly, diodes Dvp, Dwp, Dun, Dvn, and Dwn are connected in parallel with the switching elements Svp, Swp, Sun, Svn, and Swn, respectively.

[0158] For example, the switching elements Sup, Svp, Swp, Sun, Svn, and Swn use IGBTs (Insulated Gate Bipolar Transistors).

[0159] In this embodiment, the inductive load connected to the output terminals Pu, Pv, and Pw of the inverter section 5 is the motor 6, which rotates according to the three-phase AC voltage from the inverter section 5.

[0160] In the power conversion device, a first conversion operation is performed in a first interval where the absolute value of the instantaneous value of the single-phase AC voltage Vin is higher than the DC voltage command value Vdc*, and the buffer circuit 4a is charged by the rectified voltage. In the first conversion operation, the output terminal of the buffer circuit 4a is disconnected from the power line portion LH3 of the first power line LH, so that the DC voltage calculated from the output voltage when the inverter section 5 is saturated is equal to the DC voltage command value Vdc*, and the switching mode of the PWM control of the inverter section 5 is selected. Power is supplied to the inverter section 5 by the rectified voltage output from the converter section 2.

[0161] On the other hand, a second conversion operation is performed in the second interval where the absolute value of the instantaneous value of the single-phase AC voltage Vin is below the DC voltage command value Vdc*. In the second conversion operation, the output terminal of the buffer circuit 4a is connected to the power line section LH3 of the first power line LH, so that the DC voltage calculated from the output voltage when the inverter section 5 is saturated is equal to the DC voltage command value Vdc*. The switching mode of the PWM control of the inverter section 5 is selected so that the DC voltage is equal to the DC voltage command value Vdc*. Power is supplied from the buffer circuit 4a to the inverter section 5.

[0162] Here, the "DC voltage calculated from the output voltage when the inverter section 5 is saturated" can be obtained based on the output voltage of the inverter section 5 at modulation rate 1. In this embodiment, the PWM control method of the inverter section 5 is phase voltage control; therefore, the DC voltage of the inverter section 5 becomes the effective value of the output voltage of the inverter section 5 at modulation rate 1. Furthermore, when the PWM control mode of the inverter section 5 is line-to-line voltage control, the DC voltage of the inverter section 5 becomes the effective value of the output voltage at modulation rate 1 of the inverter section 5. times.

[0163] According to the power conversion device, a voltage reduction operation is performed by alternately performing the first conversion operation and the second conversion operation in coordination with the power supply cycle. When the power supply cycle is divided into a first interval and a second interval in a partial load, the discharge charge from the buffer circuit 4a is halved, the peak current of the charging current to the buffer circuit 4a in the first interval is reduced, the input power factor is improved, and the period of voltage drop caused by the discharge from the buffer circuit 4a is halved. As a result, the efficiency of the partial load can be improved.

[0164] In addition, in the power conversion device, the buffer circuit 4a is charged by the rectified voltage in the first interval through the charging circuit 4b, thereby suppressing the shunting of the charging current through the charging path (D43 and D42) other than the charging circuit 4b and reducing charging loss.

[0165] <Equivalent Circuit>

[0166] like Figure 2As shown, the power conversion device is represented by an equivalent circuit, which includes: a voltage source |Vin| that converts a single-phase AC voltage Vin to output a rectified voltage; a first switch Srec, one end of which is connected to the output terminal of the voltage source |Vin| and is turned on with a predetermined first duty cycle drec; a second switch Sc, one end of which is connected to the other end of the first switch Srec and is turned on with a predetermined second duty cycle dc; a capacitor C4, one end of which is connected to the other end of the second switch Sc and the other end of which is connected to the common terminal of the voltage source |Vin|; a clamping diode D42, which is connected in parallel with the second switch Sc; a third switch Sz, one end of which is connected to the other end of the first switch Srec and the second end of which is connected to the common terminal of the voltage source |Vin|, and either the first end or the second end is selectively turned on to the third end, with the first end and the third end turned on with a predetermined third duty cycle dz; and a current source Idc, one end of which is connected to the other end of the first switch Srec and the other end of which is connected to the third end of the third switch Sz.

[0167] The inverter section 5 is a 3-phase voltage-type inverter consisting of the third switch Sz and the current source Idc. Alternatively, the inverter section 5 can also be a 3n-phase voltage-type inverter (n is an integer of 2 or more).

[0168] in addition, Figure 2 The power conversion device shown includes: a reactor L4, one end of which is connected to the output terminal of a voltage source |Vin|; a diode D40, the anode of which is connected to the other end of the reactor L4, and the cathode of which is connected to the second switch Sc side of a capacitor C4; and a fourth switch SI, one end of which is connected to the anode of the diode D40, and the other end of which is connected to the common terminal of the voltage source |Vin|, and is turned on with a predetermined fourth duty cycle dl.

[0169] exist Figure 2 In the equivalent circuit shown, the current flowing from converter section 2 and filter section 3 to inverter section 5 is equivalently represented as the current irec1 via the first switch Srec. Similarly, the discharge current flowing from capacitor C4 to inverter section 5 is equivalently represented as the current ic flowing through the second switch Sc. In inverter section 5, which controls the DC voltage to be constant, when the output terminals Pu, Pv, and Pw are connected to one of the power line sections LH3 of the first power line LH and the second power line LL, the current flowing through inverter section 5 to motor 6 (inductive load) is also equivalently represented as the current iz via the third switch Sz. The same return current component accompanying the PWM modulation of inverter section 5 is included in the label of current source Idc. Figure 2 The diagram shows the reactor L4, diode D40, and switch SI that constitute the charging circuit 4b, with the current il flowing through the reactor L4 marked.

[0170] In addition, Figure 2In the equivalent circuit, the output voltage of the filter section 3 is represented by the voltage source |Vin|. The voltage source |Vin| outputs the rectified voltage (= the absolute value of the AC voltage Vin) output by the converter section 2. That is, the equivalent circuit is based on the following idea: when current flows from the converter section 2 to the inverter section 5 (when the first switch Srec is turned on), the rectified voltage is input to the inverter section 5.

[0171] In this equivalent circuit, when the duty cycles of the first switch Srec, the second switch Sc, and the third switch Sz are set to the first duty cycle drec, the second duty cycle dc, and the third duty cycle dz, the following relationship holds.

[0172] drec + dc + dz = 1

[0173] In addition, from Figure 2 It can be seen that the current irec flowing through converter section 2 is equal to the sum of the current irec1 turning on the first switch Srec and the current il flowing through reactor L4. Furthermore, since the current Irec1 is represented by the product of the first duty cycle drec and the DC current Idc, as shown in the equation, the current irec is represented by the sum of drec·Idc and the current il.

[0174] Furthermore, the currents irec1, ic, and iz are obtained by multiplying the DC current Idc by the first duty cycle drec, the second duty cycle dc, and the third duty cycle dz, respectively. Therefore, the currents irec1, ic, and iz are the average values ​​during the switching cycles of the first switch Srec, the second switch Sc, and the third switch Sz. Similarly, the current il is also the average value during the switching cycle of switch S1.

[0175] In addition, the DC current Idc is the sum of the currents irec1, ic, and iz that are turned on by the first switch Srec, the second switch Sc, and the third switch Sz, respectively. Therefore, the following formula holds true.

[0176] [Mathematical Expression 6]

[0177]

[0178] Therefore, the first duty cycle drec, the second duty cycle dc, and the third duty cycle dz can be regarded as the current distribution rate of the DC current Idc relative to each current irec1, ic, and iz.

[0179] A first conversion operation is performed in the first interval where the instantaneous value of the voltage source |Vin| is higher than the DC voltage command value Vdc*, and the capacitor C4 is charged through the rectified voltage via the clamping diode D42. In the first conversion operation, the second switch Sc is opened, and the first duty cycle drec and the third duty cycle dz are selected in such a way that the DC voltage Vdc input to the current source Idc is equal to the DC voltage command value Vdc*, so that power is supplied from the voltage source |Vin| to the current source Idc.

[0180] On the other hand, a second conversion operation is performed in the second interval below the DC voltage command value Vdc* when the instantaneous value of the voltage source |Vin| is below the DC voltage command value Vdc*. In the second conversion operation, the first switch Srec is opened, and the second duty cycle dc and the third duty cycle dz are selected in such a way that the DC voltage Vdc input to the current source Idc is equal to the DC voltage command value Vdc*, so that power is supplied from the capacitor C4 to the current source Idc.

[0181] Here, if the average voltage output from the first switch Srec is set as Vrec, and the average voltage output from the second switch Sc is set as Vc, then the DC voltage Vdc input to the current source Idc is expressed by the following formula.

[0182] Vdc = Vrec·drec + Vc·dc

[0183] Furthermore, in the power conversion device, in a load larger than a partial load, the charging voltage of the capacitor C4, which is charged via reactor L4 and diode D40, is boosted by the fourth switch SI, which is turned on with a predetermined fourth duty cycle dl. The conversion operation that improves voltage utilization efficiency through the boosting operation can be performed independently of the first conversion operation and the second conversion operation.

[0184] In the power conversion device of the aforementioned structure, the first duty cycle drec, which is the duty cycle of the current flowing from the converter section 2 without passing through the buffer circuit 4a, the second duty cycle dc, which is the duty cycle of the current flowing through the buffer circuit 4a, and the third duty cycle dz, which is the duty cycle of the zero-phase current flowing in the inverter section 5, satisfy the following conditions.

[0185] drec + dc + dz = 1

[0186] Furthermore, when the maximum value of the single-phase AC voltage Vin is set as Vm, the angular velocity of the single-phase AC voltage Vin is set as ω, and the time is set as t, the first duty cycle drec and the second duty cycle dc in the first interval are expressed by the following formula:

[0187] [Mathematical Expression 7]

[0188]

[0189] d=0

[0190] The first duty cycle drec and the second duty cycle dc during the second interval are expressed by the following formula.

[0191] [Mathematical Expression 8]

[0192] d=0

[0193] rec

[0194]

[0195] Inverter unit 5 performs PWM control based on phase voltage command values ​​Vu*, Vv*, Vw* and first duty cycle drec, second duty cycle dc and third duty cycle dz (see reference). Figure 7 ).

[0196] Here, the boundary phase angles of the first interval where the absolute value of the instantaneous value of the single-phase AC voltage Vin is higher than the DC voltage command value Vdc*, and the second interval where the absolute value of the instantaneous value of the single-phase AC voltage Vin is lower than the DC voltage command value Vdc* are defined. It is expressed by the following formula.

[0197] [Mathematical Expression 9]

[0198]

[0199] For example, if the DC voltage command value Vdc* is set to (Vm is the maximum value of the single-phase AC voltage Vin), then the boundary phase angle It is 45 degrees.

[0200] According to the power conversion device, by alternating the first conversion operation and the second conversion operation in accordance with the conditions of the first duty cycle drec, the second duty cycle dc and the third duty cycle dz during the period of the first conversion operation and the period of the second conversion operation, the efficiency of partial load can be improved.

[0201] Figure 3A express Figure 2 The waveform of the current ratio of the equivalent circuit of the power conversion device shown. Figure 3B The average voltage waveform and average current waveform of each part of the equivalent circuit of the power conversion device are represented. Figure 3C The current waveforms of various parts of the equivalent circuit of the power conversion device are represented. Figure 3D This represents the instantaneous power waveforms of various parts of the equivalent circuit of the power conversion device. Figures 3A to 3DIn this diagram, drec is the first duty cycle, dc is the second duty cycle, dz is the third duty cycle, Vrec is the average voltage output from the first switch Srec, Vc is the average voltage output from the second switch Sc, Idc is the average current input to the current source Idc, Irec1 is the input current of the first switch Srec, Ic is the input current of the second switch Sc, Irec is the input current of the voltage source |Vin|, Il is the input current of the reactor L4, Pin is the instantaneous power from the voltage source |Vin|, Pdc is the instantaneous power supplied to the current source Idc, and Pbuf is the instantaneous power supplied from the capacitor C4 to the current source Idc.

[0202] Here, the DC voltage command value Vdc* is set to (Vm is the maximum value of the single-phase AC voltage Vin). In Figures 3A to 3D In the first conversion action (charging), the first range is 45deg~135deg and 225deg~315deg, and the second range of the second conversion action (discharging) is 0deg~45deg, 135deg~225deg and 315deg~360deg.

[0203] in addition, Figure 4 express Figure 1 The simulated waveforms of voltage and current for each part of the power conversion device are shown. Figure 4 In this context, direct conversion is the first phase of the first conversion action (charging), and indirect conversion is the second phase of the second conversion action (discharging). Additionally, in... Figure 4 In this diagram, Vin is the single-phase AC voltage, Vdclink is the DC link voltage input to inverter section 5, v3 is the voltage across capacitor C3 in filter section 3, Idclink is the current input to inverter section 5, i4 is the current flowing through diode D43 in current blocking section 4c, iD40 is the current flowing through diode D40, iC4 is the current flowing through capacitor C4 in buffer circuit 4a, Idc0 is the current input to charging circuit 4b, iC3 is the current flowing through capacitor C3 in filter section 3, and Iin is the input current of converter section 2.

[0204] <Variation Example>

[0205] Figure 5 The simulated waveforms of voltage and current for each part of the power conversion device in a modified example of the first embodiment are shown. In this modified example, the DC voltage command value Vdc* is set to 0.5Vm (Vm is the maximum value of the single-phase AC voltage Vin). Boundary phase angle It is 30 degrees.

[0206] exist Figure 5In this embodiment, the first range of the first conversion action (charging) is 30°–150° and 210°–330°, and the second range of the second conversion action (discharging) is 0°–30°, 150°–210°, and 330°–360°. In this variation, the DC voltage command value Vdc* is set to 0.5Vm. The DC voltage command value Vdc* is Compared to the previous period, the proportion of the second interval relative to the first interval has decreased.

[0207] <Structure of the Control Device>

[0208] Figure 6 This is a block diagram of the control device 10 of the power conversion device according to the first embodiment. Figure 6 As shown, the control device 10 includes an inverter control unit 101, a discharge control unit 102, and a charging control unit 103.

[0209] The inverter control unit 101 outputs inverter control signals SSup, SSvp, SSwp, SSun, SSvn, and SSwn based on the first duty cycle drec, the second duty cycle dc, and the phase voltage command values ​​Vu*, Vv*, and Vw*. These inverter control signals SSup, SSvp, SSwp, SSun, SSvn, and SSwn control the operation of the switching elements Sup, Svp, Swp, Sun, Svn, and Swn in the inverter unit 5, respectively.

[0210] In addition, the inverter control unit 101 includes an output voltage command generation unit 1011, an amplitude modulation command unit 1012, a product summation unit 1013, a comparison unit 1014, a logic operation unit 1015, and a carrier generation unit 1016. The output voltage command generation unit 1011 generates phase voltage command values ​​Vu*, Vv*, and Vw* based on the phase θ (=ωt), q-axis current Iq, d-axis current Id, rotational angular velocity ωm, and their command value ωm*. The amplitude modulation command unit 1012 controls the operation of the product summation unit 1013 based on the first duty cycle drec and the second duty cycle dc. The product summation unit 1013 performs a product summation operation on the phase voltage command values ​​Vu*, Vv*, and Vw* with the first duty cycle drec and the second duty cycle dc to generate a signal wave M. The comparison unit 1014 outputs the comparison result between the signal wave M and the carrier CA2 to the logic operation unit 1015. The logic operation unit 1015 performs logic operations on the comparison result of the comparison unit 1014 and outputs inverter control signals SSup, SSvp, SSwp, SSun, SSvn, and SSwn.

[0211] The discharge control unit 102 includes a duty cycle calculation unit 1021 and a comparator 1022. The duty cycle calculation unit 1021 is based on the phase θ, amplitude Vm, and voltage Vc across capacitor C4 (in... Figure 1 The comparator 1022 uses the DC voltage command value Vdc* (v4) and the DC voltage command value Vdc* to generate a first duty cycle drec and a second duty cycle dc. The comparator 1022 compares the second duty cycle dc with the carrier CA1 to generate a discharge switch signal SSc that turns on the switch Sc.

[0212] The charging control unit 103 includes an amplitude determination unit 103a, a charging command generation unit 103b, and a charging operation control unit 103c. The charging control unit 103 generates a charging switch signal SS1 that keeps the switch SI always open under partial load.

[0213] The amplitude determination unit 103a includes a subtractor 1031 and a proportional-integral controller 1032. The subtractor 1031 calculates the deviation ΔVc based on the voltage across the terminals Vc and the average voltage command value Vc*. The proportional-integral controller 1032 performs proportional-integral control on the deviation ΔVc to determine the amplitude Im. The amplitude Im affects the phase voltage command values ​​Vu*, Vv*, and Vw*, and the operation of the inverter unit 5 is affected by the phase voltage command values ​​Vu*, Vv*, and Vw*, thus reducing the deviation ΔVc. The charging command generation unit 103b includes a charging waveform table 1033 and a multiplier 1034. The charging waveform table 1033 takes the distribution rate k and the phase θ (=ωt) as input and outputs a function F(θ) (=F(ωt)) about the phase θ. The multiplier 1034 multiplies the amplitude Im with the function F(ωt) to determine the charging command iL*. The charging operation control unit 103c controls the operation of the charging circuit 4b based on the charging command iL* and the voltage Vl across the reactor L4. Specifically, it generates a charging switch signal SSl to control the switch SI in such a way that the reactor current il flowing through the reactor L4 becomes the reactor current command il* corresponding to the charging command iL*.

[0214] Next, according to Figure 7 The operation of the control device 10 of the power conversion device in the first embodiment will be described.

[0215] In the control device 10, the carrier CA1 output from the carrier generation unit 1016 is compared with the second duty cycle dc. The carrier CA1 is a sawtooth waveform that repeats with a period ts.

[0216] The period during which carrier CA1 is below the second duty cycle dc is called period tc, and the period during which carrier CA1 is above the second duty cycle dc is called period trec'. Switch Sc is opened and closed in such a way that switch Sc is turned on when carrier CA1 is below the second duty cycle dc.

[0217] Additionally, let trec be the period during which carrier CA1 is above (dc+dz / 2) and below (drec+dc+dz / 2), and let tz / 2 be the period during which carrier CA1 is above the second duty cycle dc and below (dc+dz / 2), or above (drec+dc+dz / 2) and below 1 (drec+dc+dz).

[0218] Furthermore, the carrier CA2 output from the carrier generation unit 1016 is compared with the voltage command values ​​dc(1-Vu*), dc(1-Vv*), and dc(1-Vw*) during period tc. During period tc, the carrier CA2 sets the second duty cycle dc to its maximum value. During period trec, the carrier CA2 is compared with the voltage command values ​​dz+drec(1-Vu*), dz+drec(1-Vv*), and dz+drec(1-Vw*). During period trec, the carrier CA2 sets the discharge auxiliary duty cycle (1-dc) (=dz+drec) to its maximum value.

[0219] Thus, using the voltage command value, the inverter unit 5 operates based on the voltage vectors V0, V4, and V6 used in the period (1-Vu*):(Vu*-Vv*):(Vv*-Vw*) during either period tc or trec in the period ts.

[0220] Furthermore, the inverter section 5 uses voltage vector V0 during the timing interval (including period tz / 2) of the commutation of the buffer circuit 4a, and the buffer circuit 4a performs commutation in a state where no DC current Idclink flows.

[0221] In addition, Figure 7 In this context, the carrier CA1 can be a tilt with the opposite inclination, i.e., a gradually decreasing tilt, and the carrier CA1 can be a triangular wave.

[0222] Figure 8 This indicates the relationship between the rotational speed and conversion efficiency when the power conversion device of the first embodiment is used to drive the motor 6, which is an inductive load. Figure 9 This indicates the relationship between the rotational speed and the input power factor when the power conversion device is used to drive the motor 6. Figure 10 This indicates the relationship between the rotational speed and the motor input voltage when the power conversion device is used to drive motor 6. Figure 8 In the graph, the horizontal axis represents rotational speed [rps], and the vertical axis represents conversion efficiency. Additionally, in... Figure 9 In the graph, the horizontal axis represents rotational speed [rps], and the vertical axis represents the input power factor. Additionally, in... Figure 10 In the figure, the horizontal axis represents the rotational speed [rps], and the vertical axis represents the motor input voltage [Vmean].

[0223] exist Figures 8-10In the diagram, the black circular mark (●) indicates a power conversion operation in the first embodiment where the DC voltage command value Vdc* is set to 0.7Vm, and the white circular mark (○) indicates a power conversion operation in the first embodiment where the DC voltage command value Vdc* is set to 0.5Vm. Additionally, the white triangular mark (△) indicates a power conversion device that performs full-wave rectification using a diode bridge circuit without using a buffer circuit.

[0224] In addition, Figures 8-10 In the diagram, the black triangle (▲) indicates the use of existing half-cycle switching methods (see Japanese Patent No. 5629885) and continuous switching methods (see Japanese Patent No. 5804167). Figure 10 (The text refers to the "existing method"). Here, in the low-speed region with light loads (below 50 rpm), the switching operation is performed using a half-cycle switching method, while in the medium-to-high-speed region with heavy loads (above 50 rpm), the switching operation is performed using a continuous switching method.

[0225] like Figure 8 , Figure 9 As shown, the power conversion device of the first embodiment has improved conversion efficiency compared with existing power conversion devices and full-wave rectification operation. The input power factor is slightly worse than that of existing power conversion devices, but is significantly improved compared with full-wave rectification operation.

[0226] Thus, in the low-speed region of light load at speeds less than 50 rpm, the input power factor of the power conversion device of the first embodiment can be improved by 0.1 to 0.2 points, and the conversion efficiency can be improved by 0.5% to 1.0%, which can contribute to the improvement of the overall efficiency throughout the year.

[0227] In addition, such as Figure 10 As shown, when the voltage utilization rate is 0.7 (Vdc* is 0.7Vm) and 0.5 (Vdc* is 0.5Vm), with a power supply voltage of 200V, the output voltage of the power conversion device saturates around 50rps and 40rps. Therefore, switching to a control method that performs continuous switching operation at, for example, 50rps or more, and reducing the motor current is advantageous in terms of efficiency.

[0228] Therefore, the power conversion device of the first embodiment of this disclosure has a first mode for performing a first conversion operation and a second conversion operation, and a second mode for performing a conversion operation of continuous switching mode (Japanese Patent No. 5804167).

[0229] Starting from the first mode state where the output frequency of inverter section 5 is below a first threshold (e.g., 50 rpm), when the output frequency of inverter section 5 is above the first threshold (e.g., 50 rpm), it switches to the second mode; starting from the second mode state where the output frequency of inverter section 5 is above the second threshold (e.g., 50 rpm), when the output frequency of inverter section 5 is below the second threshold (e.g., 50 rpm), it switches to the first mode.

[0230] In this way, by switching between a first mode for performing the first conversion operation, a second conversion operation, and a second mode for performing the continuous switching operation according to the output frequency of the inverter section 5 which has an interphase relationship with the increase or decrease of the load, efficient conversion operations can be performed according to the load.

[0231] Furthermore, by setting the second threshold to be a predetermined value (e.g., 5 rps) lower than the first threshold, a hysteresis can be set during the switching between the first and second modes, enabling a stable switching action.

[0232] Furthermore, in the first embodiment, the first mode and the second mode are switched according to the output frequency of the inverter section 5, which has an alternating relationship with the increase or decrease of the load. However, switching can also be performed according to the modulation rate of the inverter section 5, which also has an alternating relationship with the increase or decrease of the load. In this case, efficient switching operations can be performed according to the load. In addition, by setting a hysteresis in the switching between the first mode and the second mode, stable switching operations can be performed.

[0233] Furthermore, in the power conversion device of the first embodiment, a DC voltage command value Vdc* corresponding to the output frequency of the inverter unit 5 is set. For example, by setting the DC voltage command value Vdc* to... By reducing the ratio of the second interval to the first interval, the peak current of the charging current to the buffer circuit 4a in the first interval is further reduced, the input power factor is further improved, and the period of voltage drop caused by the discharge from the buffer circuit 4a is further shortened, which can further improve the partial load efficiency.

[0234] Furthermore, in the first mode, a DC voltage command value Vdc* corresponding to the modulation rate of the inverter unit 5 can be set. In this case, by setting the DC voltage command value Vdc* corresponding to the modulation rate of the inverter unit and reducing the ratio of the second interval to the first interval, the peak current of the charging current to the buffer circuit 4a in the first interval is further reduced, the input power factor is further improved, the period of voltage drop caused by the discharge from the buffer circuit 4a is further shortened, and the partial load efficiency can be further improved.

[0235] The following is a brief explanation of the existing half-cycle switching method (refer to Japanese Patent No. 5629885) and continuous switching method (refer to Japanese Patent No. 5804167).

[0236] <Half-cycle switching mode>

[0237] In the half-cycle switching method (see Japanese Patent No. 5629885), power ripple is reduced by charging and discharging the pulsating power Pbuf by a buffer circuit in each half-cycle, and a switching operation is performed to supply only steady-state power to the inverter section. The control of the switching operation in the power conversion device of the half-cycle switching method is known in Japanese Patent No. 5629885, therefore a detailed description is omitted.

[0238] <Continuous switching mode>

[0239] In the continuous switching method (see Japanese Patent No. 5804167), unlike the half-cycle switching method, a high voltage utilization switching operation is performed by continuously charging and discharging the buffer circuit during a period in the power supply phase without setting an exclusivity. The control of the switching operation in the power conversion device of the continuous switching method is known in Japanese Patent No. 5629885, so detailed description is omitted.

[0240] The switching action of this continuous switching mode is in Figure 1 , Figure 2 The power conversion device shown can perform efficient conversion operations according to the load by having a second mode that combines a first conversion action with a second conversion action of the first mode.

[0241] Furthermore, in the first embodiment, the first mode and the second mode are switched according to the output frequency of the inverter section 5, which has an alternating relationship with the increase or decrease of the load. However, the power conversion device of the present invention may also be a power conversion device that operates in the first mode only in the area of ​​a partial load.

[0242] in addition, Figure 1 The circuit diagram shown illustrates one example of the structure of the power conversion device of this disclosure, but any power conversion device of this disclosure that includes [the following components] is acceptable. Figure 2 The power conversion device can be represented by the equivalent circuit shown.

[0243] [Second Implementation Method]

[0244] Figure 11 This is a circuit diagram of a power conversion device according to a second embodiment of the present disclosure. The power conversion device of this second embodiment has the same structure as the power conversion device of the second embodiment, except for the filter section 3.

[0245] In the power conversion device of this second embodiment, such as Figure 11 As shown, the converter section 2 is connected to the single-phase AC power supply 1 via the filter section 3. The filter section 3 includes a reactor L3 and a capacitor C3. The reactor L3 is disposed between one output terminal of the single-phase AC power supply 1 and one input terminal of the converter section 2. The capacitor C3 is disposed between the two output terminals of the single-phase AC power supply 1. The filter section 3 removes high-frequency components of the current.

[0246] The power conversion device of the second embodiment performs the same first conversion operation and second conversion operation as the power conversion device of the first embodiment.

[0247] The power conversion device of the second embodiment has the same effect as the power conversion device of the first embodiment. In addition, in the power conversion device of the second embodiment, the sum of the current Idc0 input to the charging circuit 4b through the filter section 3 on the single-phase AC power supply 1 side and the leading current iC3 of the capacitor C3 becomes the input current, thus improving the input power factor.

[0248] Figure 12 The simulated waveforms represent the voltage and current of each part of the power conversion device according to the second embodiment. Figure 12 In this context, direct conversion is the first phase of the first conversion action (charging), and indirect conversion is the second phase of the second conversion action (discharging). Additionally, in... Figure 12 In this diagram, Vin is the single-phase AC voltage, Vdclink is the DC link voltage input to inverter section 5, v3 is the voltage across capacitor C3 in filter section 3, Idclink is the current input to inverter section 5, i4 is the current flowing from charging circuit 4b to buffer circuit 4a in the first power line LH, iD40 is the current flowing through diode D40, iC4 is the current flowing through capacitor C4 in buffer circuit 4a, Idc0 is the current input to charging circuit 4b, iC3 is the current flowing through capacitor C3 in filter section 3, and Iin is the input current of converter section 2.

[0249] exist Figure 12 In the middle, set the DC voltage command value Vdc* to (Vm is the maximum value of single-phase AC voltage Vin). The first range of the first conversion action (charging) is 45deg~135deg and 225deg~315deg. The second range of the second conversion action (discharging) is 0deg~45deg, 135deg~225deg and 315deg~360deg.

[0250] Furthermore, in the structure of the power conversion device of the second embodiment, a half-cycle switching operation (see Japanese Patent No. 5629885) can also be performed.

[0251] [Third Implementation Method]

[0252] Figure 13 This is a circuit diagram of a power conversion device according to a third embodiment of the present disclosure. Except for the rectifier 7 and the circuit structure, the power conversion device of this third embodiment has the same structure as the power conversion device of the second embodiment.

[0253] In the power conversion device of this third embodiment, the filter section 3 is connected to the first power line LH on the input side of the buffer circuit 4a via the rectifier section 7. The rectifier section 7 performs single-phase full-wave rectification on the single-phase AC voltage Vin input from the single-phase AC power supply 1 to output a rectified voltage.

[0254] One end of the charging circuit 4b on the reactor L4 side is connected to the positive output terminal of the converter section 2 via the third power supply line LH4. The other end of the charging circuit 4b is connected to the negative output terminal of the converter section 2 via the second power supply line LL.

[0255] The power conversion device of the third embodiment has a first mode that performs a first conversion operation and a second conversion operation, and a second mode that performs a continuous switching operation (Japanese Patent No. 5804167), the same as the power conversion device of the first embodiment.

[0256] Starting from the first mode state where the output frequency of inverter section 5 is below a first threshold (e.g., 50 rpm), when the output frequency of inverter section 5 is above the first threshold (e.g., 50 rpm), it switches to the second mode; starting from the second mode state where the output frequency of inverter section 5 is above the second threshold (e.g., 50 rpm), when the output frequency of inverter section 5 is below the second threshold (e.g., 50 rpm), it switches to the first mode.

[0257] Furthermore, in the second mode where the load is larger than a partial load, the charging circuit 4b boosts the DC voltage from the converter section 2 and applies the boosted DC voltage to the capacitor C4.

[0258] In this way, by switching between a first mode for performing the first conversion operation, a second conversion operation, and a second mode for performing the continuous switching operation according to the output frequency of the inverter section 5 which has an interphase relationship with the increase or decrease of the load, efficient conversion operations can be performed according to the load.

[0259] Furthermore, by setting the second threshold to be a predetermined value (e.g., 5 rps) lower than the first threshold, a hysteresis can be set during the switching between the first and second modes, enabling a stable switching action.

[0260] Furthermore, in the third embodiment, the first mode and the second mode are switched according to the output frequency of the inverter section 5, which has a phase-to-phase relationship with the increase or decrease of the load. However, switching can also be performed according to the modulation rate of the inverter section 5, which also has a phase-to-phase relationship with the increase or decrease of the load. In this case, efficient switching operations can be performed according to the load. In addition, by setting a hysteresis in the switching between the first mode and the second mode, stable switching operations can be performed.

[0261] The power conversion device of the third embodiment has the same effect as the power conversion device of the second embodiment.

[0262] [Fourth Implementation Method]

[0263] Figure 14 This is a circuit diagram of a power conversion device according to the fourth embodiment of this disclosure.

[0264] like Figure 14 As shown, the power conversion device of this fourth embodiment includes a filter section 3, a converter section 12, a buffer circuit 4a, an inverter section 5, and a control device (not shown). Furthermore, the positive output terminal of the converter section 12 of the power conversion device is connected to the first power line LH, and the negative output terminal of the converter section 12 is connected to the second power line LL.

[0265] The converter section 12 is connected to the single-phase AC power supply 1 via the filter section 3. The filter section 3 includes a reactor L3, a capacitor C3, and a switch SW. The reactor L3 is connected between one of the two output terminals of the single-phase AC power supply 1 and the converter section 12. The capacitor C3 and the switch SW are connected in series between the two output terminals of the single-phase AC power supply 1. The filter section 3 removes high-frequency components of the current. Furthermore, in this power conversion device, in order to operate as a PWM converter in the second mode, the capacitor C3 is turned off by opening the switch SW, thereby allowing the reactor L3 to function as an interconnecting reactor. At this time, the buffer circuit 4a turns on the switch Sc, and the capacitor C4 functions as a smoothing circuit.

[0266] The converter section 12 includes switching elements Ssp, Ssn, Srp, and Srn. The input side of the converter section 12 is connected to a single-phase AC power supply 1, and the output side is connected to a first power line LH and a second power line LL. Furthermore, the switching elements Ssp, Ssn, Srp, and Srn of the converter section 12 form a bridge circuit.

[0267] The switching elements Ssp, Ssn, Srp, and Srn are, for example, MOSFETs (Metal Oxide Semiconductor Field-Effect Transistors), which are controlled to be turned on / off by a control device. Furthermore, by using MOSFETs in the switching elements Ssp, Ssn, Srp, and Srn, high-speed switching is possible when operating as a second-mode PWM converter, thus reducing switching losses. Additionally, the switching elements Ssp, Ssn, Srp, and Srn have internal parasitic diodes. These parasitic diodes are portions of the pn junction between the source and drain of the switching elements Ssp, Ssn, Srp, and Srn.

[0268] Furthermore, the saturation voltage (drain-source voltage in the on-state) of the preferred switching elements Ssp, Ssn, Srp, and Srn is lower than the forward voltage of the parasitic diode. Therefore, compared to current flowing through the parasitic diode, the voltage drop is smaller when current flows through the source-drain of the switching elements Ssp, Ssn, Srp, and Srn, thus reducing conduction losses. In other words, the conduction losses are smaller when current flows through the on-state of the switching element Ssp compared to current flowing through the parasitic diode in the off-state. The same applies to the other switching elements Ssn, Srp, and Srn.

[0269] In the power conversion device, the capacitor C4 of the buffer circuit 4a is not charged via the charging circuit 4b as in the first embodiment.

[0270] The power conversion device of the fourth embodiment performs the same first and second conversion operations as the power conversion device of the first embodiment, while simultaneously performing full-wave rectification based on synchronous rectification through the bridge circuit of the converter section 12. Specifically, the converter section 2 synchronously connects one pair of each switching element Ssp, Ssn, Srp, and Srn during the first conversion operation and disconnects them all during the second conversion operation, thereby synchronously rectifying the single-phase AC voltage Vin to output a rectified voltage.

[0271] Therefore, the power conversion device has the same effect as the power conversion device of the second embodiment, and the loss is reduced under light load, and the efficiency under light load is improved compared with the diode bridge circuit.

[0272] [Fifth Implementation Method]

[0273] Figure 15This is a circuit diagram of the power conversion device according to the fifth embodiment of this disclosure. The power conversion device of the fifth embodiment has the same structure as the power conversion device of the fourth embodiment, except for the capacitor C3 and the buffer circuit 4a.

[0274] like Figure 15 As shown, the power conversion device of this fifth embodiment includes a converter section 12, a buffer circuit 4a, an inverter section 5, and a control device (not shown). Furthermore, the positive output terminal of the converter section 12 is connected to the first power line LH, and the negative output terminal of the converter section 12 is connected to the second power line LL.

[0275] One output terminal of the single-phase AC power supply 1 is connected to one input terminal of the converter section 12 via reactor L3. The other output terminal of the single-phase AC power supply 1 is connected to the other input terminal of the converter section 12. A capacitor C3 is connected between the positive and negative output terminals of the converter section 12.

[0276] The buffer circuit 4a has a capacitor C1, a transistor Sc, and a capacitor C2 connected in series from the first power line LH between the first power line LH and the second power line LL. Additionally, the buffer circuit 4a includes: a clamping diode D42 connected in reverse parallel with the transistor Sc; a diode D43 whose cathode is connected to the junction of capacitor C1 and transistor Sc, and whose anode is connected to the second power line LL; and a diode D44 whose anode is connected to the junction of capacitor C2 and transistor Sc, and whose cathode is connected to the first power line LH. This buffer circuit 4a is constructed using a so-called fast-fill circuit (valley-fill circuit).

[0277] Here, when transistor Sc operates as a PWM converter in the second mode, Sc is turned on, and capacitor C4 functions as a smoothing circuit. However, since capacitor C3, which serves as a voltage source and is connected in parallel for filtering, cannot be switched in the first mode, unlike in the fourth embodiment. Here, in the second mode, after the series potentials of capacitors C1 and C2 and the potential of capacitor C3 are boosted from the power supply peak, short-circuit current between the capacitors can be avoided by turning on transistor Sc.

[0278] Figure 16 The simulated waveforms represent the voltage and current of each part of the power conversion device according to the fifth embodiment. Figure 16 In this context, direct conversion is the first phase of the first conversion action (charging), and indirect conversion is the second phase of the second conversion action (discharging). Additionally, in... Figure 16In this diagram, Vin is the single-phase AC voltage, Vdclink is the DC link voltage input to inverter section 5, Idclink is the current input to inverter section 5, IC1 is the current flowing through capacitor C1, Idc0 is the current input to charging circuit 4b, iC3 is the current flowing through capacitor C3 of filter section 3, and Iin is the input current of converter section 2.

[0279] exist Figure 16 In this circuit, the DC voltage command value Vdc* is 0.5Vm (Vm is the maximum value of the single-phase AC voltage Vin). The first range of the first conversion action (charging) is 30deg~150deg and 210deg~330deg. The second range of the second conversion action (discharging) is 0deg~30deg, 150deg~210deg and 330deg~360deg.

[0280] Figure 17 This illustrates the relationship between the inductance and loss of the reactor forming the filter circuit in the power conversion device of the fifth embodiment. Figure 18 This indicates the relationship between the inductance and the peak current. Figure 17 , Figure 18 In this study, calculations were performed using a maximum input of 20A for a 200V room air conditioner. Here, the capacitance of the capacitor forming the reactor and filter circuit was set to 1000μF, and the load was calculated using 550W as a representative value in the intermediate operating range of a medium to large-sized indoor air conditioner.

[0281] exist Figure 17 , Figure 18 In conventional power conversion devices using diode bridge circuits, "diode rectification" is used to represent the inductance loss relative to the inductor connected to a single-phase AC power supply [W]. In conventional power conversion devices using MOSFET-based bridge circuits for synchronous rectification, "MOSFET synchronous rectification" is used to represent the inductance loss relative to the inductor connected to a single-phase AC power supply [W]. In the power conversion device of the fifth embodiment, "MOSFET synchronous rectification + the present invention" is used to represent the inductance loss relative to the inductor L3 [W].

[0282] Figure 17 The result is based on the static characteristics of the bridge circuit, calculated to determine its losses. Figure 18 Compared to the characteristics shown, the lower the peak current and the higher the power factor, the greater the synchronous rectification effect.

[0283] Furthermore, in the power conversion device of the fifth embodiment, such as Figure 17As shown, by setting the inductance of reactor L3 to a smaller value, it is possible to improve efficiency at partial load while avoiding efficiency reduction at maximum load, thereby ensuring a wider operating range from partial load to maximum load.

[0284] Specific embodiments of this disclosure have been described, but this disclosure is not limited to the first to fifth embodiments, and various modifications can be made within the scope of this disclosure. For example, an embodiment of this disclosure may be obtained by appropriately combining the contents described in the first to fifth embodiments.

[0285] Label Explanation

[0286] 1: Single-phase AC power supply; 2, 12: Converter section; 3: Filter section; 4a: Buffer circuit; 4b: Charging circuit; 4c: Current blocking section; 5: Inverter section; 6: Motor (inductive load); 10: Control device; 101: Inverter control section; 102: Discharge control section; 103: Charging control section; C3: Capacitor; C4: Capacitor; D21~D24: Diodes; D41: Diode; D42: Clamping diode; D43: Diode; D40: Diode; Dup, Dv p, Dwp, Dun, Dvn, Dwn: Diode; Idc: Current source; L3: Reactor; L4: Reactor; LH: First power line; LL: Second power line; LH4: Third power line; Sc: Transistor (second switch); SI: Transistor (fourth switch); Srec: First switch; Ssp, Ssn, Srp, Srn: Switching element; Sup, Svp, Swp, Sun, Svn, Swn: Switching element; Sz: Third switch; |Vin|: Voltage source.

Claims

1. A power conversion device, the power conversion device comprising a circuit represented by an equivalent circuit, the equivalent circuit comprising: A voltage source (|Vin|) converts a single-phase AC voltage Vin into a rectified voltage. A first switch (Srec), one end of which is connected to the output terminal of the voltage source (|Vin|), is turned on with a specified first duty cycle drec; A second switch (Sc), one end of which is connected to the other end of the first switch (Srec), is turned on with a predetermined second duty cycle dc; A capacitor (C4) is connected at one end to the other end of the second switch (Sc), and at the other end of the capacitor (C4) is connected to the common terminal of the voltage source (|Vin|). A clamping diode (D42) is connected in parallel with the second switch (Sc); A third switch (Sz) has a first terminal connected to the other terminal of the first switch (Srec), and a second terminal connected to the common terminal of the voltage source (|Vin|). Either the first terminal or the second terminal is selectively connected to the third terminal of the third switch (Sz), and the first terminal and the third terminal are connected with a predetermined third duty cycle dz. A current source (Idc) is provided, one end of which is connected to the other end of the first switch (Srec), and the other end of which is connected to the third terminal of the third switch (Sz). The power conversion device is characterized in that... The third switch (Sz) and the current source (Idc) constitute a 3n-phase voltage source inverter (n is a positive integer). The instantaneous value of the voltage source (|Vin|) is higher than the DC voltage command value Vdc. In the first interval, a first conversion operation is performed, and the capacitor (C4) is charged via the clamping diode (D42) using the rectified voltage. During the first conversion operation, the second switch (Sc) is opened so that the DC voltage Vdc input to the current source (Idc) matches the DC voltage command value Vdc. The first duty cycle drec and the third duty cycle dz are selected in an equal manner to supply power from the voltage source (|Vin|) to the current source (Idc). On the other hand, the instantaneous value of the voltage source (|Vin|) is the DC voltage command value Vdc. In the following second interval, a second conversion operation is performed. In this second conversion operation, the first switch (Srec) is opened, so that the DC voltage Vdc input to the current source (Idc) is equal to the DC voltage command value Vdc. The second duty cycle dc and the third duty cycle dz are selected in an equal manner to supply power from the capacitor (C4) to the current source (Idc).

2. The power conversion device according to claim 1, characterized in that, The power conversion device includes: A reactor (L4), one end of which is connected to the output terminal of the voltage source (|Vin|); A diode (D40) has its anode connected to the other end of the reactor (L4) and its cathode connected to the second switch (Sc) side of the capacitor (C4). as well as A fourth switch (SI) is connected at one end to the anode of the diode (D40) and at the other end to the common terminal of the voltage source (|Vin|), and is turned on with a specified fourth duty cycle dl.

3. The power conversion device according to claim 1, characterized in that, The first duty cycle drec, the second duty cycle dc, and the third duty cycle dz satisfy the following conditions: drec+dc+dz=1 The conditions, and Let the maximum value of the single-phase AC voltage Vin be Vm, the angular velocity of the single-phase AC voltage Vin be ω, and the time be t. The first duty cycle drec and the second duty cycle dc during the first switching action are represented by the following formula: [Mathematical Expression 1] The first duty cycle drec and the second duty cycle dc during the second switching action are represented by the following formula: [Mathematical Expression 2] The boundary phase angle Φ between the first interval and the second interval is expressed by the following formula: [Mathematical Expression 3] 。 4. The power conversion device according to claim 2, characterized in that, The first duty cycle drec, the second duty cycle dc, and the third duty cycle dz satisfy the following conditions: drec+dc+dz=1 The conditions, and Let the maximum value of the single-phase AC voltage Vin be Vm, the angular velocity of the single-phase AC voltage Vin be ω, and the time be t. The first duty cycle drec and the second duty cycle dc during the first switching action are represented by the following formula: [Mathematical Expression 1] The first duty cycle drec and the second duty cycle dc during the second switching action are represented by the following formula: [Mathematical Expression 2] The boundary phase angle Φ between the first interval and the second interval is expressed by the following formula: [Mathematical Expression 3] 。 5. The power conversion device according to any one of claims 1 to 4, characterized in that, The power conversion device has a first mode for performing the first conversion action and the second conversion action, and a second mode for performing other conversion actions besides the first conversion action and the second conversion action. Starting from the first mode where the output frequency of the 3n-phase voltage source inverter is below a first threshold, when the output frequency of the 3n-phase voltage source inverter is higher than the first threshold, the system switches to the second mode. Starting from the second mode where the output frequency of the 3n-phase voltage source inverter is higher than the second threshold, when the output frequency of the 3n-phase voltage source inverter falls below the second threshold, the system switches to the first mode. The second threshold is equal to the first threshold, or the second threshold is lower than the first threshold by a predetermined value.

6. The power conversion device according to any one of claims 1 to 4, characterized in that, The power conversion device has a first mode for performing the first conversion action and the second conversion action, and a second mode for performing other conversion actions besides the first conversion action and the second conversion action. Starting from the first mode state where the modulation rate of the 3n-phase voltage source inverter is below a first threshold, when the modulation rate of the 3n-phase voltage source inverter is higher than the first threshold, the system switches from the first mode to the second mode. From the state of the second mode where the modulation rate of the 3n-phase voltage source inverter is higher than the second threshold, when the modulation rate of the 3n-phase voltage source inverter falls below the second threshold, the system switches from the second mode to the first mode. The second threshold is equal to the first threshold, or the second threshold is lower than the first threshold by a predetermined value.

7. The power conversion device according to claim 5, characterized in that, In the first mode, the DC voltage command value Vdc is set to correspond to the output frequency of the 3n-phase voltage-source inverter. .

8. The power conversion device according to claim 6, characterized in that, In the first mode, the DC voltage command value Vdc is set to correspond to the output frequency of the 3n-phase voltage-source inverter. .

9. The power conversion device according to claim 5, characterized in that, In the first mode, the DC voltage command value Vdc corresponding to the modulation rate of the 3n-phase voltage-source inverter is set. .

10. The power conversion device according to claim 6, characterized in that, In the first mode, the DC voltage command value Vdc corresponding to the modulation rate of the 3n-phase voltage-source inverter is set. .

11. The power conversion device according to any one of claims 1 to 4, characterized in that, The voltage source (|Vin|) includes a bridge circuit composed of switching elements. By synchronously turning on each of the switching elements during the first switching operation and turning off during the second switching operation, the single-phase AC voltage Vin is synchronously rectified to output the rectified voltage.

12. A power conversion device, characterized in that, The power conversion device includes: The converter section (2) converts the single-phase AC voltage Vin to output a rectified voltage; The first power supply line (LH) is connected to the positive output terminal of the converter section (2); The second power supply line (LL) is connected to the negative output terminal of the converter section (2); The inverter section (5) controlled by PWM has its positive input terminal connected to the positive output terminal of the converter section (2) via the first power line (LH), and its negative input terminal connected to the negative output terminal of the converter section (2) via the second power line (LL), and outputs AC voltage converted from the rectified voltage. as well as A buffer circuit (4a) is connected between the first power line (LH) and the second power line (LL). The absolute value of the instantaneous value of the single-phase AC voltage Vin is higher than the DC voltage command value Vdc. In the first interval, a first conversion operation is performed, and the buffer circuit (4a) is charged by the rectified voltage. In the first conversion operation, the output terminal of the buffer circuit (4a) is disconnected from the first power line (LH) so that the DC voltage calculated from the output voltage when the inverter section (5) is saturated is equal to the DC voltage command value Vdc. The switching mode of the inverter section (5) under PWM control is selected in an equal manner, and power is supplied to the inverter section (5) by the rectified voltage output from the converter section (2). On the other hand, the absolute value of the instantaneous value of the single-phase AC voltage Vin is the DC voltage command value Vdc. In the following second interval, a second conversion operation is performed. In the second conversion operation, the output terminal of the buffer circuit (4a) is connected to the first power line (LH) so that the DC voltage calculated from the output voltage when the inverter section (5) is saturated is equal to the DC voltage command value Vdc. The switching mode of the PWM control of the inverter section (5) is selected in an equal manner, and power is supplied from the buffer circuit (4a) to the inverter section (5). The first duty cycle drec, which is the duty cycle of the current flowing from the converter section (2) without passing through the buffer circuit (4a), the second duty cycle dc, which is the duty cycle of the current flowing through the buffer circuit (4a), and the third duty cycle dz, which is the duty cycle of the zero-phase current flowing in the inverter section (5), satisfy the following conditions: drec+dc+dz=1 The conditions, and Let the maximum value of the single-phase AC voltage Vin be Vm, the angular velocity of the single-phase AC voltage Vin be ω, and the time be t. The first duty cycle drec and the second duty cycle dc in the first interval are represented by the following formula. [Mathematical Expression 4] The first duty cycle drec and the second duty cycle dc during the second interval are represented by the following formula: [Mathematical Expression 5] The inverter section (5) is based on the phase voltage command value Vu Vv Vw The first duty cycle drec, the second duty cycle dc, and the third duty cycle dz are used for PWM control.

13. A power conversion device, characterized in that, The power conversion device includes: The converter section (2) converts the single-phase AC voltage Vin to output a rectified voltage; The first power supply line (LH) is connected to the positive output terminal of the converter section (2); The second power supply line (LL) is connected to the negative output terminal of the converter section (2); The inverter section (5) controlled by PWM has its positive input terminal connected to the positive output terminal of the converter section (2) via the first power line (LH), and its negative input terminal connected to the negative output terminal of the converter section (2) via the second power line (LL), and outputs AC voltage converted from the rectified voltage. as well as A buffer circuit (4a) is connected between the first power line (LH) and the second power line (LL). The absolute value of the instantaneous value of the single-phase AC voltage Vin is higher than the DC voltage command value Vdc. In the first interval, a first conversion operation is performed, and the buffer circuit (4a) is charged by the rectified voltage. In the first conversion operation, the output terminal of the buffer circuit (4a) is disconnected from the first power line (LH) so that the DC voltage calculated from the output voltage when the inverter section (5) is saturated is equal to the DC voltage command value Vdc. The switching mode of the inverter section (5) under PWM control is selected in an equal manner, and power is supplied to the inverter section (5) by the rectified voltage output from the converter section (2). On the other hand, the absolute value of the instantaneous value of the single-phase AC voltage Vin is the DC voltage command value Vdc. In the following second interval, a second conversion operation is performed. In the second conversion operation, the output terminal of the buffer circuit (4a) is connected to the first power line (LH) so that the DC voltage calculated from the output voltage when the inverter section (5) is saturated is equal to the DC voltage command value Vdc. The switching mode of the PWM control of the inverter section (5) is selected in an equal manner, and power is supplied from the buffer circuit (4a) to the inverter section (5). The power conversion device has a first mode for performing the first conversion action and the second conversion action, and a second mode for performing other conversion actions besides the first conversion action and the second conversion action. From the state of the first mode where the output frequency of the inverter unit (5) is below the first threshold, when the output frequency of the inverter unit (5) is higher than the first threshold, the system switches to the second mode. From the state of the second mode where the output frequency of the inverter unit (5) is higher than the second threshold, when the output frequency of the inverter unit (5) becomes lower than the second threshold, the system switches to the first mode. The second threshold is equal to the first threshold, or the second threshold is lower than the first threshold by a predetermined value.

14. A power conversion device, characterized in that, The power conversion device includes: The converter section (2) converts the single-phase AC voltage Vin to output a rectified voltage; The first power supply line (LH) is connected to the positive output terminal of the converter section (2); The second power supply line (LL) is connected to the negative output terminal of the converter section (2); The inverter section (5) controlled by PWM has its positive input terminal connected to the positive output terminal of the converter section (2) via the first power line (LH), and its negative input terminal connected to the negative output terminal of the converter section (2) via the second power line (LL), and outputs AC voltage converted from the rectified voltage. as well as A buffer circuit (4a) is connected between the first power line (LH) and the second power line (LL). The absolute value of the instantaneous value of the single-phase AC voltage Vin is higher than the DC voltage command value Vdc. In the first interval, a first conversion operation is performed, and the buffer circuit (4a) is charged by the rectified voltage. In the first conversion operation, the output terminal of the buffer circuit (4a) is disconnected from the first power line (LH) so that the DC voltage calculated from the output voltage when the inverter section (5) is saturated is equal to the DC voltage command value Vdc. The switching mode of the inverter section (5) under PWM control is selected in an equal manner, and power is supplied to the inverter section (5) by the rectified voltage output from the converter section (2). On the other hand, the absolute value of the instantaneous value of the single-phase AC voltage Vin is the DC voltage command value Vdc. In the following second interval, a second conversion operation is performed. In the second conversion operation, the output terminal of the buffer circuit (4a) is connected to the first power line (LH) so that the DC voltage calculated from the output voltage when the inverter section (5) is saturated is equal to the DC voltage command value Vdc. The switching mode of the PWM control of the inverter section (5) is selected in an equal manner, and power is supplied from the buffer circuit (4a) to the inverter section (5). The power conversion device has a first mode for performing the first conversion action and the second conversion action, and a second mode for performing other conversion actions besides the first conversion action and the second conversion action. From the state of the first mode where the modulation rate of the inverter section (5) is below the first threshold, when the modulation rate of the inverter section (5) is higher than the first threshold, it switches to the second mode. From the state of the second mode where the modulation rate of the inverter section (5) is higher than the second threshold, when the modulation rate of the inverter section (5) becomes lower than the second threshold, it switches to the first mode. The second threshold is equal to the first threshold, or the second threshold is lower than the first threshold by a predetermined value.

15. The power conversion device according to claim 13 or 14, characterized in that, In the first mode, the DC voltage command value Vdc corresponding to the output frequency of the inverter unit (5) is set. .

16. The power conversion device according to claim 13 or 14, characterized in that, In the first mode, the DC voltage command value Vdc corresponding to the modulation rate of the inverter unit (5) is set. .

17. The power conversion device according to any one of claims 12 to 14, characterized in that, The power conversion device includes a charging circuit (4b) that charges the buffer circuit (4a) with the rectified voltage in the first interval.

18. The power conversion device according to any one of claims 12 to 14, characterized in that, The converter section (2) includes a bridge circuit composed of switching elements. By synchronously turning on each of the switching elements during the first conversion operation and turning off during the second conversion operation, the single-phase AC voltage Vin is synchronously rectified to output the rectified voltage.

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