Display device and method for manufacturing the same

Abstract

A display device and a method for manufacturing the same are provided. The display device includes: a substrate in which a display area and a non-display area surrounding the display area are defined; a plurality of pixels disposed in the display area of the substrate and including a first electrode, a second electrode, and a plurality of light-emitting elements electrically connected to the first electrode and the second electrode; and a first voltage wiring disposed in the display area and the non-display area of the substrate and connected to at least a part of the plurality of pixels, wherein the first voltage wiring includes a first separated wiring and a second separated wiring, the first separated wiring and the second separated wiring are separated from each other and are disposed to be spaced apart from each other in the non-display area.

Description

Technical Field

[0001] The disclosure relates to a display device and a method for manufacturing the display device. Background Art

[0002] With the development of multimedia technology, the importance of display devices has been steadily increasing. In response thereto, various types of display devices (such as organic light-emitting displays, liquid crystal displays (LCDs), etc.) have been used.

[0003] A display device is a device for displaying an image and includes a display panel (such as an organic light-emitting display panel or a liquid crystal display panel). The light-emitting display panel may include light-emitting elements (e.g., light-emitting diodes (LEDs)), and examples of the light-emitting diodes include organic light-emitting diodes (OLEDs) using an organic material as a fluorescent material and inorganic light-emitting diodes using an inorganic material as a fluorescent material. Summary of the Invention

[0004] Technical Problem

[0005] Aspects of the disclosure provide a display device including a plurality of pixels each including a light-emitting element, and a method for manufacturing the display device, in which pixels provided in different regions are distinguished to align the light-emitting elements for each region.

[0006] It should be noted that the aspects of the disclosure are not limited thereto, and other aspects not mentioned herein will be apparent to those of ordinary skill in the art from the following description.

[0007] Technical Solution

[0008] According to an embodiment of the disclosure, a display device includes: a substrate in which a display region and a non-display region surrounding the display region are defined; a plurality of pixels provided in the display region of the substrate and each including a first electrode, a second electrode, and a plurality of light-emitting elements electrically connected to the first electrode and the second electrode; and a first voltage wiring provided in the display region and the non-display region of the substrate and connected to at least some of the plurality of pixels, wherein the first voltage wiring is separated into a first separated wiring and a second separated wiring spaced apart from each other in the non-display region.

[0009] The display area may include a first display area and a second display area. The first separated wiring may include: a first wiring main part, disposed in the non-display area and extending in a first direction; and a first wiring branch part, branching from the first wiring main part in a second direction and disposed in the first display area. And the second separated wiring may include: a second wiring main part, disposed in the non-display area and extending in the first direction; and a second wiring branch part, branching from the second wiring main part in the second direction and disposed in the second display area.

[0010] The first wiring main part and the second wiring main part may be spaced apart from each other in the non-display area, and the display device may further include a first switching transistor disposed between the first wiring main part and the second wiring main part.

[0011] The first switching transistor may have a first electrode connected to the first separated wiring and a second electrode connected to the second separated wiring.

[0012] The first switching transistor may be turned on in the driving mode of the display device and turned off in the manufacturing mode of the display device.

[0013] The first wiring branch part may be electrically connected to a second electrode of a pixel disposed in the first display area, and the second wiring branch part may be electrically connected to a second electrode of a pixel disposed in the second display area.

[0014] The display device may further include a second electrode wiring disposed in the non-display area and extending in the first direction, wherein the second electrodes of the plurality of pixels extend in the second direction and may be electrically connected to the second electrode wiring.

[0015] The second electrode wiring may include a plurality of wirings separated from each other in the non-display area.

[0016] The separated plurality of wirings of the second electrode wiring may be electrically connected to the first switching transistor.

[0017] The display device may further include a first electrode wiring disposed in the non-display area and extending in the first direction, wherein the first electrodes disposed in each of the plurality of pixels may not be electrically connected to the first electrode wiring.

[0018] The substrate may further include a pad area disposed in the non-display area. The first separated wiring may be electrically connected to a first power pad disposed in the pad area, and the second separated wiring may be electrically connected to a second power pad disposed in the pad area.

[0019] According to an exemplary embodiment, a display device includes: a plurality of pixels each including a first electrode, a second electrode, and a light-emitting element disposed between the first electrode and the second electrode; a first voltage wiring including a first separated wiring and a second separated wiring separated from each other; and a first switching transistor disposed between the first separated wiring and the second separated wiring and having a source electrode and a drain electrode respectively connected to the first separated wiring and the second separated wiring, wherein the plurality of pixels include first-type pixels and second-type pixels, in the first-type pixels, the second electrode is connected to the first separated wiring, and in the second-type pixels, the second electrode is connected to the second separated wiring.

[0020] In a first manufacturing mode, the first switching transistor may be turned off, and an alignment signal may be transmitted to the first separated wiring but not to the second separated wiring, and may be transmitted to the second electrode of the first-type pixels but may not be transmitted to the second electrode of the second-type pixels.

[0021] In a second manufacturing mode, the first switching transistor may be turned off, and the alignment signal may be transmitted to the second separated wiring but not to the first separated wiring, and may be transmitted to the second electrode of the second-type pixels but may not be transmitted to the second electrode of the first-type pixels.

[0022] In a driving mode, the first switching transistor may be turned on, and a power supply voltage may be applied to each of the first separated wiring and the second separated wiring, and thus to each of the second electrodes of the first-type pixels and the second-type pixels.

[0023] According to an exemplary embodiment, a method of manufacturing a display device includes: preparing a substrate, a first voltage wiring disposed on the substrate and including a first separated wiring and a second separated wiring for receiving a first alignment signal, a first electrode disposed on the substrate and receiving a second alignment signal, and a second electrode electrically connected to the first voltage wiring; aligning a first light-emitting element between the first electrode and the second electrode electrically connected to the first separated wiring by transmitting the first alignment signal to the first separated wiring; and aligning a second light-emitting element between the first electrode and the second electrode electrically connected to the second separated wiring by transmitting the first alignment signal to the second separated wiring.

[0024] The substrate may include a first display area and a second display area, the first separated wiring may be disposed in the first display area, and the second separated wiring may be disposed in the second display area.

[0025] The first light-emitting element may be aligned between the first electrode and the second electrode disposed in the first display area, and the second light-emitting element may be aligned between the first electrode and the second electrode disposed in the second display area.

[0026] The first separation wiring and the second separation wiring may be spaced apart from each other, and the method may further include preparing a first switching transistor having a source electrode and a drain electrode electrically connected to the first separation wiring and the second separation wiring, respectively.

[0027] In the alignment step of the light-emitting element, the first switching transistor may be turned off.

[0028] Details of other embodiments are included in the detailed description and the accompanying drawings.

[0029] Advantageous Effects

[0030] In the method for manufacturing a display device according to an embodiment, alignment signals may be transmitted to each of different display regions using separated wirings from each other. Accordingly, even if the display device includes a large number of pixels, alignment signals of uniform intensity may be transmitted to all of the pixels.

[0031] In addition, according to an embodiment, the display device includes a switching transistor disposed between separated wirings from each other. The switching transistor is turned off in the manufacturing mode of the display device and is turned on in the driving mode. In the display device, even when a power supply voltage is applied through separated wirings from each other, since the switching transistor remains turned on, a uniform power supply voltage may be applied to the entire display device.

[0032] The effects according to the embodiments are not limited to the above-exemplified contents, and more various effects are included in the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a plan view of a display device according to an embodiment.

[0034] Figure 2 is a schematic plan view showing wirings included in a display device according to an embodiment.

[0035] Figure 3 is an equivalent circuit diagram of a pixel included in a display device according to an embodiment.

[0036] Figure 4 is a plan view of a pixel of a display device according to an embodiment.

[0037] Figure 5 is Figure 4 a plan view of a sub-pixel of.

[0038] Figure 6 is a cross-sectional view taken along lines Xa-Xa' and Xb-Xb' of. Figure 5

[0039] Figure 7 is a schematic diagram of a light-emitting element according to an embodiment.​

[0040] Figure 8 is a schematic plan view showing the arrangement of electrodes and first voltage wirings of a display device according to an embodiment.

[0041] Figure 9 is Figure 8 a schematic cross-sectional view of part Q of

[0042] Figure 10 is an equivalent circuit diagram of some sub-pixels of a display device according to an embodiment.

[0043] Figure 11 is a plan view showing operations in a process of manufacturing a display device according to an embodiment.

[0044] Figure 12 and Figure 13 is a plan view showing operations in a process of manufacturing a display device according to an embodiment.

[0045] Figure 14 and Figure 15 is a plan view showing operations in a process of manufacturing a display device according to an embodiment.

[0046] Figure 16 is showing Figure 14 and Figure 15 the operation of a first switching transistor in the operation of

[0047] Figure 17 is a plan view showing operations in a process of manufacturing a display device according to an embodiment.

[0048] Figure 18 is showing Figure 17 the operation of a first switching transistor in the operation of

[0049] Figure 19 is a plan view showing operations in a process of manufacturing a display device according to an embodiment.

[0050] Figure 20 is a schematic plan view showing the arrangement of electrodes and first voltage wirings of a display device according to another embodiment.

[0051] Figure 21 is a schematic plan view showing the arrangement of electrodes and first voltage wirings of a display device according to another embodiment.

[0052] Figure 22 is a cross-sectional view of a part of a display device according to another embodiment.

[0053] Figure 23 is showing in the manufacturing of Figure 22Schematic circuit diagram of the operations of the first switching transistor and the second switching transistor during the process of the display device.

[0054] Figure 24 Is a schematic plan view showing the arrangement of electrodes and first voltage wirings of a display device according to another embodiment.

[0055] Figure 25 Is a schematic plan view showing the arrangement of electrodes and first voltage wirings of a display device according to another embodiment.

[0056] Figure 26 Is a plan view showing the operations in the process of manufacturing Figure 25 The display device. Detailed Description

[0057] The invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, the invention may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0058] It will also be understood that when a layer is referred to as being "on" another layer or substrate, the layer can be directly on the other layer or substrate, or intervening layers may also be present. Throughout the specification, the same reference numerals denote the same components.

[0059] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, the first element discussed below may be referred to as the second element without departing from the teachings of the invention. Similarly, the second element may also be referred to as the first element.

[0060] Hereinafter, embodiments will be described with reference to the accompanying drawings.

[0061] Figure 1 Is a schematic plan view of a display device according to an embodiment.

[0062] Refer to Figure 1, the display device 10 displays a moving image or a still image. The display device 10 may refer to any electronic device that provides a display screen. Examples of the display device 10 may include a television, a notebook computer, a monitor, a billboard, an Internet of Things (IoT) device, a mobile phone, a smartphone, a tablet personal computer (PC), an electronic watch, a smart watch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic notebook, an e-book, a portable multimedia player (PMP), a navigation device, a gaming machine, a digital camera, and a video camera that provide a display screen.

[0063] The display device 10 includes a display panel that provides a display screen. Examples of the display panel may include an inorganic light-emitting diode display panel, an organic light-emitting display panel, a quantum dot light-emitting display panel, a plasma display panel, and a field emission display panel. A case where an inorganic light-emitting diode display panel is applied as the display panel will be described below, but the disclosure is not limited to this case, and other display panels may also be applied as long as the same technical spirit is applicable.

[0064] The shape of the display device 10 can be variously modified. For example, the display device 10 may have various shapes (such as a horizontally long rectangle, a vertically long rectangle, a square, a quadrilateral with rounded corners (vertices), other polygons, and a circle). The shape of the display area DPA of the display device 10 may also be similar to the overall shape of the display device 10. In Figure 1 , the display device 10 and the display area DPA have a horizontally long rectangular shape.

[0065] The display device 10 may include a display area DPA and a non-display area NDA. The display area DPA is an area where a screen can be displayed, and the non-display area NDA is an area where a screen is not displayed. The display area DPA may also be referred to as an effective area, and the non-display area NDA may also be referred to as an ineffective area. The display area DPA generally may occupy the center of the display device 10.

[0066] The display area DPA may include a plurality of pixels PX. The pixels PX may be arranged in a matrix form. Each of the pixels PX may be rectangular or square in a plan view. However, the disclosure is not limited thereto, and each of the pixels PX may also have a diamond shape having each side inclined with respect to a certain direction. The pixels PX may be alternately arranged in a stripe type or a pentile type. In addition, each of the pixels PX may display a specific color by including one or more light-emitting elements 300 (see Figure 4 ) that emit light of a specific wavelength band.

[0067] The non-display area NDA can be set around the display area DPA. The non-display area NDA can completely or partially surround the display area DPA. The display area DPA can be rectangular, and the non-display area NDA can be disposed adjacent to the four sides of the display area DPA. The non-display area NDA can form a border of the display device 10. The non-display area NDA can include a first non-display area NDA1 located below the display area DPA, a second non-display area NDA2 located above the display area DPA, a third non-display area NDA3 located on the left side of the display area DPA, and a fourth non-display area NDA4 located on the right side of the display area DPA. In each non-display area NDA, wirings or circuit drivers included in the display device 10 can be disposed, or an external device EXD can be installed.

[0068] Figure 2 is a schematic plan view showing wirings included in a display device according to an embodiment.

[0069] Referring to Figure 2 , the display device 10 can include a plurality of wirings. The wirings can include scan lines SCL, sense lines SSL, data lines DTL, a reference voltage wiring RVL, a first voltage wiring VSSL, and a second voltage wiring VDDL. In addition, although not shown in the drawings, other wirings can be further disposed in the display device 10.

[0070] The scan lines SCL and the sense lines SSL can extend in a second direction DR2. The scan lines SCL and the sense lines SSL can be connected to a scan driver SDR. The scan driver SDR can include a driving circuit. The scan driver SDR can be disposed in the third non-display area NDA3, which is located on one side of the display area DPA in the second direction DR2, but the disclosure is not limited thereto. The scan driver SDR can be connected to a signal connection wiring CWL, and at least one end of the signal connection wiring CWL can be connected to an external device through a pad (also referred to as a "bond pad" or "landing pad") WPD_CW formed in the non-display area NDA.

[0071] The data line DTL and the reference voltage wiring RVL may extend in a first direction DR1 that intersects a second direction DR2. In addition, each of the reference voltage wirings RVL may further include a portion that branches in the second direction DR2 from a portion that extends in the first direction DR1. Each of the first voltage wiring VSSL and the second voltage wiring VDDL may also include a portion that extends in the first direction DR1. In addition, each of the first voltage wiring VSSL and the second voltage wiring VDDL may further include a portion that extends in the second direction DR2. Accordingly, each of the first voltage wiring VSSL and the second voltage wiring VDDL may have a mesh structure. However, the disclosure is not limited thereto. In some embodiments, portions of the first voltage wiring VSSL and the second voltage wiring VDDL that extend in the first direction DR1 and are located below the display area DPA may be omitted. In addition, although not shown in the drawings, each of the pixels PX of the display device 10 may be connected to at least one of the data line DTL, the reference voltage wiring RVL, the first voltage wiring VSSL, and the second voltage wiring VDDL.

[0072] The data line DTL, the reference voltage wiring RVL, the first voltage wiring VSSL, and the second voltage wiring VDDL may be electrically connected to at least one wiring pad WPD. Each wiring pad WPD may be provided in the non-display area NDA. In an embodiment, a wiring pad WPD_DT (hereinafter referred to as a "data pad") of the data line DTL may be provided in a first non-display area NDA1 located on one side of the display area DPA in the first direction DR1, and a wiring pad WPD_RV (hereinafter referred to as a "reference voltage pad") of the reference voltage wiring RVL, a wiring pad WPD_VSS (hereinafter referred to as a "first power pad") of the first voltage wiring VSSL, and a wiring pad WPD_VDD (hereinafter referred to as a "second power pad") of the second voltage wiring VDDL may be provided in a second non-display area NDA2 located on the other side of the display area DPA in the first direction DR1. For another example, the data pad WPD_DT, the reference voltage pad WPD_RV, the first power pad WPD_VSS, and the second power pad WPD_VDD may all be provided in the same area, for example, in the second non-display area NDA2 located above the display area DPA. As described above, the external device EXD may be mounted on the wiring pad WPD. The external device EXD may be mounted on the wiring pad WPD by an anisotropic conductive film, ultrasonic bonding, or the like.

[0073] In the drawings, a part of the first voltage wiring VSSL extending in the first direction DR1 covers the display area DPA. However, according to an embodiment, in the display device 10, the first voltage wiring VSSL may include a plurality of voltage wirings, and some of the voltage wirings may be disposed in the non-display area NDA to extend in the second direction DR2, but some of the other voltage wirings may each cover only a part of the display area DPA. That is, a part of the first voltage wiring VSSL extending in the first direction DR1 may be divided into two or more voltage wirings. During the process of manufacturing the display device 10, an alignment signal may be transmitted only to some of the voltage wirings in the first voltage wiring VSSL, and an electric field caused by the alignment signal may be formed only in the display area DPA covered by the voltage wiring. Therefore, the display device 10 may form an electric field with uniform intensity in a large display area DPA. This will be described in more detail later with reference to other drawings.

[0074] Each pixel PX of the display device 10 includes a pixel driving circuit. The above-described wiring may transmit a driving signal to each pixel driving circuit while passing through or around each pixel PX. The pixel driving circuit may include transistors and capacitors. The number of transistors and capacitors in each pixel driving circuit may be changed differently. Although a 3T1C structure including three transistors and one capacitor will be used as an example to describe the pixel driving circuit below, the disclosure is not limited thereto, and various other modified pixel structures such as 2T1C structures, 7T1C structures, and 6T1C structures are also applicable.

[0075] Figure 3 is an equivalent circuit diagram of a pixel included in a display device according to an embodiment.

[0076] Referring to Figure 3 , in addition to the light-emitting diode EL, each pixel PX of the display device according to an embodiment further includes three transistors TR1 to TR3 and one storage capacitor Cst.

[0077] The light-emitting diode EL emits light according to the current supplied through the first transistor TR1. The light-emitting diode EL includes a first electrode, a second electrode, and a light-emitting element 300 disposed between the first electrode and the second electrode (see Figure 4 ). The light-emitting element 300 may emit light of a specific wavelength band in response to an electrical signal received from the first electrode and the second electrode.

[0078] One end of the light-emitting diode EL may be connected to the first electrode of the first transistor TR1, and the other end may be connected to the first voltage wiring VSSL supplied with a low potential voltage (first power supply voltage VSS) lower than the high potential voltage (second power supply voltage VDD) of the second voltage wiring VDDL.

[0079] The first transistor TR1 adjusts the current flowing from the second voltage wiring VDDL supplied with the second power supply voltage to the light-emitting diode EL according to the voltage difference between the gate electrode and the source electrode. The first transistor TR1 may have a gate electrode connected to the first electrode of the second transistor TR2, a first electrode connected to the first electrode of the light-emitting diode EL, and a second electrode connected to the second voltage wiring VDDL to which the second power supply voltage VDD is applied.

[0080] The second transistor TR2 is turned on by the scan signal of the scan line SCL to connect the data line DTL to the gate electrode of the first transistor TR1. The second transistor TR2 may have a gate electrode connected to the scan line SCL, a first electrode connected to the gate electrode of the first transistor TR1, and a second electrode connected to the data line DTL.

[0081] The third transistor TR3 is turned on by the sense signal of the sense line SSL to connect the reference voltage wiring RVL to the first electrode of the first transistor TR1. The third transistor TR3 may have a gate electrode connected to the sense line SSL, a first electrode connected to the reference voltage wiring RVL, and a second electrode connected to the first electrode of the first transistor TR1.

[0082] In an embodiment, the first electrode of each of the first transistor TR1 to the third transistor TR3 may be a source electrode, and the second electrode may be a drain electrode. However, the disclosure is not limited thereto, and the situation may also be the opposite.

[0083] A storage capacitor Cst is formed between the gate electrode and the first electrode of the first transistor TR1. The storage capacitor Cst stores the difference between the gate voltage and the first electrode voltage of the first transistor TR1.

[0084] Each of the first transistor TR1 to the third transistor TR3 may be formed as a thin film transistor. In addition, although each of the first transistor TR1 to the third transistor TR3 is mainly described as an N-type metal oxide semiconductor field effect transistor (MOSFET) in Figure 3 However, the disclosure is not limited thereto. That is, each of the first transistor TR1 to the third transistor TR3 may also be formed as a P-type MOSFET, or some of the first transistor TR1 to the third transistor TR3 may be formed as N-type MOSFETs, and some other transistors may be formed as P-type MOSFETs.

[0085] Now, the structure of the pixel PX of the display device 10 according to an embodiment will be described in further detail with reference to other drawings.

[0086] Figure 4It is a plan view of a pixel of a display device according to an embodiment. Figure 5 is Figure 4 a plan view of a sub-pixel. Figure 6 is a cross-sectional view taken along Figure 5 the line Xa-Xa' and the line Xb-Xb'.

[0087] Referring to Figures 4 to 6 , each of the plurality of pixels PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3. The first sub-pixel PX1 may emit light of a first color, the second sub-pixel PX2 may emit light of a second color, and the third sub-pixel PX3 may emit light of a third color. The first color may be blue, the second color may be green, and the third color may be red. However, the disclosure is not limited thereto, and each sub-pixel PXn may also emit light of the same color. In addition, although one pixel PX includes three sub-pixels PXn in Figure 4 , the disclosure is not limited thereto, and the pixel PX may also include a greater number of sub-pixels PXn.

[0088] Each sub-pixel PXn of the display device 10 may include a region defined as an emission region EMA. The first sub-pixel PX1 may include a first emission region EMA1, the second sub-pixel PX2 may include a second emission region EMA2, and the third sub-pixel PX3 may include a third emission region EMA3. The emission region EMA may be defined as a region in which the light-emitting elements 300 included in the display device 10 are provided to emit light of a specific wavelength band. Each of the light-emitting elements 300 may include an active layer 330 (see Figure 7 ), and the active layer 330 may emit light of a specific wavelength band without directivity. The light emitted from the active layer 330 of each light-emitting element 300 may radiate in the lateral direction of the light-emitting element 300 and toward both ends of the light-emitting element 300. The emission region EMA may include a region in which the light-emitting elements 300 are provided and a region adjacent to the light-emitting elements 300 and from which the light emitted from the light-emitting elements 300 is output.

[0089] However, the disclosure is not limited thereto, and the emission region EMA may further include a region from which the light emitted from the light-emitting elements 300 is output after being reflected or refracted by other members. A plurality of light-emitting elements 300 may be provided in each sub-pixel PXn, and the region in which the light-emitting elements 300 are provided and the region adjacent to the region may form the emission region EMA.

[0090] Although not shown in the drawings, each sub-pixel PXn of the display device 10 may include a non-emission region defined as a region other than the emission region EMA. The non-emission region may be a region where the light-emitting element 300 is not provided and no light is output therefrom because the light emitted from the light-emitting element 300 does not reach the region.

[0091] Figure 6 Only the cross-section of the first sub-pixel PX1 Figure 5 is shown, but the same description can be applied to other pixels PX or sub-pixels PXn. Figure 6 The cross-section across one end and the other end of the light-emitting element 300 provided in Figure 5 the first sub-pixel PX1 is shown.

[0092] The display device 10 may include a circuit element layer and a display element layer provided on a first substrate 110. A semiconductor layer, a plurality of conductive layers, and a plurality of insulating layers may be provided on the first substrate 110 and may respectively constitute the circuit element layer and the display element layer. The conductive layers may include a first gate conductive layer, a second gate conductive layer, a first data conductive layer, and a second data conductive layer provided under the first planarization layer 200 and constituting the circuit element layer, and electrodes and contact electrodes provided on the first planarization layer 200 and constituting the display element layer. The insulating layers may include a buffer layer 115, a first gate insulating layer 130, a first passivation layer 150, a first interlayer insulating layer 170, a second interlayer insulating layer 180, a first planarization layer 200, a first insulating layer 510, a second insulating layer 520, a third insulating layer 550, etc.

[0093] The circuit element layer may include a first transistor 120, a second transistor 140, a conductive pattern 196, a plurality of voltage wirings 191 and 193, and wirings for driving the light-emitting element 300 as circuit elements, and the display element layer may include a first electrode 210, a second electrode 220, contact electrodes 260 (a first contact electrode 261 and a second contact electrode 262), and the light-emitting element 300.

[0094] The first substrate 110 may be an insulating substrate. The first substrate 110 may be made of an insulating material such as glass, quartz, or a polymer resin. In addition, the first substrate 110 may be a rigid substrate, but may also be a flexible substrate that can be bent, folded, curled, etc.

[0095] The light-blocking layers BML1 and BML2 may be disposed on the first substrate 110. The light-blocking layers BML1 and BML2 may include a first light-blocking layer BML1 and a second light-blocking layer BML2. The first light-blocking layer BML1 and the second light-blocking layer BML2 are respectively stacked with the first active material layer 126 of the first transistor 120 and the second active material layer 146 of the second transistor 140. The first light-blocking layer BML1 and the second light-blocking layer BML2 may include a light-blocking material to prevent light from entering the first active material layer 126 and the second active material layer 146. For example, the first light-blocking layer BML1 and the second light-blocking layer BML2 may be made of an opaque metal material that blocks the transmission of light. However, the disclosure is not limited thereto. In some cases, the light-blocking layers BML1 and BML2 may be omitted. Although not shown in the drawings, the first light-blocking layer BML1 may be electrically connected to the first electrode 123 of the first transistor 120 to be described later, and the second light-blocking layer BML2 may be electrically connected to the first electrode 143 of the second transistor 140.

[0096] The buffer layer 115 may be entirely disposed on the first substrate 110 and the light-blocking layers BML1 and BML2. The buffer layer 115 may be disposed on the first substrate 110 to protect the transistors 120 and 140 of the pixel PX from moisture introduced through the first substrate 110, and may perform a surface flattening function. The first substrate 110 is vulnerable to moisture penetration. The buffer layer 115 may be composed of a plurality of inorganic layers stacked alternately. For example, the buffer layer 115 may be a multi-layer in which one or more inorganic layers selected from a silicon oxide (SiO x ) layer, a silicon nitride (SiN x ) layer, and a silicon oxynitride (SiO x N y ) layer are stacked alternately.

[0097] A semiconductor layer is disposed on the buffer layer 115. The semiconductor layer may include the first active material layer 126 of the first transistor 120 and the second active material layer 146 of the second transistor 140. These layers may be partially stacked by the gate electrodes 121 and 141 of the first gate conductive layer to be described later.

[0098] In an embodiment, the semiconductor layer may include polysilicon, single-crystalline silicon, an oxide semiconductor, etc. The polysilicon may be formed by crystallizing amorphous silicon. Examples of the crystallization method may include, but are not limited to, a rapid thermal annealing (RTA) method, a solid-phase crystallization (SPC) method, an excimer laser annealing (ELA) method, a metal-induced crystallization (MILC) method, and a sequential lateral solidification (SLS) method. When the semiconductor layer includes polysilicon, the first active material layer 126 may include a first doped region 126a, a second doped region 126b, and a first channel region 126c. The first channel region 126c may be disposed between the first doped region 126a and the second doped region 126b. The second active material layer 146 may include a third doped region 146a, a fourth doped region 146b, and a second channel region 146c. The second channel region 146c may be disposed between the third doped region 146a and the fourth doped region 146b. The first doped region 126a, the second doped region 126b, the third doped region 146a, and the fourth doped region 146b may be regions of the first active material layer 126 and the second active material layer 146 doped with impurities.

[0099] In an embodiment, the first active material layer 126 and the second active material layer 146 may include an oxide semiconductor. In this case, the doped regions of the first active material layer 126 and the second active material layer 146 may be conductive regions, respectively. The oxide semiconductor may be an oxide semiconductor containing indium (In). In some embodiments, the oxide semiconductor may be, but is not limited to, indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium zinc tin oxide (IZTO), indium gallium tin oxide (IGTO), or indium gallium zinc tin oxide (IGZTO).

[0100] The first gate insulating layer 130 is disposed on the semiconductor layer and the buffer layer 115. The first gate insulating layer 130 may be disposed on the buffer layer 115, the first active material layer 126, and the second active material layer 146. The first gate insulating layer 130 may serve as a gate insulating film for each of the first transistor 120 and the second transistor 140. The first gate insulating layer 130 may be formed of an inorganic material such as silicon oxide (SiO x ) or silicon nitride (SiN x ) or formed in a structure in which these materials are stacked.

[0101] The first gate conductive layer is disposed on the first gate insulating layer 130. The first gate conductive layer may include the first gate electrode 121 of the first transistor 120 and the second gate electrode 141 of the second transistor 140. The first gate electrode 121 is stacked with at least a portion of the first active material layer 126, and the second gate electrode 141 is stacked with at least a portion of the second active material layer 146. For example, the first gate electrode 121 may be stacked with the first channel region 126c of the first active material layer 126 in the thickness direction, and the second gate electrode 141 may be stacked with the second channel region 146c of the second active material layer 146 in the thickness direction.

[0102] The first gate conductive layer may be, but is not limited to, a single layer or a multi-layer made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0103] The first passivation layer 150 is disposed on the first gate conductive layer. The first passivation layer 150 may cover the first gate conductive layer to protect the first gate conductive layer. The first passivation layer 150 may be formed of an inorganic material such as silicon oxide (SiO x ) or silicon nitride (SiN x ) or formed in a structure in which these materials are stacked.

[0104] The second gate conductive layer is disposed on the first passivation layer 150. The second gate conductive layer may include the first capacitor electrode 160 of the storage capacitor. The first capacitor electrode 160 of the storage capacitor is disposed such that at least a portion thereof is stacked with the first gate electrode 121 in the thickness direction. The first capacitor electrode 160 may be stacked with the first gate electrode 121 in the thickness direction and the first passivation layer 150 is disposed between the first capacitor electrode 160 and the first gate electrode 121, so that a storage capacitor can be formed. The second gate conductive layer may be, but is not limited to, a single layer or a multi-layer made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0105] The first interlayer insulating layer 170 is disposed on the second gate conductive layer. The first interlayer insulating layer 170 may serve as an insulating film between the second gate conductive layer and other layers disposed on the second gate conductive layer. The first interlayer insulating layer 170 may be formed of an inorganic material such as silicon oxide (SiO x ) or silicon nitride (SiN x ) or formed in a structure in which these materials are stacked.

[0106] The first data conductive layer is disposed on the first interlayer insulating layer 170. The first data conductive layer may include a first electrode 123 and a second electrode 124 of the first transistor 120 and a first electrode 143 and a second electrode 144 of the second transistor 140.

[0107] The first electrode 123 and the second electrode 124 of the first transistor 120 may respectively contact a first doped region 126a and a second doped region 126b of the first active material layer 126 through contact holes penetrating the first interlayer insulating layer 170, the first passivation layer 150, and the first gate insulating layer 130. The first electrode 143 and the second electrode 144 of the second transistor 140 may respectively contact a third doped region 146a and a fourth doped region 146b of the second active material layer 146 through contact holes penetrating the first interlayer insulating layer 170, the first passivation layer 150, and the first gate insulating layer 130. In addition, the first electrode 123 of the first transistor 120 and the first electrode 143 of the second transistor 140 may be electrically connected to the first light blocking layer BML1 and the second light blocking layer BML2 respectively through other contact holes. When any one of the first electrode 123 or 143 and the second electrode 124 or 144 of each of the first transistor 120 and the second transistor 140 is a source electrode, the other electrode may be a drain electrode. However, the disclosure is not limited thereto. When any one of the first electrode 123 or 143 and the second electrode 124 or 144 is a drain electrode, the other electrode may be a source electrode.

[0108] The first data conductive layer may be, but is not limited to, a single layer or a multi-layer made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0109] The second interlayer insulating layer 180 may be disposed on the first data conductive layer. The second interlayer insulating layer 180 may be completely disposed on the first interlayer insulating layer 170 to cover the first data conductive layer and may protect the first data conductive layer. The second interlayer insulating layer 180 may be formed of an inorganic material such as silicon oxide (SiO x ) or silicon nitride (SiN x ) or in a structure in which these materials are stacked.

[0110] The second data conductive layer is disposed on the second interlayer insulating layer 180. The second data conductive layer may include a first voltage wiring 191, a second voltage wiring 193, and a first conductive pattern 196. The low potential voltage (first power supply voltage VSS) supplied to the second electrode 220 may be applied to the first voltage wiring 191, and the high potential voltage (second power supply voltage VDD) supplied to the first transistor 120 may be applied to the second voltage wiring 193. During the process of manufacturing the display device 10, as will be described later, the alignment signal required to align the light-emitting element 300 may be transmitted to the first voltage wiring 191.

[0111] The first conductive pattern 196 may be electrically connected to the first electrode 123 of the first transistor 120 through a contact hole formed in the second interlayer insulating layer 180. The first conductive pattern 196 may also contact the first electrode 210, which will be described later, and the first transistor 120 may transmit the second power supply voltage VDD received from the second voltage wiring 193 to the first electrode 210 through the first conductive pattern 196. Although in the drawings the second data conductive layer includes one first voltage wiring 191 and one second voltage wiring 193, the disclosure is not limited thereto. The second data conductive layer may include a greater number of first voltage wirings 191 and second voltage wirings 193.

[0112] The second data conductive layer may be, but is not limited to, a single layer or a multi-layer made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0113] The first planarization layer 200 is disposed on the second data conductive layer. The first planarization layer 200 may include an organic insulating material and perform a surface planarization function.

[0114] The inner dams 410 and 420, the electrodes 210 and 220, the outer dam 450, the contact electrodes 261 and 262, and the light-emitting element 300 are disposed on the first planarization layer 200. In addition, insulating layers 510, 520, and 550 may be further disposed on the first planarization layer 200.

[0115] The inner dams 410 and 420 are directly disposed on the first planarization layer 200. The inner dams 410 and 420 may include a first inner dam 410 and a second inner dam 420 disposed adjacent to the center of each pixel PX or sub-pixel PXn.

[0116] The first inner bank 410 and the second inner bank 420 may be spaced apart in a first direction DR1 to face each other. In addition, the first inner bank 410 and the second inner bank 420 may extend in a second direction DR2, but may terminate at a certain distance from the boundary between the sub-pixels PXn, such that the first inner bank 410 and the second inner bank 420 do not extend to other adjacent sub-pixels PXn in the second direction DR2. Thus, the first inner bank 410 and the second inner bank 420 may be disposed in each sub-pixel PXn to form a pattern over the entire display device 10. Since the inner banks 410 and 420 are spaced apart to face each other, an area in which the light-emitting element 300 is disposed may be formed between the inner banks 410 and 420. Although one first inner bank 410 and one second inner bank 420 are shown in the drawings, the disclosure is not limited thereto. In some cases, the inner banks 410 and 420 may each be provided in multiple numbers according to the number of the electrodes 210 and 220 to be described later, or a greater number of other inner banks 410 and 420 may be further provided.

[0117] In addition, at least a portion of each of the first inner bank 410 and the second inner bank 420 may protrude from the upper surface of the first planarization layer 200. The protruding portions of the first inner bank 410 and the second inner bank 420 may have inclined side surfaces, and the light emitted from the light-emitting element 300 disposed between the first inner bank 410 and the second inner bank 420 may travel toward the inclined side surfaces of the inner banks 410 and 420. As will be described later, when the electrodes 210 and 220 disposed on the inner banks 410 and 420 include materials having a high reflectivity, the light emitted from the light-emitting element 300 may be reflected by the side surfaces of the inner banks 410 and 420 to travel upward on the first substrate 110. That is, the inner banks 410 and 420 may provide an area in which the light-emitting element 300 is disposed and may serve as a reflection stopper for reflecting the light emitted from the light-emitting element 300 in an upward direction. In an embodiment, the inner banks 410 and 420 may include, but are not limited to, an organic insulating material (such as polyimide (PI)).

[0118] The electrodes 210 and 220 are disposed on the inner banks 410 and 420 and the first planarization layer 200. The electrodes 210 and 220 may include a first electrode 210 disposed on the first inner bank 410 and a second electrode 220 disposed on the second inner bank 420.

[0119] Each of the first electrode 210 and the second electrode 220 may include an electrode main body portion 210S or 220S extending in the first direction DR1 and at least one electrode branch portion 210B or 220B extending and branching from the electrode main body portion 210S or 220S in the second direction DR2.

[0120] The first electrode 210 may include a first electrode main body portion 210S extending in a first direction DR1 and at least one first electrode branch portion 210B branching from the first electrode main body portion 210S and extending in a second direction DR2.

[0121] The first electrode main body portion 210S of any one pixel may have two ends terminating between sub-pixels PXn, but may be located substantially in a straight line with the first electrode main body portions 210S of adjacent (e.g., adjacent in the first direction DR1) sub-pixels in the same row. Since the two ends of the first electrode main body portions 210S respectively provided in the sub-pixels PXn are spaced apart from each other, an electrical signal may be independently transmitted to each first electrode branch portion 210B.

[0122] The first electrode branch portion 210B branches from at least a part of the first electrode main body portion 210S and extends in the second direction DR2. However, the first electrode branch portion 210B may terminate at a position spaced apart from the second electrode main body portion 220S facing the first electrode main body portion 210S.

[0123] The second electrode 220 may include a second electrode main body portion 220S extending in the first direction DR1 and at least one second electrode branch portion 220B branching from the second electrode main body portion 220S and extending in the second direction DR2. The second electrode main body portion 220S may be spaced apart from the first electrode main body portion 210S to face the first electrode main body portion 210S, and the second electrode branch portion 220B may be spaced apart from at least one first electrode branch portion 210B to face the first electrode branch portion 210B.

[0124] Different from the first electrode main body portion 210S, the second electrode main body portion 220S may extend in the first direction DR1 to pass through the sub-pixels PXn. The second electrode main body portion 220S passing through the sub-pixels PXn may be connected to a peripheral portion of the display area DPA in which each pixel PX or sub-pixel PXn is provided or a portion extending in a certain direction in the non-display area NDA.

[0125] The second electrode branch portion 220B may branch from the second electrode main body portion 220S in the second direction DR2, but may terminate at a position spaced apart from the first electrode main body portion 210S. Since the second electrode branch portion 220B is spaced apart from the first electrode branch portion 210B to face the first electrode branch portion 210B, an area in which the light-emitting element 300 is provided may be formed between the first electrode branch portion 210B and the second electrode branch portion 220B.

[0126] The first electrode 210 and the second electrode 220 may be electrically connected to the first transistor TR1 (or Figure 6 120 thereof) and the first voltage wiring 191 (or Figure 2 VSSL thereof). For example, the first electrode main body portion 210S of the first electrode 210 may contact the conductive pattern 196 through the first electrode contact hole CNTD that penetrates the first planarization layer 200, and thus may be electrically connected to the first electrode 123 of the first transistor TR1. Accordingly, the first electrodes 210 respectively provided in the sub-pixels PXn may independently receive electrical signals from different first transistors TR1. The second electrode main body portion 220S of the second electrode 220 may be connected to the second electrode main body portions 220S of other second electrodes 220, and a portion extending in one direction in a region other than the display area DPA may contact the first voltage wiring 191 through the second electrode contact hole CNTS that penetrates the first planarization layer 200. In the drawings, the first electrode contact hole CNTD is formed in the first electrode main body portion 210S of each sub-pixel PXn, and only one second electrode contact hole CNTS is formed in one second electrode main body portion 220S passing through the sub-pixel PXn. However, the disclosure is not limited thereto. In some cases, the second electrode contact holes CNTS may also be formed in each sub-pixel PXn, and the second electrodes 220 of each sub-pixel PXn may be electrically connected to the first voltage wiring 191.

[0127] Although two first electrode branch portions 210B and one second electrode branch portion 220B are provided in each sub-pixel PXn in the drawings, the disclosure is not limited thereto. In some embodiments, a greater number or a smaller number of first electrode branch portions 210B and second electrode branch portions 220B may be provided. In addition, the first electrode 210 and the second electrode 220 provided in each sub-pixel PXn do not have to extend in one direction, and may also be provided in various structures. For example, the first electrode 210 and the second electrode 220 may be partially bent or folded, or any one of the first electrode 210 and the second electrode 220 may surround the other electrode. There is no specific limitation on the structure or shape of the region in which the first electrode 210 and the second electrode 220 are provided, as long as the first electrode 210 and the second electrode 220 are at least partially spaced apart from each other to face each other, so that a region in which the light-emitting element 300 will be provided can be formed between the first electrode 210 and the second electrode 220.

[0128] The first electrode 210 and the second electrode 220 may be respectively disposed on the first inner embankment 410 and the second inner embankment 420, and may be spaced apart in the first direction DR1 to face each other. The light-emitting element 300 may be disposed between the first inner embankment 410 and the second inner embankment 420. The light-emitting element 300 may be disposed between the first electrode 210 and the second electrode 220, and at least one end of each of the light-emitting elements 300 may be electrically connected to the first electrode 210 and the second electrode 220.

[0129] In some embodiments, the first electrode 210 and the second electrode 220 may be formed to have widths greater than the widths of the first inner embankment 410 and the second inner embankment 420, respectively. For example, the first electrode 210 and the second electrode 220 may be disposed to respectively cover the outer surfaces of the first inner embankment 410 and the second inner embankment 420. The first electrode 210 and the second electrode 220 may be respectively disposed on the side surfaces of the first inner embankment 410 and the second inner embankment 420. As will be described later, the first electrode 210 and the second electrode 220 may include materials having a high reflectivity to reflect the light traveling toward the side surfaces of the first inner embankment 410 and the second inner embankment 420 after being emitted from the light-emitting element 300. Accordingly, the distance between the first electrode 210 and the second electrode 220 may be less than the distance between the first inner embankment 410 and the second inner embankment 420. In addition, at least a part of each of the first electrode 210 and the second electrode 220 may be directly disposed on the first planarization layer 200.

[0130] In addition, the electrodes 210 and 220 may be electrically connected to the light-emitting element 300 and may receive a predetermined voltage such that the light-emitting element 300 may emit light. For example, the electrodes 210 and 220 may be electrically connected to the light-emitting element 300 through the contact electrodes 261 and 262 to be described later, and the electrical signals transmitted to the electrodes 210 and 220 may be transmitted to the light-emitting element 300 through the contact electrodes 261 and 262.

[0131] In an embodiment, the first electrode 210 may be a pixel electrode separated for each sub-pixel PXn, and the second electrode 220 may be a common electrode commonly connected along each sub-pixel PXn. Any one of the first electrode 210 and the second electrode 220 may be an anode of the light-emitting element 300, and the other electrode may be a cathode of the light-emitting element 300. However, the disclosure is not limited thereto, and the situation may also be the opposite.

[0132] In addition, each of the electrodes 210 and 220 can be utilized to form an electric field in the sub-pixel PXn to align the light-emitting element 300. The light-emitting element 300 can be placed between the first electrode 210 and the second electrode 220 through a process of forming an electric field between the first electrode 210 and the second electrode 220 by transmitting an alignment signal to the first electrode 210 and the second electrode 220. As will be described later, the light-emitting element 300 can be ejected onto the first electrode 210 and the second electrode 220 in a state where the light-emitting element 300 is dispersed in a predetermined ink through an inkjet process, and can be aligned between the first electrode 210 and the second electrode 220 by applying a dielectrophoretic force to the light-emitting element 300 by transmitting an alignment signal between the first electrode 210 and the second electrode 220.

[0133] Each of the electrodes 210 and 220 can include a transparent conductive material. For example, each of the electrodes 210 and 220 can include a material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium tin zinc oxide (ITZO). However, the disclosure is not limited thereto. In some embodiments, each of the electrodes 210 and 220 can include a conductive material having a high reflectivity. For example, each of the electrodes 210 and 220 can include a metal such as silver (Ag), copper (Cu), or aluminum (Al) as a material having a high reflectivity. In this case, each of the electrodes 210 and 220 can reflect incident light in the upward direction of each sub-pixel PXn.

[0134] However, the disclosure is not limited thereto, and each of the electrodes 210 and 220 can also have a structure in which a transparent conductive material and a metal layer having a high reflectivity are stacked in one or more layers or can be formed as a single layer including them. In an embodiment, each of the electrodes 210 and 220 can have a stacked structure of ITO / Ag / ITO / IZO or can be an alloy including aluminum (Al), nickel (Ni), lanthanum (La), etc. However, the disclosure is not limited thereto.

[0135] The first insulating layer 510 is disposed on the first planarization layer 200, the first electrode 210, and the second electrode 220. The first insulating layer 510 can be disposed not only in the spaced region between the inner dams 410 and 420, but also on the opposite sides of the region between the electrodes 210 and 220 or between the inner dams 410 and 420. In addition, the first insulating layer 510 partially covers the first electrode 210 and the second electrode 220. For example, the first insulating layer 510 can be entirely disposed on the first planarization layer 200, the first electrode 210, and the second electrode 220, but the upper surfaces of the first electrode 210 and the second electrode 220 can be partially exposed. The first insulating layer 510 can include openings (not shown) formed to partially expose the first electrode 210 and the second electrode 220, and can cover only one side and the other side of each of the first electrode 210 and the second electrode 220. The portions of the first electrode 210 and the second electrode 220 disposed on the inner dams 410 and 420 can be partially exposed by the openings.

[0136] The first insulating layer 510 can protect the first electrode 210 and the second electrode 220 while insulating them from each other. In addition, the first insulating layer 510 can prevent the light-emitting element 300 disposed on the first insulating layer 510 from directly contacting other components, and thus can prevent the light-emitting element 300 from being damaged. However, the shape and structure of the first insulating layer 510 are not limited thereto.

[0137] In an embodiment, a part of the upper surface of the first insulating layer 510 can be stepped between the first electrode 210 and the second electrode 220. In some embodiments, the first insulating layer 510 can include an inorganic insulating material, and due to the steps formed by the electrodes 210 and 220 disposed below the first insulating layer 510, a part of the upper surface of the first insulating layer 510 disposed to partially cover the first electrode 210 and the second electrode 220 can be stepped. Thus, the light-emitting element 300 disposed on the first insulating layer 510 between the first electrode 210 and the second electrode 220 can form an empty space with the upper surface of the first insulating layer 510. The empty space can be filled with a material for forming the second insulating layer 520 to be described later.

[0138] Although not shown in the drawings, an outer dam 450 can be disposed on the first insulating layer 510. As Figure 4 and Figure 5As shown, the outer dam 450 may be disposed at the boundaries between the sub-pixels PXn. The outer dam 450 may extend at least in the second direction DR2 and may partially surround the inner dams 410 and 420 and the electrodes 210 and 220 and the area where the light-emitting elements 300 are disposed between the inner dams 410 and 420 and between the electrodes 210 and 220. In addition, the outer dam 450 may further include a portion extending in the first direction DR1, thereby forming a grid pattern in the entire display area DPA.

[0139] According to an embodiment, the height of the outer dam 450 may be greater than the height of each of the inner dams 410 and 420. Different from the inner dams 410 and 420, the outer dam 450 may separate adjacent sub-pixels PXn while preventing ink from overflowing into adjacent sub-pixels PXn during the inkjet process for placing the light-emitting elements 300 in the manufacturing process of the display device 10. That is, the outer dam 450 may separate the ink in which different light-emitting elements 300 are dispersed for different sub-pixels PXn to prevent the ink from mixing with each other. Like the inner dams 410 and 420, the outer dam 450 may include, but is not limited to, polyimide (PI).

[0140] The light-emitting element 300 may be disposed between the first electrode 210 and the second electrode 220 or between the first inner dam 410 and the second inner dam 420. Each of the light-emitting elements 300 may have one end electrically connected to the first electrode 210 and the other end electrically connected to the second electrode 220. Each of the light-emitting elements 300 may be electrically connected to the first electrode 210 and the second electrode 220 through the contact electrodes 261 and 262 to be described later, respectively.

[0141] The light-emitting elements 300 may be spaced apart from each other and aligned substantially parallel to each other. The gap between the light-emitting elements 300 is not specifically limited. In some cases, a plurality of light-emitting elements 300 may be disposed adjacent to each other to form a group, and a plurality of other light-emitting elements 300 may form a group at a certain distance from the upper group, or the light-emitting elements 300 may be oriented and aligned in a certain direction with an uneven density. In addition, in an embodiment, the light-emitting elements 300 may extend in a certain direction, and the direction in which each of the electrodes 210 and 220 extends and the direction in which the light-emitting elements 300 extend may be substantially perpendicular to each other. However, the disclosure is not limited thereto, and the light-emitting elements 300 may also extend in a direction that is not perpendicular but inclined to the direction in which each of the electrodes 210 and 220 extends.

[0142] The light-emitting element 300 according to an embodiment may include an active layer 330, and the active layer 330 includes different materials to emit lights of different wavelength bands. The display device 10 according to an embodiment may include the light-emitting element 300 that emits lights of different wavelength bands. Each light-emitting element 300 of the first sub-pixel PX1 may include an active layer 330 that emits light of a first color with its central wavelength band being a first wavelength, each light-emitting element 300 of the second sub-pixel PX2 may include an active layer 330 that emits light of a second color with its central wavelength band being a second wavelength, and each light-emitting element 300 of the third sub-pixel PX3 may include an active layer 330 that emits light of a third color with its central wavelength band being a third wavelength.

[0143] Therefore, light of the first color may be output from the first sub-pixel PX1, light of the second color may be output from the second sub-pixel PX2, and light of the third color may be output from the third sub-pixel PX3. In some embodiments, the light of the first color may be blue light with its central wavelength band in the range of 450 nm to 495 nm, the light of the second color may be green light with its central wavelength band in the range of 495 nm to 570 nm, and the light of the third color may be red light with its central wavelength band in the range of 620 nm to 752 nm. However, the disclosure is not limited thereto. In some cases, the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may include the same type of light-emitting element 300 to emit lights of substantially the same color.

[0144] The light-emitting element 300 may be disposed on the first insulating layer 510 between the electrodes 210 and 220. For example, the light-emitting element 300 may be disposed on the first insulating layer 510 between the inner dams 410 and 420. A part of each light-emitting element 300 may be stacked with the electrodes 210 and 220 in the thickness direction. One end of each of the light-emitting elements 300 may be stacked with the first electrode 210 in the thickness direction to be located on the first electrode 210, and the other end of each of the light-emitting elements 300 may be stacked with the second electrode 220 to be located on the second electrode 220. However, the disclosure is not limited thereto. Although not shown in the drawings, at least some of the light-emitting elements 300 disposed in each sub-pixel PXn may be disposed in a region other than the region between the inner dams 410 and 420. For example, they may be disposed between each of the inner dams 410 and 420 and the outer dam 450.

[0145] In each of the light-emitting elements 300, a plurality of layers may be disposed in a direction parallel to the upper surface of the first substrate 110 or the first planarization layer 200. Each of the light-emitting elements 300 of the display device 10 according to an embodiment may extend in a certain direction and have a structure in which a plurality of semiconductor layers are sequentially disposed along this direction. The direction along which the light-emitting element 300 extends may be parallel to the first planarization layer 200, and the semiconductor layers included in each of the light-emitting elements 300 may be sequentially disposed in a direction parallel to the upper surface of the first planarization layer 200. However, the disclosure is not limited thereto. In some cases, when the light-emitting element 300 has a different structure, the layers may be disposed in a direction perpendicular to the first planarization layer 200. The structure of each of the light-emitting elements 300 will be described in more detail with reference to another drawing later.

[0146] The second insulating layer 520 may be disposed on a part of each of the light-emitting elements 300 disposed between the first electrode 210 and the second electrode 220. For example, during the process of manufacturing the display device 10, the second insulating layer 520 may partially cover the outer surface of the light-emitting element 300 to protect the light-emitting element 300 while fixing the light-emitting element 300. In a plan view, a part of the second insulating layer 520 disposed on the light-emitting element 300 may extend in the second direction DR2 between the first electrode 210 and the second electrode 220. For example, the second insulating layer 520 may form a stripe pattern or an island pattern in each sub-pixel PXn.

[0147] The second insulating layer 520 may be disposed on the light-emitting element 300, but one end and the other end of each of the light-emitting elements 300 may be exposed. The exposed ends of each of the light-emitting elements 300 may contact the contact electrodes 261 and 262 to be described later. Such a shape of the second insulating layer 520 may be formed by performing a patterning process on the material for forming the second insulating layer 520 using a conventional mask process. The mask for forming the second insulating layer 520 may have a width smaller than the length of each light-emitting element 300, and the material for forming the second insulating layer 520 may be patterned to expose both ends of each of the light-emitting elements 300. However, the disclosure is not limited thereto.

[0148] In addition, in an embodiment, a part of the material of the second insulating layer 520 may be disposed between the lower surface of the light-emitting element 300 and the first insulating layer 510. The second insulating layer 520 may be formed to fill the space between the first insulating layer 510 and each light-emitting element 300 formed during the process of manufacturing the display device 10. Accordingly, the second insulating layer 520 may be formed to cover the outer surface of the light-emitting element 300. However, the disclosure is not limited thereto.

[0149] The contact electrodes 261 and 262 may be disposed on the second insulating layer 520.

[0150] As shown Figure 4 in the figure, the contact electrodes 261 and 262 may extend in a certain direction. The contact electrodes 261 and 262 may contact the light-emitting element 300 and the electrodes 210 and 220, and the light-emitting element 300 may receive electrical signals from the first electrode 210 and the second electrode 220 through the contact electrodes 261 and 262.

[0151] The contact electrodes 261 and 262 may include a first contact electrode 261 and a second contact electrode 262. The first contact electrode 261 and the second contact electrode 262 may be respectively disposed on portions of the first electrode 210 and the second electrode 220. The first contact electrode 261 may be disposed on the first electrode 210, the second contact electrode 262 may be disposed on the second electrode 220, and the first contact electrode 261 and the second contact electrode 262 may extend in the second direction DR2. The first contact electrode 261 and the second contact electrode 262 disposed on the second insulating layer 520 may be spaced apart in the first direction DR1 to face each other, and may form a stripe pattern in the emission region EMA of each sub-pixel PXn.

[0152] In some embodiments, the widths of the first contact electrode 261 and the second contact electrode 262 measured in a certain direction may be respectively greater than the widths of the first electrode 210 and the second electrode 220 (or the first electrode branch portion 210B and the second electrode branch portion 220B) measured in this direction. The first contact electrode 261 and the second contact electrode 262 may respectively contact one end and the other end of each light-emitting element 300, and cover two side surfaces of the first electrode 210 and the second electrode 220. As described above, the upper surfaces of the first electrode 210 and the second electrode 220 may be partially exposed, and the first contact electrode 261 and the second contact electrode 262 may contact the exposed upper surfaces of the first electrode 210 and the second electrode 220. For example, the first contact electrode 261 may contact a portion of the first electrode 210 located on the first inner embankment 410, and the second contact electrode 262 may contact a portion of the second electrode 220 located on the second inner embankment 420. However, the disclosure is not limited thereto. In some cases, the first contact electrode 261 and the second contact electrode 262 may have widths smaller than the widths of the first electrode 210 and the second electrode 220 to only cover the exposed portions of the upper surfaces of the first electrode 210 and the second electrode 220.

[0153] As shown Figure 6 in the figure, the first contact electrode 261 and the second contact electrode 262 may be respectively disposed on the first electrode 210 and the second electrode 220, and at least a part of them may also be disposed on the first insulating layer 510 and the light-emitting element 300.

[0154] The semiconductor layer may be exposed at two end surfaces of each light-emitting element 300 in the direction along which each light-emitting element 300 extends, and the first contact electrode 261 and the second contact electrode 262 may contact each light-emitting element 300 at the end surfaces where the semiconductor layer is exposed. However, the disclosure is not limited thereto. In some cases, the side surfaces at both ends of each light-emitting element 300 may be partially exposed. During the manufacturing process of the display device 10, the insulating film 380 surrounding the outer surface of the semiconductor layer of each light-emitting element 300 may be partially removed in the process of forming the second insulating layer 520 covering the outer surface of each light-emitting element 300 (see Figure 7 ), and the exposed side surfaces of each light-emitting element 300 may contact the first contact electrode 261 and the second contact electrode 262. One end of each of the light-emitting elements 300 may be electrically connected to the first electrode 210 through the first contact electrode 261, and the other end of each of the light-emitting elements 300 may be electrically connected to the second electrode 220 through the second contact electrode 262.

[0155] Although two first contact electrodes 261 and one second contact electrode 262 are provided in one sub-pixel PXn in the drawings, the disclosure is not limited thereto. The number of the first contact electrodes 261 and the second contact electrode 262 may vary according to the number of the first electrode 210 and the second electrode 220 provided in each sub-pixel PXn.

[0156] The corresponding ends of the first contact electrode 261 and the second contact electrode 262 facing each other may be provided on the second insulating layer 520 and may be spaced apart from each other on the second insulating layer 520. However, the disclosure is not limited thereto. Although not shown in the drawings, another insulating layer may be further provided between the first contact electrode 261 and the second contact electrode 262. The insulating layer may cover the first contact electrode 261 to insulate the first contact electrode 261 and the second contact electrode 262 from each other.

[0157] The contact electrodes 261 and 262 may include a conductive material (such as ITO, IZO, ITZO, or aluminum (Al)). However, the disclosure is not limited thereto.

[0158] The third insulating layer 550 may be entirely provided on the first substrate 110. The third insulating layer 550 may be used to protect the components provided on the first substrate 110 from the external environment.

[0159] Each of the first insulating layer 510, the second insulating layer 520, and the third insulating layer 550 described above may include an inorganic insulating material or an organic insulating material. In an embodiment, each of the first insulating layer 510, the second insulating layer 520, and the third insulating layer 550 may include an inorganic insulating material (such as silicon oxide (SiOx ) Silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (Al2O3), or aluminum nitride (AlN)). Optionally, each of the first insulating layer 510, the second insulating layer 520, and the third insulating layer 550 may include an organic insulating material such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene resin, polyphenylene sulfide resin, benzocyclobutene, cardo resin, silicone resin, silsesquioxane resin, polymethyl methacrylate, polycarbonate, or polymethyl methacrylate-polycarbonate synthetic resin. However, the disclosure is not limited thereto.

[0160] The light-emitting element 300 may be a light-emitting diode. In particular, each of the light-emitting elements 300 may be an inorganic light-emitting diode having a size in the micron or nanometer range and made of an inorganic material. When an electric field is formed in a specific direction between two electrodes facing each other, the inorganic light-emitting diode may be aligned between the two electrodes in which polarity is formed. The light-emitting element 300 may be aligned between the two electrodes by an electric field formed on the electrodes.

[0161] The light-emitting element 300 according to an embodiment may extend in one direction. Each of the light-emitting elements 300 may be shaped like a rod, a wire, or a tube, etc. In an embodiment, each of the light-emitting elements 300 may be shaped like a cylinder or a rod. However, the shape of the light-emitting element 300 is not limited thereto, and each of the light-emitting elements 300 may have various shapes including polygonal prisms such as cubes, cuboids, and hexagonal prisms, extending in a certain direction and having a partially inclined outer surface. A plurality of semiconductor layers included in each of the light-emitting elements 300, which will be described later, may be sequentially provided or stacked along the one direction.

[0162] Each of the light-emitting elements 300 may include a semiconductor layer doped with impurities of any conductive type (e.g., p-type or n-type). The semiconductor layer may receive an electrical signal from an external power source and emit the electrical signal as light in a specific wavelength band.

[0163] Figure 7 is a schematic diagram of a light-emitting element according to an embodiment.

[0164] Referring to Figure 7 , the light-emitting element 300 may include a first semiconductor layer 310, a second semiconductor layer 320, an active layer 330, an electrode layer 370, and an insulating film 380.

[0165] The first semiconductor layer 310 may be an n-type semiconductor. In an example, when the light-emitting element 300 emits light in the blue wavelength band, the first semiconductor layer 310 may include a semiconductor material having the chemical formula Al x Ga y In 1-x-y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1), for example, any one or more of n-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The first semiconductor layer 310 may be doped with an n-type dopant, and the n-type dopant may be, for example, Si, Ge, Se, or Sn. In an embodiment, the first semiconductor layer 310 may be n-GaN doped with n-type Si. The length of the first semiconductor layer 310 may be in the range of but not limited to 1.5 μm to 5 μm.

[0166] The second semiconductor layer 320 is disposed on the active layer 330, which will be described later. The second semiconductor layer 320 may be a p-type semiconductor. In an example, when the light-emitting element 300 emits light in the blue wavelength band or the green wavelength band, the second semiconductor layer 320 may include a semiconductor material having the chemical formula Al x Ga y In 1-x-y N (0 ≤ x ≤ 1, 0 ≤ y ≤ 1, 0 ≤ x + y ≤ 1), for example, any one or more of p-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The second semiconductor layer 320 may be doped with a p-type dopant, and the p-type dopant may be, for example, Mg, Zn, Ca, or Ba. In an embodiment, the second semiconductor layer 320 may be p-GaN doped with p-type Mg. The length of the second semiconductor layer 320 may be in the range of but not limited to 0.05 μm to 0.10 μm.

[0167] Although each of the first semiconductor layer 310 and the second semiconductor layer 320 is composed of one layer in the drawings, the disclosure is not limited thereto. According to some embodiments, each of the first semiconductor layer 310 and the second semiconductor layer 320 may include more layers. For example, depending on the material of the active layer 330, a cladding layer or a tensile strain barrier reduction (TSBR) layer may also be included. This will be described later with reference to other drawings.

[0168] The active layer 330 is disposed between the first semiconductor layer 310 and the second semiconductor layer 320. The active layer 330 may include a material having a single quantum well structure or a multi - quantum well structure. When the active layer 330 includes a material having a multi - quantum well structure, the active layer 330 may have a structure in which a plurality of quantum layers and a plurality of well layers are alternately stacked. The active layer 330 may emit light through the combination of electron - hole pairs according to the electrical signals received through the first semiconductor layer 310 and the second semiconductor layer 320. For example, when the active layer 330 emits light in the blue wavelength band, the active layer 330 may include a material such as AlGaN or AlGaInN. Specifically, when the active layer 330 has a multi - quantum well structure in which quantum layers and well layers are alternately stacked, the quantum layers may include a material such as AlGaN or AlGaInN, and the well layers may include a material such as GaN or AlInN. In an embodiment, as described above, the active layer 330 may include AlGaInN as the quantum layer and AlInN as the well layer to emit blue light whose central wavelength band is in the range of 450 nm to 495 nm.

[0169] However, the disclosure is not limited thereto, and the active layer 330 may also have a structure in which a semiconductor material having a large bandgap and a semiconductor material having a small bandgap are alternately stacked, or may include different group - III to group - V semiconductor materials according to the wavelength band of the light it emits. The light emitted from the active layer 330 is not limited to light in the blue wavelength band. In some cases, the active layer 330 may emit light in the red wavelength band or the green wavelength band. The length of the active layer 330 may be in the range of but not limited to 0.05 μm to 0.10 μm.

[0170] The light emitted from the active layer 330 can be radiated not only to the outer surface of the light - emitting element 300 in the longitudinal direction but also to the two side surfaces. The direction of the light emitted from the active layer 330 is not limited to one direction.

[0171] The electrode layer 370 may be an ohmic contact electrode. However, the disclosure is not limited thereto, and the electrode layer 370 may also be a Schottky contact electrode. The light - emitting element 300 may include at least one electrode layer 370. Although in Figure 7 the light - emitting element 300 includes one electrode layer 370, the disclosure is not limited thereto. In some cases, the light - emitting element 300 may include more electrode layers 370, or the electrode layer 370 may be omitted. Even if the number of electrode layers 370 is changed or another structure is further included, the following description of the light - emitting element 300 may still apply equally.

[0172] When the light-emitting element 300 is electrically connected to the electrodes 210 and 220 or contacts the electrodes 261 and 262, the electrode layer 370 can reduce the resistance between the light-emitting element 300 and the electrodes or the contact electrodes. The electrode layer 370 can include a conductive metal. For example, the electrode layer 370 can include at least any one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). In addition, the electrode layer 370 can include an n-type or p-type doped semiconductor material. The electrode layer 370 can include the same material or different materials, but the disclosure is not limited thereto.

[0173] The insulating film 380 surrounds the outer surfaces of the semiconductor layer and the electrode layer described above. In an embodiment, the insulating film 380 can surround at least the outer surface of the active layer 330 and extend in the direction in which the light-emitting element 300 extends. The insulating film 380 can protect the above components. For example, the insulating film 380 can surround the side surfaces of the above components, but can expose both ends of the light-emitting element 300 in the longitudinal direction.

[0174] In the drawings, the insulating film 380 extends in the longitudinal direction of the light-emitting element 300 to cover from the side surface of the first semiconductor layer 310 to the side surface of the electrode layer 370. However, the disclosure is not limited thereto, and the insulating film 380 can also cover only some of the semiconductor layers and the outer surface of the active layer 330, or can cover only a part of the outer surface of each electrode layer 370 to partially expose the outer surface of the electrode layer 370. In addition, the cross-section of the upper surface of the insulating film 380 can be circular in a region adjacent to at least one end of the light-emitting element 300.

[0175] The thickness of the insulating film 380 can be in the range of but not limited to 10 nm to 1.0 μm. The thickness of the insulating film 380 can preferably be about 40 nm.

[0176] The insulating film 380 can include a material having insulating properties (such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN), or aluminum oxide (Al2O3)). Therefore, the insulating film 380 can prevent an electrical short circuit that may occur when the active layer 330 directly contacts the electrodes through which an electrical signal is transmitted to the light-emitting element 300. In addition, the insulating film 380 can prevent a reduction in luminous efficiency by protecting the outer surface of the light-emitting element 300 including the active layer 330.

[0177] In addition, in some embodiments, the outer surface of the insulating film 380 may be treated. When manufacturing the display device 10, the light-emitting elements 300 may be ejected onto the electrodes in a state in which they are dispersed in a predetermined ink, and then alignment may be performed. Here, the surface of the insulating film 380 may be subjected to a hydrophobic treatment or a hydrophilic treatment so that the light-emitting elements 300 are separated from other adjacent light-emitting elements 300 in the ink without aggregating with them.

[0178] The length h of the light-emitting element 300 may be in the range of 1 μm to 10 μm or 2 μm to 6 μm, and may preferably be in the range of 3 μm to 5 μm. In addition, the diameter of the light-emitting element 300 may be in the range of 300 nm to 700 nm, and the aspect ratio of the light-emitting element 300 may be 1.2 to 100. However, the disclosure is not limited thereto, and the plurality of light-emitting elements 300 included in the display device 10 may also have different diameters depending on the difference in the composition of the active layer 330. The diameter of the light-emitting element 300 may preferably be about 500 nm.

[0179] As described above, when an alignment signal is transmitted to each of the electrodes 210 and 220 during the process of manufacturing the display device 10, an electric field is formed on the electrodes 210 and 220. When their orientation directions and positions are changed by dielectrophoretic forces caused by the electric field, the light-emitting elements 300 may be aligned between the electrodes 210 and 220. Here, the alignment signal transmitted to each of the electrodes 210 and 220 may be transmitted from an external alignment pad in a pad region PDA (see Figure 2 ) located in the non-display area NDA. According to an embodiment, in the display device 10, a voltage wiring (e.g., the first voltage wiring VSSL) to which an alignment signal is transmitted may include a plurality of alignment wirings separated from each other, and a display area DPA in which wirings connected to each alignment wiring are provided may receive alignment signals from different alignment pads. When the display device 10 includes a large display area DPA and a large number of pixels PX or sub-pixels PXn, the intensity of the electric field used to align the light-emitting elements 300 may be weak in pixels located far from the alignment pads that transmit the alignment signal. According to an embodiment, the alignment signal transmitted to align the light-emitting elements 300 may be transmitted to different display areas DPA through different alignment wirings, and an electric field of uniform intensity may be formed throughout each display area DPA. Therefore, the light-emitting elements 300 may be uniformly aligned in each pixel PX or sub-pixel PXn, and the problem of heat generation of the electrodes 210 and 220 or the wirings that may be caused by the alignment signal may be solved.

[0180] Figure 8 is a schematic plan view showing the arrangement of electrodes and a first voltage wiring of a display device according to an embodiment.

[0181] For ease of description, Figure 8 only the first electrode 210, the second electrode 220, and the first voltage wiring VSSL, which are respectively disposed in the display area DPA and the non-display area NDA, and the pads WPD_VSS and WPD_GND disposed in the pad area PDA are shown. However, it is obvious that other components (not shown in the drawings) described above can be disposed in the display area DPA, the non-display area NDA, and the pad area PDA.

[0182] Referring to Figure 8 , the display area DPA can be divided into different display areas DPA according to the position. For example, the display area DPA can include a first display area DPA1 and a second display area DPA2, and the first display area DPA1 and the second display area DPA2 can be respectively located on one side and the other side of the center of the display area DPA. The first display area DPA1 and the second display area DPA2 can substantially constitute a display area DPA, and can be defined as regions distinguishable from each other according to the layout of the first voltage wiring VSSL to be described later.

[0183] A plurality of pixels PX and sub-pixels PXn are disposed in each of the first display area DPA1 and the second display area DPA2. Each of the sub-pixels PXn can include the first electrode 210 and the second electrode 220 as described above, and each of the first electrode 210 and the second electrode 220 can include an electrode main body portion 210S or 220S and an electrode branch portion 210B or 220B. The first electrode main body portions 210S can be spaced apart from each other at the boundaries between adjacent sub-pixels PXn, but the second electrode main body portions 220S can extend into the non-display area NDA beyond the display area DPA in the first direction DR1. The first electrode branch portion 210B, the second electrode branch portion 220B, and other components are the same as those described above.

[0184] According to an embodiment, the display device 10 may further include a first electrode wiring 210F and a second electrode wiring 220F disposed in the non-display area NDA. The first electrode wiring 210F and the second electrode wiring 220F may extend in one direction and may be disposed in the non-display area NDA located outside the display area DPA. For example, the first electrode wiring 210F and the second electrode wiring 220F may extend in the second direction DR2 and may be disposed on one side and the other side of the display area DPA in the first direction DR1. That is, the first electrode wiring 210F and the second electrode wiring 220F may extend in the second direction DR2 between the display area DPA and the pad area PDA. The electrode wirings 210F and 220F disposed on the upper side and the lower side of the display area DPA may have substantially the same structure. However, among the first electrode wiring 210F and the second electrode wiring 220F, the wiring disposed on the other side of the display area DPA in the first direction DR1 may be omitted. The electrode wirings 210F and 220F disposed on the upper side of one side of the display area DPA in the first direction DR1 will be described in detail below, and the electrode wirings 210F and 220F disposed on the lower side of the other side of the display area DPA in the first direction DR1 will not be described.

[0185] Each of the first electrode wiring 210F and the second electrode wiring 220F may be a wiring to which an alignment signal is transmitted during the process of manufacturing the display device 10. During the manufacturing process of the display device 10, the alignment signal may be transmitted in a state where the first electrode wiring 210F is connected to the first electrode 210 (e.g., the first electrode main body portion 210S) and the second electrode wiring 220F is connected to the second electrode main body portion 220S. The alignment signal may be transmitted from each of the electrode wirings 210F and 220F to each of the electrodes 210 and 220 to form an electric field on the electrodes 210 and 220.

[0186] The second electrode main body portion 220S may extend in the first direction DR1 across a plurality of sub-pixels PXn and may be connected to the second electrode wiring 220F. On the other hand, during the manufacturing process of the display device 10, when the light-emitting element 300 is aligned, the first electrode main body portion 210S may be separated for each sub-pixel PXn. Therefore, the first electrode 210 may be separated from the first electrode wiring 210F, and the first electrode wiring 210F may be a floating line disposed in the non-display area NDA of the display device 10.

[0187] According to an embodiment, in the first electrode wiring 210F, one wiring may be disposed in the non-display area NDA between the display area DPA and the pad area PDA. In the second electrode wiring 220F, two or more wirings may be spaced apart from each other in the non-display area NDA between the display area DPA and the pad area PDA. For example, in the first electrode wiring 210F, one wiring may be disposed in the non-display area NDA and may extend from the first display area DPA1 to the second display area DPA2. In the second electrode wiring 220F, multiple wirings may be disposed in the non-display area NDA and may be respectively disposed in areas corresponding to the first display area DPA1 and the second display area DPA2. The wirings of the second electrode wiring 220F may be spaced apart from each other in a portion Q where the boundary between the first display area DPA1 and the second display area DPA2 is located. Figure 8 of the portion Q).

[0188] The first voltage wiring VSSL may be disposed in the display area DPA and the non-display area NDA. The first voltage wiring VSSL may include a wiring main body portion VSSL1_S and VSSL2_S disposed in the non-display area NDA and extending in the second direction DR2, and wiring branch portions VSSL1_B and VSSL2_B branched from the wiring main body portion VSSL1_S and VSSL2_S in the first direction DR1 and disposed in the display area DPA. The first voltage wiring VSSL may be electrically connected to the second electrode 220 with the wiring main body portion VSSL1_S and VSSL2_S disposed in the non-display area NDA and the wiring branch portions VSSL1_B and VSSL2_B disposed in the display area DPA. As described above, the first power supply voltage VSS may be applied to the first voltage wiring VSSL, and an alignment signal may be transmitted during the manufacturing process of the display device 10.

[0189] Similar to the second electrode wiring 220F, the first voltage wiring VSSL may include multiple wirings, and the wirings may be separated from each other in the non-display area NDA. According to an embodiment, the first voltage wiring VSSL may include a first separated wiring VSSL1 and a second separated wiring VSSL2 separated from each other. The first separated wiring VSSL1 may be disposed in the first display area DPA1 and the non-display area NDA between the first display area DPA1 and the pad area PDA, and the second separated wiring VSSL2 may be disposed in the second display area DPA2 and the non-display area NDA between the second display area DPA2 and the pad area PDA.

[0190] The first separated wiring VSSL1 may include a first wiring branch portion VSSL1_B provided in the first display area DPA1 and a first wiring main portion VSSL1_S provided between the first display area DPA1 and the pad area PDA and connected to the first wiring branch portion VSSL1_B. The second separated wiring VSSL2 may include a second wiring branch portion VSSL2_B provided in the second display area DPA2 and a second wiring main portion VSSL2_S provided between the second display area DPA2 and the pad area PDA and connected to the second wiring branch portion VSSL2_B.

[0191] The first wiring main portion VSSL1_S and the second wiring main portion VSSL2_S are respectively provided in a non-display area NDA located above or below the first display area DPA1 and the second display area DPA2. The first wiring main portion VSSL1_S and the second wiring main portion VSSL2_S may be spaced apart from each other in a portion Q where the boundary between the first display area DPA1 and the second display area DPA2 is located in the non-display area NDA. Figure 8 In addition, the first wiring main portion VSSL1_S and the second wiring main portion VSSL2_S are respectively connected to different power pads (for example, the (1-1) power pad WPD_VSS1 and the (1-2) power pad WPD_VSS2). Therefore, electrical signals can be independently transmitted to each of the first separated wiring VSSL1 and the second separated wiring VSSL2.

[0192] As described above, the second electrode 220 may be electrically connected to the first voltage wiring VSSL. However, since each of the second electrode 220 and the first voltage wiring VSSL includes a plurality of separated wirings, the wirings of the first display area DPA1 and the second display area DPA2 can be separated from each other. That is, the second electrode 220 provided in the first display area DPA1 may be electrically connected only to the first separated wiring VSSL1 of the first voltage wiring VSSL, and the second electrode 220 provided in the second display area DPA2 may be electrically connected only to the second separated wiring VSSL2 of the first voltage wiring VSSL.

[0193] During the manufacturing process of the display device 10, an alignment signal may be transmitted to the first voltage wiring VSSL and then to the second electrode 220 connected to the first voltage wiring VSSL. Since the first separated wiring VSSL1 and the second separated wiring VSSL2 of the first voltage wiring VSSL receive the alignment signal from different power pads WPD_VSS1 and WPD_VSS2, the alignment signal can be independently transmitted to the second electrode 220 provided in the first display area DPA1 and the second electrode 220 provided in the second display area DPA2.

[0194] On the other hand, the first electrode wiring 210F may be connected to the ground power pads WPD_GND1 and WPD_GND2 provided in the pad region PDA. Even if a part of the first electrode wiring 210F is connected to different power pads, since the first electrode wiring 210F is provided as a single wiring, it may have the same potential. That is, during the manufacturing process of the display device 10, the same alignment signal may be transmitted to each of the first electrodes 210 provided in the first display region DPA1 and the second display region DPA2.

[0195] Since the display device 10 according to the embodiment includes the first voltage wiring VSSL and the second electrode wiring 220F in the non-display region NDA, and the first voltage wiring VSSL and the second electrode wiring 220F include separated wirings from each other, during the manufacturing process, the alignment signal may be independently transmitted in each of the different display regions DPA. For example, in the first display region DPA1, the alignment signal may be transmitted to the second electrode 220 through the first separated wiring VSSL1, and in the second display region DPA2, the alignment signal may be transmitted to the second electrode 220 through the second separated wiring VSSL2. Even if the display device 10 includes a large number of pixels PX or sub-pixels PXn, it is possible to use one power pad to transmit the alignment signal only to a specific display region DPA and form an electric field with uniform intensity in the entire display region DPA. This will be described in detail later.

[0196] If the separated wirings VSSL1 and VSSL2 of the first voltage wiring VSSL remain non-electrically connected when driving the display device 10, there may be a potential difference in the first power supply voltage VSS applied to each display region DPA. The first power supply voltage VSS applied to the first display region DPA1 through the first separated wiring VSSL1 may be different from the first power supply voltage VSS applied to the second display region DPA2 through the second separated wiring VSSL2. In this case, the intensity or image quality of the light displayed in each display region DPA will be different.

[0197] The display device 10 according to the embodiment may include a first switching transistor ST1 (see Figure 9 ) provided in the non-display region NDA and having source / drain electrodes connected to the first separated wiring VSSL1 and the second separated wiring VSSL2. The first switching transistor ST1 remains off during the manufacturing process of the display device 10 and remains on during the driving of the display device 10. When the first switching transistor ST1 between the first separated wiring VSSL1 and the second separated wiring VSSL2 is turned on, the first power supply voltage VSS having a uniform potential may be applied to the first display region DPA1 and the second display region DPA2 when the display device 10 is driven.

[0198] Figure 9 is Figure 8 a schematic cross-sectional view of part Q. Figure 10 is an equivalent circuit diagram of some sub-pixels of a display device according to an embodiment.

[0199] First, referring to Figure 9 , a display device 10 according to an embodiment may include a first switching transistor ST1 disposed in a non-display area NDA and having a source / drain electrode connected to a first voltage wiring VSSL. The first switching transistor ST1 may have a structure substantially the same as that of the second transistor TR2. For example, the first switching transistor ST1 includes a third active material layer 750, a third gate electrode 710, a first electrode 730, and a second electrode 740, and the third active material layer 750 may include a channel region 750c and doping regions 750a and 750b. Except that the first switching transistor ST1 is disposed in the non-display area NDA, the first switching transistor ST1 has the same structure as that of the second transistor TR2 described above.

[0200] Although not shown in the drawings, the third gate electrode 710 of the first switching transistor ST1 may receive an on signal and an off signal from a gate voltage line VG connected to a scan driver SDR. The first switching transistor ST1 may receive an on signal from the gate voltage line VG during driving of the display device 10, and may receive an off signal during a manufacturing process.

[0201] In the first switching transistor ST1, the first electrode 730 may be electrically connected to a first separated wiring VSSL1 (e.g., a first wiring trunk portion VSSL1_S of the first voltage wiring VSSL), and the second electrode 740 may be electrically connected to a second separated wiring VSSL2 (e.g., a second wiring trunk portion VSSL2_S of the first voltage wiring VSSL). Each of the first separated wiring VSSL1 and the second separated wiring VSSL2 may be electrically connected to a second electrode wiring 220F in the non-display area NDA.

[0202] According to an embodiment, the first switching transistor ST1 may be turned off during the manufacturing process of the display device 10. When the alignment signal is transmitted only to the first isolation wiring VSSL1, it does not flow through the turned-off first switching transistor ST1. Therefore, the alignment signal is not transmitted to the second isolation wiring VSSL2 and is not transmitted to the second electrode wiring 220F connected to the second isolation wiring VSSL2. Similarly, when the alignment signal is transmitted only to the second isolation wiring VSSL2, it does not flow through the turned-off first switching transistor ST1 and is not transmitted to the second electrode wiring 220F connected to the first isolation wiring VSSL1. Here, the first switching transistor ST1 may receive a turn-off voltage from the gate voltage line VG connected to the scan driver SDR, or in some cases, may receive a turn-off voltage from an external alignment signal transmission device. During the manufacturing process of the display device 10, the scan driver SDR may not be driven, and the first switching transistor ST1 may receive a separate turn-off voltage from an external device. However, the disclosure is not limited thereto.

[0203] During the manufacturing process of the display device 10, the first switching transistor ST1 may be turned off, and the light-emitting elements 300 may be independently aligned in each display area DPA through the first isolation wiring VSSL1 or the second isolation wiring VSSL2. Each of the isolation wirings VSSL1 and VSSL2 may be connected to some of the second electrodes 220 provided in the display area DPA and may transmit the alignment signal only to the connected second electrodes 220. Since the pixels PX or sub-pixels PXn located far from any one of the isolation wirings VSSL1 and VSSL2 receive the alignment signal through the other isolation wiring VSSL1 or VSSL2, it is possible to prevent a decrease in the intensity of the alignment signal transmitted to the pixels PX far from the isolation wiring VSSL1 or VSSL2. Therefore, during the manufacturing process of the display device 10, an alignment signal of uniform intensity may be transmitted to the entire display area DPA, and an electric field of uniform intensity may be formed in each pixel PX. In addition, it is possible to improve the degree of alignment of the light-emitting elements 300 provided between the first electrode 210 and the second electrode 220 in the entire display area DPA.

[0204] In addition, according to an embodiment, the first switching transistor ST1 may be turned on while the display device 10 is being driven. Even when the first power supply voltage VSS is applied to each of the first isolation wiring VSSL1 and the second isolation wiring VSSL2, the first switching transistor ST1 provided between the first isolation wiring VSSL1 and the second isolation wiring VSSL2 may remain turned on, and the first power supply voltage VSS applied through each of the first isolation wiring VSSL1 and the second isolation wiring VSSL2 may have the same potential.

[0205] Refer to Figure 10, the display device 10 may include a first type of pixel PXa and a second type of pixel PXb. In each of the first type of pixel PXa and the second type of pixel PXb, the second electrode 220 of the light-emitting element 300 is electrically connected to the first switching transistor ST1. In the first type of pixel PXa, the other end of the first light-emitting diode EL1 may be connected to the first electrode of the first switching transistor ST1 and the first separated wiring VSSL1 of the first voltage wiring VSSL. In the second type of pixel PXb, the other end of the second light-emitting diode EL2 may be connected to the second electrode of the first switching transistor ST1 and the second separated wiring VSSL2 of the first voltage wiring VSSL. In the first type of pixel PXa, the first light-emitting diode EL1 may include a first electrode 210, a second electrode 220, and a first light-emitting element disposed between the first electrode 210 and the second electrode 220. In the second type of pixel PXb, the second light-emitting diode EL2 may include a first electrode 210, a second electrode 220, and a second light-emitting element disposed between the first electrode 210 and the second electrode 220. For example, among the pixels provided in the first display area DPA1, the first type of pixel PXa may be a pixel PX or a sub-pixel PXn in which the other end of the light-emitting diode EL is connected to the first switching transistor ST1. Among the pixels provided in the second display area DPA2, the second type of pixel PXb may be a pixel PX or a sub-pixel PXn in which the other end of the light-emitting diode EL is connected to the first switching transistor ST1.

[0206] When the display device 10 is driven, the first switching transistor ST1 may remain turned on. Even when the first power supply voltage VSS is applied to each of the first separated wiring VSSL1 and the second separated wiring VSSL2 of the first voltage wiring VSSL, the first power supply voltage VSS applied to the other ends of the light-emitting diodes EL1 and EL2 of the first type of pixel PXa and the second type of pixel PXb may have the same potential through the first switching transistor ST1. Therefore, it is possible to prevent a difference in the brightness of the screens displayed in the first display area DPA1 and the second display area DPA2 of the display device 10.

[0207] Now, the process of manufacturing the display device 10 will be described in detail with reference to other drawings. The process of manufacturing the display device 10 will be described in detail below, but the structures and arrangements of the components (e.g., the first electrode 210, the second electrode 220, the first voltage wiring VSSL, etc.) provided in the display device 10 will be briefly described.

[0208] Figure 11 is a plan view showing operations in the process of manufacturing a display device according to an embodiment.

[0209] First, refer to Figure 11, prepare the first substrate 110 and form the first electrode 210, the second electrode 220, and the first voltage wiring VSSL on the first substrate 110. As described above, the first transistor TR1, the second transistor TR2, and a plurality of insulating layers described above may be further provided on the first substrate 110. However, in Figure 11 In the first electrode 210 of, the first electrode main body portion 210S of each sub-pixel PXn may be connected to the first electrode main body portion 210S of other sub-pixels PXn, may extend in the first direction DR1, and may be connected to the first electrode wiring 210F. In the manufacturing process of the display device 10, the first electrode 210 may be formed to be connected to each other in the entire display area DPA and the non-display area NDA. As will be described later, the first electrode main body portion 210S may be partially cut by a subsequent process so that the first electrode main body portion 210S of each sub-pixel PXn is not connected to the first electrode main body portion 210S of other sub-pixels PXn, but remains as a floating line.

[0210] In the drawings, the first electrode wiring 210F is provided in the non-display area NDA and extends from the first display area DPA1 to the second display area DPA2. However, the disclosure is not limited thereto. Similar to the second electrode wiring 220F, the first electrode wiring 210F may also include a plurality of separated wirings. This will be described with reference to another embodiment.

[0211] Figure 12 and Figure 13 are plan views showing operations in the process of manufacturing a display device according to an embodiment. Figure 13 is provided in Figure 12 A schematic plan view of the first type of pixel PXa in the first display area DPA1.

[0212] Next, referring to Figure 12 and Figure 13 , the ink Ink in which the light-emitting elements 300 are dispersed is ejected onto the first electrode 210 and the second electrode 220 in the first display area DPA1. In an embodiment, in the display device 10, the inkjet printing method may be used to eject the light-emitting elements 300 onto the electrodes 210 and 220. The light-emitting elements 300 may be dispersed in the ink Ink ejected onto the first electrode 210 and the second electrode 220, and may have a random orientation direction as shown in Figure 13 . When an alignment signal is transmitted to the first electrode 210 and the second electrode 220 in a subsequent process, the light-emitting elements 300 may be aligned between the first electrode 210 and the second electrode 220.

[0213] Figure 14 and Figure 15It is a plan view showing operations in a process of manufacturing a display device according to an embodiment. Figure 15 is provided in Figure 14 a schematic plan view of a first type of pixel PXa in the first display area DPA1 of

[0214] Next, referring to Figure 14 and Figure 15 , the light-emitting element 300 is aligned by transmitting an alignment signal to the first electrode 210 and the second electrode 220. The first electrode 210 may receive the first alignment signal through the first electrode wiring 210F, and the second electrode 220 may receive the second alignment signal through the second electrode wiring 220F or the second electrode main body portion 220S. The second electrode wiring 220F or the second electrode main body portion 220S may be electrically connected to the first separation wiring VSSL1 of the first voltage wiring VSSL, and the second alignment signal transmitted to the first separation wiring VSSL1 may be transmitted to the second electrode 220. For example, the first electrode 210 may be grounded, and an alternating current (AC) voltage may be applied to the second electrode 220. The AC voltage may have a voltage of ±(10 to 50) V and a frequency of 10 kHz to 1 MHz. The first electrode 210 may be grounded through the ground power pad WPD_GND1 to which it is connected by the first electrode wiring 210F, and the second electrode 220 may receive the AC voltage through the (1-1) power pad WPD_VSS1 to which it is connected by the first separation wiring VSSL1.

[0215] The alignment signals transmitted to the first electrode 210 and the second electrode 220 may be transmitted through an external alignment signal transmission device (not shown). As shown in the drawings, the ground power pads WPD_GND1 and WPD_GND2 and the power pads WPD_VSS1 and WPD_VSS2 provided in the pad area PDA of the display device 10 may be connected to the alignment pads EPD1 and EPD2 of the alignment signal transmission device. The first alignment pad EPD1 may be connected to the first ground power pad WPD_GND1 and the (1-1) power pad WPD_VSS1 connected to the first separation wiring VSSL1, and the second alignment pad EPD2 may be connected to the second ground power pad WPD_GND2 and the (1-2) power pad WPD_VSS2 connected to the second separation wiring VSSL2.

[0216] In the display device 10 according to an embodiment, since the first voltage wiring VSSL includes the separated wirings VSSL1 and VSSL2 that are separated from each other, an alignment signal can be independently transmitted to a part of the display area DPA. As shown in the drawings, when the alignment signal transmission device transmits the alignment signal only to the first ground power pad WPD_GND1 and the (1-1)th power pad WPD_VSS1 through the first alignment pad EPD1, the alignment signal can be transmitted only to the first electrode 210 and the second electrode 220 provided in the first display area DPA1. The alignment signal transmission device can transmit the alignment signal within a specific range. When the intensity of the alignment signal is weak, the alignment signal cannot be transmitted to the entire display area DPA with a uniform intensity. However, when the alignment signal is transmitted only to a part of the display area DPA (e.g., the first display area DPA1), the alignment signal can be transmitted to at least the first display area DPA1 with a uniform intensity. Therefore, a strong enough electric field for aligning the light-emitting elements 300 can be formed in the entire first display area DPA1.

[0217] When the alignment signal is transmitted to the first electrode 210 and the second electrode 220, an electric field Ca can be formed between the first electrode 210 and the second electrode 220 (see Figure 16 ). Since the orientation direction and position of the light-emitting element 300 are changed by the dielectrophoretic force caused by the electric field Ca, the light-emitting elements 300 dispersed in the ink Ink can be placed between the first electrode 210 and the second electrode 220. As Figure 15 shown, the light-emitting elements 300 can be aligned with a consistent orientation direction between the first electrode 210 and the second electrode 220.

[0218] When an AC voltage is applied through the (1-1)th power pad WPD_VSS1, the first switching transistor ST1 can remain cut off. Even when the AC voltage is applied to the first separated wiring VSSL1, since the AC voltage does not flow through the cut-off first switching transistor ST1, the AC voltage can be prevented from being transmitted to the second separated wiring VSSL2.

[0219] Figure 16 is a schematic circuit diagram showing the operation of the first switching transistor in the operation of Figure 14 and Figure 15 . Figure 16 shows partial circuit diagrams of the first type of pixel PXa and the second type of pixel PXb to schematically show the electric fields formed in different types of pixels according to the alignment signal.

[0220] Referring to Figure 16 , the ends of the first light-emitting diode EL1 of the first type of pixel PXa and the ends of the second light-emitting diode EL2 of the second type of pixel PXb can be grounded simultaneously ( Figure 16(GND in the figure). During the manufacturing process of the display device 10, the first electrodes 210 can be connected to each other in the entire display area DPA through the first electrode wirings 210F. When the first electrode wiring 210F is grounded through the first ground power pad WPD_GND1, each of the first electrodes 210 provided in the entire display area DPA can be grounded (GND).

[0221] On the other hand, when the alignment signal is transmitted through the first separation wiring VSSL1 of the first type of pixel PXa, an electric field Ca can be formed between the grounded first electrode 210 of the first type of pixel PXa and the second electrode 220 to which the alignment signal is transmitted. The light-emitting elements 300 in the ink Ink ejected onto the first electrode 210 and the second electrode 220 can be aligned by the electric field Ca. However, since the alignment signal transmitted through the first separation wiring VSSL1 is not transmitted to the second electrode 220 of the second type of pixel PXb through the first switching transistor ST1, no electric field is formed in the second type of pixel PXb.

[0222] Figure 17 is a plan view showing operations in the process of manufacturing a display device according to an embodiment. Figure 18 is showing Figure 17 the operation of the first switching transistor in the operation of.

[0223] Next, referring to Figure 17 and Figure 18 , the ink Ink in which the light-emitting elements 300 are dispersed is ejected onto the first electrode 210 and the second electrode 220 of the second display area DPA2, and the alignment signal is transmitted to the first electrode 210 and the second separation wiring VSSL2. Although not shown in the drawings, in this operation, the alignment signal can be transmitted only through the second alignment pad EPD2 of the alignment signal transmission device, and can be transmitted through the (1-2) power pad WPD_VSS2 and the second ground power pad WPD_GND2. Therefore, an electric field can be formed in the pixels PX or sub-pixels PXn provided in the second display area DPA2, and the light-emitting elements 300 can be aligned between the electrodes 210 and 220 of the second display area DPA2. This is the same as described above with reference to Figures 14 to 16 .

[0224] Figure 19 is a plan view showing operations in the process of manufacturing a display device according to an embodiment.

[0225] Next, referring to Figure 19, a process of partially cutting the first electrode main body portion 210S is performed. As described above, since the first electrode main body portion 210S is separated for each sub-pixel PXn, the first electrode main body portion 210S can be partially cut after the light-emitting element 300 is aligned ( Figure 19 CB in), so that the first electrode 210 of each sub-pixel PXn can independently receive a driving signal. In this operation, the first electrode wiring 210F can be electrically disconnected from the first electrode main body portion 210S and can be kept as a floating line in the non-display area NDA.

[0226] Next, although not shown in the drawings, a second insulating layer 520, contact electrodes 261 and 262, etc., provided on the light-emitting element 300 can be formed to manufacture the display device 10.

[0227] Hereinafter, a display device according to various embodiments and a process of manufacturing the display device will be described with reference to other drawings.

[0228] Figure 20 is a schematic plan view showing an arrangement of electrodes and a first voltage wiring of a display device according to another embodiment.

[0229] Referring to Figure 20 , in the display device 10_1 according to an embodiment, the first voltage wiring VSSL and the second electrode wiring 220F can include a larger number of wirings separated from each other. The difference between this embodiment and the Figure 8 embodiment is that the first voltage wiring VSSL and the second electrode wiring 220F can be further divided. Therefore, any redundant description will be omitted, and the differences will be mainly described below.

[0230] In Figure 20In the display device 10_1, the display area DPA may include a first display area DPA1, a second display area DPA2, and a third display area DPA3, and the second electrode wiring 220F may be separated at each portion where the boundary between the positioned display areas DPA is located to include a plurality of wirings spaced apart from each other. The first voltage wiring VSSL may include a first separated wiring VSSL1, a second separated wiring VSSL2, and a third separated wiring VSSL3, and the wiring main portions VSSL1_S, VSSL2_S, and VSSL3_S of the first separated wiring VSSL1, the second separated wiring VSSL2, and the third separated wiring VSSL3 may be spaced apart from each other like the wirings of the second electrode wiring 220F and may be respectively connected to different power pads WPD_VSS1, WPD_VSS2, and WPD_VSS3, and the wiring branch portions VSSL1_B, VSSL2_B, and VSSL3_B of the first separated wiring VSSL1, the second separated wiring VSSL2, and the third separated wiring VSSL3 branch from the wiring main portions VSSL1_S, VSSL2_S, and VSSL3_S in the first direction DR1 and are disposed in the display area DPA.

[0231] When the display device 10_1 has a larger area by including a larger number of pixels PX, the area of the region to which the alignment signal transmitted from the alignment signal transmission device can be transmitted with uniform intensity can be reduced compared to the area of the display area DPA. In this case, in the display device 10_1, the first voltage wiring VSSL may be separated into a larger number of separated wirings VSSL1, VSSL2, and VSSL3 so that the alignment signal can be independently transmitted to each display area DPA. Therefore, even if the area of the display device 10_1 increases, the alignment signal with uniform intensity can be transmitted to each part of the display area DPA.

[0232] Meanwhile, during the process of manufacturing the display device 10_1, the first electrode wiring 210F is disconnected from the first electrode main portion 210S and is disposed in the non-display area NDA to be kept as a floating line. During the manufacturing process of the display device 10, the first electrode wiring 210F may be connected to the first ground power pad WPD_GND1, the second ground power pad WPD_GND2, and the third ground power pad WPD_GND3 and thus can be grounded. In some embodiments, like the second electrode wiring 220F, the first electrode wiring 210F may include a plurality of separated wirings.

[0233] Figure 21 is a schematic plan view showing the arrangement of electrodes and a first voltage wiring of a display device according to another embodiment.

[0234] Referring to Figure 21, in the display device 10_2 according to the embodiment, the first electrode wiring 210F_2 includes a plurality of wirings separated from each other. Figure 21 The embodiment of Figure 8 differs from the embodiment of

[0235] in that: the first electrode wiring 210F_2 includes a plurality of wirings. Therefore, any redundant description will be omitted, and the differences will be mainly described below. Figure 21 In the display device 10_2 of Figure 8 , the first electrode wiring 210F_2 as an electrically floating line can be disposed in the non-display area NDA and can include a plurality of wirings separated from each other. When the display device 10_2 is driven, an electrical signal may not be directly transmitted to the first electrode wiring 210F_2 and may be transmitted only to the first electrode 210 disposed in the display area DPA. Therefore, the first electrode wiring 210F_2 may not be formed as a single wiring as shown in Figure 21 , but may include a plurality of separated wirings as shown in

[0236] In addition, during the process of manufacturing the display device 10_2, the first electrode wiring 210F_2 may include a plurality of separated wirings, and each of the wirings may be grounded. The first electrode wiring 210F_2 may include a wiring disposed between the first display area DPA1 and the pad area PDA and a wiring disposed between the second display area DPA2 and the pad area PDA, and these wirings may be spaced apart from each other like the wirings of the second electrode wiring 220F. The first electrode wiring 210F_2 disposed between the first display area DPA1 and the pad area PDA may be connected to the first ground power pad WPD_GND1 and thus may be grounded. The first electrode wiring 210F_2 disposed between the second display area DPA2 and the pad area PDA may be connected to the second ground power pad WPD_GND2 and thus may be grounded. That is, when the display device 10_2 is driven, since the first electrode wiring 210F_2 is set as a floating line, the first electrode wiring 210F_2 may not be formed as a single wiring, but may include separated wirings. During the process of manufacturing the display device 10_2, the separated wirings of the first electrode wiring 210F_2 may be grounded from the ground power pads WPD_GND1 and WPD_GND2 respectively. In the current embodiment, the first electrode wiring 210F_2 may be disposed in substantially the same shape as the shape of the second electrode wiring 220F_2.

[0237] When the first electrode wiring 210F_2 includes a plurality of separated wirings, a switching transistor may be further disposed between the plurality of separated wirings.

[0238] Figure 22It is a cross-sectional view of a part of a display device according to another embodiment. Figure 23 It shows during the manufacturing Figure 22 A schematic circuit diagram showing the operations of the first switching transistor and the second switching transistor during the process of the display device.

[0239] Figure 22 It shows a part of the cross-section of part Q in the display device 10_3 according to an embodiment. Refer to Figure 21 In the display device 10_3 according to an embodiment, the first electrode wiring 210F_3 may include a plurality of separated wirings from each other, and may further include a second switching transistor ST2_3 disposed therebetween. The current embodiment is different from Figure 22 the embodiment of Figure 10 in that it further includes a second switching transistor ST2_3 disposed in the non-display area NDA and electrically connected to the first electrode wirings 210F_3 separated from each other. Therefore, any redundant description will be omitted, and the differences will be mainly described below.

[0240] In Figure 22 the display device 10_3, as in Figure 21 the display device 10_2, the first electrode wiring 210F_3 may include a plurality of separated wirings. This is the same as described above.

[0241] The first electrode wirings 210F_3 separated from each other may all be electrically connected to the second switching transistor ST2_3. The second switching transistor ST2_3 may be disposed in the non-display area NDA, and may have source / drain electrodes connected to the second conductive pattern 197_3 and the third conductive pattern 198_3. The second switching transistor ST2_3 may have a structure substantially the same as that of the first switching transistor ST1. For example, the second switching transistor ST2_3 includes a fourth active material layer 850_3, a fourth gate electrode 810_3, a first electrode 830_3, and a second electrode 840_3, and the fourth active material layer 850_3 may include a channel region 850c and doping regions 850a and 850b. Except that the source / drain electrodes 830_3 and 840_3 are connected to the conductive patterns 197_3 and 198_3, the second switching transistor ST2_3 has the same structure as that of the first switching transistor ST1.

[0242] As in the first switching transistor ST1, the first switching transistor ST1 can receive a turn-on or turn-off signal from the first gate voltage line VG1, and in the second switching transistor ST2_3, the fourth gate electrode 810_3 can receive a turn-on or turn-off signal from the second gate voltage line VG2 connected to the scan driver SDR. The turn-on voltage can be applied to the second gate voltage line VG2 while the display device 10_3 is driven, and the turn-off voltage can be applied to the second gate voltage line VG2 during the manufacturing process. This is the same as the case of the first switching transistor ST1, so its detailed description will be omitted.

[0243] The second data conductive layer may be disposed in the non-display area NDA, and may further include a second conductive pattern 197_3 and a third conductive pattern 198_3 connected to the source / drain electrode of the second switching transistor ST2_3. The second conductive pattern 197_3 may be connected to the first electrode 830_3 of the second switching transistor ST2_3, and the third conductive pattern 198_3 may be connected to the second electrode 840_3 of the second switching transistor ST2_3. The second conductive pattern 197_3 and the third conductive pattern 198_3 may be respectively connected to the first electrode wiring 210F_3 separated from each other.

[0244] Reference Figure 23 , like the first switching transistor ST1, the second switching transistor ST2_3 according to the embodiment can be kept off during the manufacturing process of the display device 10_3, and can be kept on during the driving of the display device 10_3. During the manufacturing process of the display device 10_3, the first electrode wiring 210F_3 is electrically connected to the first electrode 210 of the display area DPA. When the alignment signal is transmitted to the first display area DPA1 and the second display area DPA2 separately through the first separation wiring VSSL1 and the second separation wiring VSSL2, the first electrode 210 can also be grounded separately. For example, when the first electrode wiring 210F_3 connected to the first ground power pad WPD_GND1 is grounded ( Figure 23 When the first electrode wiring 210F_3 connected to the second ground power pad WPD_GND2 is connected to the ground, the first electrode wiring 210F_3 may not be grounded or may be grounded separately through the second ground power pad WPD_GND2 ( Figure 23 Therefore, the alignment signal may be individually transmitted to the first display area DPA1 and the second display area DPA2 through the separation wirings VSSL1 and VSSL2 and the first electrode wiring 210F_3 separated from each other, and the light emitting element 300 may be independently aligned in each display area DPA.

[0245] In addition, although not shown in the drawings, the second switching transistor ST2_3 may remain turned on while the display device 10_3 is being driven. However, the disclosure is not limited thereto. Since the first electrode wiring 210F_3 can be maintained as a floating line, the second switching transistor ST2_3 can remain turned off even when the display device 10_3 is being driven.

[0246] In some embodiments, the second electrode wiring 220F may not include a plurality of separated wirings, but may be formed as a single wiring.

[0247] Figure 24 is a schematic plan view showing the arrangement of electrodes and a first voltage wiring of a display device according to another embodiment.

[0248] Referring to Figure 24 , in the display device 10_4 according to an embodiment, the second electrode wiring 220F_4 may not include separated wirings, but may be a single connected wiring. The current embodiment is different from the embodiment of Figure 8 in that: the second electrode wiring 220F_4 is a single connected wiring. Therefore, any redundant description will be omitted, and the differences will be mainly described below.

[0249] During the process of manufacturing the display device 10_4, the first voltage wiring VSSL to which the alignment signal is transmitted may be electrically connected to the second electrode wiring 220F_4 or the second electrode 220. The first voltage wiring VSSL may include a first separated wiring VSSL1 and a second separated wiring VSSL2, and the alignment signal may be transmitted to each of them separately. Here, when the alignment signal is transmitted to the first separated wiring VSSL1, the alignment signal may be transmitted to the second electrode 220 and the second electrode wiring 220F_4 with a strong intensity. The second electrode 220 and the second electrode wiring 220F_4 are disposed adjacent to the first separated wiring VSSL1 and are electrically connected to the first separated wiring VSSL1. However, for the second electrode 220 and the second electrode wiring 220F_4 that are far from the first separated wiring VSSL1, the intensity of the alignment signal may be reduced due to the resistance of the electrode or the wiring.

[0250] That is, even if the second electrode wiring 220F_4 does not include a plurality of separated wirings, due to the resistance of the second electrode wiring 220F_4, the alignment signal will not be transmitted to the second electrode 220 that is far from the second electrode wiring 220F_4. Therefore, the alignment signal can be transmitted to the second electrode 220 separately through the first separated wiring VSSL1 and the second separated wiring VSSL2. In the display device 10_4 according to an embodiment, even if the second electrode wiring 220F_4 is set as a single wiring without being separated, the alignment signal can be transmitted to each of the first display area DPA1 and the second display area DPA2 separately.

[0251] In some cases, the second electrode 220 can be electrically connected to the first voltage wiring VSSL through the second electrode contact holes CNTS in each pixel PX or sub-pixel PXn. In this case, like the first electrode 210, the second electrode 220 can also include a second electrode main body portion 220S separated for each pixel PX or sub-pixel PXn.

[0252] Figure 25 is a schematic plan view showing the arrangement of the electrodes and the first voltage wiring of a display device according to another embodiment. Figure 26 is a plan view showing the operations in the process of manufacturing Figure 25 the display device.

[0253] Referring to Figure 25 and Figure 26 , in the display device 10_5 according to an embodiment, the second electrode main body portion 220S_5 of the second electrode 220_5 can extend in one direction, but can be spaced apart from each other at the boundaries of each sub-pixel PXn. The current embodiment is different from the embodiments of Figure 5 and Figure 8 in that the second electrode main body portions 220S_5 separated from each other are respectively provided in the sub-pixels PXn. Therefore, any redundant description will be omitted, and the differences will be mainly described below.

[0254] In Figure 25 and Figure 26 the display device 10_5, the second electrode main body portion 220S_5 can be separately provided in each sub-pixel PXn. The second electrode 220_5 can have a structure substantially similar to that of the first electrode 210, and electrical signals can be separately transmitted to the first electrode 210 and the second electrode 220_5 provided in each sub-pixel PXn. The second electrode contact holes CNTS_5 can be formed in the second electrode main body portion 220S_5 provided in each sub-pixel PXn, and the second electrode 220_5 can be electrically connected to the first voltage wiring VSSL in each sub-pixel PXn. In this case, like the first electrode wiring 210F, the second electrode wiring 220F_5 provided in the non-display area NDA can be a floating line.

[0255] In addition, the second electrode 220_5 can be provided in a state in which the second electrode main body portions 220S_5 are separated from each other during the manufacturing process of the display device 10_5. As Figure 26As shown, the second electrode main body portions 220S_5 can be separated from each other at the boundaries of each sub-pixel PXn, and can be electrically connected to the first voltage wiring VSSL or the separation wirings VSSL1 and VSSL2 through the second electrode contact holes CNTS_5. When the alignment signal is transmitted to the first separation wiring VSSL1, the alignment signal can be transmitted to the second electrodes 220_5 of each sub-pixel PXn provided in the first display area DPA1. On the other hand, since the second electrodes 220_5 provided in the second display area DPA2 are only connected to the second separation wiring VSSL2, the alignment signal may not be transmitted to the second separation wiring VSSL2. Other details are the same as those described above.

[0256] In summarizing the detailed description, those skilled in the art will understand that many changes and modifications can be made to the preferred embodiments without substantially departing from the principles of the invention. Therefore, the disclosed preferred embodiments of the invention are used only in a general and descriptive sense, and not for the purpose of limitation.

Claims

1. A display device, the display device comprising: a substrate in which a display area and a non-display area surrounding the display area are defined; a plurality of pixels disposed in the display area of the substrate, and each including a first electrode, a second electrode, and a plurality of light-emitting elements electrically connected to the first electrode and the second electrode; a first voltage wiring disposed in the display area and the non-display area of the substrate and connected to at least some of the plurality of pixels, wherein the first voltage wiring is separated into a first separated wiring and a second separated wiring spaced apart from each other in the non-display area; and a first switching transistor having a first electrode connected to the first separated wiring and a second electrode connected to the second separated wiring, wherein the first switching transistor is turned on during driving of the display device and turned off during a manufacturing process of the display device.

2. The display device according to claim 1, wherein, The display area includes a first display area and a second display area, The first separated wiring includes: a first wiring main part disposed in the non-display area and extending in a first direction; and a first wiring branch part branching from the first wiring main part in a second direction and disposed in the first display area, and The second separated wiring includes: a second wiring main part disposed in the non-display area and extending in the first direction; and a second wiring branch part branching from the second wiring main part in the second direction and disposed in the second display area.

3. The display device according to claim 2, wherein, The first wiring main part and the second wiring main part are spaced apart from each other in the non-display area, and The first switching transistor is disposed between the first wiring main part and the second wiring main part.

4. The display device according to claim 2, wherein, The first wiring branch part is electrically connected to the second electrode of the pixel disposed in the first display area, and The second wiring branch part is electrically connected to the second electrode of the pixel disposed in the second display area.

5. The display device according to claim 3, the display device further comprising a second electrode wiring disposed in the non-display area and extending in the first direction, Among them, The second electrodes of the plurality of pixels extend in the second direction and are electrically connected to the second electrode wiring.

6. The display device according to claim 5, wherein, The second electrode wiring includes a plurality of wirings separated from each other in the non-display area.

7. The display device according to claim 6, wherein, The separated plurality of wirings of the second electrode wiring are electrically connected to the first switching transistor.

8. The display device according to claim 2, the display device further comprising a first electrode wiring disposed in the non-display area and extending in the first direction, Among them, The first electrode disposed in each of the plurality of pixels is not electrically connected to the first electrode wiring.

9. The display device according to claim 2, wherein, The substrate further includes a pad area disposed in the non-display area, The first separated wiring is electrically connected to a first power pad disposed in the pad area, and The second separated wiring is electrically connected to a second power pad disposed in the pad area.

10. A display device, the display device comprising: A plurality of pixels, each including a first electrode, a second electrode, and a light-emitting element disposed between the first electrode and the second electrode; A first voltage wiring including a first separated wiring and a second separated wiring separated from each other; And A first switching transistor disposed between the first separated wiring and the second separated wiring and having a source electrode and a drain electrode respectively connected to the first separated wiring and the second separated wiring, Wherein the plurality of pixels include first-type pixels and second-type pixels. In the first-type pixels, the second electrode is connected to the first separated wiring, and in the second-type pixels, the second electrode is connected to the second separated wiring.

11. The display device according to claim 10, wherein, During a first manufacturing process of the display device, the first switching transistor is turned off, and An alignment signal is transmitted to the first separated wiring but not to the second separated wiring, and is transmitted to the second electrode of the first-type pixels but not to the second electrode of the second-type pixels.

12. The display device according to claim 11, wherein, During a second manufacturing process of the display device, the first switching transistor is turned off, and An alignment signal is transmitted to the second separated wiring but not to the first separated wiring, and is transmitted to the second electrode of the second-type pixels but not to the second electrode of the first-type pixels.

13. The display device according to claim 12, wherein, During driving of the display device, the first switching transistor is turned on, and A power supply voltage is applied to each of the first separated wiring and the second separated wiring, and thus to each of the second electrode of the first-type pixels and the second electrode of the second-type pixels.

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