A motherboard, power conversion method and device

Abstract

The application provides a motherboard, a power conversion method and a device. The power conversion device comprises a first power module, a second power module and a controller. Each power module is composed of a signal processor and a corresponding power converter. The signal processor in the first power module sends a generated first carrier signal to the signal processor in the second power module. The signal processor in the second power module determines a second carrier signal by using the period of the first carrier signal, thereby driving the power converter in the first power module by using the first carrier signal and driving the power converter in the second power module by using the second carrier signal, improving the working efficiency of the device in the power conversion process and reducing the power loss.

Description

Technical Field

[0001] This application relates to the field of power conversion technology, and in particular to a motherboard, power conversion method and apparatus. Background Technology

[0002] Currently, for devices requiring power conversion, to meet the needs of high-power output applications, most power conversion devices do not use single-channel power conversion; instead, existing motherboards integrate a signal processor and multiple power converters. By connecting multiple power converters in parallel, the output power of the power conversion device is increased.

[0003] Typically, multi-channel power conversion on the motherboard is driven by multiple carrier signals generated by multiple timers in the signal processor. Multiple timers in the same signal processor are prone to generating correlation signals. Therefore, the carrier signals allocated in multi-channel power conversion can be adjusted based on the correlation signals.

[0004] However, when using the carrier signal allocated by the same signal processor to drive the corresponding power conversion, the associated signals generated by multiple timers in the same signal processor can easily cause some power conversion driving processes to be forcibly changed, which in turn leads to lower device efficiency and higher power loss during the power conversion process. Summary of the Invention

[0005] In view of this, this application provides a motherboard, a power conversion method and apparatus to improve the working efficiency of devices and reduce power loss during the power conversion process.

[0006] In a first aspect, this application provides a power conversion device, comprising: a first power module, a second power module, and a controller; each power module includes: a signal processor and a power converter, the signal processor being connected to the power converter; the controller being connected to the signal processor in each power module; the controller being configured to: control the signal processor in each power module to be in an operating state; the signal processor in the first power module being configured to: generate a first carrier signal, drive the connected power converter based on the first carrier signal, and send the first carrier signal to the signal processor in the second power module; the power converter in the first power module being configured to: perform power conversion processing on an input first current or a first voltage using the first carrier signal, and output the converted first current or the converted first voltage; the signal processor in the second power module being configured to: receive the first carrier signal and determine the period of the first carrier signal; determine a second carrier signal based on the period of the first carrier signal; the power converter in the second power module being configured to: perform power conversion processing on an input second current or a second voltage using the second carrier signal, and output the converted second current or the converted second voltage.

[0007] Compared to existing technologies that use a single signal processor to control multiple power conversions, the power conversion device provided in this application includes a first power module, a second power module, and a controller. Each power module consists of a signal processor and a corresponding power converter. The signal processor in the first power module sends a generated first carrier signal to the signal processor in the second power module. The signal processor in the second power module uses the period of the first carrier signal to determine the second carrier signal, thereby using the first carrier signal to drive the power converter in the first power module and the second carrier signal to drive the power converter in the second power module, thereby improving the operating efficiency of the devices during power conversion and reducing power loss.

[0008] In a possible design, the signal processor in the second power module is specifically configured to: generate a third carrier signal, and phase-lock the third carrier signal according to a period of the first carrier signal and a target phase difference to obtain the second carrier signal, where the target phase difference is determined according to the number of power modules. In this design, the target phase difference is determined according to the number of power modules, and then the third carrier signal is phase-locked according to the period of the first carrier signal and the target phase difference, so that the second carrier signal obtained after phase-locking has a fixed target phase difference with the first carrier signal, and then the power converter in the first power module outputs power based on the first carrier signal and the power converter in the second power module outputs power based on the second carrier signal, so that a fixed target phase difference is maintained between the powers output by different power modules, thereby avoiding the situation that output ripple, thermal stress and other indicators are deteriorated due to dynamic changes in the phase difference between the powers output by different power modules.

[0009] In a possible design, the signal processor in the second power module includes: a control loop configured to: determine an initial reference phase according to a period of the first carrier signal and the number of power modules, generate a reference signal according to the reference phase, and send the reference signal to a signal superposition module; and the signal superposition module is configured to: superimpose the reference signal and the third carrier signal to obtain a superimposed signal, determine whether a phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference, feed back a current phase difference between the superimposed signal and the first carrier signal to the control loop when the phase difference between the superimposed signal and the first carrier signal is not equal to the target phase difference, and send the superimposed signal as the second carrier signal to the power converter in the second power module when the phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference; and the control loop is further configured to: correct the reference phase according to the current phase difference between the superimposed signal and the first carrier signal received from the signal superposition module, and continue to generate the reference signal according to the corrected reference phase.

[0010] In this application, when performing phase-locking on the third carrier signal, the control loop in the signal processor of the second power module first determines an initial reference phase based on the period of the first carrier signal and the number of power modules. After generating a reference signal according to the reference phase, the signal superposition module in the signal processor of the second power module superimposes the reference signal and the third carrier signal. If the phase difference between the superimposed signal and the first carrier signal is not equal to the target phase difference, the current phase difference between the superimposed signal and the first carrier signal is fed back to the reference phase as a feedback value. A new reference signal is then generated, and the new reference signal is superimposed on the third carrier signal until the phase difference between the new superimposed signal and the first carrier signal equals the target phase difference, thus completing the phase-locking process for the third carrier signal. The control loop configuration allows for more accurate phase-locking of the third carrier signal.

[0011] In one possible design, the first power module is a master power module, and the second power module is a slave power module. The signal processor in the first power module is further configured to: determine its own address as a predefined master power module address before sending the first carrier signal to the signal processor in the second power module. By defining the power module addresses corresponding to the first and second power modules respectively, the carrier signal generated by the signal processor in the master power module can be accurately sent to the signal processor in the slave power module.

[0012] In one possible design, there is one first power module and multiple second power modules. By setting multiple second power modules, a larger power value can be generated using the power conversion device. Simultaneously, the number of second power modules can be set according to user needs to meet different power conversion requirements. By setting the number of first power modules to one, it is ensured that each second power module is controlled by the same first power module. This ensures that there is a fixed target phase difference between the power output of the power converter in the first power module based on the first carrier signal and the power output of the power converter in each second power module based on the second carrier signal. This guarantees that the power outputs of different power modules maintain a fixed phase difference, avoiding the degradation of output ripple, thermal stress, and other indicators caused by dynamic changes in the phase difference between the output power of different power modules.

[0013] In one possible design, the controller communicates with the signal processor in each power module through at least one of the following communication interfaces: Serial Peripheral Interface (SPI), General Purpose Input / Output (GPIO) interface, Bidirectional Two-Wire Serial Bus (I2C) interface, and Controller Area Network (CAN) interface. By setting different communication interfaces, the controller and the signal processor in each power module can select the communication interaction method according to the actual situation, thereby enabling the controller to more accurately control the signal processor in each power module.

[0014] Secondly, this application also provides a motherboard including the power conversion device as described in the first aspect and any of its designs, wherein the controller in the power conversion device is soldered to the motherboard, and each power module is connected to the motherboard via pins.

[0015] Thirdly, this application also provides a power conversion method applied to a power conversion device as described in the first aspect and any of its designs. The method includes: a signal processor in a second power module receiving a first carrier signal sent by a signal processor in a first power module and determining the period of the first carrier signal; wherein the first carrier signal is generated by the signal processor in the first power module; the signal processor in the second power module determining a second carrier signal based on the period of the first carrier signal, so that the power converter in the second power module uses the second carrier signal to perform power conversion processing on the input second current or second voltage, and outputs the converted second current or the converted second voltage.

[0016] In one possible design, the signal processor in the second power module determines the second carrier signal based on the period of the first carrier signal, including: the signal processor in the second power module generates a third carrier signal, and performs phase-locking on the third carrier signal according to the period of the first carrier signal and a target phase difference to obtain the second carrier signal, wherein the target phase difference is determined according to the number of power modules.

[0017] In one possible design, the signal processor in the second power module performs phase-locking on the third carrier signal based on the period of the first carrier signal and the target phase difference to obtain the second carrier signal. This includes: the signal processor in the second power module determining an initial reference phase based on the period of the first carrier signal and the number of power modules; generating a reference signal based on the reference phase; superimposing the reference signal and the third carrier signal to obtain a superimposed signal; determining whether the phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference; when the current phase difference between the superimposed signal and the first carrier signal is not equal to the target phase difference, feeding back the current phase difference between the superimposed signal and the first carrier signal to the reference phase to correct the reference phase; continuing to generate the reference signal based on the corrected reference phase; and using the superimposed signal as the second carrier signal when the phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference.

[0018] Fourthly, this application provides a computer-readable storage medium storing computer instructions that, when executed by a signal processor in a second power module of a power conversion device, cause the signal processor in the second power module to perform any of the methods designed in the third aspect above.

[0019] Fifthly, this application provides a computer program product comprising computer instructions that, when executed by a signal processor in a second power module of a power conversion device, cause the signal processor in the second power module to perform any of the methods designed in the third aspect above.

[0020] For the technical effects that any possible design in any of the second to fifth aspects above can achieve, please refer to the description of the technical effects that any possible design in the first aspect above can achieve, which will not be repeated here. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of a structure in the prior art where the motherboard and power converter are integrated.

[0022] Figure 2 A schematic diagram of carrier signal 1, carrier signal 2 and carrier signal 2' after forced signal change assigned to signal processor 101 in the prior art;

[0023] Figure 3 This is a schematic diagram illustrating the phase difference change between power converter A and power converter B in the prior art.

[0024] Figure 4 This is a schematic diagram of the structure of a power conversion device provided in an embodiment of this application;

[0025] Figure 5 A schematic diagram illustrating phase-locking of a third carrier signal based on a target phase difference, provided as an embodiment of this application;

[0026] Figure 6 A schematic diagram showing the signal processor in the power module 402-n adjusting the third carrier signal according to the first carrier signal of the signal processor in the power module 402-1, as provided in the embodiments of this application;

[0027] Figure 7 A schematic diagram showing a 180° phase difference between the first carrier signal and the second carrier signal provided in an embodiment of this application;

[0028] Figure 8 This is a schematic flowchart of a power conversion method provided in an embodiment of this application. Detailed Implementation

[0029] To enable those skilled in the art to better understand the technical solutions of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0030] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data used can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0031] The following explanations of some terms used in the embodiments of this application are provided to facilitate understanding by those skilled in the art.

[0032] (1) In the embodiments of this application, the term "multiple" refers to two or more, and other quantifiers are similar.

[0033] (2) A power module refers to a module composed of power electronic devices combined according to certain functions. For example, the first power module and the second power module in this application are both modules composed of a signal processor and a power converter.

[0034] Currently, for devices requiring power conversion, to meet the needs of high-power output applications, most power conversion devices do not employ single-channel power conversion, such as... Figure 1As shown, a signal processor 101 and a multiplexer 102 (e.g., power converter) are mounted on the existing motherboard 100. Figure 1 The diagram shows power converters 102-1, ..., 102-n, where n is a positive integer. Connecting power converters 102-1, ..., 102-n in parallel increases the output power of the power conversion device. Signal processor 101 is connected to power converters 102-1, ..., 102-n, and all are soldered to the motherboard 100.

[0035] Typically, the power converters 102-1, ..., 102-n on the motherboard 100 are driven by multiple carrier signals generated by multiple timers in the signal processor 101. The multiple timers in the signal processor 101 are also prone to generating correlation signals. Therefore, the carrier signals allocated in the power converters 102-1, ..., 102-n can be adjusted according to the correlation signals.

[0036] However, when power converters 102-1, ..., 102-n are driven using the carrier signal allocated by the same signal processor 101, the associated signals generated by multiple timers in the same signal processor 101 can easily cause the driving process of some power converters to be forcibly changed, which in turn leads to lower device efficiency and higher power loss during the power conversion process. Figure 2 The diagram illustrates carrier signal 1, carrier signal 2, and carrier signal 2' after forced change, all assigned by signal processor 101. When signal processor 101 assigns carrier signal 1 to power converter A, it drives power converter A according to carrier signal 1. Similarly, when signal processor 101 assigns carrier signal 2 to power converter B, it drives power converter B according to carrier signal 2. If affected by associated signals generated by multiple timers within the same signal processor 101, the phase differences between the outputs of power converter A and power converter B are respectively... Figure 2 Points a, b, and c on carrier signal 1, then without changing carrier signal 1, carrier signal 2 follows... Figure 2 Points a, b, and c in the diagram are forcibly changed to [a new signal]. Figure 2 The carrier signal 2' after the forced change of the signal.

[0037] Furthermore, when the carrier signal 2' in the power converter B is adjusted again using the associated signals generated by multiple timers in the same signal processor 101, and the power converter B is driven by the adjusted carrier signal 2', the phase of the output result after the power converter B performs power conversion processing is prone to overshoot, resulting in a larger phase difference between the multiple output results of multiple power converters. Figure 3 A schematic diagram illustrating the phase difference change between power converter A and power converter B is shown. Figure 3 As shown, at time t1, based on the influence of the associated signals generated by multiple timers in the same signal processor 101, the phase difference between the outputs of power converter A and power converter B is C1; after the carrier signal in power converter B is adjusted again using the associated signals, the phase difference between the outputs of power converter A and power converter B at time t2 is C2 or C3.

[0038] It should be noted that Figure 1 The motherboard 100 is also equipped with auxiliary source 103, electromagnetic interference 104 (Electro Magnetic Interference, EMI) interface and other devices. The specific functions of each device will be described in detail later and will not be repeated here.

[0039] In view of the above, embodiments of this application provide a motherboard, a power conversion method, and an apparatus. To make the objectives, technical solutions, and advantages of this application clearer, the application will be described in further detail below with reference to the accompanying drawings.

[0040] Figure 4 This is a schematic diagram of a power conversion device provided in an embodiment of this application. Figure 4 As shown, the power conversion device includes: a controller 401 and at least two power modules 402 (e.g., Figure 4 The power modules shown are 402-1, ..., 402-n, where n is a positive integer.

[0041] Optionally, the controller 401 is soldered onto the motherboard 400, and at least two power modules 402 are connected to the motherboard 400 via pins. In practical applications, the number of power modules 402 connected to the motherboard 400 via pins can be adaptively adjusted according to the power value to be converted. For example, assuming that each power module 402 can convert 30W of power, and the power to be converted is 60W, then two power modules 402 need to be connected to the motherboard 400 via pins.

[0042] Each power module 402 includes a signal processor and a power converter. The signal processor and the power converter are connected, and the controller 401 is connected to the signal processors in power modules 402-1, ..., and in power modules 402-n.

[0043] In this embodiment, the controller 401 can control the signal processors in power modules 402-1, ..., and n to be in an operational state. The controller 401 communicates with the signal processors in each power module 402 via at least one of the following interfaces: Serial Peripheral Interface (SPI), General Purpose Input Output (GPIO), Inter-Integrated Circuit (I2C), and Controller Area Network (CAN). This is merely an example, and this application does not limit the specific communication method between the controller 401 and the signal processors in each power module 402.

[0044] In addition, the controller 401 can control the signal processor in power module 402-1, ..., and the signal processor in power module 402-n within a set frequency range (e.g., 20kHz to 500kHz), so that the signals generated by the signal processors in power module 402-1, ..., and the signal processors in power module 402-n have the same frequency but different phases.

[0045] Before communicating with the signal processors in power modules 402-1, ..., and 402-n, controller 401 can define the power module addresses corresponding to power modules 402-1, ..., and 402-n respectively. For example, the power module address corresponding to power module 402-1 can be pre-set to address 0, and the power module address corresponding to power module 402-n can be pre-set to address 1. Users or manufacturers can set the power module address corresponding to power module 402-1 as the master power module address, and set the power module address corresponding to each power module other than power module 402-1 as the slave power module address; that is, the power module corresponding to address 0 is set as the master power module, and the power module corresponding to address 1 is set as the slave power module.

[0046] After determining the master and slave power modules corresponding to power modules 402-1, ..., 402-n respectively, for example, using the first power module to represent the master power module and the second power module to represent the slave power module, if power module 402-1 is the master power module and power module 402-n is the slave power module as described above, then after controller 401 controls each power module 402 to start power conversion, the signal processor in power module 402-1 generates a first carrier signal, uses the first carrier signal to drive the field-effect transistors in the connected power converter, and sends the first carrier signal to the signal processor in power module 402-n.

[0047] After receiving the first carrier signal from the signal processor in power module 402-1, the signal processor in power module 402-n determines the period of the first carrier signal and determines the target phase difference based on the number of power modules 402. For example, when the number of power modules 402 is N (N is a positive integer), and the power converter in each power module 402 is a DC-DC power converter, the target phase difference is 360° / N. For instance, when N is 2, the target phase difference is 180°; when N is 3, the target phase difference is 120°. After determining the magnitude of the corresponding target phase difference based on the specific number of power modules 402, the carrier signal in the signal processor of power module 402-n can be accurately phase-locked using the target phase difference.

[0048] It should be noted that the calculation method for determining the target phase difference differs for different types of power converters in the power module 402. This application does not limit the specific calculation method for determining the target phase difference for different types of power converters in the power module 402.

[0049] In one embodiment, the signal processor in power module 402-n can also generate a third carrier signal (i.e., the original, unprocessed carrier signal). The signal processor in power module 402-n can, according to... Figure 5 The loop shown uses phase-locking of the third carrier signal based on the target phase difference to obtain the second carrier signal.

[0050] like Figure 5 As shown, the signal processor in power module 402-n may include a control loop 402-n-1 and a signal superposition module 402-n-2. The process by which the signal processor in power module 402-n performs phase-locking on the third carrier signal is as follows:

[0051] Control loop 402-n-1 can determine the initial reference phase based on the period of the first carrier signal and the number of power modules, then generate a reference signal based on the initial reference phase, and send the reference signal to signal superposition module 402-n-2. For example, if the period of the first carrier signal is represented by T, and the number of power modules is 2, then the initial reference phase conforms to T / 2.

[0052] The signal superposition module 402-n-2 superimposes the reference signal and the third carrier signal to obtain a superimposed signal. When the phase difference between the superimposed signal and the first carrier signal is not equal to the target phase difference, the current phase difference between the superimposed signal and the first carrier signal is fed back to the control loop 402-n-1. In the control loop 402-n-1, the reference phase is corrected according to the current phase difference between the superimposed signal and the first carrier signal, and a reference signal is generated again based on the corrected reference phase. For example, the difference between the initial reference phase and the current phase difference between the superimposed signal and the first carrier signal is used as the corrected reference phase. Then, the new reference signal is superimposed with the third carrier signal to obtain a new superimposed signal until the phase difference between the superimposed signal and the first carrier signal equals the target phase difference. The superimposed signal is then sent as the second carrier signal to the power converter in the power module 402-n. This completes the cyclic process of phase-locking the third carrier signal to obtain the second carrier signal based on the target phase difference. The phase difference between the second carrier signal and the first carrier signal is the target phase difference.

[0053] Figure 6 This diagram illustrates how the signal processor in power module 402-n adjusts the third carrier signal based on the first carrier signal from the signal processor in power module 402-1. The signal processor in power module 402-n first copies the period of the first carrier signal generated by the signal processor in power module 402-1 to obtain a fourth carrier signal, where the period of the fourth carrier signal is the same as the period of the first carrier signal. Then, the third carrier signal is adjusted based on the fourth carrier signal, and after phase-locking is completed as described above, the adjusted third carrier signal becomes the second carrier signal. Figure 7 The diagram shows a phase difference of 180° between the first carrier signal and the second carrier signal.

[0054] Furthermore, the power converter in power module 402-1 uses a first carrier signal to perform power conversion processing on the input first current or first voltage, and outputs the converted first current or converted first voltage. The power converter in power module 402-n uses a second carrier signal to perform power conversion processing on the input second current or second voltage, and outputs the converted second current or converted second voltage. The phase difference between the power output by the power converter in power module 402-n and the power output by the power converter in power module 402-1 is a fixed target phase difference, thereby avoiding the degradation of output ripple, thermal stress, and other performance indicators caused by dynamic changes in the phase difference.

[0055] Here, control loop 402-n-1 can be a proportional-integral loop, which is only an example and this application does not limit the specific control loop 402-n-1. The signal processors in controller 401, power module 402-1, ..., and power module 402-n can be digital signal processors (DSPs); the power converters in power module 402-1, ..., and power module 402-n can be DC-DC power converters. Among them, DC-DC power converters include various topologies, such as bidirectional forward converters, bidirectional flyback converters, bidirectional push-pull converters, H-bridge bidirectional converters, and bidirectional full-bridge (DAB) converters.

[0056] For power converters using DC-DC converters, energy transfer between different DC voltage or current levels can be achieved. For example, before device A is equipped with a DC-DC converter, its output DC voltage range is 24V to 44.4V; after equipping device A with a DC-DC converter, the output DC voltage range is 48V to 57V. Similarly, before device B is equipped with a DC-DC converter, connecting two devices B in parallel requires reducing the power on the load side; however, after equipping each device B with a DC-DC converter, connecting two devices B in parallel does not require reducing the power on the load side.

[0057] like Figure 4 As shown, an auxiliary power source 403, an EMI interface 404, etc., can also be soldered onto the motherboard 400. The auxiliary power source 403 can be connected to the controller 401, power modules 402-1, ..., power modules 402-n, and the EMI interface 404. After receiving the power conversion command, the EMI interface 404 controls the auxiliary power source 403 to start working, and then the auxiliary power source 403 can supply power to the controller 401, power modules 402-1, ..., power modules 402-n. Figure 4As shown, terminal A connects to EMI interface 404, and terminal B connects to the interfaces corresponding to the power converters in power modules 402-1, ..., and 402-n. When the power to be converted is input through terminal A, the converted power can be output through terminal B; conversely, when the power to be converted is input through terminal B, the converted power can be output through terminal A. In other words, terminals A and B can perform power conversion between each other. Here, the controller 401 can also communicate externally through a designated communication interface. Figure 1 Auxiliary source 103 and Figure 4 The auxiliary source 403 has the same function. Figure 1 EMI interface 104 and Figure 4 The EMI interface 404 in the middle has the same function.

[0058] This application provides a power conversion device. In this device, a first power module, a second power module, and a controller are included. Each power module consists of a signal processor and a corresponding power converter. The signal processor in the first power module sends a generated first carrier signal to the signal processor in the second power module. The signal processor in the second power module determines a second carrier signal using the period of the first carrier signal, thereby using the first carrier signal to drive the power converter in the first power module and the second carrier signal to drive the power converter in the second power module, improving the operating efficiency of the devices during power conversion and reducing power loss.

[0059] Furthermore, since power modules 402-1, ..., 402-n in this application are all connected to the motherboard 400 via pins, the power modules on the motherboard 400 are detachable. Different numbers of power modules can be installed to create motherboards with different functions, solving the problem in the prior art where, when power modules are integrated with the motherboard, different motherboards with different functions need to be designed individually, increasing costs, and requiring the entire motherboard to be repaired if a power module malfunctions. Simultaneously, the pin-connected connection of the power modules to the motherboard in this application solves the problem of excessive coupling between the power modules and other devices caused by the integrated connection of power modules and the motherboard in the prior art. By adding a signal processor to each power module, the high signal processor requirements caused by a single signal processor on the motherboard controlling multiple power conversions in the prior art are resolved.

[0060] Based on the above embodiments, regarding the application of power converters in lithium battery products... Figure 4The controller 401 in the diagram can be a Battery Management System (BMS), which communicates with the outside world via a CAN interface or an RS485 interface. The B end can use cell pack temperature sensors, cell heaters, etc., to input the power to be converted, while the A end can be a busbar, through which the converted power is output. Optionally, the power converter can also be used in inverter products.

[0061] Based on the above embodiments of the power conversion device, this application also provides a power conversion method, applied in the power conversion device, which can be performed by... Figure 4 The signal processor in the power module 402-n (i.e., the second power module) executes the commands. For example... Figure 8 As shown, the method provided in this application includes the following steps:

[0062] S801: The signal processor in the second power module receives the first carrier signal sent by the signal processor in the first power module and determines the period of the first carrier signal; wherein the first carrier signal is generated by the signal processor in the first power module.

[0063] S802: The signal processor in the second power module determines the second carrier signal according to the period of the first carrier signal, so that the power converter in the second power module can use the second carrier signal to perform power conversion processing on the input second current or second voltage, and output the converted second current or converted second voltage.

[0064] In one possible design, the signal processor in the second power module in step S802 determines the second carrier signal based on the period of the first carrier signal, including:

[0065] The signal processor in the second power module generates a third carrier signal. It then performs phase-locking on the third carrier signal based on the period of the first carrier signal and the target phase difference to obtain the second carrier signal. The target phase difference is determined based on the number of power modules.

[0066] In one possible design, in step S802, the signal processor in the second power module performs phase-locking on the third carrier signal based on the period of the first carrier signal and the target phase difference to obtain the second carrier signal, including:

[0067] The signal processor in the second power module determines the initial reference phase based on the period of the first carrier signal and the number of power modules; and generates a reference signal based on the reference phase.

[0068] The signal processor in the second power module superimposes the reference signal and the third carrier signal to obtain a superimposed signal; it determines whether the phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference; when the current phase difference between the superimposed signal and the first carrier signal is not equal to the target phase difference, it feeds back the current phase difference between the superimposed signal and the first carrier signal to the reference phase to correct the reference phase; and it continues to generate a reference signal based on the corrected reference phase.

[0069] When the phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference, the superimposed signal is used as the second carrier signal.

[0070] This application also provides a computer-readable storage medium storing computer instructions. When the computer instructions are executed by a signal processor in a second power module of a power conversion device, they can cause... Figure 8 The power conversion method shown is executed.

[0071] This application also provides a computer program product, including computer instructions, which, when executed by a signal processor in a second power module of a power conversion device, can cause... Figure 8 The power conversion method shown is executed.

[0072] In other words, various aspects of the power conversion method provided in this application can also be implemented as a program product, which includes program code. When the program code is run on a computer device or circuit product, the program code is used to cause the computer device to perform the steps in the power conversion method described above in this specification.

[0073] Furthermore, although the operations of the method of this application are described in a specific order in the accompanying drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0074] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0075] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0076] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0077] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0078] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A power conversion device, characterized in that, include: First power module, second power module, and controller; Each power module includes: a signal processor and a power converter, wherein the signal processor is connected to the power converter; and the controller is connected to the signal processor in each power module. The controller is used to: control the signal processor in each power module to be in a working state; The signal processor in the first power module is used to: generate a first carrier signal, drive a connected power converter based on the first carrier signal, and send the first carrier signal to the signal processor in the second power module. The power converter in the first power module is used to: perform power conversion processing on the input first current or first voltage using the first carrier signal, and output the converted first current or the converted first voltage. The signal processor in the second power module is configured to: receive the first carrier signal and determine the period of the first carrier signal; generate a third carrier signal; and perform phase-locking on the third carrier signal according to the period of the first carrier signal and a target phase difference to obtain a second carrier signal, wherein the target phase difference is determined according to the number of power modules; The power converter in the second power module is used to: perform power conversion processing on the input second current or second voltage using the second carrier signal, and output the converted second current or the converted second voltage.

2. The power conversion device as described in claim 1, characterized in that, The signal processor in the second power module includes: The control loop is used to: determine an initial reference phase based on the period of the first carrier signal and the number of power modules; generate a reference signal based on the reference phase; and send the reference signal to the signal superposition module. The signal superposition module is configured to: superimpose the reference signal and the third carrier signal to obtain a superimposed signal; determine whether the phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference; when the phase difference between the superimposed signal and the first carrier signal is not equal to the target phase difference, feed back the current phase difference between the superimposed signal and the first carrier signal to the control loop; when the phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference, send the superimposed signal as the second carrier signal to the power converter in the second power module. The control loop is further configured to: correct the reference phase based on the current phase difference between the superimposed signal received from the signal superimposition module and the first carrier signal; and continue to generate the reference signal based on the corrected reference phase.

3. The power conversion device as described in claim 1 or 2, characterized in that, The first power module is the master power module, and the second power module is the slave power module; The signal processor in the first power module is further used for: Before sending the first carrier signal to the signal processor in the second power module, the address of itself is determined to be the set main power module address.

4. The power conversion device as described in claim 1 or 2, characterized in that, The number of the first power module is one, and the number of the second power module is multiple.

5. The power conversion device as described in claim 3, characterized in that, The number of the first power module is one, and the number of the second power module is multiple.

6. The power conversion device as described in claim 1 or 2, characterized in that, The controller communicates with the signal processor in each power module through at least one of the following communication interfaces: Serial peripheral interface (SPI), general purpose input / output (GPIO) interface, bidirectional two-wire serial bus (I2C) interface, and controller area network (CAN) interface.

7. The power conversion device as described in claim 3, characterized in that, The controller communicates with the signal processor in each power module through at least one of the following communication interfaces: Serial peripheral interface (SPI), general purpose input / output (GPIO) interface, bidirectional two-wire serial bus (I2C) interface, and controller area network (CAN) interface.

8. The power conversion device as described in claim 4, characterized in that, The controller communicates with the signal processor in each power module through at least one of the following communication interfaces: Serial peripheral interface (SPI), general purpose input / output (GPIO) interface, bidirectional two-wire serial bus (I2C) interface, and controller area network (CAN) interface.

9. The power conversion device as described in claim 5, characterized in that, The controller communicates with the signal processor in each power module through at least one of the following communication interfaces: Serial peripheral interface (SPI), general purpose input / output (GPIO) interface, bidirectional two-wire serial bus (I2C) interface, and controller area network (CAN) interface.

10. A mother plate, characterized in that, Includes the power conversion device as described in any one of claims 1-9, wherein the controller in the power conversion device is soldered to the motherboard, and each power module is connected to the motherboard via pins.

11. A power conversion method, characterized in that, Applied to any one of the power conversion devices as described in claims 1-9, the method includes: The signal processor in the second power module receives a first carrier signal sent by the signal processor in the first power module and determines the period of the first carrier signal; wherein the first carrier signal is generated by the signal processor in the first power module. The signal processor in the second power module generates a third carrier signal, and performs phase-locking on the third carrier signal according to the period of the first carrier signal and the target phase difference to obtain a second carrier signal. This allows the power converter in the second power module to use the second carrier signal to perform power conversion processing on the input second current or second voltage, and output the converted second current or the converted second voltage. The target phase difference is determined according to the number of power modules.

12. The power conversion method as described in claim 11, characterized in that, The signal processor in the second power module performs phase-locking on the third carrier signal based on the period of the first carrier signal and the target phase difference to obtain the second carrier signal, including: The signal processor in the second power module determines an initial reference phase based on the period of the first carrier signal and the number of power modules; and generates a reference signal based on the reference phase. The signal processor in the second power module superimposes the reference signal and the third carrier signal to obtain a superimposed signal; determines whether the phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference; when the current phase difference between the superimposed signal and the first carrier signal is not equal to the target phase difference, feeds back the current phase difference between the superimposed signal and the first carrier signal to the reference phase to correct the reference phase; and continues to generate the reference signal based on the corrected reference phase. When the phase difference between the superimposed signal and the first carrier signal is equal to the target phase difference, the superimposed signal is used as the second carrier signal.

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