Light-emitting display device

Abstract

Provided is a light-emitting display device, which turns on a first transistor during a data period in which a data voltage is supplied from a data driver to a data line, the first transistor being included in a pixel driving unit and connected to the data line. The light-emitting display device includes: a light-emitting display panel including a pixel, the pixel including a first transistor connected to a gate line and a data line; a gate driver that supplies a gate signal to the first transistor; a data driver that supplies a data voltage to the data line; and a switch driver that connects the data line to the data driver or connects a sensing line to the data driver, wherein during a data period in which a data voltage is supplied from the data driver to the data line through the switch driver, the gate driver turns on the first transistor, and then turns off the first transistor.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of Korean Patent Application No. 10-2020-0178095, filed on Dec. 18, 2020, which is hereby incorporated by reference in its entirety. Technical Field

[0003] The present disclosure relates to a light emitting display device. Background Art

[0004] The light emitting display apparatus is a display apparatus that emits light by using a light emitting device.

[0005] Degradation of a driving transistor included in a pixel driving unit driving a light emitting device changes the intensity of light emitted from the light emitting device. To prevent such a problem, various compensation methods are used in light emitting display devices.

[0006] However, the data voltage supplied to the data line is offset by being coupled to the transistor included in the pixel driving unit and turned on to perform the compensation method. Therefore, the pixel driving unit is not supplied with a normal data voltage.

[0007] The compensation operation of the light emitting display device is performed by a lateral line unit of the light emitting display panel, and for example, by a unit of a pixel connected to a gate line provided in a lateral direction of the light emitting display panel.

[0008] Therefore, in the case where an image is displayed by a light-emitting display panel, when a normal data voltage is not supplied to a pixel driving unit through a compensation operation, defects such as widthwise belts may occur on transverse lines of the light-emitting display panel, and a color difference may occur in the displayed image. Summary of the invention

[0009] Accordingly, the present disclosure is directed to a light emitting display device that substantially obviates one or more problems due to limitations and disadvantages of the related art.

[0010] An aspect of the present disclosure is directed to providing a light emitting display device which turns on a transistor included in a pixel driving unit and connected to a data line during a data period in which a data voltage is supplied from a data driver to the data line.

[0011] Additional advantages and features of the present disclosure will be set forth in part in the description that follows, and will become apparent in part to one of ordinary skill in the art upon examination of the following, or may be learned from practice of the present disclosure. The objects and other advantages of the present disclosure may be realized and obtained through the structures specifically indicated in the written description and claims thereof, as well as in the accompanying drawings.

[0012] To achieve these and other advantages, and in accordance with the purposes of the present disclosure, as embodied and broadly described herein, a light-emitting display device is provided, comprising: a light-emitting display panel including a pixel, the pixel including a first transistor connected to a gate line and a data line; a gate driver that supplies a gate signal to the first transistor; a data driver that supplies a data voltage to the data line; and a switch driver that connects the data line to the data driver or connects a sensing line included in the pixel to the data driver, wherein, during a data period in which the data voltage is supplied from the data driver to the data line by the switch driver, the gate driver turns on the first transistor, and then turns off the first transistor.

[0013] It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this disclosure, illustrate one or more aspects of the disclosure and together with the description serve to explain the principles of the disclosure.

[0015] In the attached picture:

[0016] Figure 1 is an exemplary diagram showing a configuration of a light-emitting display device according to an aspect of the present disclosure;

[0017] Figure 2 is an exemplary diagram showing a structure of a pixel applied to a light-emitting display device according to an aspect of the present disclosure;

[0018] Figure 3 is an exemplary diagram showing a configuration of a gate driver applied to a light emitting display device according to an aspect of the present disclosure;

[0019] Figure 4 is an exemplary diagram showing a configuration of a controller applied to a light-emitting display device according to an aspect of the present disclosure;

[0020] Figure 5is an exemplary diagram showing a structure of each of a data driver and a switch driver applied to a light emitting display device according to an aspect of the present disclosure;

[0021] FIG. 6A to FIG. 6D is an exemplary diagram for describing an internal compensation method applied to a light-emitting display device according to an aspect of the present disclosure; and

[0022] Figure 7 is a waveform diagram illustrating a relationship between a first control signal and a gate signal applied to a light emitting display device according to an aspect of the present disclosure. DETAILED DESCRIPTION

[0023] Reference will now be made in detail to exemplary aspects of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numerals are used throughout the drawings to refer to the same or like parts.

[0024] The advantages and features of the present disclosure and methods for implementing the same will be illustrated by the aspects described below with reference to the accompanying drawings. However, the present disclosure may be embodied in different forms and should not be construed as being limited to the aspects set forth herein. On the contrary, these aspects are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present disclosure to those skilled in the art. In addition, the present disclosure is limited only by the scope of the claims.

[0025] The shapes, sizes, ratios, angles, and numbers disclosed in the drawings for describing aspects of the present disclosure are merely examples, and therefore, the present disclosure is not limited to the details shown. The same reference numerals refer to the same elements throughout. In the following description, when a detailed description of a related known function or configuration is determined to be unnecessary to obscure the main points of the present disclosure, the detailed description will be omitted. In the case of using "comprising", "having", and "including" described in this specification, another part may be added unless "only to" is used. Unless otherwise indicated, a term in the singular may include a plural form.

[0026] In interpreting an element, although not explicitly described, the element is interpreted as including an error range.

[0027] When describing a positional relationship, for example, when the positional relationship between two parts is described as "on," "over," "under," and "immediately," one or more other parts may be arranged between the two parts unless 'just' or 'directly' is used.

[0028] When describing a time relationship, for example, when a time sequence is described as "after," "after," "next," and "before," discontinuous cases may be included unless "just" or "directly" is used.

[0029] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element without departing from the scope of the present disclosure.

[0030] When describing the elements of the present disclosure, terms such as first, second, A, B, (a), (b) etc. may be used. These terms are only used to distinguish the corresponding elements from other elements, and the corresponding elements are not limited by these terms in terms of their essence, order or priority. It will be understood that when an element or layer is referred to as "on" another element or layer or "connected to" another element or layer, it may be directly on another element or layer, or directly connected to another element or layer, or there may be an intermediate element or layer. In addition, it should be understood that when an element is arranged on another element or under another element, this may represent the situation where the elements are arranged to directly contact each other, but may also represent that the elements are arranged to not directly contact each other.

[0031] The term "at least one" should be understood to include any one and all combinations of one or more of the associated listed elements. For example, the meaning of "at least one of a first element, a second element, and a third element" means the combination of all elements proposed from two or more of the first element, the second element, and the third element, as well as the first element, the second element, or the third element.

[0032] The features of the various embodiments of the present disclosure may be coupled or combined with each other in part or in whole, and may interoperate with each other and be driven technically in various ways, as those skilled in the art will fully understand. The various aspects of the present disclosure may be performed independently of each other, or may be performed together in a mutually dependent relationship.

[0033] Hereinafter, various aspects of the present disclosure will be described in detail with reference to the accompanying drawings.

[0034] Figure 1 is an exemplary diagram illustrating a configuration of a light emitting display device according to an aspect of the present disclosure. Figure 2 is an exemplary diagram illustrating a structure of a pixel applied to a light-emitting display device according to an aspect of the present disclosure. Figure 3 is an exemplary diagram illustrating a configuration of a gate driver applied to a light emitting display device according to an aspect of the present disclosure. Figure 4 is an exemplary diagram illustrating a configuration of a controller applied to a light-emitting display device according to an aspect of the present disclosure.

[0035] The light-emitting display device according to one aspect of the present disclosure may configure various electronic devices, such as smart phones, tablet personal computers (PCs), televisions (TVs), and monitors.

[0036] like Figures 1 to 4 As shown in , a light-emitting display device according to an aspect of the present disclosure may include: a light-emitting display panel 100 including a pixel 101 including a first transistor Tsw1 connected to a gate line GL and a data line DL; a gate driver 200 supplying a gate signal VG to the first transistor Tsw1; a data driver 300 supplying a data voltage Vdata to the data line DL; a switch driver 500 connecting the data line DL to the data driver 300 or connecting a sensing line SL included in the pixel 101 to the data driver 300; and a controller 400. Specifically, the gate driver 200 may turn on or off the first transistor Tsw1 during a data period in which the data voltage Vdata is supplied from the data driver 300 to the data line DL through the switch driver 500.

[0037] First, the light emitting display panel 100 may include a display area 102 and a non-display area 103. A plurality of gate lines GL1 to GLg, a plurality of data lines DL1 to DLd, a plurality of sensing lines SL1 to SLd, and a plurality of pixels 101 may be disposed in the display area 102.

[0038] For example, Figure 2 As shown in , the pixel 101 included in the light-emitting display panel 100 may include a light-emitting device ED, first to fifth transistors Tsw1 to Tsw5, a capacitor Cst, and a driving transistor Tdr. That is, the pixel 101 may include a pixel driving unit PDU and a light-emitting unit, and the pixel driving unit PDU may include first to fifth transistors Tsw1 to Tsw5, a capacitor Cst, and a driving transistor Tdr. The light-emitting unit may include a light-emitting device ED.

[0039] The light emitting device ED may include one of an organic light emitting layer, an inorganic light emitting layer, and a quantum dot light emitting layer, or may include a stacked or combined structure of an organic light emitting layer (or an inorganic light emitting layer) and a quantum dot light emitting layer.

[0040] Furthermore, the light emitting device ED may emit light corresponding to one of various colors such as red, green, and blue, or may emit white light.

[0041] The first transistor Tsw1 configuring the pixel driving unit PDU can be turned on or off based on the gate signal VG supplied through the gate line GL, and when the first transistor Tsw1 is turned on, the data voltage Vdata supplied through the data line DL can be supplied to the driving transistor Tdr. The first voltage VDD can be supplied to the driving transistor Tdr and the light-emitting device ED through the first voltage supply line PLA, and the second voltage VSS can be supplied to the light-emitting device ED through the second voltage supply line PLB. The second transistor Tsw2 and the fifth transistor Tsw5 can be turned on or off based on the sensing control signal VS supplied through the sensing control line SCL. The third transistor Tsw3 and the fourth transistor Tsw4 can be turned on or off based on the emission signal EM supplied through the emission line EL. The reference voltage Vref can be supplied to the third transistor Tsw3 and the fifth transistor Tsw5 through the sensing line SL, and the sensing signal associated with the characteristic change of the light-emitting device ED can be transmitted to the sensing line SL through the fifth transistor Tsw5.

[0042] The pixel 101 applied to the present disclosure may be Figure 2 The structure shown in is formed, but the present disclosure is not limited thereto. Figure 2 A light-emitting display device having a plurality of pixels 101 of the structure shown in FIG. 1 will be described as an example of the present disclosure. Figure 2 The structure of the pixel 101 shown in FIG.

[0043] Each of the pixels 101 may include a light emitting device ED and a pixel driving unit PDU.

[0044] The pixel driving unit PDU may include: a first transistor Tsw1, which includes a first terminal connected to the data line DL and a gate connected to the gate line GL supplying a gate signal VG; a driving transistor Tdr, which includes a first terminal connected to the first voltage supply line PLA; a capacitor Cst, which is connected between the second terminal of the first transistor Tsw1 and the gate of the driving transistor Tdr; a second transistor Tsw2, which includes a first terminal connected to the gate of the driving transistor Tdr, a second terminal connected to the second terminal of the driving transistor Tdr, and a gate connected to the sensing control line SCL; a third transistor Tsw3, which includes a first terminal connected to the second terminal of the first transistor Tsw1, a second terminal connected to the sensing line SL, and a gate connected to the emission line EL; a fourth transistor Tsw4, which includes a first terminal connected to the second terminal of the driving transistor Tdr, a second terminal connected to the first terminal of the light emitting device ED, and a gate connected to the emission line EL; and a fifth transistor Tsw5, which includes a first terminal connected to the first terminal of the light emitting device ED, a gate connected to the sensing control line SCL, and a second terminal connected to the sensing line SL.

[0045] In this case, in the light-emitting display panel 100 , a plurality of pixel regions including the pixels 101 may be formed, and a plurality of signal lines for supplying various signals to the pixel driving unit PDU included in the pixels 101 may be formed.

[0046] For example, in the Figure 2 In the light-emitting display panel of the pixel 101 shown in , the signal lines may include a gate line GL, a data line DL, an emission line EL, a sensing control line SCL, a first voltage supply line PLA, a second voltage supply line PLB, and a sensing line SL.

[0047] In this case, the gate line GL and the data line DL may be disposed in different directions, and the sensing line SL may be disposed in a first direction parallel to the data line DL and may be connected to the fifth transistor Tsw5 of the pixel disposed in the first direction.

[0048] For example, Figure 1 As shown in FIG, in the case where the data lines DL and the sensing lines SL are arranged in a first direction (i.e., a longitudinal direction) of the light-emitting display panel 100, the gate lines GL may be in a second direction (i.e., a transverse direction) of the light-emitting display panel 100. The first direction may be perpendicular to the second direction, but is not limited thereto, and various angles may be formed between the first direction and the second direction.

[0049] To provide additional description, the light-emitting display panel 100 may include: a plurality of pixels 101; a plurality of gate lines GL1 to GLg transmitting a plurality of gate signals VG to the pixels 101; a plurality of data lines DL1 to DLd transmitting data voltages to the pixels 101; and a plurality of sensing lines SL1 to SLd connected to a plurality of light-emitting devices ED respectively included in the pixels 101. In this case, each of the pixels 101 may include: a light-emitting device ED; a fifth transistor Tsw5 including a first terminal connected to a first terminal of the light-emitting device ED, a gate connected to a sensing control line SCL, and a second terminal connected to a sensing line SL.

[0050] The data driver 300 may be disposed on a chip-on-film (COF) attached to the light-emitting display panel 100, and may be connected to a main substrate including the controller 400. In this case, the COF may include a plurality of wires electrically connecting the controller 400, the data driver 300, and the light-emitting display panel 100, and to this end, the wires may electrically connect the main substrate to a plurality of pads included in the light-emitting display panel 100. The main substrate may be electrically connected to an external substrate on which an external system is mounted.

[0051] The data driver 300 may be directly mounted on the light-emitting display panel 100 and may then be electrically connected to the main substrate.

[0052] However, the data driver 300 may be implemented as one integrated circuit (IC) together with the controller 400 , and the IC may be provided on a COF or may be directly mounted on the light-emitting display panel 100 .

[0053] The data driver 300 may receive a sensing signal associated with a characteristic change of the light emitting device ED included in the light emitting display panel 100 from the light emitting display panel 100 , and may transmit the sensing signal to the controller 400 .

[0054] The gate driver 200 may be configured as an IC and may be mounted in the non-display area 103, or may be directly embedded in the non-display area 103 by using a gate in panel (GIP) type. In the case of using the GIP type, a plurality of transistors configuring the gate driver 200 may be provided in the non-display area 103 by the same process as the transistors included in each of the pixels 101 in the display area 102.

[0055] When a gate pulse generated by the gate driver 200 is supplied to the gate of the first transistor Tsw1 included in the pixel 101, the first transistor Tsw1 may be turned on. When a gate-off signal is supplied to the first transistor Tsw1, the first transistor Tsw1 may be turned off. The gate signal VG supplied through the gate line GL may include a gate pulse and a gate-off signal.

[0056] like Figure 3 As shown in , the gate driver 200 may include a plurality of stages 201 that supply a plurality of gate pulses GP1 to GPg to gate lines GL1 to GLg connected to the pixels 101 .

[0057] In this case, each of the stages 201 may generate a gate signal VG supplied to the gate lines GL1 to GLg, and further, as shown in FIG. Figure 2 As shown in , various signals (eg, a sensing control signal VS and an emission signal EM) may also be generated.

[0058] For example, each of the stages 201 may generate all of the gate signal VG, the sensing control signal VS, and the emission signal EM. The gate signal VG may be sequentially supplied to the gate lines GL1 to GLg, the sensing control signal VS may be sequentially supplied to the sensing control line SCL, and the emission signal EM may be sequentially supplied to the emission line EL.

[0059] However, the stages 201 for generating the gate signal VG, the sensing control signal VS, and the emission signal EM may be independently configured. That is, one stage 201 may generate at least one of the gate signal VG, the sensing control signal VS, and the emission signal EM.

[0060] That is, the gate signal VG, the sensing control signal VS, and the emission signal EM supplied to one pixel 101 may be generated by one stage 201 , or may be generated by at least two stages 201 .

[0061] Subsequently, the power supply 600 may generate voltages for generating a gate signal VG, a sensing control signal VS, an emission signal EM, a data voltage Vdata, and a reference voltage Vref, and may supply the generated voltages to the gate driver 200 and the data driver 300 .

[0062] Reference Figure 4 , the controller 400 may include: a data aligner 430, which realigns a plurality of video data Ri, Gi, and Bi transmitted from an external system by using a timing synchronization signal TSS transmitted from the external system to supply a plurality of realigned image data Data to the data driver 300; a control signal generator 420, which generates a gate control signal GCS and a data control signal DCS by using the timing synchronization signal TSS; an input unit 410, which receives the timing synchronization signal TSS and the plurality of video data Ri, Gi, and Bi transmitted from the external system, and transmits the timing synchronization signal TSS and the plurality of video data Ri, Gi, and Bi to the data aligner 430 and the control signal generator 420; and an output unit 440, which outputs the plurality of image data Data generated by the data aligner 430 and the control signals GCS and DCS generated by the control signal generator 420 to the data driver 300 or the gate driver 200.

[0063] The controller 400 may perform a function of storing the sensing data Sdata transmitted from the data driver 300, and to this end, the controller 400 may include a storage unit 450. However, the storage unit 450 may be provided as an independent element in the light emitting display device.

[0064] The control signal generator 420 may also generate a control signal for controlling the switch driver 500 (hereinafter referred to as the switch driver control signal).

[0065] The external system can perform the functions of driving the controller 400 and the electronic device. That is, when the electronic device is a smart phone, the external system can receive various sound information, image information, and text information through a wireless communication network, and can transmit the received image information to the controller 400. The image information can include a plurality of input video information Ri, Gi, and Bi.

[0066] The switch driver 500 may connect the data line DL or the sensing line SL to the data driver 300 based on a switch driver control signal transmitted from the controller 400 .

[0067] The switch driver 500 may be included in the data driver 300 , or may be provided independently from the data driver 300 .

[0068] like Figure 1 As shown in , when the switch driver 500 is an independent element, the switch driver 500 can be disposed in the non-display area 103, specifically, in the area in which the data driver 300 is disposed. In the following description, a light-emitting display device including an independently disposed switch driver 500 will be described as an example of the present disclosure.

[0069] The following will refer to Figure 5 The detailed configuration and function of the switch driver 500 are described.

[0070] Figure 5 is an exemplary diagram illustrating a structure of each of a data driver and a switch driver applied to a light emitting display device according to an aspect of the present disclosure.

[0071] In a display period in which internal compensation is performed on the driving transistor Tdr and an image is displayed, the data driver 300 may supply a data voltage to the data line DL included in the light-emitting display panel 100. In addition, when the light-emitting display device is turned on or off, the data driver 300 may perform a function of sensing a characteristic change of the light-emitting device ED. In the following description, when the light-emitting display device is turned on or off, a period in which the characteristics of the light-emitting device are sensed may be referred to as a light-emitting device sensing period.

[0072] That is, in the display period, the data driver 300 may supply the data voltage Vdata for displaying an image to the pixel driving unit PDU based on the timing for internal compensation.

[0073] In addition, in the light emitting device sensing period, the data driver 300 may convert a sensing signal transmitted through the sensing line SL included in the light emitting display panel 100 into sensing data Sdata, and the sensing data Sdata may be transmitted to the controller 400. In addition, the switch driver 500 may connect the data line DL or the sensing line SL to the data driver 300 based on a switch driver control signal transmitted from the controller 400.

[0074] To perform the above functions, the data driver 300 and the switch driver 500 may be configured as follows. Figure 5 Configure as shown in .

[0075] First, the data driver 300 may include: a data voltage generator 320, which generates a data voltage Vdata to be transmitted to the data line DL; a reference voltage transmitter 310, which transmits the reference voltage Vref to the sensing line SL; a converter 330, which converts a sensing signal transmitted through the sensing line SL into sensing data Sdata and outputs the sensing data Sdata to the controller 400; and a switching unit 340, which connects the switch driver 500 to one of the data voltage generator 320, the reference voltage transmitter 310 and the converter 330.

[0076] The reference voltage transmitter 310 may directly generate and output the reference voltage Vref by using the power supplied from the power source, or may output the reference voltage Vref supplied from the power source. Therefore, the reference voltage transmitter 310 and the first switch 341 connected to the reference voltage transmitter 310 may be configured independently of the data driver 300. For example, the reference voltage transmitter 310 and the first switch 341 may be included in the switch driver 500. However, hereinafter, for ease of description, the data driver 300 including the reference voltage transmitter 310 and the first switch 341 will be described as an example of the present disclosure.

[0077] The data voltage generator 320 may convert the digital image data DATA transmitted from the controller 400 into an analog data voltage Vdata and may output the analog data voltage Vdata. The data voltage generator 320 may be a data driver generally used to convert the image data DATA into the data voltage Vdata, and thus a detailed description of the data voltage generator 320 is omitted.

[0078] The converter 330 may convert the sensing signal transmitted through the sensing line SL into sensing data Sdata, and may output the sensing data Sdata to the controller 400. To this end, the converter 330 may include an analog-to-digital converter (ADC) that converts the analog sensing signal into digital sensing data Sdata.

[0079] In order to accurately control the operation timing of each of the converter 330, the data voltage generator 320 and the reference voltage transmitter 310, a switch may be included in each of the converter 330, the data voltage generator 320 and the reference voltage transmitter 310, and the plurality of switches included in the converter 330, the data voltage generator 320 and the reference voltage transmitter 310 may be controlled by the data control signal DCS transmitted from the controller 400.

[0080] The data control signal DCS may include various control signals for controlling the operation timing of each of the reference voltage transmitter 310 , the data voltage generator 320 , and the converter 330 .

[0081] The switching unit 340 may connect the switch driver 500 to one of the reference voltage transmitter 310 , the data voltage generator 320 , and the converter 330 .

[0082] To this end, the switch unit 340 may be connected to the data voltage generator 320 and the converter 330 through a connection line CL1 , and may be connected to the reference voltage transmitter 310 through a sensing connection line CL2 .

[0083] The switch driver 500 may be connected to one of the reference voltage transmitter 310 , the data voltage generator 320 , and the converter 330 based on the first, second, and third switching control signals SS1 , SS2 , and SS3 transmitted from the controller 400 .

[0084] The first to third switching control signals SS1 to SS3 may be included in the data control signal DCS generated by the controller 400 .

[0085] The switch unit 340 may include a first switch 341 , a second switch 342 , and a third switch 343 .

[0086] The first switch control signal SS1 can control the first switch 341 connected between the reference voltage transmitter 310 and the sensing connection line CL2, the second switch control signal SS2 can control the second switch 342 connected between the data voltage generator 320 and the connection line CL1, and the third switch control signal SS3 can control the third switch 343 connected between the converter 330 and the connection line CL1.

[0087] Each of the first to third switches 341 to 343 may include a transistor that is turned on or off by the first to third switch control signals SS1 to SS3 .

[0088] Next, the switch driver 500 may include a first switch unit 510 connecting the data line DL to the data driver 300 , and a MUX switch unit 520 connecting the sensing line SL to the data driver 300 .

[0089] That is, the first switch unit 510 may be connected between the data line DL and the connection line CL1 , and the MUX switch unit 520 may be connected between the sensing line SL and the connection line CL1 . The sensing line SL may be connected to the first switch 341 .

[0090] When the data line DL is connected to the connection line CL1 through the first switch unit 510 , the sensing line SL is not connected to the connection line CL1 through the MUX switch unit 520 .

[0091] like Figure 5 As shown in , the first switch unit 510 may include a transistor including a first terminal connected to the connection line CL1, a second terminal connected to the data line DL, and a gate connected to the first signal line 511. The first control signal DMUX1 may be supplied to the first signal line 511. The second control signal DMUX2 supplied to the second signal line 511a may be supplied to the second switch unit 510a. The second switch unit 510a may be connected to another pixel 101a instead of the pixel 101 connected to the first switch unit 510. That is, the first switch unit 510 and the second switch unit 510a may be connected to different pixels 101 and 101a.

[0092] like Figure 5 As shown in , the MUX switch unit 520 may include a transistor including a first terminal connected to the connection line CL1, a second terminal connected to the sensing line SL, and a gate connected to the MUX signal line 521. The MUX control signal SMUX may be supplied to the MUX signal line 521.

[0093] The switch driver control signal may include a first control signal DMUX1 , a second control signal DMUX2 , and a MUX control signal SMUX.

[0094] As described above, the switch driver control signal may be generated by the control signal generator 420 of the controller 400 .

[0095] In order to prevent or at least reduce the occurrence of static electricity, one side of the capacitor can be connected to the data line DL, and the other side of the capacitor can be connected to the line supplying the second voltage VSS. In addition, in order to prevent or at least reduce the occurrence of static electricity, one side of the capacitor can be connected to the sensing line SL, and the other side of the capacitor can be connected to the line supplying the second voltage VSS.

[0096] As described above, the light emitting display device according to the present disclosure may display an image by using internal compensation in a display period, and further, may sense the characteristics of the light emitting device in a light emitting device sensing period.

[0097] According to the present disclosure, the first transistor Tsw1 may be turned on during a data period in which the data voltage Vdata is supplied from the data driver 300 to the data line DL. That is, the features of the present disclosure may be performed in a display period.

[0098] Therefore, hereinafter, the features of the present disclosure performed in the light emitting device sensing period will be briefly described, and reference will be made to Figures 1 to 7 Features of the present disclosure performed in the display period are described in detail.

[0099] A method of sensing the characteristics of a light emitting device in a light emitting device sensing period will be briefly described below.

[0100] In the charging period of the sensing period, charges may be charged into the first terminal of the light emitting device ED using the sensing driving voltage applied to the first terminal of the light emitting device ED through the sensing line SL and the fifth transistor Tsw5. That is, in the charging period, charges may be charged into the light emitting device ED using the sensing driving voltage applied to the light emitting device ED through the sensing line SL.

[0101] In the sensing period of the light emitting device sensing period, the charge charged in the light emitting device ED may be discharged. The converter 330 may measure the amount of the discharged charge, convert the measured signal into the sensing data Sdata, and transmit the sensing data Sdata to the controller 400. The controller 400 may calculate the amount of characteristic change of the light emitting device ED by using the sensing data Sdata. Subsequently, when the display period starts, the controller 400 may supply the input video data as the image data by using the calculated amount of characteristic change of the light emitting device ED, or may change the level of the first voltage VDD or the reference voltage Vref.

[0102] FIG. 6A to FIG. 6D is an exemplary diagram for describing an internal compensation method applied to a light-emitting display device according to an aspect of the present disclosure.

[0103] In the display period of displaying an image, the light emitting display device according to one aspect of the present disclosure may perform internal compensation. When performing internal compensation, the current supplied to the light emitting device ED may not be affected by the characteristics of the driving transistor Tdr (eg, the threshold voltage of the driving transistor Tdr).

[0104] That is, when the driving transistor Tdr degrades, the threshold voltage of the driving transistor Tdr may vary and thus may not accurately represent the brightness corresponding to the image data Data. To prevent or at least reduce such a problem, various compensation methods may be performed, and the internal compensation method may be one of the various compensation methods.

[0105] In the light emitting display device performing the internal compensation method, regardless of the change in the threshold voltage of the driving transistor Tdr, the level of current supplied to the light emitting device ED can be changed based on the image data Data. Therefore, the brightness corresponding to the image data Data can be accurately represented.

[0106] While performing the internal compensation method, the data voltage Vdata supplied to the data line DL may not be supplied to the driving transistor Tdr when the first transistor Tsw1 is turned off, and the data voltage Vdata supplied to the data line DL may be supplied to the driving transistor Tdr when the first transistor Tsw1 is turned on.

[0107] In this case, when the first transistor Tsw1 is turned on, the data voltage Vdata may be changed by coupling to the first transistor Tsw1. When the data voltage Vdata is changed by coupling to the first transistor Tsw1, the data voltage Vdata output from the data driver 300 may be different from the data voltage supplied to the driving transistor Tdr, and thus a transverse band defect and a color sense difference may occur in the light-emitting display panel. The present disclosure may be used to prevent or at least reduce the occurrence of the coupling phenomenon.

[0108] As noted above, features of the present disclosure may be associated with a process for performing internal compensation.

[0109] Therefore, in the following, reference will be made to FIG. 6A to FIG. 6D An internal compensation method applied to the present disclosure is described.

[0110] First, if Fig. 6A As shown in , when the initialization period starts, the first transistor Tsw1 may be turned off, and the second to fifth transistors Tsw2 to Tsw5 may be turned on.

[0111] In this case, because the first transistor Tsw1 is turned off, the data voltage Vdata supplied to the data line DL may not affect the first node N1.

[0112] The reference voltage Vref supplied to the sensing line SL through the first switching unit 341 may be supplied to the first node N1 through the third transistor Tsw3. Therefore, the voltage of the first node N1 between the first transistor Tsw1 and the capacitor Cst (hereinafter referred to as the first node voltage) may be the reference voltage Vref transmitted through the sensing line SL and the third transistor Tsw3. That is, the first node N1 may be initialized by the reference voltage Vref.

[0113] The gate of the driving transistor Tdr may also be initialized by the reference voltage Vref supplied through the fifth transistor Tsw5, the fourth transistor Tsw4, and the second transistor Tsw2. In addition, the first terminal of the light emitting device ED may be initialized by the reference voltage Vref transmitted through the fifth transistor Tsw5.

[0114] Then, if Figure 6BAs shown in , when the sampling period starts, the first transistor Tsw1 , the second transistor Tsw2 , the fifth transistor Tsw5 , and the driving transistor Tdr may be turned on, and the third transistor Tsw3 and the fourth transistor Tsw4 may be turned off.

[0115] In this case, the data voltage Vdata supplied to the data line DL may be applied to the first node N1 through the turned-on first transistor Tsw1. Therefore, the first node voltage may be the data voltage Vdata.

[0116] Furthermore, a voltage at the gate of the driving transistor Tdr (hereinafter referred to as a gate voltage) may be a difference voltage (=VDD-|Vth|) between an absolute value of a threshold voltage Vth of the driving transistor Tdr and a first voltage VDD applied through the driving transistor Tdr.

[0117] Then, if Figure 6C As shown in , when the holding period starts, the first to fifth transistors Tsw1 to Tsw5 may be turned off.

[0118] In this case, the first node voltage and the gate voltage of the driving transistor may be maintained as the first node voltage and the gate voltage of the driving transistor in the sampling period.

[0119] That is, the gate voltage of the driving transistor Tdr may be maintained as a difference voltage (=VDD-|Vth|) between the absolute value of the threshold voltage Vth of the driving transistor Tdr and the first voltage VDD.

[0120] Finally, if Fig.6D As shown in , when the emission period starts, the third transistor Tsw3, the fourth transistor Tsw4, and the driving transistor may be turned on, and the first transistor Tsw1, the second transistor Tsw2, and the fifth transistor Tsw5 may be turned off.

[0121] Therefore, the light emitting device ED may emit light using current supplied through the driving transistor Tdr and the fourth transistor Tsw4.

[0122] In this case, the reference voltage Vref supplied through the third transistor Tsw3 may be applied to the first node N1. Therefore, the first node voltage may be the reference voltage Vref. That is, the first node voltage may be changed from the data voltage Vdata to the reference voltage Vref in the sampling period and the holding period.

[0123] Therefore, the gate voltage of the driving transistor Tdr may be a value obtained by subtracting a difference voltage (=Vdata-Vref) between the data voltage Vdata and the reference voltage Vref from a difference voltage (=VDD-|Vth|) between the absolute value of the threshold voltage Vth of the driving transistor Tdr and the first voltage VDD.

[0124] In the emission period, the level of current flowing in the driving transistor Tdr may be proportional to the square of a difference voltage VGS between a source voltage and a gate voltage of the driving transistor Tdr and a threshold voltage Vth of the driving transistor Tdr.

[0125] In the light-emitting display device according to the contents of the present disclosure, in the emission period, the gate voltage of the driving transistor Tdr can be a value obtained by subtracting the difference voltage (=Vdata-Vref) between the data voltage Vdata and the reference voltage Vref from the difference voltage (=VDD-|Vth|) between the absolute value of the threshold voltage Vth of the driving transistor Tdr and the first voltage VDD, and the source voltage of the driving transistor Tdr can be the first voltage VDD, and therefore, as expressed in the following formula 1, the level of current flowing in the driving transistor Tdr can be proportional to the square of the difference voltage between the data voltage Vdata and the reference voltage Vref.

[0126] [Formula 1]

[0127] |=k(Vdata-Vref) 2

[0128] That is, in the light-emitting display device using the internal compensation method according to the present disclosure, as represented in Formula 1, the current I supplied to the light-emitting device ED through the driving transistor Tdr may vary only based on the data voltage Vdata supplied through the data line DL and the reference voltage Vref supplied through the sensing line SL, and may not vary based on the threshold voltage Vth of the driving transistor Tdr. In this case, k indicates a proportional constant determined by the electron mobility, parasitic capacitance, and channel capacity of the driving transistor Tdr.

[0129] Therefore, even when the threshold voltage of the driving transistor Tdr changes due to degradation of the driving transistor Tdr, the brightness of light emitted from the light emitting device ED may change based only on the data voltage Vdata. Therefore, the light emitting display device according to the present disclosure may operate continuously and stably.

[0130] Figure 7 is a waveform diagram illustrating a relationship between a first control signal and a gate signal applied to a light emitting display device according to an aspect of the present disclosure.

[0131] As described above, features of the present disclosure may be associated with a process for performing internal compensation. FIG. 6A to FIG. 6D Therefore, in the following, reference will be made to the internal compensation method. Figures 1 to 7 Describes features of the disclosure.

[0132] During a data period X when the data voltage Vdata is supplied to the data line DL, the gate driver 200 may supply a gate pulse GP to turn on the first transistor Tsw1 to the gate of the first transistor Tsw1 , and may then supply a gate-off signal Goff to turn off the first transistor Tsw1 .

[0133] That is, during the data period X when the first switching unit 510 of the switch driver 500 is turned on and thus supplies the data voltage Vdata to the data line DL, the gate driver 200 can supply a gate pulse GP to the gate of the first transistor Tsw1 to turn on the first transistor Tsw1, and can then supply a gate-off signal Goff to turn off the first transistor Tsw1.

[0134] to this end, Figure 7 The signals shown in may be supplied to the switch driver 500 and the pixel driving unit PDU included in the pixel 101 .

[0135] First, the data driver 300 may generate and output the data voltage Vdata from before the start of the initialization period A. The data driver 300 may output the data voltage Vdata during one horizontal period 1H.

[0136] Before the initialization period A starts, the first control signal DMUX1 , the gate signal VG, and the sensing control signal VS may have a high level, and the emission signal EM may have a low level.

[0137] Therefore, before the initialization period A starts, the first switching unit 510 , the first transistor Tsw1 , the second transistor Tsw2 , and the fifth transistor Tsw5 may be turned off, and the third transistor Tsw3 and the fourth transistor Tsw4 may be turned on.

[0138] In this case, the second control signal DMUX2 having a low level may be supplied to the second switching unit 510 a connected to another pixel 101 a .

[0139] The data driver 300 may output the data voltage Vdata to the connection line CL1 before the initialization period A starts. However, since the first switching unit 510 is turned off, the data voltage Vdata may not be supplied to the data line DL.

[0140] Subsequently, when the first setting period T1 elapses after the initialization period A starts, the first switch unit 510 may be turned on. To this end, the first control signal DMUX1 having a low level may be supplied to the first switch unit 510, and thus, the first switch unit 510 may be turned on. The first setting period T1 may be included in the initialization period A.

[0141] When the first switching unit 510 is turned on, the data voltage Vdata supplied from the data driver 300 to the connection line CL1 may be supplied to the data line DL through the first switching unit 510 .

[0142] However, since the gate-off signal Goff having a high level is supplied to the first transistor Tsw1 , the first transistor Tsw1 may still be turned off in the initialization period A. Therefore, the data voltage Vdata supplied to the data line DL may not be transmitted through the first transistor Tsw1 .

[0143] When the initialization period A starts, the sensing control signal VS having a low level may be supplied to the sensing control line SCL, and the emission signal EM having a low level may be supplied to the emission line EL. Fig. 6A As described above, the reference voltage Vref supplied through the second transistor Tsw2 , the third transistor Tsw3 , the fourth transistor Tsw4 , and the fifth transistor Tsw5 may initialize the first terminal and the second terminal of the capacitor Cst.

[0144] Subsequently, the first switching unit 510 may be maintained in the on state in the sampling period B. Therefore, the first control signal DMUX1 having a low level may be continuously supplied to the first switching unit 510. Therefore, the data voltage Vdata may be continuously supplied to the data line DL through the first switching unit 510.

[0145] When the second setting period T2 elapses after the sampling period B starts, the first transistor Tsw1 may be turned on, and then may be turned off again before the sampling period B ends.

[0146] Therefore, a gate pulse period in which the gate pulse GP for turning on the first transistor Tsw1 is supplied to the gate of the first transistor Tsw1 may be included in the data period X in which the first switching unit 510 is turned on.

[0147] That is, in the present disclosure, the first transistor Tsw1 may be turned on while the first switching unit 510 is turned on and the data voltage Vdata is being supplied to the data line, and thus, the data voltage Vdata may be applied to the first node N1.

[0148] In this case, when the data voltage Vdata is being supplied to the data line DL, the first transistor Tsw1 may be turned on, and thus, a coupling effect based on the first transistor Tsw1 may be reduced. Therefore, the data voltage Vdata supplied to the data line DL may pass through the first transistor Tsw1 and may be transmitted to the first node N1.

[0149] To provide additional description, after the data voltage Vdata is supplied to the data line DL through the first switch unit 510, the first switch unit 510 may be turned off, and then, when the first transistor Tsw1 is turned on, coupling between the turned-on first transistor Tsw1 and the data voltage Vdata may occur, whereby the data voltage Vdata through the first transistor Tsw1 may change. Therefore, the data voltage Vdata supplied to the data line DL may be different from the data voltage Vdata charged to the first node N1. Due to this phenomenon, defects such as lateral bands may occur in the lateral direction of the light-emitting display panel 100, and a color sense difference caused by a change in the data voltage Vdata may occur.

[0150] However, according to the present disclosure, when the first switching unit 510 is turned on and the data voltage Vdata is being supplied to the data line DL, the first transistor Tsw1 may be turned on, and thus, the coupling effect based on the first transistor Tsw1 may be reduced. Therefore, the data voltage Vdata supplied to the data line DL may pass through the first transistor Tsw1 and may be transmitted to the first node N1.

[0151] In the sampling period B, a sensing control signal VS having a low level can be supplied to the sensing control line SCL, and an emission signal EM having a high level can be supplied to the emission line EL, and therefore, the second transistor Tsw2 and the fifth transistor Tsw5 connected to the sensing control line SCL can be turned on, while the third transistor Tsw3 and the fourth transistor Tsw4 connected to the emission line EL can be turned off.

[0152] Therefore, in the above reference Figure 6B In the sampling period B, the first node voltage may be the data voltage Vdata, and the gate voltage of the driving transistor Tdr may be the difference voltage (=VDD-|Vth|) between the absolute value of the threshold voltage Vth of the driving transistor Tdr and the first voltage VDD applied by the driving transistor Tdr.

[0153] The first transistor Tsw1 may be turned off again before the end of the sampling period B. Therefore, the data voltage may no longer be supplied to the first node N1.

[0154] Subsequently, when the third setting period T3 elapses after the start of the holding period C, the first switch unit 510 may be turned off, and thus, the data voltage Vdata may no longer be supplied to the data line DL. To this end, when the third setting period T3 elapses after the start of the holding period C, the first control signal DMUX1 having a high level for turning off the first switch unit 510 may be supplied to the first switch unit 510.

[0155] In this case, the data driver 300 may output the data voltage Vdata to the connection line CL1 from before the initialization period A starts until before the first switching unit 510 is turned off in the maintenance period C.

[0156] That is, after the first transistor Tsw1 is turned off in the sampling period B until before the first switching unit 510 is turned off in the holding period C, the data driver 300 may output the data voltage to the connection line CL1 .

[0157] Therefore, the data voltage Vdata may be sufficiently charged into the data line DL.

[0158] For example, in one horizontal period 1H in which the data driver 300 outputs the data voltage Vdata to the connection line CL1, when the first transistor Tsw1 is turned off, the data voltage may not be supplied to the first node N1, and therefore, the data voltage Vdata may not be supplied to the data line DL. Therefore, the first switch unit 510 may be turned off. In the following description, the first horizontal period may represent a period in which the data voltage Vdata is output to the data line DL, that is, an order of one horizontal period 1H. For example, the data driver 300 may output the data voltage Vdata in the first horizontal period, and the data driver 300 may output the data voltage Vdata in the second horizontal period. The data voltage output in the first horizontal period may be the same as or different from the data voltage output in the second horizontal period.

[0159] In this case, when the first transistor Tsw1 is turned off, or when the first switching unit 510 is turned off immediately after the first transistor Tsw1 is turned off, the data voltage Vdata may be sufficiently charged into the data line DL. In this case, when the difference between the data voltage Vdata supplied to the data line DL in the second horizontal period and the data voltage Vdata supplied to the data line DL in the first horizontal period is large, the period for charging the data voltage Vdata into the data line DL in the second horizontal period may be delayed.

[0160] For example, when the data voltage output to the data line DL in the first horizontal period is 1V corresponding to a low grayscale and the first transistor Tsw1 is turned off, or when the first switch unit 510 is turned off immediately after the first transistor Tsw1 is turned off, charges corresponding to 1V (volts) may not be sufficiently charged in the data line DL. For example, after the first switch unit 510 is turned off, only 0.8V may be charged in the data line DL.

[0161] However, as in the present disclosure, when the data voltage is supplied to the data line DL through the connection line CL1 after the first transistor Tsw1 is turned off in the sampling period B until the first switch unit 510 is turned off in the holding period C, charges corresponding to 1V may be sufficiently charged in the data line DL. For example, after the first switch unit 510 is turned off, 1V may be charged in the data line DL.

[0162] In this case, when the data voltage supplied to the data line DL in the second horizontal period is 10V corresponding to a high grayscale, a period in which the voltage charged to the data line DL increases from 1V to 10V may be shorter than a period in which the voltage charged to the data line DL increases from 0.8V to 10V.

[0163] Therefore, according to the present disclosure, the change of the data voltage Vdata in the data line DL can be performed quickly without delay. Therefore, the image quality of the light emitting display device can be improved.

[0164] That is, in the present disclosure, after the first transistor Tsw1 is turned off in the sampling period B, until the first switch unit 510 is turned off in the holding period C, the data voltage may be supplied to the data line DL through the connection line CL1, the data voltage may be supplied to the data line DL through the connection line CL1, and thus the data voltage Vdata may be sufficiently charged into the data line DL, whereby a delay time may not occur when the data voltage Vdata is charged into the data line DL. Therefore, the image quality of the light-emitting display device may be improved.

[0165] In the holding period C, the sensing control signal VS having a high level may be supplied to the sensing control line VSL, the emission signal EM having a high level may be supplied to the emission line EL, and the gate signal VG having a high level (ie, the gate-off signal Goff) may be supplied to the gate line GL. Therefore, all of the first to fifth transistors Tsw1 to Tsw5 may be turned off.

[0166] In this case, refer to Figure 6C As described above, in the holding period C, the first node voltage and the gate voltage of the driving transistor may be maintained as the first node voltage and the gate voltage of the driving transistor in the sampling period B.

[0167] Finally, in the transmission period D, as described above and as Figure 7 As shown in , the first control signal DMUX1 , the sensing control signal VS, and the gate signal VG may have a high level, and the emission signal EM may have a low level.

[0168] Therefore, the driving transistor Tdr supplying the emission signal EM and the third and fourth transistors Tsw3 and Tsw4 may be turned on, and the first, second, and fifth transistors Tsw1, Tsw2, and Tsw5 may be turned off.

[0169] That is, the third transistor Tsw3 and the fourth transistor Tsw4 may be turned off from the sampling period B until the holding period C, and may be turned on in the emission period D.

[0170] Therefore, the current I supplied to the driving transistor Tdr and the fourth transistor Tsw4 may be supplied to the light emitting device ED, and thus, the light emitting device ED may emit light.

[0171] In this case, the level of the current I supplied to the light emitting device ED may be proportional to the square of the data voltage Vdata and the reference voltage Vref as expressed in Formula 1. Therefore, the current I supplied to the light emitting device ED may vary based only on the data voltage Vdata supplied through the data line DL and the reference voltage Vref supplied through the sensing line SL, and may not vary based on the threshold voltage Vth of the driving transistor Tdr.

[0172] Therefore, even when the threshold voltage of the driving transistor Tdr changes due to degradation of the driving transistor Tdr, the brightness of light emitted from the light emitting device ED may change based only on the data voltage Vdata. Therefore, the light emitting display device according to the present disclosure may operate continuously and stably.

[0173] According to aspects of the present disclosure, when a data voltage is supplied from a data driver to a data line, a first transistor included in a pixel driving unit and connected to the data line may be turned on. Therefore, even when a compensation operation for preventing or at least reducing degradation of a driving transistor included in the pixel driving unit is performed while an image is displayed, the data voltage supplied to the pixel driving unit through the data line may not be offset by coupling.

[0174] That is, according to the present disclosure, a phenomenon in which a data voltage is shifted by being coupled to a turned-on transistor can be prevented.

[0175] Therefore, defects such as lateral bands that may occur in the lateral direction of the light-emitting display panel and color difference in an image displayed by the light-emitting display panel can be reduced.

[0176] The above-mentioned features, structures and effects of the present disclosure are included in at least one aspect of the present disclosure, but are not limited to only one aspect. In addition, those skilled in the art can realize the features, structures and effects described in at least one aspect of the present disclosure by combining or modifying other embodiments. Therefore, the content associated with combination and modification should be interpreted as within the scope of the present disclosure.

[0177] It will be apparent to those skilled in the art that various modifications and variations may be made to the present disclosure without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure is intended to cover modifications and variations of the present disclosure as long as they fall within the scope of the appended claims and their equivalents.

Claims

1. A light-emitting display device, comprising: a light emitting display panel including a pixel including a first transistor connected to a gate line and a data line; a gate driver that supplies a gate signal to the first transistor; a data driver that supplies a data voltage to the data line; as well as a switch driver that connects the data line to the data driver or connects a sensing line to the data driver, the sensing line being included in the pixel, wherein, during a data period in which the data voltage is supplied from the data driver to the data line through the switch driver, the gate driver turns on the first transistor, and then turns off the first transistor, Wherein, the pixels include: Light emitting device; the first transistor including a first terminal connected to the data line and a gate connected to the gate line, the gate signal being supplied to the gate line; a drive transistor including a first terminal connected to a first voltage supply line; a capacitor connected between the second terminal of the first transistor and the gate of the driving transistor; a second transistor including a first terminal connected to the gate of the driving transistor, a second terminal connected to the second terminal of the driving transistor, and a gate connected to a sensing control line; a third transistor including a first terminal connected to the second terminal of the first transistor, a second terminal connected to the sense line, and a gate connected to an emission line; a fourth transistor including a first terminal connected to the second terminal of the driving transistor, a second terminal connected to the first terminal of the light emitting device, and a gate connected to the emission line; and a fifth transistor including a first terminal connected to the first terminal of the light emitting device, a gate connected to the sensing control line, and a second terminal connected to the sensing line, During the data period, the gate driver supplies a gate pulse for turning on the first transistor to the gate of the first transistor, and then supplies a gate-off signal for turning off the first transistor to the gate of the first transistor.

2. The light emitting display device according to claim 1, wherein: The switch driver comprises: a first switching unit connecting the data line to the data driver; and A multiplexer switch unit connects the sensing line to the data driver.

3. The light emitting display device according to claim 2, wherein: During the data period when the first switching unit is turned on and the data voltage is supplied to the data line, the gate driver supplies a gate pulse for turning on the first transistor to the gate of the first transistor, and then supplies a gate-off signal for turning off the first transistor to the gate of the first transistor.

4. The light emitting display device according to claim 3, wherein: A gate pulse period, in which a gate pulse for turning on the first transistor is supplied to a gate of the first transistor, is included in the data period in which the first switching unit is turned on.

5. The light emitting display device according to claim 3, wherein: In an initialization period, the first terminal and the second terminal of the capacitor are initialized by a reference voltage supplied through the sensing line, In the sampling period, the first transistor is turned on, and therefore, the voltage at the first terminal of the capacitor connected to the first transistor is the data voltage, and the voltage at the second terminal of the capacitor connected to the gate of the driving transistor is the difference voltage between the first voltage supplied by the driving transistor and the absolute value of the threshold voltage of the driving transistor, In a holding period, a voltage at the first terminal of the capacitor and a voltage at the second terminal of the capacitor are held as the data voltage and the difference voltage, and In the emission period, a difference voltage between the gate and the source of the driving transistor is a difference voltage between the data voltage and the reference voltage.

6. The light emitting display device according to claim 5, wherein: When a first setting period elapses after the initialization period starts, the first switch unit is turned on, During the sampling period, the first switch unit is kept in the on state, When a second setting period has elapsed after the start of the sampling period, the first transistor is turned on, The first transistor is turned off before the end of the sampling period, and When a third setting period elapses after the start of the holding period, the first switching unit is turned off.

7. The light emitting display device according to claim 6, wherein: The data driver outputs the data voltage from before the initialization period starts until the first switching unit is turned off in the maintenance period.

8. The light emitting display device according to claim 7, wherein: After the first transistor is turned off, the data driver outputs the data voltage until the first switching unit is turned off.

9. The light emitting display device according to claim 6, wherein: The third transistor and the fourth transistor are turned off from the sampling period to the holding period, and are turned on in the emission period.

10. The light emitting display device according to claim 1, wherein: The data driver comprises: a data voltage generator that generates the data voltage to be transmitted to the data line; a reference voltage transmitter, which transmits a reference voltage to the sensing line; a converter that converts a sensing signal transmitted through the sensing line into sensing data and transmits the sensing data to a controller; and A switch unit connects the switch driver to one of the data voltage generator, the reference voltage transmitter, and the converter.

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