Chip package module, preparation method thereof, power module and electronic device

Abstract

The application provides a chip packaging module, which comprises a first conductive frame, a first die arranged on the first conductive frame, and a second conductive frame arranged beside the first conductive frame. The chip packaging module further comprises a first conductive connecting piece, a second die, and a conductive cover plate. The first conductive connecting piece is connected to a surface of the first die away from the first conductive frame and extends to overlap the second conductive frame. The second die is arranged on the first die in a stacked manner and is connected to the first conductive connecting piece. The conductive cover plate is connected to a surface of the second die away from the first conductive frame and extends to connect the first conductive frame. The first conductive connecting piece and the conductive cover plate realize electrical interconnection between the first die and the second die arranged in a stacked manner, and the two dies are packaged in one device, so that the performance of a single device is improved. The application further provides a power module, an electronic device comprising the chip packaging module, and a preparation method of the chip packaging module.

Description

Technical Field

[0001] This application relates to the field of chip packaging, and more particularly to a chip packaging module, a method for preparing the chip packaging module, a power module and an electronic device using the chip packaging module. Background Technology

[0002] As power supply modules such as Power Supply In a Package (PSIP) and Brick Module Power (BMP) demand increasingly higher power and operating frequencies, the evolution of single Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) chips is driven towards smaller size, lower loss, and higher power density. Current single-MOSFET packages contain only one bare wafer. With current manufacturing processes, the rate of improvement in wafer performance is increasingly unable to keep pace with the rate of improvement in power module performance. Encapsulating only one bare wafer within a single device fails to fully utilize the space in the package's height direction, and the performance of a single device depends entirely on the performance of the bare wafer. This creates a performance bottleneck when system requirements are high and the bare wafer's performance is insufficient, hindering further optimization of power modules. Summary of the Invention

[0003] The first aspect of this application provides a chip packaging module, including:

[0004] First conductive frame;

[0005] The first bare die is disposed on the first conductive frame;

[0006] The second conductive frame is spaced apart from the first conductive frame;

[0007] A first conductive connecting piece connects to the surface of the first bare piece away from the first conductive frame and extends to overlap the second conductive frame;

[0008] The second die is stacked on the surface of the first die that is away from the first conductive frame and is connected to the first conductive connecting piece;

[0009] A conductive cover plate is connected to the surface of the second bare sheet opposite to the first conductive frame and extends to connect to the first conductive frame.

[0010] The chip packaging module described in the first aspect of this application achieves electrical interconnection between the first and second bare dies stacked on top of each other through a first conductive connecting piece and a conductive cover plate, thereby encapsulating the two bare dies inside a single device, improving the performance of a single device, and to a certain extent meeting the requirements of high-performance power supply systems for devices.

[0011] In this embodiment of the application, the first electrode of the first bare die is electrically connected to the first conductive frame, and the second electrode of the second bare die is electrically connected to the conductive cover plate, thereby realizing an electrical connection between the first electrode and the second electrode; the third electrode of the first bare die and the fourth electrode of the second bare die are both electrically connected to the first conductive connecting piece, thereby realizing an electrical connection between the third electrode and the fourth electrode.

[0012] The first and second dies, which are stacked inside a device, have two pairs of electrodes electrically interconnected.

[0013] In this embodiment of the application, the chip packaging module further includes a third conductive frame and a second conductive connecting piece, wherein the first conductive frame, the second conductive frame and the third conductive frame are spaced apart from each other; the second conductive connecting piece connects to the surface of the first die away from the first conductive frame and extends to overlap the third conductive frame, and the second conductive connecting piece is spaced apart from the first conductive connecting piece.

[0014] In this embodiment of the application, the fifth electrode of the first die and the sixth electrode of the second die are both electrically connected to the second conductive connecting piece, thereby realizing the electrical connection between the fifth electrode and the sixth electrode.

[0015] The first and second dies, which are stacked on top of each other and packaged inside a device, have three pairs of electrodes electrically interconnected.

[0016] In this embodiment, the first electrode is a first source, the third electrode is a first drain, the fifth electrode is a first gate, the second electrode is a second source, the fourth electrode is a second drain, and the sixth electrode is a second gate. The first source, the first drain, and the first gate are electrically connected to the first conductive frame, the first conductive connecting piece, and the second conductive connecting piece in a one-to-one correspondence. Similarly, the second source, the second drain, and the second gate are electrically connected to the conductive cover plate, the first conductive connecting piece, and the second conductive connecting piece.

[0017] In this embodiment of the application, the first source and the second source are connected in parallel, the first drain and the second drain are connected in parallel, and the first gate and the second gate are connected in parallel.

[0018] The first die and the second die can be MOSFET chips. The source, drain and gate terminals of the second die and the first die, which are stacked on top of each other inside a single device, are connected in parallel, which greatly improves the device performance.

[0019] In this embodiment of the application, the first drain is electrically connected to the first conductive frame, the first gate is electrically connected to the first conductive connecting piece, and the first source is electrically connected to the second conductive connecting piece; the second drain is electrically connected to the conductive cover plate, the second gate is electrically connected to the first conductive connecting piece, and the second source is electrically connected to the second conductive connecting piece.

[0020] In this embodiment of the application, the conductive cover plate includes a flat plate and at least one side plate that is bent and connected to the flat plate. The flat plate covers the surface of the second bare sheet opposite to the first conductive frame, and each side plate is connected between the flat plate and the first conductive frame.

[0021] The side plate is supported between the flat plate and the first conductive frame to provide support. The conductive cover plate is connected to the first conductive frame through the bent side plate, and can bear the weight of the conductive cover plate itself and part of the weight of the molding compound after the chip packaging module is molded, thus relieving the stress on the first bare die below to a certain extent.

[0022] In this embodiment of the application, each side plate is vertically connected to the flat plate.

[0023] In this embodiment of the application, the conductive cover plate includes three side plates that are vertically connected to the flat plate.

[0024] The conductive cover plate is connected to the first conductive frame through three vertically bent side plates. The three side plates can bear the weight of the conductive cover plate itself and part of the weight of the molding compound after the chip packaging module is molded, which can alleviate the stress on the first bare die below to a certain extent.

[0025] In this embodiment, solder is provided between the first bare die and the first conductive frame, and electrical connection is achieved through welding; solder is provided in the area where the first conductive connecting piece overlaps with the first bare die and the second conductive frame, and electrical connection is achieved through welding between the first conductive connecting piece and the first bare die and the second conductive frame; solder is provided in the area where the second bare die overlaps with the first conductive connecting piece, and electrical connection is achieved through welding between the second bare die and the first conductive connecting piece; solder is provided between the conductive cover plate and the second bare die, and electrical connection is achieved through welding between the conductive cover plate and the second bare die.

[0026] A second aspect of this application provides a power module, including a circuit board and a chip packaging module located on the circuit board, wherein the chip packaging module is the chip packaging module described in the first aspect of this application.

[0027] A third aspect of this application provides an electronic device, including a circuit board and a chip packaging module located on the circuit board, wherein the chip packaging module is the chip packaging module described in the first aspect of this application.

[0028] The fourth aspect of this application provides a method for preparing a chip packaging module, including:

[0029] A first conductive frame and a second conductive frame are provided, wherein the second conductive frame is disposed next to the first conductive frame at a distance;

[0030] The first bare die is mounted on the first conductive frame;

[0031] A first conductive connecting piece is provided, which connects to the surface of the first bare sheet away from the first conductive frame and extends to overlap the second conductive frame;

[0032] A second die is mounted on the surface of the first die that is opposite to the first conductive frame, and the second die is connected to the first conductive connector.

[0033] A conductive cover plate is provided, which connects to the surface of the second bare sheet away from the first conductive frame and extends to connect to the first conductive frame.

[0034] The chip packaging module fabrication method of this application improves the performance of individual devices and increases power density through innovative packaging structure without challenging the device manufacturing process. It can meet the requirements of high-performance power systems to a certain extent, and optimize the stress of the device by means of the special design of the conductive cover plate.

[0035] In this embodiment of the application, the preparation method further includes, before setting the second bare die, providing a third conductive frame spaced next to the first conductive frame; and setting a second conductive connecting piece, the second conductive connecting piece connecting the surface of the first bare die away from the first conductive frame and extending to overlap the third conductive frame, the second conductive connecting piece being spaced apart from the first conductive connecting piece.

[0036] In this embodiment of the application, the conductive cover plate includes a flat plate and at least one side plate that is bent and connected to the flat plate. The flat plate covers the surface of the second bare sheet opposite to the first conductive frame, and each side plate connects the flat plate and the first conductive frame.

[0037] In this embodiment, both the first die and the second die include multiple electrodes. The multiple electrodes of the first die include a source, a drain, and a gate, and the multiple electrodes of the second die also include a source, a drain, and a gate. The source, drain, and gate of the first die are electrically connected to the first conductive frame, the first conductive connecting piece, and the second conductive connecting piece in a one-to-one correspondence. The source, drain, and gate of the second die are electrically connected to the conductive cover plate, the first conductive connecting piece, and the second conductive connecting piece in a one-to-one correspondence. The source of the first die and the source of the second die are connected in parallel, and the drain of the first die and the drain of the second die are connected in parallel. The gate of the first die and the gate of the second die are connected in parallel.

[0038] In this embodiment of the application, mounting the first bare die on the first conductive frame includes: setting solder on the first conductive frame, placing the first bare die on the solder, and then electrically connecting the first bare die to the first conductive frame by welding.

[0039] Setting the first conductive connecting piece and the second conductive connecting piece includes: setting two sets of solder spaced apart on the surface of the first bare die away from the first conductive frame, and setting solder on the second conductive frame and the third conductive frame respectively; then placing the first conductive connecting piece on one set of solder on the first bare die and on the solder on the second conductive frame; setting the second conductive connecting piece on the other set of solder on the first bare die and on the solder on the third conductive frame; and welding the first conductive connecting piece to electrically connect the first bare die and the second conductive frame, and the second conductive connecting piece to electrically connect the first bare die and the third conductive frame.

[0040] Mounting the second bare die includes: applying solder to the surfaces of the first conductive connecting piece and the second conductive connecting piece that are opposite to the first bare die; placing the second bare die on the solder; and electrically connecting the second bare die to the first conductive connecting piece and the second conductive connecting piece by soldering.

[0041] Setting the conductive cover plate includes: applying solder to the surface of the second bare die facing away from the first conductive frame, placing the flat plate of the conductive cover plate on the solder, and electrically connecting the conductive cover plate to the second bare die by welding. Attached Figure Description

[0042] Figure 1 This is a schematic diagram of the chip packaging module according to the first embodiment of this application.

[0043] Figure 2 This is a top view of the chip packaging module according to an embodiment of this application.

[0044] Figure 3 yes Figure 2 A cross-sectional view of the chip packaging module taken along section line III-III.

[0045] Figure 4 This is a schematic diagram of the chip packaging module according to the second embodiment of this application.

[0046] Figures 5 to 13 This is a schematic diagram of the fabrication process of the chip packaging module according to an embodiment of this application.

[0047] Figure 14 This is a schematic diagram of a power module according to an embodiment of this application.

[0048] Figure 15 This is a schematic diagram of an electronic device according to an embodiment of this application. Detailed Implementation

[0049] The embodiments of this application are described below with reference to the accompanying drawings. Unless otherwise specified, the data ranges involved in this application shall include end values.

[0050] This application provides a novel chip packaging module that addresses the problem of slow wafer-level performance improvement leading to insufficient single-transistor performance to meet system-level requirements. It can package two bare wafers in parallel within a single device, reducing single-transistor losses and increasing power density, thereby improving the performance of the single-chip packaging module.

[0051] Please see Figure 1 , Figure 2 and Figure 3 The chip packaging module 100 of the first embodiment of this application includes a first conductive frame 11, a second conductive frame 12, and a third conductive frame 13. The first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are spaced apart from each other. The first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are all flat. Pins 101 are respectively connected to the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13, and the pins 101 are used for electrical connection with other electronic components (e.g., external circuits). The materials of the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 may be conductive metals.

[0052] like Figure 1As shown, the chip packaging module 100 further includes a first die 41, a second die 42, a first conductive connector 31, and a second conductive connector 32. The first die 41 is disposed on the first conductive frame 11. In this embodiment, the area of ​​the top surface of the first conductive frame 11 used to place the first die 41 is larger than the area of ​​the first die 41, and the first die 41 partially covers a top surface of the first conductive frame 11. Solder 21 is disposed between the first die 41 and the first conductive frame 11, and electrical connection is achieved through soldering.

[0053] like Figure 1 As shown, the first conductive connecting piece 31 partially covers and connects to the surface of the first bare die 41 facing away from the first conductive frame 11 and extends to overlap the second conductive frame 12. The second conductive connecting piece 32 partially covers and connects to the surface of the first bare die 41 facing away from the first conductive frame 11 and extends to overlap the third conductive frame 13. The second conductive connecting piece 32 is spaced apart from the first conductive connecting piece 31. Solder 21 is provided in the areas where the first conductive connecting piece 31 overlaps with the first bare die 41 and the second conductive frame 12, and electrical connection between the first conductive connecting piece 31 and the first bare die 41 and the second conductive frame 12 is achieved through welding. Solder 21 is also provided in the areas where the second conductive connecting piece 32 overlaps with the first bare die 41 and the third conductive frame 13, and electrical connection between the second conductive connecting piece 32 and the first bare die 41 and the third conductive frame 13 is achieved through welding.

[0054] like Figure 1 and Figure 3 As shown, the second die 42 is stacked on the surface of the first die 41 having the first conductive connecting piece 31 and the second conductive connecting piece 32, and is electrically connected to both the first conductive connecting piece 31 and the second conductive connecting piece 32. The first conductive connecting piece 31 is fitted with the second conductive frame 12, and the second conductive connecting piece 32 is fitted with the third conductive frame 13. Solder 21 is provided in the areas where the second die 42 overlaps with the first conductive connecting piece 31 and the second conductive connecting piece 32, and electrical connection between the second die 42 and the first conductive connecting piece 31 and the second conductive connecting piece 32 is achieved through soldering. The first conductive connecting pieces 31 are electrically connected to both the first die 41 and the second die 42; the second conductive connecting pieces 32 are also electrically connected to both the first die 41 and the second die 42.

[0055] like Figure 1As shown, the chip packaging module 100 further includes a conductive cover plate 33, which connects to the surface of the second die 42 facing away from the first conductive frame 11 and extends to connect to the first conductive frame 11. The conductive cover plate 33 includes a flat plate 331 and at least one side plate 333 bent to connect the flat plate 331. The flat plate 331 covers the surface of the second die 42 facing away from the first conductive frame 11, and each side plate 333 is connected between the flat plate 331 and the first conductive frame 11. The conductive cover plate 33 and the first conductive frame 11 are configured to mate. Solder 21 is provided between the flat plate 331 and the second die 42, and solder 21 is also provided between the side plate 333 and the first conductive frame 11. The electrical connection between the conductive cover plate 33 and the second die 42 and the first conductive frame 11 is achieved by soldering.

[0056] In this embodiment, as Figure 1 As shown, the conductive cover plate 33 includes three side plates 333 vertically connected to the flat plate 331. On the side of the first conductive frame 11 where the second conductive frame 12 and the third conductive frame 13 are located, the side plates 333 are not provided to avoid affecting the extension and overlap of the first conductive connecting piece 31 and the second conductive connecting piece 32 with the second conductive frame 12 and the third conductive frame 13. The side plates 333 essentially provide support between the flat plate 331 and the first conductive frame 11, providing support force. The structure of the side plates 333 includes, but is not limited to, right-angle bends (side plates 333 vertically connected to the flat plate 331), stepped bends, support columns, etc.

[0057] The conductive cover plate 33 is connected to the first conductive frame 11 by three bent side plates 333 respectively. The three side plates 333 can bear the weight of the conductive cover plate 33 itself and part of the weight of the plasticizing material after the chip packaging module 100 is plasticized, which can alleviate the stress of the first bare die 41 below to a certain extent.

[0058] Please see Figure 4 The chip packaging module 200 of the second embodiment of this application has a basically the same structure as the chip packaging module 100, except that the conductive cover plate 33 of the chip packaging module 200 only includes one side plate 333 vertically connected to the flat plate 331. If the first conductive frame 11 is configured with one side of the second conductive frame 12 and the third conductive frame 13 as the first side, then the single side plate 333 is disposed on the second side opposite to the first side. The single side plate 333 is connected to the first conductive frame 11, which can also play a supporting role and reduce the design and manufacturing difficulty of the conductive cover plate 33.

[0059] like Figures 1 to 3As shown, the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are all rectangular plates, and the size of the first conductive frame 11 is larger than the size of the second conductive frame 12 and the third conductive frame 13. The second conductive frame 12 and the third conductive frame 13 are located on the same side of the first conductive frame 11. In this embodiment, the pins 101 of the first conductive frame 11 are connected to the side of the first conductive frame 11 away from the second conductive frame 12, the pins 101 of the second conductive frame 12 are connected to the side of the second conductive frame 12 away from the first conductive frame 11, and the pins 101 of the third conductive frame 13 are connected to the side of the third conductive frame 13 away from the first conductive frame 11.

[0060] In this embodiment, the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 have the same thickness. Therefore, when the first bare sheet 41 is disposed on the first conductive frame 11, the height of the first bare sheet 41 is higher than that of the second conductive frame 12 and the third conductive frame 13. The first conductive connecting piece 31 bends and extends from the first bare sheet 41 towards the second conductive frame 12, overlapping and covering the second conductive frame 12; the second conductive connecting piece 32 bends and extends from the first bare sheet 41 towards the third conductive frame 13, overlapping and covering the third conductive frame 13. The first conductive connecting piece 31 and the second conductive connecting piece 32 are spaced apart from each other. Figure 1 As shown, the first conductive connecting piece 31 includes two flat portions 310 and a connecting portion 311 connecting the two flat portions 310. One flat portion 310 covers the first bare sheet 41, and the other flat portion 310 covers the second conductive frame 12. The connecting portion extends from the end of each flat portion 310 after bending. Similarly, the second conductive connecting portion also includes two flat portions 310 and a connecting portion 311 connecting the two flat portions 310. One flat portion 310 covers the first bare sheet 41, and the other flat portion 310 covers the third conductive frame 13. The connecting portion 311 extends from the end of each flat portion 310 after bending.

[0061] The chip packaging module 100 may further include a molding compound (not shown) encapsulating the conductive cover plate 33, the first die 41, and the second die 42. The conductive cover plate 33 may be contained inside the molding compound or partially exposed to the air to increase heat dissipation.

[0062] The first conductive connecting piece 31, the second conductive connecting piece 32 and the conductive cover plate 33 may be made of the same material, such as a metal material or a solid conductive organic material, but are not limited thereto.

[0063] Both the first die 41 and the second die 42 include multiple electrodes (not shown). One electrode (first electrode) of the first die 41 is electrically connected to the first conductive frame 11, and one electrode (second electrode) of the second die 42 is electrically connected to the conductive cover plate 33. The first conductive frame 11 is electrically connected to the first die 41. Thus, the first pair of electrodes of the first die 41 and the second die 42 are electrically connected through the first conductive frame 11 and the conductive cover plate 33, and signal transmission with external circuits is achieved through the first conductive frame 11. The other electrode (third electrode) of the first die 41 and the other electrode (fourth electrode) of the second die 42 are both electrically connected to the first conductive connecting piece 31. That is, the second pair of electrodes of the first die 41 and the second die 42 are electrically connected through the first conductive connecting piece 31, and then electrically connected to the first conductive connecting piece 31 through the second conductive frame 12 to realize signal transmission with external circuits. The other electrode (fifth electrode) of the first die 41 and the other electrode (sixth electrode) of the second die 42 are both electrically connected to the second conductive connecting piece 32. That is, the third pair of electrodes of the first die 41 and the second die 42 are electrically connected through the second conductive connecting piece 32, and then electrically connected to the second conductive connecting piece 32 through the third conductive frame 13 to realize signal transmission with external circuits.

[0064] Understandably, the arrangement of the first conductive connecting piece 31 and the second conductive frame 12, and the arrangement of the second conductive connecting piece 32 and the third conductive frame 13, are based on the number of pairs of electrodes that need to be electrically connected in the first die 41 and the second die 42, and can be increased or decreased as needed. For example, if only one pair of electrodes in the first die 41 and the second die 42 needs to be electrically connected, then the first conductive connecting piece 31 and the second conductive frame 12, and the second conductive connecting piece 32 and the third conductive frame 13 can all be omitted. For example, if two pairs of electrodes in the first die 41 and the second die 42 need to be electrically connected, then the second conductive connecting piece 32 and the third conductive frame 13 can be omitted.

[0065] The chip packaging modules 100 and 200 of this application achieve electrical interconnection between the stacked dies 41 and 42 through the first conductive connecting piece 31, the second conductive connecting piece 32 and the conductive cover plate 33, thus encapsulating the two dies inside a single device, improving the performance of the individual device and meeting the requirements of high-performance power systems for the device to a certain extent.

[0066] In one embodiment, both the first die 41 and the second die 42 are MOSFET chips. The first die 41 has multiple electrodes including a source, a drain, and a gate, and the second die 42 also has multiple electrodes including a source, a drain, and a gate. The source, drain, and gate of the first die 41 have a one-to-one electrical connection with the first conductive frame 11, the first conductive connector 31, and the second conductive connector 32; the specific connection relationship is not limited. For example, the source of the first die 41 is electrically connected to any one of the first conductive frame 11, the first conductive connector 31, and the second conductive connector 32; the drain of the first die 41 is electrically connected to one of the remaining two of the first conductive frame 11, the first conductive connector 31, and the second conductive connector 32; and the gate of the first die 41 is electrically connected to the last remaining one of the first conductive frame 11, the first conductive connector 31, and the second conductive connector 32. The source, drain, and gate of the second die 42 are electrically connected in a one-to-one correspondence with the conductive cover plate 33, the first conductive connecting piece 31, and the second conductive connecting piece 32. The specific correspondence is not limited. For example, the source of the second die 42 is electrically connected to any one of the conductive cover plate 33, the first conductive connecting piece 31, and the second conductive connecting piece 32; the drain of the second die 42 is electrically connected to one of the remaining two of the three; and the gate of the second die 42 is electrically connected to the last remaining one of the three. The source of the first die 41 is connected in parallel with the source of the second die 42; the drain of the first die 41 is connected in parallel with the drain of the second die 42; and the gate of the first die 41 is connected in parallel with the gate of the second die 42. The source, drain, and gate terminals of the second die 42 and the first die 41, which are stacked on top of each other, are connected in parallel.

[0067] In this embodiment, the first electrode of the first die 41 is the drain and is electrically connected to the first conductive frame 11; the third electrode of the first die 41 is the gate and is electrically connected to the first conductive connector 31; and the fifth electrode of the first die 41 is the source and is electrically connected to the second conductive connector 32, but this is not a limitation. The second electrode of the second die 42 is the drain and is electrically connected to the conductive cover plate 33; the fourth electrode of the second die 42 is the gate and is electrically connected to the first conductive connector 31; and the sixth electrode of the second die 42 is the source and is electrically connected to the second conductive connector 32, but this is not a limitation. Thus, the source, drain, and gate terminals of the second die 42 and the first die 41 are connected in parallel.

[0068] The chip packaging modules 100 and 200 of this application realize the parallel connection of the source, drain and gate terminals of the stacked bare dies 41 and 42 through the first conductive connecting piece 31, the second conductive connecting piece 32 and the conductive cover plate 33, so that a single device has stacked chips inside, which greatly improves the device performance.

[0069] Understandably, the size and thickness of the first die 41 and the second die 42, as well as the area of ​​the solder 21 applied in the chip packaging module 100, can be adjusted and designed as needed.

[0070] like Figure 14 As shown, this application also provides a power module 400, including a circuit board 530 and the aforementioned chip packaging modules 100 and 200 located on the circuit board 530. The pins 101 of the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are all electrically connected to the circuit board 530.

[0071] like Figure 15 As shown, this application also provides an electronic device 500, including a housing 510, a circuit board 530 located in the housing 510, and the aforementioned chip packaging modules 100 and 200 located on the circuit board 530.

[0072] Please see Figures 5 to 13 This application also provides a method for preparing the above-mentioned chip packaging module, including:

[0073] (1) A first conductive frame 11, a second conductive frame 12 and a third conductive frame 13 are provided, wherein the first conductive frame 11, the second conductive frame 12 and the third conductive frame 13 are spaced apart from each other;

[0074] (2) Attach the first bare die 41 onto the first conductive frame 11;

[0075] (3) A first conductive connecting piece 31 and a second conductive connecting piece 32 are provided. The first conductive connecting piece 31 covers the surface of the first bare sheet 41 away from the first conductive frame 11 and extends to overlap the second conductive frame 12. The second conductive connecting piece 32 covers the surface of the first bare sheet 41 away from the first conductive frame 11 and extends to overlap the third conductive frame 13.

[0076] (4) A second bare die 42 is mounted on the surface of the first bare die 41 having the first conductive connecting piece 31 and the second conductive connecting piece 32;

[0077] (5) A conductive cover plate 33 is provided. The conductive cover plate 33 includes a flat plate 331 and at least one side plate 333 that is bent and connected to the flat plate 331. The flat plate 331 covers the surface of the second bare sheet 42 away from the first conductive frame 11. Each side plate 333 connects the flat plate 331 and the first conductive frame 11.

[0078] As can be understood, as mentioned above, the matching arrangement of the first conductive connecting piece 31 and the second conductive frame 12, and the matching arrangement of the second conductive connecting piece 32 and the third conductive frame 13 are set according to the number of pairs of electrodes that need to be electrically connected in the first bare piece 41 and the second bare piece 42, and can be increased or decreased as needed.

[0079] In this embodiment, as Figure 5 As shown, the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 are all rectangular flat blocks, and the size of the first conductive frame 11 is larger than the size of the second conductive frame 12 and the third conductive frame 13. The second conductive frame 12 and the third conductive frame 13 are located on the same side of the first conductive frame 11. Pins 101 are connected to the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13, respectively. In this embodiment, the pins 101 of the first conductive frame 11 are connected to the side of the first conductive frame 11 opposite to the second conductive frame 12, the pins 101 of the second conductive frame 12 are connected to the side of the second conductive frame 12 opposite to the first conductive frame 11, and the pins 101 of the third conductive frame 13 are connected to the side of the third conductive frame 13 opposite to the first conductive frame 11. The first conductive frame 11, the second conductive frame 12 and the third conductive frame 13 can be obtained by cutting conductive metal plates. At the same time, the pins 101 are also obtained by processing conductive metal plates. That is, the conductive frames and the pins 101 connected to them are integrally formed, but this is not a limitation.

[0080] In this embodiment, the first conductive frame 11, the second conductive frame 12, and the third conductive frame 13 have the same thickness.

[0081] like Figure 6 and Figure 7 As shown, mounting the first bare die 41 on the first conductive frame 11 includes: setting solder 21 on the first conductive frame 11, placing the first bare die 41 on the solder 21, and then electrically connecting the first bare die 41 to the first conductive frame 11 by welding, for example, heating (the heating temperature generally does not exceed 450 degrees Celsius) to fuse the solder 21 between the first bare die 41 and the first conductive frame 11.

[0082] like Figure 8 and Figure 9 As shown, setting the first conductive connecting piece 31 and the second conductive connecting piece 32 includes: setting two sets of solder 21 spaced apart on the surface of the first bare die 41 facing away from the first conductive frame 11, and setting solder 21 on the second conductive frame 12 and the third conductive frame 13 respectively; then placing the first conductive connecting piece 31 on one set of solder 21 on the first bare die 41 and on the solder 21 on the second conductive frame 12; and setting the second conductive connecting piece 32 on the other set of solder 21 on the first bare die 41 and on the solder 21 on the third conductive frame 13. Welding electrically connects the first conductive connecting piece 31 to the first bare die 41 and the second conductive frame 12, and the second conductive connecting piece 32 electrically connects the first bare die 41 and the third conductive frame 13. For example, heating (the heating temperature generally does not exceed 450 degrees Celsius) causes the solder 21 to fuse between the first bare die 41 and the first conductive connecting piece 31, and between the second conductive frame 12 and the first conductive connecting piece 31; heating causes the solder 21 to fuse between the first bare die 41 and the second conductive connecting piece 32, and between the third conductive frame 13 and the second conductive connecting piece 32.

[0083] The shape of the first conductive connecting piece 31 must match the shape of the first bare sheet 41 and the first conductive frame 11. The first conductive connecting piece 31 includes two flat portions 310 and a connecting portion 311 connecting the two flat portions 310. The connecting portion 311 extends from the end of each flat portion 310 by bending. One flat portion 310 covers the first bare sheet 41, and the other flat portion 310 covers the second conductive frame 12. Similarly, the shape of the second conductive connecting portion must match the shape of the first bare sheet 41 and the second conductive frame 12. The second conductive connecting portion also includes two flat portions 310 and a connecting portion 311 connecting the two flat portions 310. The connecting portion 311 extends from the end of each flat portion 310 by bending. One flat portion 310 covers the first bare sheet 41, and the other flat portion 310 covers the third conductive frame 13.

[0084] like Figure 10 and Figure 11 As shown, mounting the second bare die 42 includes: setting solder 21 on the surfaces of the first conductive connecting piece 31 and the second conductive connecting piece 32 facing away from the first bare die 41, placing the second bare die 42 on the solder 21, and electrically connecting the second bare die 42 to the first conductive connecting piece 31 and the second conductive connecting piece 32 by welding, for example, heating to fuse the solder 21 between the second bare die 42 and the first conductive connecting piece 31 and between the second bare die 42 and the second conductive connecting piece 32.

[0085] like Figure 12 and Figure 13 As shown, setting the conductive cover plate 33 includes: setting solder 21 on the surface of the second bare die 42 away from the first conductive frame 11, placing the flat plate 331 of the conductive cover plate 33 on the solder 21, and electrically connecting the conductive cover plate 33 to the second bare die 42 by welding, for example, heating to fuse the solder 21 between the conductive cover plate 33 and the second bare die 42.

[0086] The chip packaging module fabrication method of this application improves the performance of individual devices and increases power density through innovative packaging structure without challenging the device manufacturing process. It can meet the requirements of high-performance power systems to a certain extent, and optimize the stress of the device by means of the special design of the conductive cover plate.

[0087] It should be noted that the above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Where there is no conflict, the embodiments and features described in the embodiments of this application can be combined with each other. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A chip packaging module, characterized in that, include: First conductive frame; The first bare die is disposed on the first conductive frame; The second conductive frame is spaced apart from the first conductive frame; A first conductive connecting piece connects to the surface of the first bare piece away from the first conductive frame and extends to overlap the second conductive frame; The second die is stacked on the surface of the first die that is away from the first conductive frame and is connected to the first conductive connecting piece; A conductive cover plate is connected to the surface of the second bare sheet that is away from the first conductive frame and extends to connect to the first conductive frame; The gates of the first die and the second die are disposed opposite to each other and are both electrically connected to the first conductive connection piece, thereby realizing the electrical connection between the gates of the first die and the second die; the drain of the first die is disposed on the side of the first conductive frame near the conductive cover plate and is electrically connected to the first conductive frame, and the drain of the second die is disposed on the side of the conductive cover plate near the first conductive frame and is electrically connected to the conductive cover plate, thereby realizing the electrical connection between the drain of the first die and the drain of the second die.

2. The chip packaging module as described in claim 1, characterized in that: The chip packaging module further includes a third conductive frame and a second conductive connecting piece, wherein the first conductive frame, the second conductive frame and the third conductive frame are spaced apart from each other; the second conductive connecting piece connects to the surface of the first die away from the first conductive frame and extends to overlap the third conductive frame, and the second conductive connecting piece is spaced apart from the first conductive connecting piece.

3. The chip packaging module as described in claim 2, characterized in that: The source of the first die and the source of the second die are both electrically connected to the second conductive connection piece, thereby achieving an electrical connection between the source of the first die and the source of the second die.

4. The chip packaging module as described in claim 3, characterized in that: The source of the first die is connected in parallel with the source of the second die, the drain of the first die is connected in parallel with the drain of the second die, and the gate of the first die is connected in parallel with the gate of the second die.

5. The chip packaging module as described in any one of claims 1 to 4, characterized in that: The conductive cover plate includes a flat plate and at least one side plate that is bent to connect the flat plate. The flat plate covers the surface of the second bare sheet opposite to the first conductive frame, and each side plate is connected between the flat plate and the first conductive frame.

6. The chip packaging module as described in claim 5, characterized in that: Each side panel is vertically connected to the flat plate.

7. The chip packaging module as described in claim 5 or 6, characterized in that: The conductive cover plate includes three side plates that are vertically connected to the flat plate.

8. The chip packaging module as described in claim 5 or 6, characterized in that: Solder is applied between the first die and the first conductive frame, and electrical connection is achieved through welding; solder is applied to the area where the first conductive connecting piece overlaps with the first die and the second conductive frame, and electrical connection is achieved through welding; solder is applied to the area where the second die overlaps with the first conductive connecting piece, and electrical connection is achieved through welding; solder is applied between the conductive cover plate and the second die, and electrical connection is achieved through welding.

9. A power module, comprising a circuit board and a chip packaging module located on the circuit board, characterized in that: The chip packaging module is the chip packaging module as described in any one of claims 1 to 8.

10. An electronic device, comprising a circuit board and a chip packaging module located on the circuit board, characterized in that: The chip packaging module is the chip packaging module as described in any one of claims 1 to 8.

11. A method for preparing a chip packaging module, characterized in that, include: A first conductive frame and a second conductive frame are provided, wherein the second conductive frame is disposed next to the first conductive frame at a distance; The first bare die is mounted on the first conductive frame; A first conductive connecting piece is provided, which connects to the surface of the first bare sheet away from the first conductive frame and extends to overlap the second conductive frame; A second die is mounted on the surface of the first die that is opposite to the first conductive frame, and the second die is connected to the first conductive connector. A conductive cover plate is provided, which connects to the surface of the second die away from the first conductive frame and extends to connect to the first conductive frame. The gates of the first die and the second die are both electrically connected to the first conductive connecting piece, thereby realizing the electrical connection between the gates of the first die and the gates of the second die. The drain of the first die is disposed on the side of the first conductive frame near the conductive cover plate and is electrically connected to the first conductive frame. The drain of the second die is disposed on the side of the conductive cover plate near the first conductive frame and is electrically connected to the conductive cover plate, thereby realizing the electrical connection between the drains of the first die and the drain of the second die.

12. The method for preparing a chip packaging module as described in claim 11, characterized in that: The preparation method further includes, before setting the second bare die, providing a third conductive frame spaced next to the first conductive frame; and setting a second conductive connecting piece, the second conductive connecting piece connecting to the surface of the first bare die away from the first conductive frame and extending to overlap the third conductive frame, the second conductive connecting piece being spaced apart from the first conductive connecting piece.

13. The method for preparing a chip packaging module as described in claim 11 or 12, characterized in that: The conductive cover plate includes a flat plate and at least one side plate that is bent to connect the flat plate. The flat plate covers the surface of the second bare sheet opposite to the first conductive frame, and each side plate connects the flat plate and the first conductive frame.

14. The method for preparing a chip packaging module as described in claim 12, characterized in that: The first die further includes a source electrode, and the second die further includes a source electrode; the source electrode of the first die is electrically connected to the second conductive connection piece, and the source electrode of the second die is electrically connected to the second conductive connection piece; the source electrodes of the first die and the second die are connected in parallel, the drain electrode of the first die and the drain electrode of the second die are connected in parallel, and the gate electrode of the first die and the gate electrode of the second die are connected in parallel.

15. The method for preparing a chip packaging module as described in claim 12, characterized in that: Mounting the first bare die on the first conductive frame includes: setting solder on the first conductive frame, placing the first bare die on the solder, and then electrically connecting the first bare die to the first conductive frame by soldering. Setting the first conductive connecting piece and the second conductive connecting piece includes: setting two sets of solder spaced apart on the surface of the first bare die away from the first conductive frame, and setting solder on the second conductive frame and the third conductive frame respectively; then placing the first conductive connecting piece on one set of solder on the first bare die and on the solder on the second conductive frame; setting the second conductive connecting piece on the other set of solder on the first bare die and on the solder on the third conductive frame; and welding the first conductive connecting piece to electrically connect the first bare die and the second conductive frame, and the second conductive connecting piece to electrically connect the first bare die and the third conductive frame. Mounting the second bare die includes: applying solder to the surfaces of the first conductive connecting piece and the second conductive connecting piece that are opposite to the first bare die; placing the second bare die on the solder; and electrically connecting the second bare die to the first conductive connecting piece and the second conductive connecting piece by soldering. Setting the conductive cover plate includes: applying solder to the surface of the second bare die facing away from the first conductive frame, placing the flat plate of the conductive cover plate on the solder, and electrically connecting the conductive cover plate to the second bare die by welding.

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