Display driving integrated circuit for short circuit detection and display device

Abstract

A display driving integrated circuit includes a common voltage buffer configured to provide a common voltage to a display panel and to apply a first current to a gate line or to receive a second current from the gate line when a line outputting the common voltage is short-circuited with the gate line, a current generator configured to sum currents corresponding to the first current and the second current, respectively, and to output an output current obtained by the summing, and a current detector configured to convert the output current into an output voltage and to output a high or low level signal based on a result of a comparison of the output voltage with a preset voltage.

Description

[0001] Cross-references to related applications

[0002] The entirety of Korean Patent Application No. 10-2021-0004927, entitled "Display Driving Integrated Circuit and Display Device for Short Circuit Detection," filed on January 13, 2021, with the Korean Intellectual Property Office, is incorporated herein by reference. Technical Field

[0003] The embodiments relate to a display driver integrated circuit for detecting short circuits and a display device including the display driver integrated circuit. Background Technology

[0004] The display panel may include multiple semiconductor devices, and the multiple semiconductor devices may include pixel electrodes and a common electrode for maintaining a common voltage Vcom. The display device may include a common voltage substrate located at the lower end of the display panel to apply the common voltage Vcom. Summary of the Invention

[0005] The embodiment relates to a display driver integrated circuit, comprising: a common voltage buffer configured to: provide a common voltage to a display panel, and apply a first current to the gate line or receive a second current from the gate line when the line outputting the common voltage is short-circuited with the gate line; a current generator configured to sum the currents corresponding to the first current and the second current, respectively, and output an output current obtained by the summation; and a current detector configured to: convert the output current into an output voltage, and output a high or low level signal based on the result of comparing the output voltage with a preset voltage.

[0006] The embodiment relates to a display driver integrated circuit, comprising: a common voltage buffer configured to: provide a common voltage to a display panel, and apply a first current to the gate line or receive a second current from the gate line when the line outputting the common voltage is short-circuited with the gate line; a current generator configured to generate output currents corresponding to the first current and the second current, respectively; and a current detector configured to: convert the output currents into a first output voltage and a second output voltage, respectively, and output a high or low level signal based on the result of comparing the first output voltage with a preset voltage and the result of comparing the second output voltage with a preset voltage.

[0007] The embodiment relates to a display device, comprising: a common voltage buffer configured to: provide a common voltage to a display panel, and apply a first current to the gate line or receive a second current from the gate line when the line outputting the common voltage is short-circuited with a gate line; a current generator configured to generate an output current corresponding to at least one of the first current and the second current; a current detector configured to convert the output current into an output voltage and output a high or low level signal based on a comparison of the output voltage with a preset voltage; and control logic configured to receive the output signal from the current detector and generate a control signal based on the output signal. Attached Figure Description

[0008] The features will become clear to those skilled in the art by referring to the detailed description of exemplary embodiments with reference to the accompanying drawings, in which:

[0009] Figure 1 This is a block diagram illustrating a display device according to an example embodiment;

[0010] Figure 2 This is an illustration of a display device according to an example embodiment;

[0011] Figure 3 This is an illustration of a display driver integrated circuit according to an example embodiment;

[0012] Figure 4 and Figure 5 The example embodiment illustrates when in Figure 3 Current flow when the gate line and common voltage output line are short-circuited in the display driver integrated circuit;

[0013] Figure 6 This is a circuit diagram of a display driver integrated circuit according to an example embodiment;

[0014] Figure 7 This is a circuit diagram of a display driver integrated circuit according to an example embodiment;

[0015] Figure 8 A display device according to an example embodiment is shown; and

[0016] Figure 9 This illustrates the control according to an example embodiment when... Figure 8 A flowchart showing the output voltage when a short circuit is detected in a display device. Detailed Implementation

[0017] Figure 1 This is a block diagram illustrating a display device 10 according to an example embodiment.

[0018] In an example embodiment, the display device 10 may be included in an electronic device with image display capabilities. The electronic device may be, for example, a smartphone, tablet PC, portable multimedia player (PMP), camera, wearable device, Internet of Things (IoT) device, television, digital video disc (DVD) player, refrigerator, air conditioner, air purifier, set-top box, robot, drone, medical device, navigation device, GPS receiver, advanced driver assistance system (ADAS), in-vehicle equipment, furniture, or measuring equipment.

[0019] Reference Figure 1 The display device 10 may include a display panel 11, a common voltage substrate 13, a gate driver 15, and a source driver 17. See the following reference... Figure 8 As described, the display device 10 may include a power management integrated circuit (PMIC) and a timing controller (TCON).

[0020] Display panel 11 is a display unit that displays actual images, and can be one of the display devices that receive and transmit image signals electrically and display images, such as thin-film transistor liquid crystal display (TFT-LCD), organic light-emitting diode (OLED) display, field emission display, plasma display panel (PDP), etc.

[0021] The display panel 11 may include multiple signal lines, such as multiple data lines DL, multiple gate lines GL, and a common voltage output line VL, and may include multiple pixels connected to the multiple signal lines.

[0022] The common voltage substrate 13 can apply a common voltage Vcom output from the common voltage buffer 19 to the display panel 11. For example, the common voltage substrate 13 can apply the common voltage Vcom to a common electrode of a plurality of elements (e.g., semiconductor devices) included in the display panel 11.

[0023] Gate driver 15 may include a gate driver integrated circuit and can drive multiple gate lines GL based on control signals from the gate driver integrated circuit. Gate driver 15 can control multiple pixels by applying a gate high voltage VGH or a gate low voltage VGL to the multiple gate lines GL.

[0024] Source driver 17 may include a source driver integrated circuit and can drive multiple data lines DL based on control signals from the source driver integrated circuit. Source driver 17 can apply image signals corresponding to image data received from the processor to the multiple data lines DL. See below for further details. Figure 2As described, the gate driver 15 and the source driver 17 can be packaged on a single film. For example, the gate driver 15 and the source driver 17 can be mounted as a single package in different vertical layers at the lower end of the display panel 11.

[0025] The source driver 17 may include multiple blocks for detecting a short circuit between the gate line GL and the common voltage output line VL. The source driver 17 may include a common voltage buffer 19, a current generator 21, a current detector 23, and control logic 24. The common voltage buffer 19 can output a common voltage Vcom to a common voltage substrate 13 and can be connected to the current generator 21. The current generator 21 can generate an output current corresponding to the current flowing through the common voltage buffer 19 and can be connected to the current detector 23. The current detector 23 can convert the current output from the current generator 21 into an output voltage and can detect a short circuit between the gate line GL and the common voltage output line VL based on a comparison between the output voltage and a preset voltage. Although Figure 1 It is shown that the common voltage buffer 19, current generator 21, current detector 23 and control logic 24 are included in the source driver 17, and the common voltage buffer 19, current generator 21, current detector 23 and control logic 24 can also be implemented separately from the source driver 17.

[0026] Figure 2 This is an illustration of a display device 30 according to an example embodiment. References are attached below. Figure 1 To describe Figure 2 .

[0027] Reference Figure 2 In the display device 30, it is possible to arrange gate drivers in the left and right regions 32 of the display panel 31 to drive the gate lines.

[0028] However, with the introduction of technologies that minimize the peripheral space outside the visible area of ​​a display (borderless design), it is possible to implement a display driver integrated circuit that includes a gate driver 33 disposed at the lower end of the display panel 31, while encapsulating the gate driver 33 and the source driver 34 in a single film 35. In this case, the output lines of the gate driver 33 and the source driver 34 may both be located on the same film 35, thus potentially causing a short circuit between the gate line GL and the common voltage output line VL in the display panel 31. Furthermore, if an overcurrent flows due to the short circuit, the panel yield may be reduced.

[0029] As described herein, the display device according to the example embodiment can be implemented to have the functions of detecting short circuits (e.g., a short circuit between the gate line GL and the common voltage output line VL) and controlling the voltage output, which can protect the display panel and improve the panel yield.

[0030] Figure 3 This is an illustration of a display driver integrated circuit 40 according to an example embodiment.

[0031] Reference Figure 3 The display driver integrated circuit 40 may include a common voltage buffer 41, a current generator 43, and a current detector 45.

[0032] The common voltage buffer 41 may include a first transistor Tr1 and a second transistor Tr2. The first transistor Tr1 may be configured as a PMOS transistor, and the second transistor Tr2 may be configured as an NMOS transistor. The first transistor Tr1 and the second transistor Tr2 may be sequentially connected in series between the power supply voltage VDD and ground. The source of the first transistor Tr1 may be connected to the power supply voltage VDD, the gate of the first transistor Tr1 may be connected to a third transistor Tr3, and the drain of the first transistor Tr1 may be connected to the second transistor Tr2. For example, the gate of the first transistor Tr1 may be connected to the gate of the third transistor Tr3, and the drain of the first transistor Tr1 may be connected to the drain of the second transistor Tr2. The source of the second transistor Tr2 may be connected to ground, and the gate of the second transistor Tr2 may be connected to a fourth transistor Tr4. Although... Figure 3 The common voltage buffer 41 is shown to include only the first transistor Tr1 and the second transistor Tr2 corresponding to the output, but the common voltage buffer 41 may also include multiple devices. This is based on the components included in the display device (e.g., Figure 1 The control signal output by the processor in the display device (10) can drive the first transistor Tr1 and the second transistor Tr2.

[0033] In an example embodiment, the current generator 43 may include a third transistor Tr3, a fourth transistor Tr4, and a current mirror 47. The third transistor Tr3 may be configured as a PMOS transistor, and the fourth transistor Tr4 may be configured as an NMOS transistor. The source of the fourth transistor Tr4 may be connected to ground, the gate of the fourth transistor Tr4 may be connected to the second transistor Tr2, and the drain of the fourth transistor Tr4 may be connected to the current mirror 47. For example, the gate of the fourth transistor Tr4 may be connected to the gate of the second transistor Tr2, and the drain of the fourth transistor Tr4 may be connected to the drain of the fifth transistor Tr5. The fifth transistor Tr5 and the sixth transistor Tr6 included in the current mirror 47 may be PMOS transistors with the same characteristics. In the current mirror 47, the gate and drain of the fifth transistor Tr5 may be interconnected, and the gate of the fifth transistor Tr5 may be connected to the gate of the sixth transistor Tr6; therefore, the current mirror 47 can generate a mirrored current corresponding to the common current flowing through the fourth transistor Tr4.

[0034] The current detector 45 may include an amplifier Amp, a seventh transistor Tr7, a resistor R1, and a comparator COMP. The first transistor Tr1 and the second transistor Tr2 may be connected to the first input terminal of the amplifier Amp, and the third transistor Tr3 and the sixth transistor Tr6 may be connected to the second input terminal of the amplifier Amp. For example, the drains of the first transistor Tr1 and the second transistor Tr2 may be connected to the first input terminal of the amplifier Amp, and the drains of the third transistor Tr3 and the sixth transistor Tr6 may be connected to the second input terminal of the amplifier Amp. The first input terminal of the amplifier Amp may be a non-inverting terminal, and the second input terminal of the amplifier Amp may be an inverting terminal. The current output from the current generator 43 can pass through the seventh transistor Tr7 and the resistor R1 and can be converted into an output voltage. The comparator COMP can compare the output voltage with a preset voltage Vref, outputting a low-level signal when the output voltage is lower than the preset voltage Vref and a high-level signal when the output voltage is higher than the preset voltage Vref. The current detector 45 may be connected to control logic, and the control logic may generate a signal to control the power management integrated circuit or the common voltage buffer 41 based on the signal output from the current detector 45.

[0035] Figure 4 The following is illustrated according to an example embodiment when the gate line and the common voltage output line are short-circuited. Figure 3 The current flows in the display driver integrated circuit 40. Specifically, Figure 4 This is a circuit diagram showing the current flow when the gate line, under applied high gate voltage VGH, is short-circuited to the common voltage output line. Figure 4 In the diagram, the path through which the current flows is indicated by an arrow.

[0036] See below for reference Figure 4 and Figure 5 As described, when the common voltage output line and the gate line are short-circuited, the first current Isourcing or the second current Isinking can flow according to the level VGH or VGL of the gate voltage applied to the gate line. The display driver integrated circuit 50 can be designed independently based on the first current Isourcing or the second current Isinking.

[0037] Reference Figure 4 The gate line with applied high gate voltage (VGH, e.g., 40V) and the common voltage output line can be short-circuited, and the first current Isourcing can flow through the short-circuit circuit 57. The first current Isourcing can be the current applied to the gate line from the common voltage buffer 51 and can be referred to as the source current.

[0038] In the example embodiment, the first current Isourcing can flow through the first transistor Tr1 to the short-circuit circuit 57. When the first transistor Tr1 is turned on, the same gate voltage can be applied to the third transistor Tr3. The drain of the first transistor Tr1 can be connected to the first input terminal of the amplifier Amp, and the amplifier Amp can be operated such that the voltages at the two input terminals are the same. Therefore, a voltage the same as the drain voltage of the first transistor Tr1 can be applied to the drain of the third transistor Tr3, which is connected to the second input terminal of the amplifier Amp. The first input terminal of the amplifier Amp can be a non-inverting terminal, and the second input terminal of the amplifier Amp can be an inverting terminal. Therefore, the voltages applied to the gate, source, and drain of the third transistor Tr3 can be the same as the voltages applied to the gate, source, and drain of the first transistor Tr1, and the same as the first current Isourcing. sourcing The same current can flow through the third transistor Tr3.

[0039] First current I sourcing The current can flow through the third transistor Tr3 and then to the seventh transistor Tr7. The first current I through the seventh transistor Tr7... sourcing The output voltage can be converted using resistor R1. Comparator COMP compares the output voltage with a preset voltage Vref. When the input voltage is higher than the preset voltage Vref due to a short circuit, comparator COMP outputs a high-level signal. See below for reference. Figure 8 As described, the comparator COMP can be connected to the control logic. When the control logic receives a high-level signal, it can determine that a short circuit has been detected in the display driver integrated circuit 50 and generate a signal for controlling at least one of, for example, the power management integrated circuit and the common voltage buffer 51.

[0040] Figure 5 The following is illustrated according to an example embodiment when the gate line and the common voltage output line are short-circuited. Figure 3 The current flows in the display driver integrated circuit 40. Specifically, Figure 5 This is a circuit diagram illustrating the current flow when the gate line, with a low gate voltage VGL applied, is short-circuited to the common voltage output line. Figure 5 In the diagram, the path through which the current flows is indicated by an arrow.

[0041] Reference Figure 5 The gate line with an applied low gate voltage (VGL, e.g., -10V) and the common voltage output line can be short-circuited, and the second current I... sinking It can flow through a short-circuited circuit. The second current I sinking It can be the current applied from the gate line to the common voltage buffer 61 and can be referred to as the absorption current.

[0042] Second current Isinking A short circuit can flow to the second transistor Tr2. When the second transistor Tr2 is turned on, the same gate voltage can be applied to the fourth transistor Tr4. The drain of the second transistor Tr2 can be connected to the first input terminal of the amplifier Amp, and the amplifier Amp can be operated such that the voltages at both input terminals are the same. Therefore, a voltage identical to the drain voltage of the second transistor Tr2 can be applied to the drain of the fourth transistor Tr4, which is connected to the second input terminal of the amplifier Amp. The first input terminal of the amplifier Amp can be a non-inverting terminal, and the second input terminal of the amplifier Amp can be an inverting terminal. Therefore, the voltages applied to the gate, source, and drain of the fourth transistor Tr4 can be the same as the voltages applied to the gate, source, and drain of the second transistor Tr2, and are also related to the second current I. sinking The same current can flow through the fourth transistor Tr4.

[0043] Second current I sinking The current can flow through resistor R1 and the seventh transistor Tr7 to the fourth transistor Tr4. The second current I... sinking The output voltage can be converted via resistor R1, and comparator COMP compares the output voltage with a preset voltage Vref. When a voltage higher than the preset voltage Vref is input due to a short circuit, comparator COMP outputs a high-level signal. See below for reference. Figure 8 As described, the comparator COMP can be connected to control logic that can determine that a short circuit is detected in the display driver integrated circuit 60 when a high-level signal is received, and can generate a signal for controlling at least one of, for example, a power management integrated circuit and a common voltage buffer 61.

[0044] Figure 6 This is a circuit diagram of a display driver integrated circuit 70 according to an example embodiment. Specifically, the display driver integrated circuit 70 will... Figure 4 The display driver integrated circuit 50 and Figure 5 The display driver integrated circuit 60 shown is integrated into a single circuit.

[0045] When the gate line with applied gate low voltage VGL and the common voltage output line are short-circuited, the first current I... sourcing The common voltage buffer 71 can be applied to the gate line. The first current I... sourcing The current can flow to the gate line through the first transistor Tr1. Simultaneously, when the gate line with the applied high gate voltage VGH and the common voltage output line are short-circuited, the second current I... sinking A common voltage buffer 71 can be applied from the gate line. For example, the second current I sinking The second transistor Tr2 can flow through the gate line. (Refer to the above.) Figure 4 and Figure 5 As described, the current generator 73 can replicate the first current I applied to the first transistor Tr1. sourcing and the first current I sourcing The second current I is applied to the third transistor Tr3, and is replicated from the current applied to the second transistor Tr2. sinking and the second current I sinking The current applied to the fourth transistor Tr4 is then mirrored again by a current mirror and applied to the sixth transistor Tr6.

[0046] Reference Figure 6 The drain of the sixth transistor Tr6 and the drain of the third transistor Tr3 can be connected to the first node CN. The current generator 73 can then transmit the first current I... sourcing Second current I sinking The summed current is output to current detector 75 through the first node CN. The output current can be converted into an output voltage by the seventh transistor Tr7 and resistor R1, and comparator COMP can compare the output voltage with a preset voltage Vref. When a voltage higher than the preset voltage Vref is input due to a short circuit, comparator COMP can output a high-level signal. The display driver IC 70 can output the first current I... sourcing Second current I sinking The current obtained by summing is used to detect short circuits through a single amplifier (Amp) and a single comparator (COMP). Therefore, smaller integrated circuits can be provided.

[0047] Figure 7 A display driver integrated circuit 80 according to an example embodiment is shown. Specifically, the display driver integrated circuit 80 may be... Figure 6 The display driver integrated circuit 70 shown has a circuit that improves current mismatch.

[0048] Return to reference Figure 6 When the display driver integrated circuit 70 is implemented using a single amplifier Amp, current mismatch may occur. For example, the voltages applied to the drains of the second transistor Tr2 and the fourth transistor Tr4 in the display driver integrated circuit 70 may be different, and there may be slight differences in the intensity of the current flowing through the second transistor Tr2 and the current flowing through the fourth transistor Tr4.

[0049] Reference Figure 7 The display driver integrated circuit 80 may include a common voltage buffer 81, a current generator 83, and a current detector 85.

[0050] The current generator 83 may include a first amplifier Amp1. The output voltage Vcom_out of the common voltage buffer 81 can be input to the first input terminal of the first amplifier Amp1, and the drain of the fourth transistor Tr4 can be connected to the second input terminal of the first amplifier Amp1. For example, the first input terminal of the first amplifier Amp1 can be a non-inverting terminal, and the second input terminal of the first amplifier Amp1 can be an inverting terminal. The first amplifier Amp1 can be operated such that the voltages at the two input terminals are the same. Therefore, a voltage identical to the output voltage Vcom_out can be applied to the drain of the fourth transistor Tr4 connected to the first input terminal of the first amplifier Amp1. Therefore, the current flowing through the second transistor Tr2 and a current of the same intensity can flow through the fourth transistor Tr4, and current mismatch can be reduced or eliminated.

[0051] The current detector 85 may include a second amplifier Amp2. The output voltage Vcom_out of the common voltage buffer 81 can be input to the first input terminal of the second amplifier Amp2, and the drain of the third transistor Tr3 can be connected to the second input terminal of the second amplifier Amp2. For example, the first input terminal of the first amplifier Amp1 can be a non-inverting terminal, and the second input terminal of the first amplifier Amp1 can be an inverting terminal. The second amplifier Amp2 can be operated such that the voltages at the two input terminals are the same. Therefore, a voltage identical to the output voltage Vcom_out can be applied to the drain of the third transistor Tr3 connected to the second input terminal of the second amplifier Amp2. Thus, the current flowing through the first transistor Tr1 and a current of the same strength can flow through the third transistor Tr3, and current mismatch can be resolved.

[0052] Current generator 83 can replicate the first current I applied to the first transistor Tr1. sourcing and the first current I sourcing The first current I is applied to the third transistor Tr3. sourcing The output can be sent to the current detector 85 and can be converted into a first output voltage V_source by the seventh transistor Tr7 and the first resistor R1. The current generator 83 can replicate the second current I applied to the second transistor Tr2. sinking and the second current I sinking The current applied to the fourth transistor Tr4 is mirrored through the eighth transistor Tr8 and current mirror 87 to be applied to the sixth transistor Tr6. The mirrored current can be output to the current detector 85. The mirrored current can pass through the second resistor R2 and be converted into the second output voltage V_sink.

[0053] When a first output voltage V_source, which is higher than the preset voltage Vref, is input due to a short circuit, the second comparator COMP2 can output a high-level signal. Furthermore, when a second output voltage V_sink, which is higher than the preset voltage Vref, is input due to a short circuit, the first comparator COMP1 can output a high-level signal.

[0054] The display driver integrated circuit 80 can output from the current generator 83 a first current I. sourcing Second current I sinking The corresponding current is converted into a first output voltage V_source and a second output voltage V_sink, respectively. The first output voltage V_source and the second output voltage V_sink are then compared with a preset voltage, thereby providing a high-precision short-circuit detection circuit.

[0055] Figure 8 A display device 100 according to an example embodiment is shown. Figure 9 This illustrates the control according to an example embodiment when... Figure 8 A flowchart of the output voltage when a short circuit is detected in the display device 100.

[0056] Reference Figure 8 The display device 100 may include a display panel 101, a common voltage substrate 103, a gate driver 105, a source driver 107, a TCON 117, and a PMIC 119. (This is in conjunction with...) Figure 1 Similar to the description above, the source driver 107 may include a common voltage buffer 109, a current generator 111, a current detector 113, and control logic 115. In the following text, the details will be omitted. Figure 1 The description is repeated. Figure 8 The description.

[0057] TCON117 can receive horizontal synchronization signals, vertical synchronization signals, clock signals, and data enable signals from the processor to drive image data. TCON117 can control the driving timing of gate driver 105 and source driver 107 based on the received signals. TCON117 can convert the format of image data to meet the specifications of interfacing with source driver 107 and provide the image data to source driver 107.

[0058] PMIC 119 can receive electrical energy to supply and manage the electrical energy used by display device 100. PMIC 119 can convert the supplied electrical energy into an output voltage and rectify the output voltage into an output current. PMIC 119 may include a low dropout regulator (LDO), a real-time clock, a DC / DC buck converter, a switching regulator, etc., and can be implemented as a system-on-a-chip (SoC). In the example embodiment, PMIC 119 can receive electrical energy and supply the electrical energy used by gate driver 105, source driver 107, and TCON 117.

[0059] Reference Figure 9 In operation S10, the current generator 111 can generate an output current corresponding to the current flowing through the common voltage buffer 109. For example, the current generator 111 can generate an output current corresponding to the current flowing through the common voltage buffer 109 through a current mirror structure. The current detector 113 can convert the output current into an output voltage and output a high or low level signal based on the result of comparing the output voltage with a preset voltage. In operation S20, when the common voltage output line and the gate line are short-circuited, an output voltage greater than the common voltage is input, and the current detector 113 can output a high level signal. When the common voltage output line and the gate line are not short-circuited, the current detector 113 can output a low level signal.

[0060] In operation S30, control logic 115 can receive a signal output from current detector 113. When a high-level signal is received from current detector 113, control logic 115 can output control signal CTR3 to PMIC 119. In operation S40, PMIC 119 can output control signal CTR4 to gate driver 105 in response to control signal CTR3. In operation S50, gate driver 105 can block the gate voltage output according to the logic state of control signal CTR4.

[0061] In another example embodiment, when a high-level signal is received from the current detector 113, the control logic 115 can output a control signal CTR1 to the TCON 117. The TCON 117 can then output a control signal CTR3 to the PMIC 119 in response to the control signal CTR1.

[0062] PMIC 119 can output control signal CTR4 to gate driver 105 in response to control signal CTR3. Gate driver 105 can block the gate voltage output according to the logic state of control signal CTR4. Therefore, when current detector 113 detects a short circuit between the common voltage output line and the gate line, the display driver IC can protect the display panel by generating multiple control signals and blocking the gate voltage output.

[0063] In operation S60, when a high-level signal is received from the current detector 113, the control logic 115 can output a control signal CTR2 to the common voltage buffer 109. In operation S70, the common voltage buffer 109 can block the common voltage output according to the logic state of the control signal CTR2. Therefore, when the current detector 113 detects a short circuit between the common voltage output line and the gate line, the display driver integrated circuit can protect the display panel by generating a control signal and blocking the common voltage output.

[0064] By summarizing and reviewing, pixel electrodes can be used, for example, to drive liquid crystals. The angle of the liquid crystal can be adjusted by the difference between the voltage applied to the pixel electrode and the common voltage Vcom applied to the common electrode, and the light transmittance can be adjusted according to the angle of the liquid crystal.

[0065] As described above, the embodiments relate to a display driver integrated circuit for detecting short circuits (e.g., short circuits between the gate line and the common voltage output line).

[0066] The embodiments may provide a display driver integrated circuit and a display device for detecting a short circuit between a common voltage output line and a gate line.

[0067] Example embodiments have been disclosed herein, and although specific terminology has been used, it is for descriptive purposes only and should be interpreted in a general descriptive sense, not for limiting purposes. In some instances, as will be appreciated by those skilled in the art upon which this application has been filed, features, characteristics, and / or elements described in connection with specific embodiments may be used alone or in combination with features, characteristics, and / or elements described in other embodiments, unless expressly stated otherwise. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention as set forth in the appended claims.

Claims

1. A display driver integrated circuit, comprising: A common voltage buffer is configured to: provide a common voltage to the display panel, and apply a first current to the gate line or receive a second current from the gate line when the line outputting the common voltage is short-circuited with the gate line; A current generator is configured to sum the currents corresponding to the first current and the second current, respectively, and output the output current obtained by the summation. as well as A current detector is configured to convert the output current into an output voltage and output a high or low level signal based on a comparison of the output voltage with a preset voltage.

2. The display driver integrated circuit according to claim 1, wherein: The first current is applied to the gate line through the first transistor. The second current is applied from the gate line to the second transistor, and The first transistor and the second transistor are connected in series between the power supply voltage and ground.

3. The display driver integrated circuit according to claim 2, wherein: The first transistor includes a PMOS transistor. The second transistor includes an NMOS transistor, and The current generator includes a third transistor, which is a PMOS transistor having a gate connected to the gate of the first transistor and a source having a voltage applied to it equal to the power supply voltage.

4. The display driver integrated circuit according to claim 3, wherein the current generator includes a fourth transistor, the fourth transistor comprising: An NMOS transistor having a gate connected to the gate of the second transistor and a source connected to ground.

5. The display driver integrated circuit of claim 4, wherein the current generator includes a current mirror connected to the fourth transistor and configured to generate a mirror current identical to the current flowing through the fourth transistor.

6. The display driver integrated circuit according to claim 5, wherein the current mirror and the third transistor are interconnected through a first node.

7. The display driver integrated circuit of claim 6, wherein the current detector comprises an amplifier having a first input terminal connected to the first transistor and the second transistor and a second input terminal connected to the third transistor and the current mirror.

8. The display driver integrated circuit according to claim 1, wherein, The current detector includes: A resistor through which the output current passes, and the resistor is configured to convert the output current into the output voltage; and The comparator is configured to output a high or low level signal based on the result of comparing the output voltage with the preset voltage.

9. A display driver integrated circuit, comprising: A common voltage buffer is configured to: provide a common voltage to the display panel, and apply a first current to the gate line or receive a second current from the gate line when the line outputting the common voltage is short-circuited with the gate line; A current generator is configured to generate output currents corresponding to the first current and the second current, respectively. as well as The current detector is configured to convert the output current into a first output voltage and a second output voltage, respectively, and to output a high or low level signal based on the result of comparing the first output voltage with a preset voltage and the result of comparing the second output voltage with the preset voltage.

10. The display driver integrated circuit according to claim 9, wherein: The first current is applied to the gate line through the first transistor. The second current is applied from the gate line to the second transistor, and The first transistor and the second transistor are connected in series between the power supply voltage and ground.

11. The display driver integrated circuit according to claim 10, wherein, The first transistor includes a PMOS transistor. The second transistor includes an NMOS transistor, and The current generator includes a fourth transistor, which is an NMOS transistor having a gate connected to the gate of the second transistor and a source connected to ground.

12. The display driver integrated circuit of claim 11, wherein the current generator includes a first amplifier having a first input terminal connected to the first transistor and the second transistor and a second input terminal connected to the fourth transistor.

13. The display driver integrated circuit of claim 10, wherein the current detector comprises: A first resistor is configured to convert an output current corresponding to the first current into the first output voltage, and The second resistor is configured to convert the output current corresponding to the second current into the second output voltage.

14. The display driver integrated circuit of claim 13, wherein the current detector further comprises: The first comparator is configured to output a high or low level signal based on the result of comparing the first output voltage with the preset voltage; as well as The second comparator is configured to output a high or low level signal based on the result of comparing the second output voltage with the preset voltage.

15. A display device, comprising: A common voltage buffer is configured to: provide a common voltage to the display panel, and apply a first current to the gate line or receive a second current from the gate line when the line outputting the common voltage is short-circuited with the gate line; A current generator is configured to generate an output current corresponding to at least one of the first current and the second current; A current detector is configured to convert the output current into an output voltage and output a high or low level signal based on a comparison of the output voltage with a preset voltage. as well as The control logic is configured to receive an output signal from the current detector and generate a control signal based on the output signal.

16. The display device of claim 15, further comprising a power management integrated circuit (PMIC). in, The control signal is a signal that controls at least one of the PMIC and the common voltage buffer.

17. The display device according to claim 16, further comprising a timing controller TCON, in, The TCON is configured to output a signal controlling the PMIC based on the logic state of the signal generated by the control logic.

18. The display device of claim 16, further comprising a gate driver, in, The PMIC is configured to output a signal that blocks the gate voltage output to the gate driver based on the logic state of the signal generated by the control logic.

19. The display device according to claim 16, wherein, The common voltage buffer is configured to block the output of the common voltage based on the logic state of the signal generated by the control logic.

20. The display device of claim 15, further comprising a source driver, in, The source driver includes the common voltage buffer, the current generator, and the current detector.

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