Data processing method, data processing system, and computer-readable storage medium

Abstract

The application provides a data processing method, a data processing system and a computer readable storage medium, and relates to the technical field of data processing. The method comprises the following steps: determining, by a first memory, a mapping address region according to a modified address region in a second memory, and storing a mapping relationship between the mapping address region and the modified address region in a controller; judging, by the controller, whether an access address is in the modified address region; and if the access address is in the modified address region, reading or writing target data in the first memory based on the mapping relationship by a processor. The application determines and stores the mapping relationship between the addresses in the first memory and the second memory, maps the modified data in the second memory to the first memory, reads or writes the data in the first memory according to the mapping relationship when the request of access is in the corresponding address region, can save the memory consumption in the first memory, and improves the space use efficiency of the first memory.

Description

Technical Field

[0001] This application relates to the field of data processing technology, and more specifically, to a data processing method, a data processing system, and a computer-readable storage medium. Background Technology

[0002] An embedded system consists of hardware and software, and is a device capable of operating independently. Its software comprises only the software runtime environment and its operating system. The hardware includes various components such as signal processors, memory, and communication modules.

[0003] In current embedded applications, RAM (Random Access Memory) is a crucial resource in embedded systems. However, some arrays in RAM are frequently read but rarely written to or modified. These arrays are writable data and cannot be stored in the read-only areas of other memory locations; they can only be stored in the DATA segment of RAM. This results in significant RAM memory consumption, reduced RAM space utilization efficiency, and wasted storage resources in the embedded system. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide a data processing method, a data processing system, and a computer-readable storage medium to improve the problem of low RAM space utilization efficiency in the prior art.

[0005] To address the aforementioned problems, firstly, this application provides a data processing method, the method comprising:

[0006] The first memory determines the mapped address region based on the modified address region in the second memory, and the mapping relationship between the mapped address region and the modified address region is stored in the controller.

[0007] The controller determines whether the access address is in the modified address region;

[0008] If the access address is in the modified address region, the processor reads or writes the target data in the first memory based on the mapping relationship.

[0009] In the above implementation process, the first memory determines the mapped address region obtained by mapping the modified address region in the second memory, which is allocated according to the dynamic memory request, to the modified address region that needs to modify the data. This maps the modified data content in the second memory to the first memory, and the controller stores the mapping relationship between the two. The controller determines whether the access address is in the modified address region of the second memory. If the access address is in the modified address region, the processor reads or writes the target data according to the mapping relationship. By mapping the contents of the second memory to the first memory, reading or writing to the first memory is only performed when accessing the modified region corresponding to the mapping relationship is involved, without storing the data in the first memory. This effectively saves memory consumption in the first memory, improves the space utilization efficiency of the first memory, further reduces the storage cost of the embedded system, enhances the storage function of the embedded system, and improves the hardware response speed of the embedded system.

[0010] Optionally, the controller is connected to the second memory; the step of determining a mapped address region from the first memory based on a modified address region in the second memory, and storing the mapping relationship between the mapped address region and the modified address region in the controller, includes:

[0011] The controller determines the modified address region corresponding to the readable and writable data region of the second memory based on the modification request;

[0012] The mapped address region is determined by the first memory based on the modified address region;

[0013] The controller stores the obtained mapping relationship between the mapped address region and the modified address region in the controller's comparison module.

[0014] In the above implementation process, the controller connected to the second memory determines the modified address region in the readable and writable data area of ​​the second memory based on the modification request issued by the processor during access. This allows the controller to identify one or more subsets of modified data addresses within the readable and writable data area. Based on the determined modified address region, dynamic memory allocation is performed, allocating a mapped address region in the first memory obtained by mapping the modified data content of the modified address region. This enables the controller to acquire the mapped address region and store the mapping relationship between the mapped address region and the modified address region in a comparison module. This allows the modified content in the second memory to be mapped to the first memory, combining readable and read-only memory to reduce memory consumption in the first memory.

[0015] Optionally, before the controller determines the corresponding modified address region in the readable and writable data region of the second memory according to the modification request, the method further includes:

[0016] The processor determines the read-only data address in the second memory;

[0017] The processor obtains the readable and writable data area based on the read-only data address mapping.

[0018] In the above implementation process, before determining the address region to be modified, the readable and writable data region in the second memory can be determined first. The processor determines a region of read-only data in the second memory and obtains the address of this region, which is used as the read-only data address. Then, through linking, scripting, or other methods, this region of read-only data address is mapped to a readable and writable data region of the data segment. This allows the read-only content in the second memory to be mapped to the readable and writable region, so that one or more modification address regions corresponding to the modification request can be determined in the readable and writable data region later.

[0019] Optionally, the step of the controller determining whether the access address is in the modified address region includes:

[0020] The controller determines the access address of the access request in the readable and writable data area based on the access request sent from the processor.

[0021] The comparison module in the controller determines whether the access address is within the address range of the modified address region.

[0022] In the above implementation process, the comparison module in the controller can store one or more determined modified address regions and compare the stored modified address regions with the access addresses corresponding to the obtained access requests to determine whether the access address is within the modified address regions, thereby performing the corresponding access in the corresponding memory.

[0023] Optionally, the step of determining whether the access address is within the address range of the modified address region by the comparison module in the controller includes:

[0024] The comparison module determines a first address value of the first boundary and a second address value of the second boundary of the modified address region, wherein the first address value is less than the second address value.

[0025] The comparison module determines the third address value of the access address;

[0026] The comparison module compares the first address value, the second address value, and the third address value.

[0027] Specifically, when the third address value is greater than or equal to the first address value and the third address value is less than or equal to the second address value, the access address is located within the address range of the modified address region; when the third address value is less than the first address value or the third address value is greater than the second address value region, the access address is located outside the address range of the modified address region.

[0028] In the above implementation process, when the controller compares address data, the comparison module can convert the strings of the addresses at the two boundaries of the access address and the modified address region into address values. The magnitude of the address value is then used to determine whether the access address is within the modified address region. The comparison logic circuit in the comparison module can quickly and accurately determine the positional relationship between the access address and the modified address region, and output the corresponding judgment result in the controller.

[0029] Optionally, if the access address is in the modified address region, the processor reads or writes target data in the first memory based on the mapping relationship, including:

[0030] If the access address is in the modified address region, the controller determines the target address in the first memory according to the mapping relationship;

[0031] When the access request in the processor is a read request, the processor reads the target data from the target address;

[0032] When the access request in the processor is a write request, the processor writes the target data to the target address.

[0033] In the above implementation process, when the controller determines that the access address is within the modified address region, the data in the access request address region is the modified data. The controller can use the target address in the mapped address region as the address to respond to the corresponding access request based on the mapping relationship between the modified address region and the mapped address region. When the access address is within the modified address region, the processor can access the target address in the first memory according to different access requests, read the target data stored at that address, or write the target data to that address. Thus, the contents of the second memory are mapped based on the first memory. Only when access to the modified region corresponding to the mapping relationship is involved, the data is read or written to the corresponding address in the first memory, effectively saving memory consumption in the first memory.

[0034] Optionally, the step of the controller determining the target address in the first memory according to the mapping relationship includes:

[0035] The selector in the controller decodes the access address and the stored mapping relationship to obtain the target address in the mapped address region;

[0036] The controller outputs the target address obtained from the selector.

[0037] In the above implementation process, when the controller outputs the mapped address area, the controller's selector can obtain the judgment result output by the comparison module, thereby obtaining the access address therein. Based on the access address and the mapping relationship between the stored mapped address area and the modified address area, the selector decodes the target address in the mapped address area and uses the target address as the address to respond to the access request after comparison.

[0038] Optionally, the method further includes:

[0039] If the access address is not in the modified address region, and the access request in the processor is a read request, the processor reads the initial data in the access address;

[0040] When the access request in the processor is a write request, the controller returns an error message to the processor.

[0041] In the above implementation, when the controller determines that the access address is not within the modified address range, the data in the access request address range remains unchanged. During reading, the controller can directly return the initial data stored in the access address in the second memory to the processor for reading. During writing, since the content stored in the access address is fixed, writing is not possible. The controller can return an error message to the processor to provide feedback and notification of errors in the request to write to the second memory. This allows for corresponding processing of access requests based on different access address locations, improving access efficiency.

[0042] Secondly, this application also provides a data processing system, the system comprising: a first memory, a second memory, a controller, and a processor;

[0043] The processor is connected to the first memory and the controller via a communication bus, and the controller is connected to the second memory.

[0044] The first memory is used to determine a mapped address region based on the modified address region in the second memory, and to store the mapping relationship between the mapped address region and the modified address region in the controller;

[0045] The controller is used to determine whether the access address is in the modified address region;

[0046] If the access address is in the modified address region, the processor is used to read or write target data in the first memory based on the mapping relationship.

[0047] In the above implementation process, in the digital processing system, a controller connected to the second memory controls the memory data in the second memory. The first memory determines a mapped address region corresponding to the modified address region in the second memory, allocated according to dynamic memory requests. This maps the modified data in the second memory to the first memory, allowing the controller to store the mapping relationship. Based on the controller's judgment of the relationship between the access address and the modified address region, when the access address is in the modified address region, the processor reads or writes the target data in the first memory according to the mapping relationship. By mapping the contents of the second memory to the first memory, reading or writing to the first memory is only performed when accessing the modified region corresponding to the mapping relationship is involved, eliminating the need to store the data in the first memory. This effectively saves memory consumption in the first memory, improves the space utilization efficiency of the first memory, further reduces the storage cost of the embedded system, enhances the storage function of the embedded system, and improves the hardware response speed of the embedded system.

[0048] Thirdly, this application also provides a computer-readable storage medium storing computer program instructions, which, when read and executed by a processor, perform the steps in any of the above-described data processing methods.

[0049] In summary, this application provides a data processing method, a data processing system, and a computer-readable storage medium. By mapping the contents of the memory and combining the read-only memory and read-write memory in the memory, the memory consumption in the memory is saved, the space utilization efficiency of the memory is improved, the storage cost of the embedded system is further reduced, and the storage function and hardware response speed of the embedded system are improved. Attached Figure Description

[0050] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0051] Figure 1 A flowchart illustrating a data processing method provided in an embodiment of this application;

[0052] Figure 2 A detailed flowchart of step S100 provided for an embodiment of this application;

[0053] Figure 3 A flowchart illustrating another data processing method provided in an embodiment of this application;

[0054] Figure 4 A detailed flowchart of step S200 provided for an embodiment of this application;

[0055] Figure 5 A detailed flowchart of step S220 provided for an embodiment of this application;

[0056] Figure 6 A detailed flowchart of step S300 provided for an embodiment of this application;

[0057] Figure 7 A detailed flowchart of step S310 provided for an embodiment of this application;

[0058] Figure 8 This is a schematic diagram of the structure of a data processing system provided in an embodiment of this application.

[0059] Icons: 410 - First memory; 420 - Second memory; 430 - Controller; 440 - Processor. Detailed Implementation

[0060] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of the embodiments of this application.

[0061] Embedded systems can include various types of memory, such as RAM (Random Access Memory), ROM (Read-Only Memory), and FLASH (Flash Memory). ROM is a storage medium that permanently stores data in computers and other electronic devices, retaining its memory even when power is off. FLASH not only has electronic erasable and programmable capabilities but also retains data even when power is off, and it can also be read quickly. RAM is an internal memory that directly exchanges data with the CPU (Central Processing Unit), allowing for read and write operations at any time at very high speeds. Compared to ROM for the same area, RAM is more expensive; therefore, RAM storage resources are a crucial resource in embedded systems.

[0062] In current embedded applications, RAM often contains large, sparse matrices or arrays of data. This data is frequently read but infrequently written and modified. Because this data is writable, it can only be stored in the RAM's DATA segment, not in the ROM's RO (Read-Only) segment. For example, in TWS (True Wireless Stereo) applications, a large array could represent the host Bluetooth database for the Bluetooth stack. This array, supported by different profiles (user data / configuration), can reach tens of kilobytes in size. Although it requires rewriting, its usage is infrequent. Therefore, this host Bluetooth database must be entirely stored in the RAM's DATA segment, resulting in high RAM memory consumption, reduced RAM space utilization efficiency, and wasted embedded system storage resources. Furthermore, storing the data in the DATA segment requires the processor to re-process the data upon each reboot to restore the corresponding portion of RAM to its initial value, consuming processor resources.

[0063] Therefore, in order to solve the above problems, this application provides a data processing method. Please refer to [link to relevant documentation]. Figure 1 , Figure 1 This is a flowchart illustrating a data processing method provided in an embodiment of this application. The method may include steps S100-S300.

[0064] In step S100, the first memory determines the mapped address region based on the modified address region in the second memory, and stores the mapping relationship between the mapped address region and the modified address region in the controller.

[0065] The first memory can be RAM, the second memory can be ROM or FLASH memory, and the controller is a ROM controller or FLASH controller corresponding to the second memory. By mapping the modified data, the modified data content in the second memory can be mapped to the first memory, thereby allowing the first memory to determine the mapped address region allocated according to dynamic memory requests, and the controller stores the mapping relationship between the two. Both the modified address region and the mapped address region can be an address range of data. The modified address region can be denoted as [a1, a2], and the mapped address region can be denoted as [b1, b2]. The mapping relationship between them is a one-to-one linear mapping relationship; for example, a1 corresponds to b1, and a2 corresponds to b2 at the boundary. The mapping process can also be considered as a process of mutual registration between the two address regions.

[0066] Optionally, the first memory can also be a FLASH memory, in which case the corresponding second memory is a ROM, and the controller is a ROM controller. Since the data in the ROM cannot be modified after being hardened, in order to modify some code in the ROM, the code on the ROM can be mapped to the FLASH memory. This allows for patching operations on a large amount of executable code in the ROM, thereby repairing the code and improving the efficiency of code repair.

[0067] In step S200, the controller determines whether the access address is in the modified address region.

[0068] The controller can determine the address to be read or written during access by judging whether the access address is located in the modified address area of ​​the second memory when the access request is made.

[0069] Step S300: If the access address is in the modified address region, the processor reads or writes the target data in the first memory based on the mapping relationship.

[0070] Specifically, when the access address falls within the address range of the modified address region, the controller can determine the corresponding address in the first memory for reading or writing based on the stored mapping relationship, allowing the processor to read or write the target data in the first memory. By only accessing the modified region corresponding to the mapping relationship, reading or writing to the first memory is performed, eliminating the need to store data in the first memory. This effectively saves storage space in the first memory, thereby improving its space utilization efficiency. When the first memory is RAM and the second memory is ROM, since RAM is more expensive than ROM, this effectively saves on the storage cost of the embedded system. Furthermore, because the data is stored in the second memory, the second memory can always maintain the original data. It does not require consuming processor resources before each use to move the original data from other memories to the first memory to restore the modified data generated by reading or writing in the first memory to the original data, further improving the processor's processing efficiency.

[0071] Optionally, since the data in the second memory is fixed, a FLASH memory can be used to save the modified data generated by reading or writing to the first memory.

[0072] exist Figure 1 In the illustrated embodiment, memory consumption in the first memory can be effectively saved, the space utilization efficiency of the first memory can be improved, the storage function of the embedded system can be further enhanced, and the hardware response speed of the embedded system can be improved.

[0073] Optionally, please refer to Figure 2 , Figure 2 This is a detailed flowchart of step S100 provided in an embodiment of the present application. Step S100 may also include steps S110-S130.

[0074] In step S110, the controller determines the modified address region corresponding to the readable and writable data region of the second memory according to the modification request.

[0075] When executing certain functions in the software, the processor receives various modification requests from the software application layer to modify the contents stored in the secondary memory, such as requests to modify certain parameters or assignments. When the controller receives the modification request sent by the processor, it can determine the data segment to be modified in the modification request, and identify the address range corresponding to the data segment in the readable and writable data area of ​​the secondary memory as the modification address area.

[0076] Alternatively, the processor can access memory via DMA (Direct Memory Access).

[0077] Step S120: The first memory determines the mapped address region based on the modified address region.

[0078] When making a memory request, the software can dynamically request memory from the corresponding manager, thereby managing and recording the regions in the memory. Based on the size and address location of the modified address region, a segment of memory can be allocated in the first memory as a mapped address region by linearly mapping the data content modified in the modified address region.

[0079] In step S130, the controller stores the obtained mapping relationship between the mapped address region and the modified address region in the controller's comparison module.

[0080] The controller can obtain the mapped address region allocated in the first memory and the modified address region corresponding to the data modification in the second memory, and store the two address regions and the mapping relationship between the two address regions in the comparison module of the controller.

[0081] exist Figure 2 In the illustrated embodiment, modified data content in the second memory can be mapped to the first memory to combine the readable memory and read-only memory in the memory, thereby reducing memory consumption in the first memory.

[0082] Optionally, please refer to Figure 3 , Figure 3 The flowchart of another data processing method provided in the embodiment of this application may include steps S140-S150 before step S110.

[0083] Step S140: The processor determines the read-only data address in the second memory.

[0084] Specifically, the processor determines a region of read-only data in the second memory and obtains the address of that region, which serves as the read-only data address.

[0085] Step S150: The processor obtains the readable and writable data area according to the read-only data address mapping.

[0086] Since the data in the second memory is read-only, in order to map it to the data content in the first memory, the software can process the data area of ​​the read-only data address through linking or scripting to map it to the readable and writable data location of the DATA segment, which can be denoted as [a0, an].

[0087] It should be noted that the readable and writable data area can be the entire set of an address range, while the modified address area can be a subset of the address range. The readable and writable data area can include the modified address areas corresponding to one or more data segments that are being modified.

[0088] exist Figure 3 In the illustrated embodiment, before determining the modified address region, the readable and writable data region in the second memory can be determined first, so that one or more modified address regions corresponding to the access request can be determined in the readable and writable data region later.

[0089] Optionally, please refer to Figure 4 , Figure 4 This is a detailed flowchart of step S200 provided in an embodiment of the present application. Step S200 may also include steps S210-S220.

[0090] Step S210: The controller determines the access address of the access request in the readable and writable data area based on the access request sent from the processor.

[0091] The access request can include a read request to read data or a write request to write data.

[0092] Step S220: The comparison module in the controller determines whether the access address is within the address range of the modified address region.

[0093] In existing ROM controllers, when a write request is received from the processor, the controller sends a write error message to the processor because the data stored in the second memory is read-only. However, in this embodiment, after receiving the access request, the controller can determine the access address corresponding to the access request in the read / write data area. Furthermore, the controller in this application includes a comparison module that can compare the access address with one or more modified address areas stored therein to determine whether the access address is within the address range of the modified address area.

[0094] exist Figure 4 In the illustrated embodiment, the relationship between the obtained access address and the access address range can be accurately and quickly determined.

[0095] Optionally, please refer to Figure 5 , Figure 5 This is a detailed flowchart of step S220 provided in an embodiment of the present application. Step S220 may also include steps S221-S225.

[0096] Step S221: The comparison module determines the first address value of the first boundary of the modified address region and the second address value of the second boundary.

[0097] Here, the first boundary is the boundary of the smaller address, and the second boundary is the boundary of the larger address. Therefore, the value of the first address is less than the value of the second address. For example, the first address value and the second address value are values ​​obtained by converting address strings. For instance, the first address value is the value of a1 in the address range [a1, a2], and the second address value is the value of a2.

[0098] Step S222: The comparison module determines the third address value of the access address.

[0099] The comparison module can also convert the string of the access address into a third address value, which can be denoted as ADDR.

[0100] Step S223: The comparison module compares the first address value, the second address value, and the third address value.

[0101] Among them, the comparison module can be a group-connected comparison logic module circuit, which can compare the contents of two values ​​byte by byte, thereby comparing the size of ADDR with a1 and a2.

[0102] It is worth noting that since the readable and writable data area can contain multiple modified address areas, multiple comparison modules can be set in the controller to compare the access address with multiple modified address areas multiple times.

[0103] Alternatively, other comparison modules with comparison and judgment functions can be used to judge and output whether the access address is within the address range of the modified address region.

[0104] Step S224: When the third address value is greater than or equal to the first address value and the third address value is less than or equal to the second address value, the access address is located within the address range of the modified address region.

[0105] The comparison module and AND gate logic can be connected to output the judgment result. When ADDR≥a1 and ADDR≤a2, the logic output is true, the judgment result is that the access address is located in the address range of the modified address region, and the judgment result is output to the selector for selection.

[0106] In step S225, when the third address value is less than the first address value or the third address value is greater than the second address value region, the access address is outside the address range of the modified address region.

[0107] Among them, when ADDR < a1 or ADDR > a2, the logical output is false, and the judgment result is that the access address is outside the address range of the modified address region, and the judgment result is output to the selector for selection.

[0108] In Figure 5 In the shown embodiment, the comparison logic circuit in the comparison module can quickly and accurately determine the positional relationship between the determined access address and the modified address region, and output the corresponding judgment result in the controller.

[0109] Optionally, please refer to Figure 6 , Figure 6 which is a detailed flowchart of step S300 provided by an embodiment of the present application. Step S300 may further include steps S310 - S330.

[0110] In step S310, if the access address is in the modified address region, the controller determines the target address in the first memory according to the mapping relationship.

[0111] Among them, when the controller determines that the access address is between the modified address regions, the data in the address region of the access request changes. The controller can output the target address in the mapped address region as the address when responding to the corresponding access request according to the mapping relationship between the modified address region and the mapped address region.

[0112] In step S320, when the access request in the processor is a read request, the processor reads the target data in the target address.

[0113] Among them, when the access request is a read request, the processor can access the target address in the mapped address region through the communication bus to read the target data in the target address.

[0114] In step S330, when the access request in the processor is a write request, the processor writes the target data in the target address.

[0115] Among them, when the access request is a read request, the processor can access the target address in the mapped address region through the communication bus to write the target data into the target address.

[0116] Optionally, if the access address is not in the modified address region, when the access request in the processor is a read request, the processor reads the initial data in the access address; when the access request in the processor is a write request, the controller returns an error message to the processor.

[0117] When the controller determines that the access address is not within the modified address range, the data in the requested address range remains unchanged. Therefore, during a read operation, the controller can directly return the initial data stored in the access address in the second memory to the processor for reading. During a write operation, since the read-only data stored in the access address is fixed and cannot be written to the second memory, the controller can return an error message to the processor to provide feedback and notification of any errors in the write request to the second memory. This ability to process access requests accordingly based on the different locations of the access address improves access efficiency.

[0118] Optionally, when the access request is a write request, the software layer can handle the write request in various ways to manage the readable and writable data area mapped in the second storage area. For example, if the upper-level software does not know whether the area in the memory is writable, a registration function corresponding to the write request can be set in the software's DRV (device driver). This allows the upper-level software to register the address range that needs to be written based on the DRV, making the processing method in the software more flexible. Alternatively, if the upper-level software knows whether the area in the memory is writable, it can initiate a pre-allocation request for registration. The DRV responds to the request and performs corresponding processing, effectively improving the processing efficiency in the software by processing according to whether the area is writable.

[0119] exist Figure 6 In the illustrated embodiment, the processor accesses the target address in the mapped address region of the first memory according to different access requests, thereby performing data reading or writing. Since the contents of the second memory are mapped to the first memory, reading or writing is only performed in the first memory when access to the modified region corresponding to the mapping relationship is involved, effectively saving memory consumption in the first memory.

[0120] Optionally, please refer to Figure 7 , Figure 7 This is a detailed flowchart of step S310 provided in an embodiment of the present application. Step S310 may also include steps S311-S312.

[0121] Step S311: The selector in the controller decodes the access address and the stored mapping relationship to obtain the target address in the mapped address region.

[0122] The selector can be a multiplexer (MUX) or other type of multiplexer, capable of receiving the logical judgment results from one or more comparison modules. When the logical result output by the comparison module is true, the access address is located within the address range of the modified address region. Since the mapping relationship between the modified address region and the mapped address region is a one-to-one linear mapping, the target address in the mapped address region can be decoded based on the address in the mapping relationship between the access address and the memory address. For example, the target address in the mapped address region can be ADDR-a1+b1.

[0123] Step S312: The controller outputs the target address obtained from the selector.

[0124] The selector can output the target address in the acquired mapped address region as the result. It can output the target address as the address to respond to the access request after comparison, while keeping WDATA (write data) or RDATA (read data) in the first memory unchanged.

[0125] exist Figure 7 In the illustrated embodiment, the address can be decoded, selected, and output to obtain the target address in the mapped address region.

[0126] Please see Figure 8 , Figure 8 This is a schematic diagram of a data processing system provided in an embodiment of this application. The data processing method provided in this embodiment is applied to the data processing system, which can be installed in an embedded system. The data processing system may include: a first memory 410, a second memory 420, a controller 430, and a processor 440.

[0127] The processor 440 is connected to the first memory 410 and the controller 430 via a communication bus, and the controller 430 is connected to the second memory 420.

[0128] The first memory 410 is used to determine the mapped address region based on the modified address region in the second memory 420, so as to store the mapping relationship between the mapped address region and the modified address region in the controller 430;

[0129] Controller 430 is used to determine whether the access address is in the address modification zone;

[0130] If the access address is in the modified address region, the processor 440 is used to read or write the target data in the first memory 410 based on the mapping relationship.

[0131] Optionally, the communication bus can be a bus with various communication protocols, such as AHB Bus (Advanced High Performance Bus), so that the first memory 410, the second memory 420, the controller 430 and the processor 440 can be electrically connected through the communication bus.

[0132] Optionally, the processor 440 described above may be an integrated circuit chip with signal processing capabilities. The processor 440 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0133] In an optional implementation, the controller 430 is further configured to determine the corresponding modified address region in the readable and writable data region of the second memory 420 based on the modification request;

[0134] The first memory 410 is also used to determine the mapped address region based on the modified address region;

[0135] The controller 430 is also used to store the mapping relationship between the acquired mapping address region and the modified address region in the comparison module of the controller 430.

[0136] In an optional implementation, the processor 440 is further configured to determine a read-only data address in the second memory 420; and to map a readable and writable data region based on the read-only data address.

[0137] In an optional implementation, the controller 430 is further configured to determine the access address of the access request in the readable and writable data area based on the access request sent from the processor 440.

[0138] The comparison module in controller 430 is also used to determine whether the access address is within the address range of the modified address region.

[0139] In an optional implementation, the comparison module is further configured to determine a first address value of the first boundary of the modified address region and a second address value of the second boundary, wherein the first address value is less than the second address value.

[0140] The comparison module is also used to determine the value of the third address of the access address;

[0141] The comparison module is also used to compare the values ​​at the first address, the second address, and the third address.

[0142] Specifically, if the third address value is greater than or equal to the first address value and the third address value is less than or equal to the second address value, then the access address is located within the address range of the modified address region; if the third address value is less than the first address value or the third address value is greater than the second address value, then the access address is located outside the address range of the modified address region.

[0143] In an optional implementation, if the access address is in the modified address region, the controller 430 is further configured to determine the target address in the first memory 410 according to the mapping relationship;

[0144] When the access request in processor 440 is a read request, processor 440 is also used to read the target data in the target address;

[0145] When the access request in processor 440 is a write request, processor 440 is also used to write the target data to the target address.

[0146] In an optional implementation, the controller 430 may further include a selector for decoding according to the access address and the stored mapping relationship to obtain the target address in the mapped address region;

[0147] The controller 430 is also used to output the target address obtained from the selector.

[0148] In an optional implementation, if the access address is not in the modified address region, and the access request in the processor 440 is a read request, the processor 440 is also used to read the initial data in the access address;

[0149] When the access request in processor 440 is a write request, controller 430 is also used to return an error message to processor 440.

[0150] Since the principle of the data processing system in this embodiment is similar to that of the aforementioned data processing method, the implementation of the data processing system in this embodiment can refer to the description in the above-mentioned data processing method embodiment, and the repeated parts will not be described again.

[0151] This application also provides a computer-readable storage medium storing computer program instructions. When the computer program instructions are read and executed by a processor, they perform the steps of any of the data processing methods provided in this application.

[0152] In summary, the embodiments of this application provide a data processing method, a data processing system, and a computer-readable storage medium. By mapping the contents of the memory and combining the read-only memory and read-write memory in the memory, memory consumption in the memory is saved, the space utilization efficiency of the memory is improved, the storage cost of the embedded system is further reduced, and the storage function and hardware response speed of the embedded system are improved.

[0153] In the several embodiments provided in this application, it should be understood that the disclosed device can also be implemented in other ways. The system embodiments described above are merely illustrative; for example, the block diagrams in the accompanying drawings show the architecture, functionality, and operation of possible implementations of the device according to various embodiments of this application. In this regard, each block in the block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram, and combinations of block diagrams, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0154] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0155] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Therefore, this embodiment also provides a computer program instruction stored in a readable storage medium. When this computer program instruction is read and executed by a processor, it performs the steps of any of the block data storage methods. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0156] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application. It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0157] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

[0158] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A data processing method, characterized in that, The method includes: The first memory determines the mapped address region based on the modified address region in the second memory, and the mapping relationship between the mapped address region and the modified address region is stored in the controller. The controller determines whether the access address is in the modified address region; If the access address is in the modified address region, the processor reads or writes the target data in the first memory based on the mapping relationship; The controller is connected to the second memory. The step of determining a mapped address region from the first memory based on a modified address region in the second memory, and storing the mapping relationship between the mapped address region and the modified address region in the controller, includes: the controller determining the modified address region corresponding to a readable and writable data region in the second memory based on a modification request; the first memory determining the mapped address region based on the modified address region; and the controller storing the obtained mapping relationship between the mapped address region and the modified address region in the controller's comparison module.

2. The method according to claim 1, characterized in that, Before the controller determines the modified address region corresponding to the readable and writable data region of the second memory based on the modification request, the method further includes: The processor determines the read-only data address in the second memory; The processor obtains the readable and writable data area based on the read-only data address mapping.

3. The method according to claim 1, characterized in that, The step of the controller determining whether the access address is in the modified address region includes: The controller determines the access address of the access request in the readable and writable data area based on the access request sent from the processor. The comparison module in the controller determines whether the access address is within the address range of the modified address region.

4. The method according to claim 3, characterized in that, The step of determining whether the access address is within the address range of the modified address region by the comparison module in the controller includes: The comparison module determines a first address value of the first boundary and a second address value of the second boundary of the modified address region, wherein the first address value is less than the second address value. The comparison module determines the third address value of the access address; The comparison module compares the first address value, the second address value, and the third address value. Specifically, when the third address value is greater than or equal to the first address value and the third address value is less than or equal to the second address value, the access address is located within the address range of the modified address region; when the third address value is less than the first address value or the third address value is greater than the second address value region, the access address is located outside the address range of the modified address region.

5. The method according to claim 1, characterized in that, If the access address is in the modified address region, the processor reads or writes target data in the first memory based on the mapping relationship, including: If the access address is in the modified address region, the controller determines the target address in the first memory according to the mapping relationship; When the access request in the processor is a read request, the processor reads the target data from the target address; When the access request in the processor is a write request, the processor writes the target data to the target address.

6. The method according to claim 5, characterized in that, The step of the controller determining the target address in the first memory according to the mapping relationship includes: The selector in the controller decodes the access address and the stored mapping relationship to obtain the target address in the mapped address region; The controller outputs the target address obtained from the selector.

7. The method according to claim 1, characterized in that, The method further includes: If the access address is not in the modified address region, and the access request in the processor is a read request, the processor reads the initial data in the access address; When the access request in the processor is a write request, the controller returns an error message to the processor.

8. A data processing system, characterized in that, The system includes: a first memory, a second memory, a controller, and a processor; The processor is connected to the first memory and the controller via a communication bus, and the controller is connected to the second memory. The first memory is used to determine a mapped address region based on the modified address region in the second memory, and to store the mapping relationship between the mapped address region and the modified address region in the controller; The controller is used to determine whether the access address is in the modified address region; If the access address is in the modified address region, the processor is configured to read or write target data in the first memory based on the mapping relationship; The controller is specifically used to: determine the modified address region corresponding to the readable and writable data region of the second memory according to the modification request; The first memory is specifically used for: determining the mapped address region based on the modified address region; The controller is specifically used to store the obtained mapping relationship between the mapped address region and the modified address region in the comparison module of the controller.

9. A computer-readable storage medium, characterized in that, The readable storage medium stores computer program instructions, which, when executed by a processor, perform the steps of the method according to any one of claims 1-7.

Images