Debugging method, device and server of chip simulation system

Abstract

The present invention provides a debugging method for a chip simulation system, relating to the technical field of chip circuit design verification. The method comprises: upon receiving a monitoring instruction sent by a control terminal, reading a target configuration file corresponding to the monitoring control instruction; controlling the chip to be debugged in the chip simulation system to operate according to the stimulus configuration file and the code configuration file to obtain a chip output signal; and performing signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result. The present invention can significantly reduce the time cost of debugging a chip simulation system and can also simulate a more realistic chip usage environment, thereby improving the debugging accuracy of the chip simulation system.

Description

Technical Field

[0001] The present invention relates to the technical field of chip circuit design verification, and in particular to a debugging method, device and server for a chip simulation system. Background Art

[0002] A chip emulation system is a system that debugs software by simulating the functions of a real chip through a computer. Currently, relevant technologies suggest that mainstream chip emulation systems can provide stimulus through test cases and program execution code through memory code (ROMcode). The stimulus and program execution code are compiled together to simulate and output a specific result. However, this solution requires complete recompilation of the simulation when the stimulus / program execution code changes, which consumes a long verification time, resulting in poor realism in the simulated chip usage environment. Furthermore, the chip's operating status cannot be monitored in real time, resulting in low debugging accuracy for the chip emulation system. Summary of the Invention

[0003] In view of this, the purpose of the present invention is to provide a debugging method, device and server for a chip simulation system, which can significantly reduce the time cost of debugging the chip simulation system, and can also simulate a more realistic chip usage environment, thereby improving the debugging accuracy of the chip simulation system.

[0004] In the first aspect, an embodiment of the present invention provides a debugging method for a chip simulation system, which is applied to the chip simulation system, and the chip simulation system is connected to a control terminal. The method includes: when a monitoring instruction sent by the control terminal is received, reading a target configuration file corresponding to the monitoring control instruction; wherein the target configuration file includes one or more of an incentive configuration file, a code configuration file, and a signal analysis configuration file; controlling the chip to be debugged in the chip simulation system, and running it according to the incentive configuration file and the code configuration file to obtain a chip output signal; performing signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result.

[0005] In one embodiment, a chip simulation system includes a monitoring module connected to a chip to be debugged, the monitoring module including an excitation monitoring unit and a code monitoring unit; the step of controlling the chip to be debugged in the chip simulation system to obtain a chip output signal according to an excitation configuration file and a code configuration file includes: sending a first excitation signal to the chip to be debugged based on the excitation configuration file by the excitation monitoring unit; sending a first code download signal to the chip to be debugged based on the code configuration file by the code monitoring unit; wherein the first code download signal carries a first code program; when the chip to be debugged receives the first code download signal, the chip to be debugged runs the first code program to generate a first chip output signal corresponding to the first excitation signal.

[0006] In one embodiment, the method further includes: during the process of the chip to be debugged running the first code program, monitoring whether the stimulus configuration file is updated through the stimulus monitoring unit, and sending an updated second stimulus signal to the chip to be debugged through the stimulus monitoring unit when the stimulus configuration file is updated; when the chip to be debugged receives the second stimulus signal, re-running the first code program through the chip to be debugged to generate a second chip output signal corresponding to the second stimulus signal.

[0007] In one embodiment, the method further includes: while the chip to be debugged is running the first code program, monitoring whether a code configuration file is updated through a code monitoring unit, and when the code configuration file is updated, monitoring and sending an updated second code download signal to the chip to be debugged through the code monitoring unit; wherein the second code download signal carries the second code program; when the chip to be debugged receives the second code download signal, stopping the running of the first code program and running the second code program through the chip to be debugged, thereby generating a third chip output signal corresponding to the first stimulus signal.

[0008] In one embodiment, the monitoring module also includes a signal analysis monitoring unit; the step of performing signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain the chip debugging result includes: determining the signal to be analyzed from the chip output signal based on the signal analysis configuration file by the signal analysis monitoring unit, and performing signal analysis processing on the signal to be analyzed to obtain the chip debugging result.

[0009] In one embodiment, the incentive monitoring unit is connected to the control terminal through a first interface, the code monitoring unit is connected to the control terminal through a second interface, and the signal analysis monitoring unit is connected to the control terminal through a third interface; when a monitoring instruction sent by the control terminal is received, the step of reading a target configuration file corresponding to the monitoring control instruction includes: when the first interface receives the monitoring instruction sent by the control terminal, reading the incentive configuration file through the incentive monitoring unit; or, when the second interface receives the monitoring instruction sent by the control terminal, reading the code configuration file through the code monitoring unit; or, when the third interface receives the monitoring instruction sent by the control terminal, reading the signal analysis configuration file through the signal analysis monitoring unit.

[0010] In one embodiment, the method further includes: when receiving a control instruction sent by the control terminal, controlling the monitoring module and / or the chip to be debugged to execute the action corresponding to the control instruction; wherein the control instruction includes a pause instruction and / or a stop instruction, the pause instruction is used to instruct the monitoring module and / or the chip to be debugged to stop working and save the working status to the target configuration file, and the stop instruction is used to instruct the monitoring module and / or the chip to be debugged to stop working and restore the target configuration file to the default value.

[0011] In the second aspect, an embodiment of the present invention also provides a debugging device for a chip simulation system, which is applied to the chip simulation system, and the chip simulation system is connected to the control terminal. The device includes: a configuration file query module, which reads a target configuration file corresponding to the monitoring control instruction when receiving a monitoring instruction sent by the control terminal; wherein the target configuration file includes one or more of an incentive configuration file, a code configuration file and a signal analysis configuration file; a chip debugging module, which controls the chip to be debugged in the chip simulation system, and runs according to the incentive configuration file and the code configuration file to obtain a chip output signal; a signal analysis module, which performs signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result.

[0012] In a third aspect, an embodiment of the present invention further provides a server, comprising a processor and a memory, wherein the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement any one of the methods provided in the first aspect.

[0013] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, which stores computer-executable instructions. When the computer-executable instructions are called and executed by a processor, the computer-executable instructions prompt the processor to implement any one of the methods provided in the first aspect.

[0014] The embodiments of the present invention bring the following beneficial effects:

[0015] The embodiment of the present invention provides a debugging method, device and server for a chip simulation system, wherein the method is applied to the chip simulation system, the chip simulation system is connected to the control terminal, and when the chip simulation system receives a monitoring instruction, it reads the target configuration file corresponding to the monitoring control instruction, thereby controlling the chip to be debugged in the chip simulation system, and obtains the chip output signal by running according to the stimulus configuration file and the code configuration file, and performs signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain the chip debugging result. When debugging the chip simulation system, the above method can be used to debug by changing the stimulus file during the operation of the simulation system. Compared with the technical problem in the related art that when the stimulus or code changes, the simulation needs to be recompiled and the entire process needs to be refreshed, the embodiment of the present invention can make adjustments during the operation of the chip simulation system by changing the corresponding stimulus file, which can significantly reduce the time cost of debugging the chip simulation system, and can also simulate a more realistic chip usage environment, thereby improving the debugging accuracy of the chip simulation system.

[0016] Other features and advantages of the present invention will be described in the following description, and in part will become apparent from the description, or understood by practicing the present invention. The purposes and other advantages of the present invention are realized and obtained by the structures particularly pointed out in the description, claims and drawings.

[0017] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 A schematic diagram of the structure of a chip simulation system provided by an embodiment of the present invention;

[0020] Figure 2 A schematic diagram of a flow chart of a debugging method for a chip simulation system provided by an embodiment of the present invention;

[0021] Figure 3 A schematic flow chart of another chip simulation system debugging method provided by an embodiment of the present invention;

[0022] Figure 4 A schematic structural diagram of a debugging device for a chip simulation system provided by an embodiment of the present invention;

[0023] Figure 5 A schematic structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0024] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0025] At present, the mainstream chip simulation system provides stimulus through test cases and provides program execution code through memory code Romcode, compiles the stimulus and program execution code together, and simulates and outputs a specific result. When the stimulus / program execution code changes, this solution needs to recompile the simulation and refresh the entire process (that is, the pre-compiled program will not change during the simulation output). When the stimulus / program execution code changes, this solution needs to recompile the simulation and consume a long verification time, resulting in poor authenticity of the simulated chip use environment, and the chip's operating status cannot be monitored in real time, resulting in low debugging accuracy of the chip simulation system. Based on this, the embodiment of the present invention provides a debugging method, device and server for a chip simulation system, which can significantly reduce the time cost of debugging the chip simulation system, and can also simulate a more realistic chip use environment, thereby improving the debugging accuracy of the chip simulation system.

[0026] To facilitate understanding of this embodiment, a debugging method for a chip simulation system disclosed in an embodiment of the present invention is first described in detail. The method is applied to a chip simulation system to simulate the functions of a real chip. To facilitate understanding of the chip simulation system, an embodiment of the present invention provides a schematic diagram of the structure of a chip simulation system, as shown in FIG. Figure 1 As shown, the chip simulation system is configured with a chip to be debugged and a monitoring module connected to the chip to be debugged. The monitoring module includes an excitation monitoring unit, a code monitoring unit and a signal analysis monitoring unit. The monitoring module and the chip to be debugged are respectively connected to the control terminal (i.e., the human-computer interaction interface). The working status of the monitoring module and the chip to be debugged are controlled based on the start, pause and end signals of the control terminal. The excitation monitoring unit can query and read the excitation configuration file to send an excitation signal to the chip to be debugged. The code monitoring unit can query and read the code configuration file to send a code download signal to the chip to be debugged. The chip to be debugged receives the excitation signal and the download signal and sends an output signal to the signal analysis monitoring unit. The signal analysis monitoring unit can query and read the signal analysis configuration file, determine the signal to be analyzed from the output signal, process the signal to be analyzed to obtain the chip debugging result, and print the chip debugging result to the display.

[0027] based on Figure 1 The chip simulation system shown in FIG. 1 is a schematic diagram of a structure of a chip simulation system. The embodiment of the present invention introduces a debugging method of the chip simulation system in detail. Figure 2 The flowchart of a debugging method of a chip simulation system shown in FIG. 1 mainly includes the following steps S202 to S206:

[0028] Step S202: Upon receiving a monitoring command from a control terminal, a target configuration file corresponding to the monitoring control command is read. The control terminal is a device such as a personal computer, which is connected to the chip emulation system via a human-computer interface. The control terminal is used to send start, pause, and end signals to the chip emulation information system via the human-computer interface to control the operating status of each module in the chip emulation system. The target configuration file includes one or more of a stimulus configuration file, a code configuration file, and a signal analysis configuration file. The code configuration file may include a ROM Code memory code.

[0029] In one embodiment, the target configuration file is configured in the stimulus monitoring unit. One end of the stimulus monitoring unit is connected to the chip simulation system, and the other end is connected to the device to be measured, experimental equipment, etc., for filtering and compiling the changes of the device / experimental equipment in the target configuration file and then feeding back to the chip simulation system.

[0030] Step S204: Control the chip to be debugged in the chip emulation system and run it according to the stimulus configuration file and the code configuration file to obtain chip output signals. The code configuration file is used to update the program in the chip to be debugged, and the stimulus configuration file is used to define the digital signals (i.e., stimulus) to be sent, so that the chip to be debugged can send the corresponding output signals to the signal analysis and monitoring unit.

[0031] In one embodiment, when the code download signal received by the chip to be debugged is different from the last configuration or when the stimulus signal received is different from the last configuration, a new output signal will be generated, and the new output signal obtained is different.

[0032] Step S206: Perform signal analysis on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result. The signal analysis configuration file may include a signal identifier to be captured, such as a captured voltage signal.

[0033] In one embodiment, a signal analysis monitoring unit determines a signal to be analyzed from a chip output signal based on a signal analysis configuration file, and performs signal analysis processing on the signal to be analyzed: after filtering and classifying the captured part of the output signal, a chip debugging result is obtained, and the chip debugging result obtained during the chip debugging process is printed to a display in real time to obtain changes in the debugging results of the simulated chip.

[0034] The debugging method of the above-mentioned chip simulation system provided by the embodiment of the present invention can complete the debugging of the chip simulation system during the operation process of the chip simulation system by changing the corresponding stimulus file, which can significantly reduce the time cost of debugging the chip simulation system and simulate a more realistic chip usage environment, thereby improving the debugging accuracy of the chip simulation system.

[0035] Regarding the aforementioned step S202, the embodiment of the present invention further provides an implementation method for controlling the working state of the chip simulation system through a control terminal. For details, see (1) to (3) below:

[0036] (1) When the first interface receives the monitoring instruction sent by the control terminal, the incentive monitoring unit reads the incentive configuration file.

[0037] (2) When the second interface receives the monitoring instruction sent by the control terminal, the code configuration file is read through the code monitoring unit.

[0038] (3) When the third interface receives the monitoring instruction sent by the control terminal, the signal analysis monitoring unit reads the signal analysis configuration file, wherein the signal analysis configuration file is used to determine the type of captured signal (such as the capture length signal, accuracy signal, voltage signal, and current signal).

[0039] In one embodiment, when a control instruction sent by a control terminal is received, the monitoring module and / or the chip to be debugged is controlled to execute an action corresponding to the control instruction. Wherein, the control instruction includes a pause instruction and / or a stop instruction, the pause instruction is used to instruct the monitoring module and / or the chip to be debugged to stop working and save the working state to a target configuration file, the stop instruction is used to instruct the monitoring module and / or the chip to be debugged to stop working and restore the target configuration file to a default value, when the module receives a start signal, the module reads the data in the internal initialization value area and starts working, when the control signal received is pause, the module stops working and saves the current state to the initialization value area, when the control signal received by the module is stop, the initialization value area is restored to the default value and stops working.

[0040] Regarding the aforementioned step S204, the embodiment of the present invention further provides an implementation method for obtaining the chip output signal, as shown in (1) to (3) below:

[0041] (1) A first stimulus signal is sent to the chip to be debugged based on a stimulus configuration file through a stimulus monitoring unit; wherein the stimulus configuration file is used to simulate the operating environment of the chip. When the actual working environment of the instrument changes, a changing signal is generated and the signal is input into the file (for example, the angle of the working device connected to the end of the stimulus configuration file is tilted, and the sensor in the device generates a voltage, which is sent to the chip in the device. The chip in the device translates the voltage into a digital signal after calculation, and stores the signal in the stimulus configuration file).

[0042] (2) A first code download signal is sent to the chip to be debugged based on the code configuration file through the code monitoring unit; wherein the first code download signal carries a first code program, wherein the code configuration file includes the code program, and the code program in the code location file is sent to the chip to be debugged, and the program running in the chip to be debugged is updated.

[0043] (3) When the chip to be debugged receives the first code download signal, the chip to be debugged runs the first code program to generate a first chip output signal corresponding to the first stimulus signal. For example, an embodiment of the present invention provides an implementation method for determining the output signal during the code debugging process, as shown in steps a1 to a2 below:

[0044] In step a1, while the chip to be debugged is running the first code program, an excitation signal stored in the excitation configuration file initialization value area is obtained, and the obtained excitation signal is compared with the excitation signal obtained last time. The excitation monitoring unit monitors whether the excitation configuration file has been updated. Exemplarily, this application provides an implementation method for determining an output signal based on the update result of the excitation signal, as shown in steps a1.1 to a1.2 below:

[0045] a1.1, when the stimulus configuration file is updated, the stimulus monitoring unit monitors and sends an updated second stimulus signal to the chip to be debugged.

[0046] In one embodiment, when the chip to be debugged receives the second stimulus signal, the chip to be debugged re-runs the first code program to generate a second chip output signal corresponding to the second stimulus signal.

[0047] a1.2: When the stimulus configuration file is not updated, the stimulus signal continues to be generated according to the last configuration.

[0048] In step a2, while the chip to be debugged is running the first code program, a download signal stored in the code configuration file initialization value area is obtained, the obtained download signal is compared with the previously obtained download signal, and the code monitoring unit monitors whether the code configuration file has been updated. For example, this application provides an implementation method for determining an output signal based on the update result of the download signal, as shown in steps a2.1 to a2.2 below:

[0049] a2.1, when the code configuration file is updated, the code monitoring unit monitors and sends an updated second code download signal to the chip to be debugged; wherein the second code download signal carries the second code program;

[0050] In one embodiment, when the chip to be debugged receives the second code download signal, the chip to be debugged stops running the first code program and runs the second code program to generate a third chip output signal corresponding to the first stimulus signal.

[0051] a2.2, when the code configuration file is not updated, the download signal continues to be generated according to the last configuration.

[0052] To facilitate understanding of the debugging method of the chip simulation system provided in the above embodiment, an embodiment of the present invention provides an application example of the debugging method of the chip simulation system, see Figure 3 FIG. 1 is a flow chart of another debugging method for a chip simulation system, wherein the method mainly includes the following steps S302 to S314:

[0053] Step S302: Receive the monitoring instruction sent by the control terminal, and make each unit monitor the corresponding target configuration file. The control terminal is a human-computer interaction interface, which is used to control the working state of each module by selecting the start, pause and end buttons of each module in the human-computer interaction interface.

[0054] Step S304: The stimulus monitoring unit monitors the stimulus configuration file and sends stimulus signals to the chip to be debugged. The stimulus configuration file simulates the chip's operating environment. When the instrument's actual operating environment changes, a changing signal is generated and entered into the file (for example, if the working device connected to the stimulus configuration file tilts, a sensor within the device generates a voltage, which is then sent to the chip within the device. The chip then converts the voltage into a digital signal and stores the signal in the stimulus configuration file).

[0055] Step S306: The code monitoring unit sends a code download signal to the chip to be debugged based on the code configuration file. The code download signal carries a code program, which is sent to the chip to be debugged and updates the program running in the chip to be debugged.

[0056] Step S308: The chip to be debugged receives the code download signal and runs the code program on the chip to generate a chip output signal corresponding to the stimulus signal. If the code download signal received by the chip to be debugged changes from the previous configuration or the stimulus signal received changes from the previous configuration, a new output signal will be generated, and the new output signal will be different.

[0057] Step S310: The signal analysis monitoring unit performs signal analysis on the chip output signal based on the signal analysis configuration file to determine the signal to be analyzed. The signal analysis configuration file is used to determine the type of captured signal (such as the capture length signal, accuracy signal, voltage signal, and current signal).

[0058] Step S312: performing signal analysis on the signal to be analyzed to obtain chip debugging results, wherein the chip debugging results obtained during the chip debugging process are printed in real time on a display to obtain the changes in the debugging results of the simulated chip.

[0059] To sum up, the present invention can ensure the normal operation of the chip simulation system while controlling multiple units of the chip simulation system through the control terminal, and then control each unit to monitor the corresponding target configuration file, thereby completing the debugging of the chip simulation system during operation, which can significantly reduce the time cost of debugging the chip simulation system, and can also simulate a more realistic chip usage environment, thereby improving the debugging accuracy of the chip simulation system.

[0060] Regarding the debugging method of the chip simulation system provided in the above embodiment, an embodiment of the present invention provides a debugging device for the chip simulation system. The device is applied to the chip simulation system. The chip simulation system is connected to the control terminal. Figure 4 The schematic diagram of the structure of a debugging device for a chip simulation system is shown, and the device includes the following parts:

[0061] The configuration file query module 402 reads the target configuration file corresponding to the monitoring control instruction upon receiving the monitoring instruction sent by the control terminal; wherein the target configuration file includes one or more of an incentive configuration file, a code configuration file, and a signal analysis configuration file;

[0062] The chip debugging module 404 controls the chip to be debugged in the chip simulation system and runs according to the stimulus configuration file and the code configuration file to obtain the chip output signal;

[0063] The signal analysis module 406 performs signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result.

[0064] The above-mentioned data processing device provided in the embodiment of the present application can complete the debugging of the chip simulation system during the operation of the chip simulation system by changing the corresponding stimulus file, which can significantly reduce the time cost of debugging the chip simulation system and simulate a more realistic chip usage environment, thereby improving the debugging accuracy of the chip simulation system.

[0065] In one embodiment, when performing the step of obtaining a chip output signal by running a chip to be debugged in a control chip simulation system according to a stimulus configuration file and a code configuration file, the chip debugging module 404 is further used to: send a first stimulus signal to the chip to be debugged based on the stimulus configuration file through a stimulus monitoring unit; send a first code download signal to the chip to be debugged based on the code configuration file through a code monitoring unit; wherein the first code download signal carries a first code program; when the chip to be debugged receives the first code download signal, the chip to be debugged runs the first code program to generate a first chip output signal corresponding to the first stimulus signal.

[0066] In one embodiment, the chip debugging module 404 is further configured to: during the process of the chip to be debugged running the first code program, monitor whether the stimulus configuration file is updated through the stimulus monitoring unit, and send an updated second stimulus signal to the chip to be debugged through the stimulus monitoring unit when the stimulus configuration file is updated; when the chip to be debugged receives the second stimulus signal, re-run the first code program through the chip to be debugged to generate a second chip output signal corresponding to the second stimulus signal.

[0067] In one embodiment, the chip debugging module 404 is further configured to: during the process of the chip to be debugged running the first code program, monitor whether the code configuration file is updated through a code monitoring unit, and when the code configuration file is updated, monitor and send an updated second code download signal to the chip to be debugged through the code monitoring unit; wherein the second code download signal carries the second code program; when the chip to be debugged receives the second code download signal, stop running the first code program through the chip to be debugged, and run the second code program, thereby generating a third chip output signal corresponding to the first stimulus signal.

[0068] In one embodiment, when performing signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain the chip debugging result, the above-mentioned chip debugging module 404 is also used to: perform signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain the chip debugging result, including: determining the signal to be analyzed from the chip output signal based on the signal analysis configuration file through the signal analysis monitoring unit, and performing signal analysis processing on the signal to be analyzed to obtain the chip debugging result.

[0069] In one embodiment, the excitation monitoring unit is connected to the control terminal through a first interface, the code monitoring unit is connected to the control terminal through a second interface, and the signal analysis monitoring unit is connected to the control terminal through a third interface; when a monitoring instruction sent by the control terminal is received, during the step of reading a target configuration file corresponding to the monitoring control instruction, the chip debugging module 404 is also used for: when the first interface receives the monitoring instruction sent by the control terminal, reading the excitation configuration file through the excitation monitoring unit; or, when the second interface receives the monitoring instruction sent by the control terminal, reading the code configuration file through the code monitoring unit; or, when the third interface receives the monitoring instruction sent by the control terminal, reading the signal analysis configuration file through the signal analysis monitoring unit.

[0070] In one embodiment, the chip debugging module 404 is further configured to: upon receiving a control instruction sent by a control terminal, control the monitoring module and / or the chip to be debugged to execute an action corresponding to the control instruction; wherein the control instruction includes a pause instruction and / or a stop instruction, the pause instruction is configured to instruct the monitoring module and / or the chip to be debugged to stop working and save the working status to a target configuration file, and the stop instruction is configured to instruct the monitoring module and / or the chip to be debugged to stop working and restore the target configuration file to a default value.

[0071] The device provided in the embodiment of the present invention has the same implementation principle and technical effects as those in the aforementioned method embodiment. For the sake of brief description, for matters not mentioned in the device embodiment, reference can be made to the corresponding content in the aforementioned method embodiment.

[0072] An embodiment of the present invention provides an electronic device. Specifically, the electronic device includes a processor and a storage device. The storage device stores a computer program, and when the computer program is executed by the processor, it executes the method described in any one of the above-mentioned embodiments.

[0073] Figure 5 This is a structural diagram of an electronic device provided in an embodiment of the present invention. The electronic device 100 includes: a processor 50, a memory 51, a bus 52 and a communication interface 53. The processor 50, the communication interface 53 and the memory 51 are connected via the bus 52; the processor 50 is used to execute an executable module stored in the memory 51, such as a computer program.

[0074] The memory 51 may include high-speed random access memory (RAM) and may also include non-volatile memory, such as at least one disk storage. The system network element communicates with at least one other network element via at least one communication interface 53 (which may be wired or wireless), and may utilize the Internet, a wide area network, a local area network, a metropolitan area network, or the like.

[0075] The bus 52 may be an ISA bus, a PCI bus, or an EISA bus. The bus may be divided into an address bus, a data bus, a control bus, and the like. For ease of representation, Figure 5 Only one bidirectional arrow is used in the diagram, but this does not mean that there is only one bus or one type of bus.

[0076] Among them, the memory 51 is used to store programs, and the processor 50 executes the program after receiving the execution instruction. The method executed by the device for flow process definition disclosed in any embodiment of the above-mentioned embodiment of the present invention can be applied to the processor 50 or implemented by the processor 50.

[0077] The processor 50 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method may be completed by hardware integrated logic circuits or software instructions in the processor 50. The processor 50 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It may implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present invention. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in conjunction with the embodiments of the present invention may be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module may be located in a storage medium well-known in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or the like. The storage medium is located in the memory 51 , and the processor 50 reads the information in the memory 51 and completes the steps of the above method in combination with its hardware.

[0078] The computer program product of the readable storage medium provided in the embodiment of the present invention includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the method described in the previous method embodiment. The specific implementation can be referred to the previous method embodiment and will not be repeated here.

[0079] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0080] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present invention, which are used to illustrate the technical solutions of the present invention, rather than to limit them. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the above-described embodiments, those skilled in the art should understand that any person skilled in the art can modify or easily conceive of changes to the technical solutions described in the above-described embodiments within the technical scope disclosed by the present invention, or replace some of the technical features therein with equivalents. Such modifications, changes, or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of protection of the claims.

Claims

1. A debugging method for a chip simulation system, characterized in that: The method is applied to a chip simulation system, the chip simulation system is connected to a control terminal, and the method includes: When receiving the monitoring instruction sent by the control terminal, reading the target configuration file corresponding to the monitoring control instruction; wherein the target configuration file includes one or more of an incentive configuration file, a code configuration file and a signal analysis configuration file; Controlling the chip to be debugged in the chip simulation system to obtain a chip output signal according to the stimulus configuration file and the code configuration file; Performing signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result; Wherein, the chip simulation system includes a monitoring module connected to the chip to be debugged, and the monitoring module includes an excitation monitoring unit and a code monitoring unit; the step of controlling the chip to be debugged in the chip simulation system to obtain a chip output signal according to the excitation configuration file and the code configuration file includes: sending a first excitation signal to the chip to be debugged based on the excitation configuration file by the excitation monitoring unit; sending a first code download signal to the chip to be debugged based on the code configuration file by the code monitoring unit; wherein the first code download signal carries a first code program; when the chip to be debugged receives the first code download signal, the chip to be debugged runs the first code program to generate a first chip output signal corresponding to the first excitation signal; The monitoring module further includes a signal analysis monitoring unit; the step of performing signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result includes: determining a signal to be analyzed from the chip output signal based on the signal analysis configuration file by the signal analysis monitoring unit, and performing signal analysis processing on the signal to be analyzed to obtain a chip debugging result; In which, the excitation monitoring unit is connected to the control terminal through a first interface, the code monitoring unit is connected to the control terminal through a second interface, and the signal analysis monitoring unit is connected to the control terminal through a third interface; the step of reading the target configuration file corresponding to the monitoring control instruction when the monitoring instruction sent by the control terminal is received includes: when the first interface receives the monitoring instruction sent by the control terminal, reading the excitation configuration file through the excitation monitoring unit; or, when the second interface receives the monitoring instruction sent by the control terminal, reading the code configuration file through the code monitoring unit; or, when the third interface receives the monitoring instruction sent by the control terminal, reading the signal analysis configuration file through the signal analysis monitoring unit, wherein the signal analysis configuration file is used to determine the type of captured signal, and the signal types include: length signal, precision signal, voltage signal and current signal.

2. The method according to claim 1, characterized in that The method further comprises: During the process of the chip to be debugged running the first code program, monitoring whether the stimulus configuration file is updated through the stimulus monitoring unit, and sending an updated second stimulus signal to the chip to be debugged through the stimulus monitoring unit when the stimulus configuration file is updated; When the chip to be debugged receives the second stimulus signal, the first code program is re-run through the chip to be debugged to generate a second chip output signal corresponding to the second stimulus signal.

3. The method according to claim 1, characterized in that The method further comprises: During the process of the chip to be debugged running the first code program, the code monitoring unit monitors whether the code configuration file is updated, and when the code configuration file is updated, the code monitoring unit monitors and sends an updated second code download signal to the chip to be debugged; wherein the second code download signal carries the second code program; When the chip to be debugged receives the second code download signal, the chip to be debugged stops running the first code program and runs the second code program to generate a third chip output signal corresponding to the first stimulus signal.

4. The method according to any one of claims 1 to 3, characterized in that The method further comprises: When receiving a control instruction sent by the control terminal, controlling the monitoring module and / or the chip to be debugged to execute an action corresponding to the control instruction; Among them, the control instruction includes a pause instruction and / or a stop instruction, the pause instruction is used to instruct the monitoring module and / or the chip to be debugged to stop working and save the working status to the target configuration file, and the stop instruction is used to instruct the monitoring module and / or the chip to be debugged to stop working and restore the target configuration file to the default value.

5. A debugging device for a chip simulation system, characterized in that: The device is applied to a chip simulation system, the chip simulation system is connected to a control terminal, and the device includes: a configuration file query module, which, upon receiving a monitoring instruction sent by the control terminal, reads a target configuration file corresponding to the monitoring control instruction; wherein the target configuration file includes one or more of an incentive configuration file, a code configuration file, and a signal analysis configuration file; A chip debugging module controls the chip to be debugged in the chip simulation system and operates according to the stimulus configuration file and the code configuration file to obtain a chip output signal; A signal analysis module performs signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result; Wherein, the chip simulation system includes a monitoring module connected to the chip to be debugged, and the monitoring module includes an excitation monitoring unit and a code monitoring unit; the step of controlling the chip to be debugged in the chip simulation system to obtain a chip output signal according to the excitation configuration file and the code configuration file includes: sending a first excitation signal to the chip to be debugged based on the excitation configuration file by the excitation monitoring unit; sending a first code download signal to the chip to be debugged based on the code configuration file by the code monitoring unit; wherein the first code download signal carries a first code program; when the chip to be debugged receives the first code download signal, the chip to be debugged runs the first code program to generate a first chip output signal corresponding to the first excitation signal; The monitoring module further includes a signal analysis monitoring unit; the step of performing signal analysis processing on the chip output signal based on the signal analysis configuration file to obtain a chip debugging result includes: determining a signal to be analyzed from the chip output signal based on the signal analysis configuration file by the signal analysis monitoring unit, and performing signal analysis processing on the signal to be analyzed to obtain a chip debugging result; In which, the excitation monitoring unit is connected to the control terminal through a first interface, the code monitoring unit is connected to the control terminal through a second interface, and the signal analysis monitoring unit is connected to the control terminal through a third interface; the step of reading the target configuration file corresponding to the monitoring control instruction when the monitoring instruction sent by the control terminal is received includes: when the first interface receives the monitoring instruction sent by the control terminal, reading the excitation configuration file through the excitation monitoring unit; or, when the second interface receives the monitoring instruction sent by the control terminal, reading the code configuration file through the code monitoring unit; or, when the third interface receives the monitoring instruction sent by the control terminal, reading the signal analysis configuration file through the signal analysis monitoring unit, wherein the signal analysis configuration file is used to determine the type of captured signal, and the signal types include: length signal, precision signal, voltage signal and current signal.

6. A server, characterized in that: The method comprises a processor and a memory, wherein the memory stores computer-executable instructions that can be executed by the processor, and the processor executes the computer-executable instructions to implement the method according to any one of claims 1 to 4.

7. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer-executable instructions. When the computer-executable instructions are called and executed by a processor, the computer-executable instructions prompt the processor to implement the method according to any one of claims 1 to 4.

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