Display substrate, preparation method thereof, and display device

Abstract

A display substrate, a preparation method thereof, and a display device. The display substrate includes: a first display area and a second display area. The first display area includes a plurality of first pixels, and each first pixel includes a passive light-emitting device. The second display area includes a plurality of second pixels, and each second pixel includes an active light-emitting device and a pixel driving circuit electrically connected to the active light-emitting device. The first display area includes a plurality of first driving signal line groups, each first driving signal line group corresponding to a first pixel row. The first pixel row includes a row of first pixels. Each first driving signal line group includes a plurality of first driving signal lines. The first driving signal lines are connected to anodes of the passive light-emitting devices of the corresponding row of first pixels. The first display area includes an anti-diffraction area, and an anti-diffraction structure is provided in the anti-diffraction area. The anti-diffraction structure is configured to reduce the diffraction intensity of the first driving signal line group.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to, but are not limited to, a display substrate, a method for manufacturing the same, and a display device. Background Art

[0002] Full-screen displays have become the main form of mobile phone displays. However, mobile phones need to be equipped with components such as front cameras and infrared sensors, which is not conducive to the full-screen design. It is necessary to provide a full-screen display that facilitates the placement of components such as cameras and infrared sensors. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail in this document. This overview is not intended to limit the scope of protection of the claims.

[0004] On the one hand, embodiments of the present disclosure provide a display substrate, including: a first display area and a second display area. The first display area includes a plurality of first pixels, and each first pixel includes a passive light-emitting device. The second display area includes a plurality of second pixels, and each second pixel includes an active light-emitting device and a pixel driving circuit electrically connected to the active light-emitting device. The first display area includes a plurality of first driving signal line groups, and one first driving signal line group corresponds to one first pixel row. The first pixel row includes a row of the first pixels. The first driving signal line group includes a plurality of first driving signal lines, and the first driving signal lines are connected to anodes of the passive light-emitting devices of the first pixels in the corresponding first pixel row. The first display area includes an anti-diffraction area, and an anti-diffraction structure is provided in the anti-diffraction area. The anti-diffraction structure is configured to reduce the diffraction intensity of the first driving signal line group.

[0005] In an exemplary embodiment, the anti-diffraction structure includes a plurality of shielding portions, and the shielding portions correspond to the first driving signal line groups one by one, and the shielding portions are located on a side of the first driving signal line groups close to the substrate of the display substrate.

[0006] In a plane parallel to the substrate, within the anti-diffraction area, the orthographic projection of the first driving signal lines of the first driving signal line group is located within the orthographic projection of the corresponding shielding portion.

[0007] In an exemplary embodiment, the pixel driving circuit includes a gate electrode, a first capacitor electrode, a second capacitor electrode, a source electrode, and a drain electrode. The first capacitor electrode and the second capacitor electrode form a storage capacitor. The first driving signal lines are provided on the same layer as the source electrode and the drain electrode, and the shielding portions are provided on the same layer as the second capacitor electrode.

[0008] In an exemplary embodiment, the first driving signal line group further includes a connection lead, and the connection lead is connected to the first driving signal line and the anode of the passive light-emitting device through a via hole.

[0009] In an exemplary embodiment, the anti-diffraction region includes N rows of first pixels and N shielding portions corresponding to the N rows of first pixels one by one. In a plane parallel to the substrate, the first distance between the first boundary of the positive projection of the i-th shielding portion and the positive projection of the reference line of the first pixel row corresponding to the i-th shielding portion is the same as the first distance between the first boundary of the positive projection of the (K + i)-th shielding portion and the positive projection of the reference line of the first pixel row corresponding to the (K + i)-th shielding portion; and the first distances between the first boundaries of the positive projections of consecutive K shielding portions and the positive projections of the reference lines of the first pixel rows corresponding to the shielding portions are different from each other, where K is a preset value, i ranges from 1 to N - K, and K is less than N; the reference line of the first pixel row is parallel to the first direction and includes the boundary point of the pixel opening region of the first pixel row closest to the first side of the first display region; the first boundary is the boundary of the shielding portion close to the first side, and the first direction is the extending direction of the first pixel row.

[0010] In an exemplary embodiment, K is greater than or equal to 8.

[0011] In an exemplary embodiment, when K = 8, in a plane parallel to the substrate, the first distance between the first boundary of the positive projection of the first shielding portion and the positive projection of the reference line of the first pixel row corresponding to the first shielding portion is 107 / 127 ± 10% of a reference unit;

[0012] The first distance between the first boundary of the positive projection of the second shielding portion and the positive projection of the reference line of the first pixel row corresponding to the second shielding portion is 117 / 127 ± 10% of a reference unit;

[0013] The first distance between the first boundary of the positive projection of the third shielding portion and the positive projection of the reference line of the first pixel row corresponding to the third shielding portion is 90 / 127 ± 10% of a reference unit;

[0014] The first distance between the first boundary of the positive projection of the fourth shielding portion and the positive projection of the reference line of the first pixel row corresponding to the fourth shielding portion is 118 / 127 ± 10% of a reference unit;

[0015] The first distance between the first boundary of the positive projection of the fifth shielding portion and the positive projection of the reference line of the first pixel row corresponding to the fifth shielding portion is 75 / 127 ± 10% of a reference unit;

[0016] The distance between the first boundary of the orthographic projection of the 6th light-shielding portion and the orthographic projection of the reference line of the first pixel row corresponding to the 6th light-shielding portion is 118 / 127 ± 10% of the reference unit;

[0017] The distance between the first boundary of the orthographic projection of the 7th light-shielding portion and the orthographic projection of the reference line of the first pixel row corresponding to the 7th light-shielding portion is 59 / 127 ± 10% of the reference unit;

[0018] The distance between the first boundary of the orthographic projection of the 8th light-shielding portion and the orthographic projection of the reference line of the first pixel row corresponding to the 8th light-shielding portion is 91 / 127 ± 10% of the reference unit;

[0019] The reference unit is determined according to the size of the first pixel in the orthographic projection parallel to the substrate.

[0020] In an exemplary embodiment, the first driving signal line group includes three first driving signal lines. The first pixel includes a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. The anodes of the passive light-emitting devices in the same color sub-pixels of the first pixels in the same row are electrically connected to one of the first driving signal lines.

[0021] In an exemplary embodiment, the first color sub-pixel and the second color sub-pixel are arranged in the same row, and the third color sub-pixel is located in an adjacent row to the row where the first color sub-pixel and the second color sub-pixel are located; in the first display area, the rows where the first color sub-pixels are located and the rows where the third color sub-pixels are located are arranged alternately;

[0022] In a plane parallel to the substrate, in the same first pixel, when the shortest distance between the first driving signal line and the pixel opening area of the passive light-emitting device of the first pixel is greater than a preset distance, the orthographic projection of the connection lead connected to the first driving signal line overlaps with the orthographic projection of the pixel opening area of the third color sub-pixel of the first pixel.

[0023] In an exemplary embodiment, the anti-diffraction structure includes the first driving signal line group. In a plane parallel to the substrate of the display substrate, within the anti-diffraction area, the cross-sectional shape of the first driving signal line includes a sine curve.

[0024] In an exemplary embodiment, in the same first driving signal line group, the first driving signal lines are parallel to each other, and the spacing between adjacent first driving signal lines is the same, and the line width of the first driving signal lines is the same.

[0025] In an exemplary embodiment, in a plane parallel to the substrate, the distance between the starting point and the ending point within one period of the sine curve is 0.9 to 1.1 reference units, the amplitude of the sine curve is 10 / 127 ± 10% reference units, and the reference unit is determined according to the size of the orthographic projection of the first pixel in a plane parallel to the substrate.

[0026] In an exemplary embodiment, the line width of the first driving signal line is 6.2 / 127 ± 10% reference units.

[0027] In an exemplary embodiment, the pitch between adjacent first driving signal lines is 5.8 / 127 ± 10% reference units.

[0028] In an exemplary embodiment, the first pixel includes a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. The first color sub-pixel and the second color sub-pixel are arranged in the same row, and the third color sub-pixel is located in an adjacent row to the row where the first color sub-pixel and the second color sub-pixel are located;

[0029] In the first display area, the rows where the first color sub-pixels are located and the rows where the third color sub-pixels are located are alternately arranged.

[0030] In an exemplary embodiment, in a plane parallel to the substrate, the orthographic projection of the first driving signal line group overlaps with the orthographic projections of the pixel opening areas of the first color sub-pixels and the second color sub-pixels in the corresponding first pixel row, and is outside the orthographic projection of the pixel opening area of the third color sub-pixel.

[0031] On the other hand, an embodiment of the present disclosure provides a display device including the above display substrate.

[0032] In an exemplary embodiment, for the sensor device, at least one of the sensor devices is disposed in the anti-diffraction area, and the photosensitive surface of the sensor device is consistent with the light-emitting side of the display substrate.

[0033] On yet another aspect, an embodiment of the present disclosure provides a method for manufacturing a display substrate. The display substrate includes a first display area and a second display area. The first display area includes an anti-diffraction area. The first display area includes a plurality of first pixels, and the first pixels include passive light-emitting devices. The second display area includes a plurality of second pixels, and the second pixels include active light-emitting devices and pixel driving circuits electrically connected to the active light-emitting devices. The manufacturing method includes:

[0034] A plurality of first driving signal line groups are formed in the first display area of the substrate, and an anti-diffraction structure configured to reduce the diffraction intensity of the first driving signal line groups is formed in the anti-diffraction area of the substrate. One first driving signal line group corresponds to one row of first pixels, and the first driving signal line group includes a plurality of first driving signal lines; a pixel driving circuit is formed in the second display area of the substrate.

[0035] A passive light-emitting device including an anode, a light-emitting layer, and a cathode is formed in the first display area of the substrate, and the anode of the passive light-emitting device is connected to the first driving signal line of the corresponding first driving signal group; an active light-emitting device is formed in the second display area of the substrate.

[0036] In an exemplary embodiment, forming the anti-diffraction structure in the anti-diffraction area of the substrate includes:

[0037] Forming a plurality of shielding portions on the substrate;

[0038] The first driving signal lines of the first driving signal line group are formed on a side of the shielding portion away from the substrate, and the shielding portions correspond to the first driving signal line groups one by one; in a plane parallel to the substrate and within the anti-diffraction area, the orthographic projection of the first driving signal lines of the first driving signal line group is located within the orthographic projection of the corresponding shielding portion.

[0039] In an exemplary embodiment, in a plane of the substrate parallel to the display substrate and within the anti-diffraction area, the cross-sectional shape of the first driving signal line includes a sine curve.

[0040] Other aspects will be apparent after reading and understanding the drawings and the detailed description. Description of the Drawings

[0041] Figure 1 Schematic diagram of a display substrate provided by an embodiment of the present disclosure;

[0042] Figure 2 Schematic diagram of a display substrate provided by an exemplary embodiment;

[0043] Figure 3 Schematic diagram of a driving signal line provided by an exemplary embodiment;

[0044] Figure 4 Schematic diagram of driving a passive light-emitting device provided by an exemplary embodiment;

[0045] Figure 5 Schematic diagram of driving the first display area provided by an exemplary embodiment;

[0046] Figure 6 Schematic diagram of the layout of the first driving signal line group provided by an exemplary embodiment;

[0047] Figure 7 Schematic diagram of an anti-diffraction structure provided for an exemplary embodiment;

[0048] Figure 8 Schematic diagram of the anti-diffraction area layout of Solution 1 and Solution 2 provided for an embodiment;

[0049] Figure 9 Schematic diagram of the diffraction intensity of Solution 1 and Solution 2 provided for an embodiment;

[0050] Figure 10 Schematic diagram of an anti-diffraction structure provided for another embodiment;

[0051] Figure 11 For Figure 10 Partial enlarged view of;

[0052] Figure 12 Schematic diagram of a display substrate provided for an embodiment;

[0053] Figure 13 Schematic diagram of a display substrate provided for another embodiment;

[0054] Figure 14 Schematic diagram of a display device provided for an embodiment;

[0055] Figure 15 Flowchart of a method for manufacturing a display substrate provided for an embodiment. Detailed implementation manners

[0056] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Without conflict, the embodiments of the present disclosure and the features in the embodiments can be combined arbitrarily with each other.

[0057] In the accompanying drawings, sometimes for clarity, the sizes, thicknesses of layers, or regions of the respective components are exaggerated. Therefore, the embodiments of the present disclosure are not necessarily limited to such dimensions, and the shapes and sizes of the components in the drawings do not reflect the true proportions. In addition, the drawings schematically show ideal examples, and the embodiments of the present disclosure are not limited to the shapes or values shown in the drawings.

[0058] The ordinal numbers such as "first", "second", "third", etc. in this specification are set to avoid confusion of the components, rather than to limit in terms of quantity.

[0059] In this specification, for convenience, terms indicating orientation or positional relationship such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are used to describe the positional relationship of the components with reference to the accompanying drawings. This is only for the convenience of describing this specification and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation to the present disclosure. The positional relationship of the components is appropriately changed according to the directions describing each component. Therefore, it is not limited to the terms described in the specification and can be appropriately replaced according to the circumstances.

[0060] In this specification, unless otherwise clearly specified and limited, the terms "mounted", "connected", and "coupled" shall be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected, or indirectly connected through an intermediate member, or the internal communication of two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present disclosure can be understood according to specific circumstances.

[0061] In this specification, "electrically connected" includes the case where components are connected together through an element having a certain electrical effect. There is no particular limitation on the "element having a certain electrical effect" as long as it can transfer electrical signals between the components to be connected. Examples of the "element having a certain electrical effect" include not only electrodes and wirings, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0062] In this specification, "parallel" means a state where the angle formed by two straight lines is more than -10° and less than 10°, and therefore, it also includes the state where the angle is more than -5° and less than 5°. In addition, "perpendicular" means a state where the angle formed by two straight lines is more than 80° and less than 100°, and therefore, it also includes the state where the angle is more than 85° and less than 95°.

[0063] In this specification, "film" and "layer" can be interchanged. For example, sometimes "conductive layer" can be changed to "conductive film". Similarly, sometimes "insulating film" can be changed to "insulating layer".

[0064] Figure 1 and Figure 2 is a schematic diagram of a display substrate provided for an embodiment of the present disclosure. Figure 2 The area 100 in Figure 1 is an enlarged view, and only schematically shows Figure 2 a partial area of the area 100 in Figure 1 The area 200 inFigure 1 and Figure 2 As shown in Figure 2 , the display substrate may include a first display area 100 and a second display area 200. The first display area 100 includes a plurality of first pixels 101, and the first pixels 101 include passive light-emitting devices ( Figure 1 and Figure 2 not shown in Figure 1 ). The second display area 200 includes a plurality of second pixels 201, and the second pixels 201 include active light-emitting devices and pixel driving circuits electrically connected to the active light-emitting devices ( Figure 1 and Figure 2 not shown in Figure 1 ).

[0065] In an exemplary embodiment, the active light-emitting device includes a light-emitting device that adopts an active driving light-emitting mode, and a pixel driving circuit is used to control the light emission of the light-emitting device; the passive light-emitting device includes a light-emitting device that adopts a passive driving light-emitting mode. Without a pixel driving circuit, the driving signal can be directly loaded onto the light-emitting device through a driving signal line.

[0066] For the display substrate provided in this embodiment, passive light-emitting devices are arranged in the first display area. Since the passive light-emitting devices do not require pixel driving circuits, there are no pixel driving circuits and related metal traces in the first display area, and the light transmittance is high, which is convenient for arranging components such as a front camera, sensors (such as a face recognition sensor, etc.), and a receiver to achieve a full-screen design and increase the screen-to-body ratio.

[0067] In an exemplary embodiment, the materials of the cathodes of the active light-emitting device and the passive light-emitting device may be the same, and can be formed by a single evaporation process. Exemplarily, the materials of the cathodes of the active light-emitting device and the passive light-emitting device may be metal materials, such as magnesium (Mg), modified Mg, aluminum (Al), gold (Au), silver (Ag), etc., which are not limited herein. In an exemplary embodiment, a cation exchange membrane (CEM) cathode can be used to improve the transmittance of the first display area 100 and facilitate the arrangement of sensors in the first display area 100.

[0068] In an exemplary embodiment, the passive light-emitting device is, for example, a passive matrix organic light-emitting diode (PMOLED), and the active light-emitting device is, for example, an active matrix organic light-emitting diode (AMOLED), but the embodiments of the present disclosure are not limited thereto.

[0069] In an exemplary embodiment, the first display area 100 may be disposed at the edge of the shorter side of the second display area 200, but is not limited thereto and may be disposed at other positions as required.

[0070] In an exemplary embodiment, the shape of the first display area 100, for example, includes a rectangle, and the length of the first display area 100 along Figure 2 the first direction X is longer, which is convenient for setting sensors and the like. The shape of the first display area 100 is only an example and may be set to other shapes as required. The first direction X is, for example, the extending direction of the first pixel row, and the second direction Y is, for example, the extending direction of the first pixel column. The second direction may be perpendicular to the first direction, and the first pixel row includes a row of first pixels 101.

[0071] In an exemplary embodiment, a plurality of first display areas 100 may be provided in the display substrate.

[0072] In an exemplary embodiment, the first pixels 101 and the second pixels 201 are, for example, distributed in an array.

[0073] In an exemplary embodiment, as Figure 2 shown, the first pixel 101 may include a first color sub-pixel 1011, a second color sub-pixel 1012, and a third color sub-pixel 1013. The first color sub-pixel 1011, the second color sub-pixel 1012, and the third color sub-pixel 1013 are respectively provided with the passive light-emitting devices. The passive light-emitting device of the first color sub-pixel 1011 is configured to emit light of a first color, the passive light-emitting device in the second color sub-pixel 1012 is configured to emit light of a second color, and the passive light-emitting device in the third color sub-pixel 1013 is configured to emit light of a third color. In some examples, the first color, the second color, and the third color may be selected from red, green, and blue. For example, the first color is blue, the second color is red, and the third color is green. Of course, the embodiments of the present disclosure include but are not limited to this. The above first color, second color, and third color may also be other colors.

[0074] In an exemplary embodiment, the pixel driving circuit may include a storage capacitor and a transistor electrically connected to the storage capacitor. For example, the pixel circuit may include at least one of a 2T1C pixel circuit, a 3T1C pixel circuit, and a 7T1C pixel circuit.

[0075] In an exemplary embodiment, the first display area 100 further includes a plurality of first driving signal line groups 60 and a plurality of second driving signal lines. Each first driving signal line group 60 corresponds to a first pixel row. The first driving signal lines are connected to the anodes of the passive light-emitting devices of the corresponding row of the first pixels. A first driving signal line group includes a plurality of first driving signal lines. The anodes of the passive light-emitting devices in the same-color sub-pixels of the first pixels 101 in the same row may be electrically connected to one of the first driving signal lines. For example, the plurality of first driving signal lines in a first driving signal line group are respectively a first sub-driving signal line, a second sub-driving signal line, and a third sub-driving signal line. The first sub-driving signal line is connected to the anode of the first-color sub-pixel 1011 of the corresponding first pixel 101 (i.e., the first pixel in the first pixel row corresponding to the first driving signal line group to which the first sub-driving signal line belongs), the second sub-driving signal line is connected to the anode of the second-color sub-pixel 1012 of the corresponding first pixel 101, and the third sub-driving signal line is connected to the anode of the third-color sub-pixel 1013 of the corresponding first pixel 101. The cathodes of the passive light-emitting devices of the first pixels 101 in the same column may be electrically connected to one of the second driving signal lines, or the cathodes of the passive light-emitting devices may be electrically connected to the first driving signal lines. The cathodes of the passive light-emitting devices in the same-color sub-pixels of the first pixels 101 in the same row may be electrically connected to one of the first driving signal lines, and the anodes of the passive light-emitting devices of the first pixels 101 in the same column are electrically connected to one of the second driving signal lines.

[0076] Such as Figure 3As shown, the first display area 100 includes n columns of first pixels 101 and m rows of first pixels 101, and further includes a plurality of first driving signal line groups 60_j, where j = 1 to m, and a plurality of second driving signal lines COM_1 to COM_n. Among them, the cathodes of the passive light-emitting devices of the first pixels 101 in the i-th column are connected to the i-th second driving signal line COM_i, where i = 1 to n; the first driving signal line group 60_j includes a plurality of first driving signal lines 60_j_1, 60_j_2, 60_j_3, and the first color sub-pixels 1011 of the first pixels 101 in the j-th row are connected to the first driving signal line 60_j_1, the second color sub-pixels 1012 of the first pixels 101 in the j-th row are connected to the first driving signal line 60_j_2, and the third color sub-pixels 1013 of the first pixels 101 in the j-th row are connected to the first driving signal line 60_j_3. In this embodiment, the driving method of the first display area 100 is as follows: the first pixel columns 103 are scanned column by column. When the i-th column is scanned, the i-th second driving signal line COM_i is set to a low level (for example, it can be 0 volts (V), but not limited to this), and the remaining second driving signal lines (n - 1 second driving signal lines except COM_i) are set to a high level (so that the first pixels 101 in other columns except the i-th column do not emit light), and the signals provided by the first driving signal lines 60_j_1, 60_j_2, 60_j_3, where j = 1 to m, control the brightness of the multiple sub-pixels in the i-th column. In this embodiment, the number of first driving signal lines included in the first driving signal line group is only an example. If the first pixels 101 include other numbers of sub-pixels, such as 4, the number of first driving signal lines included in the first driving signal line group can be changed accordingly. The first display area 100 may further include an anti-diffraction area 110, and the anti-diffraction area 110 may be provided with sensor devices, such as cameras. The first display area 100 may include one or more anti-diffraction areas 110. In another embodiment, the anti-diffraction area 110 may be the same as the first display area 100.

[0077] Figure 4 Schematic diagram of the circuit connection of the passive light-emitting device provided for an exemplary embodiment. As Figure 4 shown, in this embodiment, a capacitor C1 is connected in parallel at both ends of the passive light-emitting device 130. The cathode of the passive light-emitting device 130 is connected to the output terminal A of the first driver 300 through the second driving signal line, and the anode of the passive light-emitting device 130 is connected to the output terminal B of the second driver 400 through the first driving signal line. The first driver 300 may include a first transistor T1 and a second transistor T2. The control electrode of the first transistor T1 is connected to the first control terminal NS, the first pole is connected to the first power supply terminal V COMH , the second pole is connected to the first pole of the second transistor T2 and the output terminal A, the first pole of the second transistor T2 is connected to the second control terminal S, and the second pole is connected to the second power supply terminal VLSS When the first transistor T1 is turned on and the second transistor T2 is turned off, the first driver 300 outputs the voltage (high level) of the first power supply terminal V COMH , and the passive light-emitting device 130 does not emit light. When the first transistor T1 is turned off and the second transistor T2 is turned on, the first driver 300 outputs the voltage (low level) of the second power supply terminal V LSS , and the passive light-emitting device 130 emits light. The second driver 400 includes a current source Isec, a third transistor T3, and a fourth transistor T4. One end of the current source is connected to the third power supply terminal Vcc, and the other end is connected to the first pole of the third transistor T3. The control pole of the third transistor T3 is connected to the control terminal D, and the second pole is connected to the output terminal B. The first pole of the fourth transistor T4 is connected to the output terminal B, and the second pole is connected to the second power supply terminal V LSS . When the third transistor T3 is turned on and the fourth transistor T4 is turned off, and the cathode of the passive light-emitting device 130 is connected to a low level, the passive light-emitting device 130 emits light, and the current of the current source Isec controls the brightness of the passive light-emitting device 130. When the third transistor T3 and the fourth transistor T4 are turned on, the passive light-emitting device 130 does not emit light.

[0078] Figure 5 Schematic diagram of driving the first display area provided for an exemplary embodiment. As Figure 5 shown, within one frame scanning time, the second driving signal lines COM_1 to COM_n are sequentially loaded with low-level signals ( Figure 5 only COM_1 and COM_2 are shown in the figure, and the rest are similar), so as to load a low level to the cathode of the passive light-emitting device of the first pixel column connected to the second driving signal line, and sequentially turn on the first pixels 101 of the first column to the first pixels 101 of the nth column. The first driving signal line loads a driving signal to the anode of the passive light-emitting device, so that the passive light-emitting device emits light.

[0079] In an exemplary embodiment, as Figure 6As shown, in the first display area 100, each first pixel 101 in a row corresponds to a first driving signal line group 60_j. The first driving signal line group 60_j includes multiple first driving signal lines. In this embodiment, the first driving signal lines can extend along the extension direction of the first pixel row and penetrate through the first display area 100. Due to the first driving signal lines, when light passes through the edges of the first driving signal lines, a relatively complex diffraction intensity distribution is formed, resulting in diffraction fringes. When a camera is placed under the screen and takes pictures, strong diffraction will occur, leading to poor imaging effects of the pictures. In the embodiments of the present disclosure, an anti-diffraction structure is provided in the anti-diffraction area 110, and the anti-diffraction structure is configured to reduce the diffraction intensity of the first driving signal line group 60. The anti-diffraction structure can have various implementation manners. In an exemplary embodiment, the anti-diffraction structure can include multiple shielding portions that respectively shield the first driving signal line group, thereby reducing the diffraction intensity; or, the anti-diffraction structure can include the first driving signal line group 60, and the cross-sectional shape of the first driving signal lines in the anti-diffraction area 110 parallel to the substrate is adjusted to be a sine shape, so that when light passes through the edges of the first driving signal lines, it diffuses in multiple directions, improving the diffraction effect.

[0080] Figure 7 FIG. is a schematic diagram of an anti-diffraction structure provided for an exemplary embodiment. As Figure 7 shown, the anti-diffraction structure provided in this embodiment can include multiple shielding portions 50. The shielding portions 50 correspond to the first driving signal line groups 60 one by one. The shielding portions 50 are located on the side of the first driving signal line groups 60 close to the substrate. In a plane parallel to the substrate, within the anti-diffraction area 110, the orthographic projection of the first driving signal lines of the first driving signal line group 60 is located within the orthographic projection of the corresponding shielding portion 50. That is, within the anti-diffraction area 110, the shielding portion 50 shields the first driving signal lines of the corresponding first driving signal line group, and can shield some or all of the first driving signal lines. In an exemplary embodiment, in a plane parallel to the substrate, within the anti-diffraction area 110, the orthographic projection of the first driving signal line group 60 is the same size as, or slightly smaller than, the orthographic projection of the corresponding shielding portion 50. The solution provided in this embodiment reduces the diffraction caused by the first driving signal lines by shielding the first driving signal lines.

[0081] In an exemplary embodiment, the anti-diffraction area 110 can be the entire first display area 100, or can be the photosensitive area of the camera. When the anti-diffraction area 110 is the photosensitive area of the camera, the area in the first display area 100 other than the anti-diffraction area 110 may not be provided with the shielding portion 50, or may be provided with the shielding portion 50.

[0082] In an exemplary embodiment, the material of the shielding portion 50 includes metals, such as silver Ag, copper Cu, aluminum Al, molybdenum Mo, etc., or alloy materials of the above metals, such as aluminum-ndium alloy AlNd, molybdenum-niobium alloy MoNb, etc.

[0083] In an exemplary embodiment, such as Figure 7As shown, the anti-diffraction region 110 includes N of the shielding portions 50. In a plane parallel to the substrate, the positions of the orthographic projections of the shielding portions 50 in the orthographic projection region of the corresponding first pixel row are cycled with a period of K. The position of the region formed by the orthographic projection of the shielding portion 50 in the first pixel row can be described by the distance between the shielding portion 50 and the reference line 80 of the corresponding first pixel row. The reference line 80 of the first pixel row is parallel to the first direction X and includes the boundary point of the pixel opening region of the first pixel row closest to the first side A of the first display region 100. The pixel opening region refers to the opening on the pixel defining layer, and the light-emitting layer of the sub-pixel is disposed within the pixel opening region. In a plane parallel to the substrate, the distance between the orthographic projection of the shielding portion 50 and the orthographic projection of the reference line 80 of the first pixel row means: the distance between the orthographic projection of the first boundary of the shielding portion 50 close to the first side A and the orthographic projection of the reference line 80 of the corresponding first pixel row (if the first boundary is a curve, the first boundary can be converted into a straight boundary before calculating the distance, such as the boundary of the smallest quadrilateral region containing the shielding portion and having the smallest orthographic projection as the first boundary of the shielding portion). Assuming that the i-th shielding portion corresponds to the i-th first pixel row (i.e., the first pixel in the i-th row), then, the i-th distance between the first boundary of the orthographic projection of the i-th shielding portion and the orthographic projection of the reference line of the i-th first pixel row is the same as the (K + i)-th distance between the first boundary of the orthographic projection of the (K + i)-th shielding portion and the orthographic projection of the reference line of the first pixel row corresponding to the (K + i)-th shielding portion, and the distances between the first boundaries of the orthographic projections of consecutive K shielding portions and the orthographic projections of the reference lines of the first pixel rows corresponding to the shielding portions are different from each other, (i.e., the distances between the orthographic projections of different shielding portions within the same cycle period and the orthographic projections of the reference lines of the corresponding first pixel rows are different), where K is a preset value, i is from 1 to N - K, and K is less than N. Taking N as 16 and K as 8 as an example, the first distance to the eighth distance are respectively the same as the ninth distance to the sixteenth distance, that is, the first distance is the same as the ninth distance, the second distance is the same as the tenth distance, and so on, and the eighth distance is the same as the sixteenth distance. In addition, the first distance, the second distance, the third distance, the fourth distance, the fifth distance, the sixth distance, the seventh distance, and the eighth distance are all different. When N is 20 and K is 8, then the 11th distance and the 16th distance are similar to those in the previous embodiment, the 17th distance is the same as the first distance, the 18th distance is the same as the second distance, the 19th distance is the same as the third distance, and the 20th distance is the same as the fourth distance. In this embodiment, by introducing a layout method in which the positions of the shielding portions change periodically and the positions of different shielding portions within the period are different, compared with the layout method in which the positions of the shielding portions are fixed, the intensity of diffraction in a certain fixed direction can be weakened, and the brightness ripples generated by diffraction can be dispersed, thereby improving the overall imaging effect.

[0084] In an exemplary embodiment, K is greater than or equal to 8.

[0085] In an exemplary embodiment, on a plane parallel to the substrate, the cross-sectional shape of the shielding portion 50 includes a quadrilateral, and there are two opposite boundaries parallel to the reference line 80. In an exemplary embodiment, when K = 8 and the orthographic projection size of the first pixel 101 on a plane parallel to the substrate is 127um * 127um (the first display area can be evenly divided into multiple pixel areas, each pixel area includes a first pixel, and the size of this pixel area is the size of the first pixel 101), the distances from the first boundary of the first shielding portion 50 to the eighth shielding portion 50 to the orthographic projections of the corresponding reference lines are shown in Table 1.

[0086] Table 1 Distances between the orthographic projections of the shielding portion and the reference line (on a plane parallel to the substrate)

[0087]

[0088] Adopting the solution of this embodiment, compared with the solution where the distance between the shielding portion 50 and the reference line of the corresponding first pixel row is fixed (Solution 1), the diffraction intensity from 0 to 0.5° can be reduced to 1 / 3 of the original diffraction intensity. Figure 8 In the middle figure (a1) is a schematic diagram of the anti-diffraction area of Solution 1, Figure 8 In the middle figure (b1) is a schematic diagram of the anti-diffraction area of Solution 2 (the positions of the shielding portions 50 are shown in Table 1). The diffraction intensities of the two solutions are respectively as Figure 9 shown, Figure 9 In the middle figure (a2) is a schematic diagram of the diffraction intensity of Solution 1, Figure 9 In the middle figure (b2) is a schematic diagram of the diffraction intensity of Solution 2, where the abscissa is the diffraction order and the ordinate is the diffraction intensity. As Figure 9 (a2) and Figure 9 (b2) show that after changing the distance between the shielding portion 50 and the reference line of the corresponding first pixel row, the diffraction intensity is greatly reduced. As shown in Table 2, it can be seen that the diffraction intensity from 0 to 0.5° of Solution 1 is 5.890%, and the diffraction intensity from 0 to 0.5° of Solution 2 is 1.465%, which is 29.3% of Solution 1, greatly reducing the diffraction intensity from 0 to 0.5°.

[0089] Table 2 Diffraction intensities of Solution 1 and Solution 2

[0090] Diffraction angle 0 to 0.5° 0.5 to 1° 1 to 1.5° Scheme 1 5.890％ 0.850％ 0.300％ Scheme 2 1.465％ 0.820％ 0.400％

[0091] The above description of the position of the shielding portion 50 using the reference line is only an example, and other reference lines can be used for description.

[0092] In an exemplary embodiment, when K = 8, in a plane parallel to the substrate, the distance between the first boundary of the positive projection of the first shielding portion and the positive projection of the reference line of the first pixel row corresponding to the first shielding portion is 107 / 127 ± 10% of the reference unit;

[0093] The distance between the first boundary of the positive projection of the second shielding portion and the positive projection of the reference line of the first pixel row corresponding to the second shielding portion is 117 / 127 ± 10% of the reference unit;

[0094] The distance between the first boundary of the positive projection of the third shielding portion and the positive projection of the reference line of the first pixel row corresponding to the third shielding portion is 90 / 127 ± 10% of the reference unit;

[0095] The distance between the first boundary of the positive projection of the fourth shielding portion and the positive projection of the reference line of the first pixel row corresponding to the fourth shielding portion is 118 / 127 ± 10% of the reference unit;

[0096] The distance between the first boundary of the positive projection of the fifth shielding portion and the positive projection of the reference line of the first pixel row corresponding to the fifth shielding portion is 75 / 127 ± 10% of the reference unit;

[0097] The distance between the first boundary of the positive projection of the sixth shielding portion and the positive projection of the reference line of the first pixel row corresponding to the sixth shielding portion is 118 / 127 ± 10% of the reference unit;

[0098] The distance between the first boundary of the positive projection of the seventh shielding portion and the positive projection of the reference line of the first pixel row corresponding to the seventh shielding portion is 59 / 127 ± 10% of the reference unit;

[0099] The distance between the first boundary of the positive projection of the eighth shielding portion and the positive projection of the reference line of the first pixel row corresponding to the eighth shielding portion is 91 / 127 ± 10% of the reference unit;

[0100] The reference unit is determined according to the size of the positive projection of the first pixel in a plane parallel to the substrate. For example, if the size of the first pixel is 127um * 127um, the reference unit can be the side length of the first pixel, which is 127um.

[0101] In an exemplary embodiment, the pixel driving circuit includes a gate electrode, a first capacitor electrode, a second capacitor electrode, a source electrode, and a drain electrode. The first capacitor electrode and the second capacitor electrode form a storage capacitor. The first driving signal line may be disposed on the same layer as the source electrode and the drain electrode, and the shielding portion 50 may be disposed on the same layer as the second capacitor electrode. That is, the shielding portion 50 and the second capacitor electrode can be formed by one manufacturing process. The shielding portion 50 and the second capacitor electrode can be prepared using the same material. The shielding portion 50 and the second capacitor electrode being disposed on the same layer can avoid adding processes and reduce costs. In another embodiment, the shielding portion 50 may be disposed on other layers. For example, it may be disposed on the same layer as the gate electrode. The shielding portion 50 and the first driving signal line can be as close as possible to improve the shielding effect. In another embodiment, the first driving signal line may be disposed on the same layer as the second capacitor electrode. The embodiments of the present disclosure do not limit this.

[0102] In an exemplary embodiment, in a plane parallel to the substrate, the cross-sectional shape of the shielding portion 50 is not limited to a quadrilateral and may be other shapes, such as a hexagon, etc.

[0103] In an exemplary embodiment, the edge of the shielding portion 50 may be a curved shape, which can reduce the diffraction intensity.

[0104] In an exemplary embodiment, the first driving signal line group 60 further includes a connection lead, and the connection lead connects the first driving signal line and the anode of the passive light-emitting device through a via.

[0105] In an exemplary embodiment, as Figure 7 shown, the first color sub-pixel 1011 and the second color sub-pixel 1012 are arranged in the same row, and the third color sub-pixel 1013 is located in an adjacent row to the row where the first color sub-pixel 1011 and the second color sub-pixel 1012 are located; in the first display area 100, the rows where the first color sub-pixel 1011 is located and the rows where the third color sub-pixel 1013 is located are alternately arranged;

[0106] The first driving signal line is connected to the anode of the corresponding sub-pixel through a connection lead 70. For example, the first driving signal line 61 is connected to the anode of the first color sub-pixel 1011 through the connection lead 71, the first driving signal line 62 is connected to the second color sub-pixel 1012 through the connection lead 72, and the first driving signal line 63 is connected to the third color sub-pixel 1013 through the connection lead 73.

[0107] On a plane parallel to the substrate, in the same first pixel 101, when the shortest distance between the first driving signal line and the pixel opening region of the passive light-emitting device of the first pixel 101 is greater than a preset distance, the positive projection of the connection lead 70 connected to the first driving signal line overlaps with the positive projection of the pixel opening region of the third color sub-pixel 1013 of the first pixel 101. The preset distance can be set as needed. The pixel opening region refers to the opening on the pixel defining layer, and the light-emitting layer of each sub-pixel of the passive light-emitting device is disposed in the pixel opening region. The solution provided in this embodiment can make the connection lead 70 and the pixel opening region of the third color sub-pixel 1013 overlap as much as possible, which can improve the transmittance.

[0108] Figure 10 Schematic diagram of an anti-diffraction structure provided for an embodiment Figure 11 For Figure 10 An enlarged view of region 120 in Figure 10 As shown, in this embodiment, the anti-diffraction structure includes a first driving signal line group 60. On a plane parallel to the substrate, the cross-sectional shape of the first driving signal line in the anti-diffraction region 110 includes a sine curve. The anodes of the first color sub-pixel 1011, the second color sub-pixel 1012, and the third color sub-pixel 1013 are respectively connected to a driving signal line in the first driving signal line group 60 through vias at positions 91, 92, and 93. The positions 91, 92, and 93 can be set as needed, for example, as close as possible to the anodes to be connected. The solution provided in this embodiment can improve the diffraction effect and reduce the diffraction intensity by diffusing light in multiple directions when the light passes through the edge of the first driving signal line by setting the first driving signal line in a sine shape. The solution provided in this embodiment has little change in the process and is easy to implement.

[0109] In an exemplary embodiment, on a plane parallel to the substrate, the cross-section of the first driving signal line outside the anti-diffraction region 110 can be a sine curve (the extending direction is a sine curve), or it can be a straight line (the extending direction is a straight line).

[0110] In an exemplary embodiment, in the same first driving signal line group 60, the first driving signal lines are parallel to each other, the spacing between adjacent first driving signal lines is the same, and the line width of the first driving signal lines is the same.

[0111] In an exemplary embodiment, the distance between the starting point E1 and the ending point E2 within one period of the sine curve formed by the first driving signal line may be 0.9 to 1.1 reference units, and the amplitude of the sine curve formed by the first driving signal line may be 10 / 127 ± 10% reference units. For example, when the orthographic projection of the first pixel 101 is 127um * 127um, the distance between the starting point E1 and the ending point E2 within one period of the sine curve formed by the first driving signal line may be 127um, and the amplitude may be 10um.

[0112] In an exemplary embodiment, the line width of the first driving signal line may be 6.2 / 127 ± 10% reference units.

[0113] In an exemplary embodiment, the pitch between adjacent first driving signal lines may be 5.8 / 127 ± 10% reference units.

[0114] As Figure 11 shown, taking the line connecting the two closest points of the anodes of the two third-color sub-pixels 1013 in the same column adjacent to the first driving signal line as the vertical axis of the reference coordinate system, the line perpendicular to this line and passing through the midpoint of this line as the horizontal axis, and the midpoint as the center point of this reference coordinate system, the coordinates of the starting point E of one period of the sine curve formed by the first driving signal line are (D1, 0), where the length of the line connecting the two closest points of the anodes of the two third-color sub-pixels 1013 in the same column is 2*D2. When the size of the first pixel is 127um * 127um, D1 = 21.2um and D2 = 25.53um. However, the position of the first driving signal line is not limited to this, and the first driving signal line can be translated along the first direction X.

[0115] In an exemplary embodiment, the first pixel includes a first-color sub-pixel, a second-color sub-pixel, and a third-color sub-pixel. The first-color sub-pixel and the second-color sub-pixel are arranged in the same row, and the third-color sub-pixel is located in the adjacent row of the row where the first-color sub-pixel and the second-color sub-pixel are located;

[0116] In the first display area, the rows where the first-color sub-pixels are located and the rows where the third-color sub-pixels are located are arranged alternately.

[0117] In an exemplary embodiment, in a plane parallel to the substrate, the positive projection of the first driving signal line group may overlap with the positive projections of the pixel opening regions of the first color sub-pixels 1011 and the second color sub-pixels 1012 corresponding to the first pixel row, and be outside the positive projection of the pixel opening region of the third color sub-pixels 1013. In the solution provided in this embodiment, the first driving signal line and the first color sub-pixels 1011 and the second color sub-pixels 1012 are arranged in the same row, which can improve the transmittance. However, the embodiments of the present disclosure are not limited thereto, and it can be arranged at other positions.

[0118] In an exemplary embodiment, the pixel driving circuit includes a gate electrode, a first capacitor electrode, a second capacitor electrode, a source electrode, and a drain electrode. The first capacitor electrode and the second capacitor electrode form a storage capacitor. The first driving signal line may be arranged on the same layer as the gate electrode, or may be arranged on the same layer as the source electrode and the drain electrode, or may be arranged on the same layer as the second capacitor electrode. The embodiments of the present disclosure do not limit this.

[0119] In an exemplary embodiment, when the positive projection of the first pixel 101 is 127um * 127um, the distance between the starting point E1 and the ending point E2 within one period of the sine curve formed by the first driving signal line may be 127um, the amplitude may be 10um, the line width of the first driving signal line may be 6.2um, and the pitch between adjacent first driving signal lines may be 5.8um. The diffraction intensity comparison between this solution (referred to as Solution Four) and Figure 6 the solution shown (referred to as Solution Three) is shown in Table 3. It can be seen that Solution Four can concentrate most of the diffraction intensity within the range of 0 to 0.5°, and the diffraction intensity at large angles of 0.5 to 10° is greatly reduced, especially the diffraction intensity from 1 to 10° is greatly reduced. In addition, compared with Solution Three, the diffraction intensity at 0 to 0.5° of Solution One is also improved, decreasing from 8.34% of Solution Three to 5.890% of Solution One.

[0120] Table 3 Diffraction Intensity and Transmittance of Solution Three and Solution Four

[0121]

[0122] The structure of the display substrate of this embodiment will be described below through the preparation process of the display substrate. Herein, the "lithography process" as mentioned in the present disclosure includes processes such as depositing a film layer, coating a photoresist, mask exposure, development, etching, and stripping the photoresist. Deposition can employ any one or more selected from sputtering, evaporation coating, and chemical vapor deposition. Coating can employ any one or more selected from spraying and spin coating. Etching can employ any one or more selected from dry etching and wet etching. A "thin film" refers to a film layer made of a certain material on a substrate by using a deposition or coating process. If the "thin film" does not require a lithography process during the entire manufacturing process, the "thin film" can also be referred to as a "layer". When the "thin film" still requires a lithography process during the entire manufacturing process, it is called a "thin film" before the lithography process and a "layer" after the lithography process. The "layer" after the lithography process contains at least one "pattern". The statement "A and B are disposed in the same layer" as mentioned in the present disclosure means that A and B are simultaneously formed through the same lithography process.

[0123] The preparation process of the display substrate provided with the shielding portion may include:

[0124] (1) Coating a flexible material on the glass carrier 1 and curing it into a film to form the substrate 10. In this embodiment, the substrate 10 may be a flexible substrate. The flexible material may employ materials such as polyimide PI, polyethylene terephthalate PET, or a surface-treated polymer soft film. In an exemplary embodiment, the substrate 10 may be a single-layer structure, or may be a multi-layer stacked structure. The stacked substrate may include: flexible material / inorganic material / flexible material, flexible material / inorganic material / amorphous silicon / flexible material / inorganic material, etc. The inorganic material may be a barrier film, such as silicon nitride (SiNx) or silicon oxide (SiOx), etc., for improving the water and oxygen resistance of the substrate. Taking the PI / Barrier / PI / Barrier stacked structure as an example, the preparation process may include: first coating a layer of polyimide on the glass carrier, depositing a barrier film after curing into a film, then coating another layer of polyimide on the barrier film, and depositing another barrier film after curing into a film to form a flexible substrate with a stacked structure.

[0125] (2) Preparing an active layer pattern on the substrate 10.

[0126] Depositing a first insulating film and an active layer film in sequence on the substrate 10, and patterning the active layer film through a lithography process to form a first insulating layer 11 covering the entire substrate 10 and an active layer 12 pattern disposed on the first insulating layer 11. The active layer 12 is formed in the second display area 200. After this lithography process, the first display area 100 includes the first insulating layer 11 disposed on the substrate 10.

[0127] (3) Preparing a gate electrode pattern;

[0128] Deposit a second insulating film and a first metal film in sequence, pattern the first metal film through a patterning process to form a fourth insulating layer 13 covering the entire substrate 10 and a first gate metal layer pattern disposed on the fourth insulating layer 13. The first gate metal layer pattern is formed in the second display area 200 and at least includes a gate electrode 14, a first capacitor electrode 15, a first gate line (not shown), and a second gate line (not shown). After this patterning process, the first display area 100 includes a first insulating layer 11 and a second insulating layer 13 stacked on the substrate 10.

[0129] (4) Prepare a pattern of the shielding portion 50;

[0130] Deposit a third insulating film and a second metal film in sequence, pattern the second metal film through a patterning process to form a second insulating layer 16 covering the entire substrate 10 and a second gate metal layer pattern disposed on the second insulating layer 16. The second gate metal layer pattern at least includes a second capacitor electrode 17 and a shielding portion 50. The position of the second capacitor electrode 17 corresponds to the position of the first capacitor electrode 15. After this patterning process, the first display area 100 includes a first insulating layer 11, a second insulating layer 13, a third insulating layer 16, and a shielding portion 50 stacked on the substrate 10.

[0131] (5) Prepare patterns of a source electrode, a drain electrode, and a first driving signal line;

[0132] Deposit a fourth insulating film, pattern the fourth insulating film through a patterning process to form a pattern of a fourth insulating layer 18 covering the entire substrate 10. Two vias are formed in the fourth insulating layer 18. The two vias are formed in the second display area 200 and the positions correspond to the positions at both ends of the active layer 12. The fourth insulating layer 18, the third insulating layer 16, and the second insulating layer 13 within the vias are etched away to expose the surface of the active layer 12.

[0133] Deposit a third metal film, pattern the third metal film through a patterning process to form a first source-drain metal layer (SD1) on the fourth insulating layer 18, which at least includes a source electrode 19, a drain electrode 20, a first driving signal line of the first driving signal line group 60, a data line (not shown), a power line (not shown), etc. The source electrode 19 and the drain electrode 20 are respectively connected to the active layer 12 through fourth vias; as Figure 12 shown. The active layer 12, the gate electrode 14, the source electrode 19, and the drain electrode 20 form a thin film transistor, and the first capacitor electrode 15 and the second capacitor electrode 17 form a storage capacitor. In a plane parallel to the substrate, the positive projection of the first driving signal line in the first driving signal line group 60 is within the shielding portion 50.

[0134] In this embodiment, the first insulating film, the second insulating film, the third insulating film, and the fourth insulating film may be made of at least one of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single-layer structure or a multi-layer composite structure. Generally, the first insulating layer 11 is called a buffer layer, which is used to improve the water and oxygen resistance of the substrate 10. The second insulating layer 13 and the third insulating layer 16 are called gate insulating (GI) layers, and the fourth insulating layer 18 is called an interlayer insulating (ILD) layer. The first metal film, the second metal film, and the third metal film may be made of metal materials such as silver (Ag), copper (Cu), aluminum (Al), molybdenum (Mo), etc., or alloy materials of the above metals such as aluminum-neodymium alloy (AlNd), molybdenum-niobium alloy (MoNb), etc., and may be a single-layer structure, or may be a multi-layer composite structure such as Mo / Cu / Mo, etc. The active layer film may be made of amorphous indium gallium zinc oxide material (a-IGZO), zinc oxide nitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene, polythiophene, etc.

[0135] Subsequently, the preparation of the light-emitting structure layer (including the anode, the pixel definition layer, the light-emitting layer, and the cathode) and the encapsulation layer, etc., will not be elaborated. After the preparation of the subsequent film layers is completed, the display substrate is peeled off from the glass carrier 1 through a peeling process.

[0136] The preparation process of the display substrate without a shielding portion may include:

[0137] (1) Coating a flexible material on the glass carrier 1, curing it into a film, and forming a substrate 10. In this embodiment, the substrate 10 may be a flexible substrate. The flexible material may be made of materials such as polyimide PI, polyethylene terephthalate PET, or a surface-treated polymer soft film. In an exemplary embodiment, the substrate 10 may be a single-layer structure or a multi-layer laminated structure. The laminated substrate may include: flexible material / inorganic material / flexible material, flexible material / inorganic material / amorphous silicon / flexible material / inorganic material, etc. The inorganic material may be a barrier film such as silicon nitride (SiNx) or silicon oxide (SiOx), etc., which is used to improve the water and oxygen resistance of the substrate. Taking the PI / Barrier / PI / Barrier laminated structure as an example, the preparation process may include: first coating a layer of polyimide on the glass carrier, depositing a barrier film after curing into a film, then coating another layer of polyimide on the barrier film, and depositing another barrier film after curing into a film to form a laminated flexible substrate.

[0138] (2) Preparing an active layer pattern on the substrate 10.

[0139] The first insulating film and the active layer film are sequentially deposited on the substrate 10. The active layer film is patterned through a patterning process to form a first insulating layer 11 covering the entire substrate 10 and an active layer 12 pattern disposed on the first insulating layer 11. The active layer 12 is formed in the second display area 200. After this patterning process, the first display area 100 includes the first insulating layer 11 disposed on the substrate 10.

[0140] (3) Prepare the gate electrode and the first driving signal line pattern;

[0141] The second insulating film and the first metal film are sequentially deposited. The first metal film is patterned through a patterning process to form a fourth insulating layer 13 covering the entire substrate 10 and a first gate metal layer pattern disposed on the fourth insulating layer 13. The first gate metal layer pattern is formed in the second display area 200 and at least includes a gate electrode 14, a first capacitor electrode 15, a first gate line (not shown), and a second gate line (not shown). After this patterning process, the first display area 100 includes the first insulating layer 11 and the second insulating layer 13 stacked on the substrate 10.

[0142] (4) Prepare the second capacitor electrode pattern;

[0143] The third insulating film and the second metal film are sequentially deposited. The second metal film is patterned through a patterning process to form a second insulating layer 16 covering the entire substrate 10 and a second gate metal layer pattern disposed on the second insulating layer 16. The second gate metal layer pattern at least includes a second capacitor electrode 17, and the position of the second capacitor electrode 17 corresponds to the position of the first capacitor electrode 15. After this patterning process, the first display area 100 includes the first insulating layer 11, the second insulating layer 13, the first driving signal line group 60, and the third insulating layer 16 stacked on the substrate 10. In another embodiment, the first driving signal line group 60 and the second capacitor electrode 17 can be disposed on the same layer.

[0144] (5) Prepare the source electrode and the drain electrode patterns;

[0145] The fourth insulating film is deposited. The fourth insulating film is patterned through a patterning process to form a fourth insulating layer 18 pattern covering the entire substrate 10. Two vias are formed in the fourth insulating layer 18. The two vias are formed in the second display area 200 and the positions correspond to the positions at both ends of the active layer 12. The fourth insulating layer 18, the third insulating layer 16, and the second insulating layer 13 within the vias are etched away to expose the surface of the active layer 12.

[0146] Deposit a third metal thin film, pattern the third metal thin film through a patterning process, and form a first source-drain metal layer (SD1) on the fourth insulating layer 18, which includes at least a source electrode 19, a drain electrode 20, a first driving signal line of the first driving signal line group 60, a data line (not shown), a power line (not shown), etc. The source electrode 19 and the drain electrode 20 are respectively connected to the active layer 12 through fourth vias; as Figure 13 shown. The active layer 12, the gate electrode 14, the source electrode 19, and the drain electrode 20 form a thin film transistor, and the first capacitor electrode 15 and the second capacitor electrode 17 form a storage capacitor. In this embodiment, the first driving signal line group 60 includes 3 first driving signal lines. In a plane parallel to the substrate, the cross-section of the first driving signal line in the anti-diffraction region 110 is in a sine shape.

[0147] The structure and its manufacturing process shown in the embodiments of the present disclosure are merely an exemplary illustration. In the exemplary embodiments, the corresponding structure can be changed according to actual needs, and the patterning process can be increased or decreased. For example, the thin film transistor can be not only a top-gate structure but also a bottom-gate structure, and can be not only a double-gate structure but also a single-gate structure. Other electrodes, leads, and structural film layers can also be provided in the light-emitting structure layer.

[0148] As Figure 14 shown, the embodiments of the present disclosure provide a display device, which may include the above display substrate.

[0149] In an exemplary embodiment, the display device may further include a first driving chip 500 and a second driving chip 600. The first driving chip 500 is electrically connected to the passive light-emitting device (not shown in the figure), and the second driving chip 600 is electrically connected to the pixel driving circuit (not shown in the figure). The first driving chip 500 inputs a driving signal to the passive light-emitting device through a second driving signal line (not shown in the figure), and the second driving chip 600 inputs a driving signal to the active light-emitting device through the pixel driving circuit. The solution provided in this embodiment uses different driving chips to drive the first display area 100 and the second display area 200.

[0150] In an exemplary embodiment, the display device may further include a sensor device 700. At least one sensor device 700 is disposed in the anti-diffraction region 110, and the photosensitive surface of the sensor device 700 is consistent with the light-emitting side of the display substrate. The sensor device 700 may include, for example, at least one of the following: a camera, an infrared sensor, and a face recognition (Face ID) sensor, etc.

[0151] In an exemplary embodiment, the display device may include a full-screen display device.

[0152] In an exemplary embodiment, the display device may be: a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or any product or component having a display function.

[0153] As Figure 15 shown, an embodiment of the present disclosure provides a method for manufacturing a display substrate. The display substrate includes a first display area and a second display area. The first display area includes an anti-diffraction area. The first display area includes a plurality of first pixels, and each first pixel includes a passive light-emitting device. The second display area includes a plurality of second pixels, and each second pixel includes an active light-emitting device and a pixel driving circuit electrically connected to the active light-emitting device. The manufacturing method includes:

[0154] Step 1501: Form a plurality of first driving signal line groups in the first display area of the substrate, and form an anti-diffraction structure in the anti-diffraction area of the substrate to reduce the diffraction intensity of the first driving signal line groups. One first driving signal line group corresponds to one row of first pixels, and each first driving signal line group includes a plurality of first driving signal lines. Form the pixel driving circuit in the second display area of the substrate;

[0155] Step 1502: Form a passive light-emitting device including an anode, a light-emitting layer, and a cathode in the first display area of the substrate. The anode of the passive light-emitting device is connected to the first driving signal line of the corresponding first driving signal group. Form an active light-emitting device in the second display area of the substrate. In an exemplary embodiment, forming the anti-diffraction structure in the anti-diffraction area of the substrate includes:

[0156] Form a plurality of shielding portions on the substrate;

[0157] Form the first driving signal lines of the first driving signal line group on the side of the shielding portion away from the substrate. The shielding portion corresponds to the first driving signal line group one by one. In a plane parallel to the substrate, within the anti-diffraction area, the orthographic projection of the first driving signal line of the first driving signal line group is located within the orthographic projection of the corresponding shielding portion.

[0158] In an exemplary embodiment, in a plane parallel to the substrate of the display substrate, within the anti-diffraction area, the cross-sectional shape of the first driving signal line includes a sine curve.

[0159] In this embodiment, the structures, materials, related parameters, and detailed manufacturing processes of each film layer have been described in detail in the foregoing embodiments, and will not be elaborated here.

[0160] The solution provided by this embodiment reduces the diffraction intensity by setting up an anti-diffraction structure. The preparation method of this embodiment can be realized by using existing mature preparation equipment, with little improvement to the existing process, and can be well compatible with the existing preparation process. Therefore, it has the advantages of low manufacturing cost, easy process implementation, high production efficiency, and high yield. The solution provided by this embodiment can reduce the diffraction intensity and improve the shooting effect, and has good application prospects.

Claims

1. A display substrate, comprising: A first display area and a second display area, wherein the first display area includes a plurality of first pixels, the first pixels include passive light-emitting devices, the second display area includes a plurality of second pixels, and the second pixels include active light-emitting devices and pixel driving circuits electrically connected to the active light-emitting devices; the first display area includes a plurality of first driving signal line groups, one first driving signal line group corresponds to one first pixel row, the first pixel row includes one row of the first pixels, the first driving signal line group includes a plurality of first driving signal lines, and the first driving signal lines are connected to anodes of the passive light-emitting devices of the first pixels in the corresponding first pixel row. The first display area includes an anti-diffraction area, and an anti-diffraction structure is provided in the anti-diffraction area, and the anti-diffraction structure is configured to reduce the diffraction intensity of the first driving signal line group. Wherein, the anti-diffraction structure includes a plurality of shielding portions, the shielding portions correspond to the first driving signal line groups one by one, and the shielding portions are located on a side of the first driving signal line groups close to a substrate of the display substrate; in a plane parallel to the substrate, within the anti-diffraction area, a positive projection of the first driving signal lines of the first driving signal line group is located within a positive projection of the corresponding shielding portion; the anti-diffraction area includes N rows of first pixels and N shielding portions corresponding to the N rows of first pixels one by one; in a plane parallel to the substrate, a position of a positive projection of each shielding portion within a region formed by a positive projection of the corresponding first pixel row is cycled with a period of K; the K is a preset value.

2. The display substrate according to claim 1, wherein, The pixel driving circuit includes a gate electrode, a first capacitor electrode, a second capacitor electrode, a source electrode, and a drain electrode. The first capacitor electrode and the second capacitor electrode form a storage capacitor. The first driving signal line is provided on the same layer as the source electrode and the drain electrode, and the shielding portion is provided on the same layer as the second capacitor electrode.

3. The display substrate according to claim 1, wherein, The first driving signal line group further includes connection leads, and the connection leads are connected to the anodes of the first driving signal lines and the passive light-emitting devices through vias.

4. The display substrate according to claim 1, wherein a position of a positive projection of each shielding portion within a region formed by a positive projection of the corresponding first pixel row is determined according to a distance between each shielding portion and a reference line of the corresponding first pixel row; the position of a positive projection of each shielding portion within a region formed by a positive projection of the corresponding first pixel row is cycled with a period of K, including: On a plane parallel to the substrate, the first distance between the first boundary of the positive projection of the i-th occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the i-th occlusion portion is the same as the first distance between the first boundary of the positive projection of the (K + i)-th occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the (K + i)-th occlusion portion; and the distances between the first boundaries of the positive projections of consecutive K occlusion portions and the positive projections of the reference lines of the first pixel rows corresponding to the occlusion portions are different from each other, where i ranges from 1 to N - K, K is less than N; the reference line of the first pixel row is parallel to the first direction and includes the boundary point closest to the first side of the pixel opening region of the first pixel row; the first boundary is the boundary of the occlusion portion close to the first side, and the first direction is the extending direction of the first pixel row.

5. The display substrate according to claim 4, wherein, K is greater than or equal to 8.

6. The display substrate according to claim 5, wherein, When K = 8, on a plane parallel to the substrate, the distance between the first boundary of the positive projection of the first occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the first occlusion portion is 107 / 127 ± 10% of a reference unit; the distance between the first boundary of the positive projection of the second occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the second occlusion portion is 117 / 127 ± 10% of a reference unit; the distance between the first boundary of the positive projection of the third occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the third occlusion portion is 90 / 127 ± 10% of a reference unit; the distance between the first boundary of the positive projection of the fourth occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the fourth occlusion portion is 118 / 127 ± 10% of a reference unit; the distance between the first boundary of the positive projection of the fifth occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the fifth occlusion portion is 75 / 127 ± 10% of a reference unit; the distance between the first boundary of the positive projection of the sixth occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the sixth occlusion portion is 118 / 127 ± 10% of a reference unit; the distance between the first boundary of the positive projection of the seventh occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the seventh occlusion portion is 59 / 127 ± 10% of a reference unit; the distance between the first boundary of the positive projection of the eighth occlusion portion and the positive projection of the reference line of the first pixel row corresponding to the eighth occlusion portion is 91 / 127 ± 10% of a reference unit; The reference unit is determined according to the size of the positive projection of the first pixel on a plane parallel to the substrate.

7. The display substrate according to claim 3, wherein, The first driving signal line group includes three first driving signal lines. The first pixel includes a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. The anodes of the passive light-emitting devices in the same color sub-pixels of the first pixels in the same row are electrically connected to one of the first driving signal lines.

8. The display substrate according to claim 7, wherein, The first color sub-pixel and the second color sub-pixel are arranged in the same row, and the third color sub-pixel is located in an adjacent row to the row where the first color sub-pixel and the second color sub-pixel are located; in the first display area, the rows where the first color sub-pixels are located and the rows where the third color sub-pixels are located are arranged alternately; On a plane parallel to the substrate, in the same first pixel, when the shortest distance between the first driving signal line and the pixel opening area of the passive light-emitting device of the first pixel is greater than a preset distance, the orthographic projection of the connection lead connected to the first driving signal line overlaps with the orthographic projection of the pixel opening area of the third color sub-pixel of the first pixel.

9. The display substrate according to claim 1, wherein, The anti-diffraction structure includes the first driving signal line group. On a plane parallel to the substrate of the display substrate, in the anti-diffraction area, the cross-sectional shape of the first driving signal line includes a sine curve.

10. The display substrate according to claim 9, wherein, In the same first driving signal line group, the first driving signal lines are parallel to each other, and the distance between adjacent first driving signal lines is the same, and the line width of the first driving signal lines is the same.

11. The display substrate according to claim 10, wherein, On a plane parallel to the substrate, the distance between the starting point and the ending point within one period of the sine curve is 0.9 to 1.1 reference units, the amplitude of the sine curve is 10 / 127 ± 10% reference units, and the reference unit is determined according to the size of the orthographic projection of the first pixel on a plane parallel to the substrate.

12. The display substrate according to claim 11, wherein, The line width of the first driving signal line is 6.2 / 127 ± 10% reference units.

13. The display substrate according to claim 11, wherein, The distance between adjacent first driving signal lines is 5.8 / 127 ± 10% reference units.

14. The display substrate according to any one of claims 8 to 12, wherein, The first pixel includes a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel. The first color sub-pixel and the second color sub-pixel are arranged in the same row, and the third color sub-pixel is located in an adjacent row to the row where the first color sub-pixel and the second color sub-pixel are located; In the first display area, the rows where the first color sub-pixels are located and the rows where the third color sub-pixels are located are arranged alternately; On a plane parallel to the substrate, the orthographic projection of the first driving signal line group overlaps with the orthographic projection of the pixel opening area of the first color sub-pixel and the orthographic projection of the pixel opening area of the second color sub-pixel of the corresponding first pixel row, and is outside the orthographic projection of the pixel opening area of the third color sub-pixel.

15. A display device, comprising the display substrate according to any one of claims 1 to 14.

16. The display device according to claim 15, further comprising a sensor device. At least one of the sensor devices is disposed in the anti-diffraction area, and the photosensitive surface of the sensor device is consistent with the light-emitting side of the display substrate.

17. A method for preparing a display substrate, the display substrate including a first display area and a second display area, the first display area including an anti-diffraction area, the first display area including a plurality of first pixels, the first pixels including passive light-emitting devices, the second display area including a plurality of second pixels, the second pixels including active light-emitting devices and pixel driving circuits electrically connected to the active light-emitting devices; The manufacturing method includes: Forming a plurality of first driving signal line groups in the first display area of the substrate, forming an anti-diffraction structure in the anti-diffraction area of the substrate to reduce the diffraction intensity of the first driving signal line group. One first driving signal line group corresponds to one row of first pixels, and the first driving signal line group includes a plurality of first driving signal lines; forming the pixel driving circuit in the second display area of the substrate; A passive light-emitting device including an anode, a light-emitting layer, and a cathode is formed in the first display area of the substrate, and the anode of the passive light-emitting device is connected to the first driving signal line of the corresponding first driving signal group; an active light-emitting device is formed in the second display area of the substrate. Forming an anti-diffraction structure in the anti-diffraction area of the substrate includes: Forming a plurality of shielding portions on the substrate; forming the first driving signal line of the first driving signal line group on the side of the shielding portion away from the substrate, and the shielding portions correspond to the first driving signal line group one by one; in a plane parallel to the substrate, within the anti-diffraction area, the orthographic projection of the first driving signal line of the first driving signal line group is located within the orthographic projection of the corresponding shielding portion. The anti-diffraction area includes N rows of first pixels and N shielding portions corresponding to the N rows of first pixels one by one; in a plane parallel to the substrate, the position of the orthographic projection of each shielding portion in the area formed by the orthographic projection of the corresponding first pixel row is cycled with a period of K; the K is a preset value.

18. The method for preparing a display substrate according to claim 17, wherein, In a plane of the substrate parallel to the display substrate, within the anti-diffraction area, the cross-sectional shape of the first driving signal line includes a sine curve.

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