Display panel and display device

Abstract

The application discloses a display panel and a display device. The display panel comprises a substrate, a driving circuit layer arranged on one side of the substrate, and a light emitting element arranged on the side of the driving circuit layer away from the substrate. The display panel comprises a display area and a non-display area at least partially surrounding the display area. The light emitting element is located in the display area. The driving circuit layer comprises a shift register circuit. The shift register circuit is located in the non-display area. The display panel comprises at least one barrier wall. The barrier wall is arranged in the non-display area and surrounds the display area. The shift register circuit comprises a first circuit structure and a second circuit structure. In a plane parallel to the substrate, the projection of the second circuit structure at least partially overlaps the barrier wall. The first circuit structure is located on the side of the second circuit structure close to the display area. The technical scheme provided by the application realizes the narrow frame design of the display panel and guarantees the reliability of the panel.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] With the continuous development of liquid crystal display technology, organic light-emitting diode (OLED) panels or liquid crystal display panels have been widely used in electronic terminals such as mobile phones and tablets to achieve thinner and lighter designs and high-quality display effects.

[0003] The display panel has a non-display area around the display area used for image display. This area is used to arrange driver chips or to make vertical shift registers (VSRs). Because VSRs have many components, complex structures, and occupy a lot of space, a large amount of space must generally be reserved in the non-display area.

[0004] To adapt to modern narrow bezel designs, the area of ​​the non-display area is generally compressed, which requires compressing the size of other components in the non-display area. This can easily exceed current engineering limits and affect the performance of other components. For example, for low-temperature polysilicon (LTPS) panels, the encapsulation part and slit area need to be compressed, which can easily lead to the risk of encapsulation failure or cracking. Summary of the Invention

[0005] This invention provides a display panel and a display device to achieve a narrow bezel design while improving the reliability of the display panel.

[0006] In a first aspect, embodiments of the present invention provide a display panel, comprising: a substrate;

[0007] A driving circuit layer is disposed on one side of the substrate;

[0008] A light-emitting element is disposed on the side of the driving circuit layer away from the substrate;

[0009] The display panel includes a display area and a non-display area at least partially surrounding the display area; the light-emitting element is located in the display area; the driving circuit layer includes a shift register circuit; the shift register circuit is located in the non-display area;

[0010] At least one retaining wall; the retaining wall is disposed in the non-display area and surrounds the display area;

[0011] The shift register circuit includes a first circuit structure and a second circuit structure; in a plane parallel to the substrate, the projection of the second circuit structure at least partially overlaps with the barrier; the first circuit structure is located on the side of the second circuit structure closer to the display area.

[0012] Secondly, embodiments of the present invention provide a display device, including a display panel provided in any embodiment of the present invention.

[0013] In this invention, the display panel includes a driving circuit layer and a light-emitting element sequentially disposed on a substrate. The light-emitting element is disposed in the display area, and a shift register circuit is disposed in the driving circuit layer. The shift register circuit is disposed in the non-display area, and at least one baffle is disposed in the non-display area, surrounding the display area. The shift register circuit includes a first circuit structure and a second circuit structure. The first circuit structure is disposed between the second circuit structure and the display area, and the vertical projection of the second circuit structure on the substrate at least partially overlaps with the baffle. This embodiment divides the large-area shift register circuit into two parts, and one part, namely the second circuit structure, forms an overlapping area with the baffle. Compared with the prior art design where the baffle is disposed outside the shift register circuit, the width of the non-display area can be shortened, which is beneficial for the narrow bezel design of the display screen. In addition, when the panel needs to set multiple shift registers and the shift register circuit occupies more space, this embodiment overlaps the projection of the second circuit structure with the baffle, eliminating the need to compress the bezel width through compression packaging, effectively avoiding the risk of display panel packaging failure or cracking, and improving panel reliability. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0015] Figure 2 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention;

[0016] Figure 3 for Figure 1 A cross-sectional view of the display panel along line a-a';

[0017] Figure 4 for Figure 2 A cross-sectional view of the display panel along line b-b';

[0018] Figure 5 This is a schematic diagram of a shift register circuit provided in an embodiment of the present invention;

[0019] Figure 6 This is a schematic diagram of another shift register circuit provided in an embodiment of the present invention;

[0020] Figure 7 for Figure 1 A cross-sectional view of the display panel along line end c-c';

[0021] Figure 8 for Figure 1 Another cross-sectional view of the display panel along line end c-c';

[0022] Figure 9 for Figure 1 Another cross-sectional view of the display panel along line end c-c';

[0023] Figure 10 for Figure 1 Another cross-sectional view of the display panel along line end c-c';

[0024] Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0025] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0026] In existing technologies, to achieve the bezel design required by customers, other structures of the bezel may be compressed. This can affect other performance aspects of the display panel, easily exceeding engineering limits and leading to packaging or even panel failure. This invention improves the design of the shift register circuit, effectively shortening the narrow bezel design. Furthermore, compared to the promising Low Temperature Polycrystalline Oxide (LTPO) panel, which requires three VSR circuits simultaneously inputting into the sub-pixels of the display panel, and the Low Temperature Poly-Silicon (LTPS) panel, which requires an additional VSR circuit, compressing the bezel without altering the design can easily affect the performance of other components. This invention modifies the VSR circuit design, eliminating the need for compression packaging and slit areas, thus maintaining the required bezel width while ensuring display panel performance.

[0027] This invention provides a display panel, comprising: a substrate;

[0028] A driving circuit layer is disposed on one side of the substrate;

[0029] The light-emitting element is disposed on the side of the driving circuit layer away from the substrate;

[0030] The display panel includes a display area and a non-display area that at least partially surrounds the display area; light-emitting elements are located in the display area; the driving circuit layer includes shift register circuitry; the shift register circuitry is located in the non-display area;

[0031] At least one retaining wall; the retaining wall is located in the non-display area and surrounds the display area;

[0032] The shift register circuit includes a first circuit structure and a second circuit structure; in a plane parallel to the substrate, the projection of the second circuit structure at least partially overlaps with the barrier; the first circuit structure is located on the side of the second circuit structure closer to the display area.

[0033] In this embodiment of the invention, the display panel includes a driving circuit layer and a light-emitting element sequentially disposed on a substrate. The light-emitting element is disposed in the display area, and a shift register circuit is disposed in the driving circuit layer. The shift register circuit is disposed in a non-display area, and at least one baffle is disposed in the non-display area, surrounding the display area. The shift register circuit includes a first circuit structure and a second circuit structure. The first circuit structure is disposed between the second circuit structure and the display area, and the vertical projection of the second circuit structure on the substrate at least partially overlaps with the baffle. This embodiment divides the large-area shift register circuit into two parts, and one part, namely the second circuit structure, forms an overlapping area with the baffle. Compared with the prior art design where the baffle is disposed outside the shift register circuit, the width of the non-display area can be shortened, which is beneficial for the narrow bezel design of the display screen. In addition, when the panel needs to set multiple shift registers and the shift register circuit occupies more space, this embodiment overlaps the projection of the second circuit structure with the baffle, eliminating the need to compress the bezel width through compression packaging, effectively avoiding the risk of display panel packaging failure or cracking, and improving panel reliability.

[0034] The above is the core idea of ​​this invention. The technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0035] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Figure 2 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention. Figure 3 for Figure 1 A cross-sectional view of the display panel along line a-a'. Figure 4 for Figure 2 A cross-sectional view of the display panel along line b-b', as shown below. Figure 1 and Figure 3As shown, the display panel 1 includes a substrate 11, and a driving circuit layer 12 and a light-emitting element 13 sequentially disposed on the substrate 11. The display panel includes a display area AA and a non-display area NA that at least partially surrounds the display area AA. It should be noted that, for the purpose of describing the devices in the non-display area NA, Figure 1 The proportion of the non-display area NA on the entire display panel has been enlarged. Figure 1 The ratio of the display area AA to the non-display area NA does not represent their proportion in the actual object. The light-emitting element 13 is located in the display area AA, and the driving circuit layer 12 can be provided with pixel driving circuits corresponding one-to-one with the light-emitting element 13. Figure 1 (Not shown in the image), the pixel driving circuit can provide a driving voltage to the light-emitting element 13, thereby driving the light-emitting element 13 to emit light for display. (See reference...) Figure 3 The driving circuit layer 12 is also provided with a shift register circuit 121. The shift register circuit 121 is used to generate the control signals required by the pixel driving circuit to realize the scanning of the light-emitting element 13. The shift register circuit 121 is located in the non-display area NA and is electrically connected to the pixel driving circuit of the display area AA.

[0036] The display panel also includes a barrier 14, which is disposed in the non-display area NA and surrounds the display area AA. In this embodiment, at least one barrier 14 may be provided, for example, such as... Figure 1 As shown, this embodiment can provide two baffles 14 to improve the strength and reliability of the display panel. The shift register circuit 121 includes a first circuit structure 122 and a second circuit structure 123. That is, in this embodiment, the shift register circuit 121 is divided into two parts, one part (the first circuit structure 122) is located between the display area AA and the other part (the second circuit structure 123). In the plane parallel to the substrate 11, the second circuit structure 123 overlaps with the baffle 14 at least partially. Therefore, in the plane parallel to the substrate 11, the arrangement of the second circuit structure 123 makes it possible for the shift register circuit 121 and the baffle 14 to have a shared area S1, thereby reducing the width of the entire bezel. In the existing structure, the baffle is often set on the outside of the shift register circuit, that is, the shift register circuit and the baffle do not have a shared area in the plane parallel to the substrate 11. Compared to existing structures, this design, through the design of the shift register circuit 121, effectively reuses the lateral space of the non-display area NA to achieve a narrow bezel design for the display panel. It eliminates the need to compress the design of other structures within the non-display area NA; for example, it avoids shortening the width of the slit area S2, thereby preventing cracks during display panel cutting or handling and improving display panel reliability. Optionally, such as... Figure 1 As shown, the retaining wall 14 may include multiple retaining wall segments, and the multiple retaining wall segments of each retaining wall 14 are arranged around the display area AA, or, as... Figure 2As shown, the barrier 14 is a closed shape surrounding the display area AA. Furthermore, the projection of the barrier 14 onto the substrate can also be a curved shape surrounding the display area AA; this embodiment does not impose any special limitation on the specific shape of the barrier 14.

[0037] Continue to refer to Figure 3 Optionally, the display panel may further include: an encapsulation layer 16; the encapsulation layer 16 is disposed on the side of the light-emitting element 13 away from the substrate 11; the encapsulation layer 16 includes a first inorganic layer 161, a first organic layer 162 and a second inorganic layer 163 disposed sequentially away from the substrate 11; the non-display area NA of the display panel is provided with a valley region 15; the thickness of the first organic layer 162 in the valley region 15 is greater than the thickness of the first organic layer 162 in the display area AA; the valley region 15 is disposed around the display area AA; a barrier 14 is disposed around the valley region 15; in a plane parallel to the substrate 11, the projection of the second circuit structure 123 at least partially overlaps with the valley region 15.

[0038] An encapsulation layer 16 is disposed on the display side of the light-emitting element 13 to protect the light-emitting element 13 and the pixel driving circuit beneath it. Specifically, the encapsulation layer 16 includes a first inorganic layer 161, a first organic layer 162, and a second inorganic layer 163 sequentially away from the substrate 11. The overlapping arrangement of the organic and inorganic layers effectively prevents water and oxygen from intruding into the display panel and improves the strength of the display panel. In this embodiment, one or more baffles 14 can be provided to prevent material overflow from the display area AA during the manufacturing process. To further reduce overflow, a groove, i.e., a valley region 15, is formed in the non-display area NA. The valley region 15 is formed by trenching part of the film layer of the display panel. The first organic layer 162 of the encapsulation layer 16 is formed by inkjet printing. Therefore, the first organic layer 162 overflows into the valley region 15 during the manufacturing process, making the thickness of the first organic layer 162 in the valley region 15 greater than its thickness in the display area AA. The valley region 15 is also designed around the display area AA, and is located between the display area AA and the barrier 14. In this embodiment, the vertical projection of the second circuit structure 123 on the substrate 11 overlaps with the valley region 15, as shown below. Figure 3 As shown, the second circuit structure 123 and the valley region 15 share a common area S3 on a plane parallel to the substrate 11. In this embodiment, the second circuit structure 123 shares a common area with both the valley region 15 and the barrier wall 14 in a plane parallel to the substrate 11, further improving the reuse rate of the bezel area. This is beneficial for further reducing the bezel of the display panel and improving the user experience. Furthermore, based on the above, other structures within the non-display area NA can be reused horizontally, facilitating further reduction of the non-display area space and allowing for the design of more functional circuits in the non-display area NA to achieve more panel functions.

[0039] Continue to refer to Figure 3 Optionally, in a plane parallel to the substrate 11, the first organic layer 162 extends to cover the valley region 15, and the first inorganic layer 161 and the second inorganic layer 163 extend to cover the barrier wall 14.

[0040] Both the first inorganic layer 161 and the second inorganic layer 163 can cover the valley region 15 and extend to cover all the baffles 14 to prevent external impurities from entering the panel. The first organic layer 162 extends to cover the valley region 15, and the valley region 15 can store overflowing organic material to prevent spillage, thereby avoiding the problem of incomplete encapsulation by the encapsulation layer 16. In this embodiment, because the vertical projection of the second circuit structure 123 on the substrate 11 at least partially overlaps with the valley region 15, the first organic layer 162 can cover the second circuit structure 123. The first organic layer 162 can effectively protect the second circuit structure 123 and prevent damage to the second circuit structure 123 under impact, thereby improving the overall quality of the display panel.

[0041] Continue to refer to Figure 3 Optionally, the display panel may further include: a planarization layer 17 disposed between the driving circuit layer 12 and the light-emitting element 13; the light-emitting element 13 includes an anode layer 131, a light-emitting layer and a cathode layer 132 disposed sequentially away from the substrate 11; a pixel defining layer 18 disposed on the side of the anode layer 131 away from the substrate 11; the light-emitting layer is disposed on the side of the pixel defining layer 18 away from the substrate 11; in a plane parallel to the substrate 11, the projection of the planarization layer 17 does not overlap with the valley region 15.

[0042] like Figure 3 As shown, a planarization layer 17 and a pixel defining layer 18 are sequentially formed above the driving circuit layer 12 of the display panel. The planarization layer 17 is disposed between the driving circuit layer 12 and the light-emitting element 13. The light-emitting element 13 includes an anode layer 131 and a light-emitting layer 131 sequentially spaced away from the substrate 11. Figure 3(Not shown in the image) and cathode layer 132, pixel defining layer 18 is disposed between anode layer 131 and light-emitting layer to define the position of light-emitting material in light-emitting layer. The valley region 15 can be formed by removing pixel defining layer 18 and planarization layer 17. Of course, valley region 15 can be formed by removing only planarization layer 17. Since planarization layer 17 is made of organic material, the sealing effect of organic material is not sufficient. Therefore, removing organic material in valley region 15 makes the film layer in valley region 15 that contacts the first inorganic layer 161 of encapsulation layer 16 not an organic layer, thereby effectively isolating water and oxygen and improving the encapsulation effect of display panel. In contrast, the barrier 14 outside valley region 15 is formed by stacking planarization layer 17 and pixel defining layer 18, etc. In addition, organic material layer 22, such as polystyrene PS, can be stacked on pixel defining layer 18 to increase the height of barrier 14. Organic material has a certain toughness and stress crack resistance, effectively protecting display panel.

[0043] like Figure 2 and Figure 4 As shown, optionally, the barrier 14 may include at least a first barrier 141 and a second barrier 142; the first barrier 141 is located between the display area AA and the second barrier 142; the projection coverage of the first barrier 141 and the second barrier 142 at least partially covers the second circuit structure 123.

[0044] like Figure 4 As shown, at least two baffles 14 are provided for the display panel, namely, a first baffle 141 and a second baffle 142. Relative to... Figure 3 In the display panel shown, the position of the second circuit structure 123 can be adjusted in this embodiment. That is, the second circuit structure 123 is positioned between the first barrier 141 and the second barrier 142, and the vertical projection of the second circuit structure 123 on the substrate 11 at least partially overlaps with the first barrier 141 and the second barrier 142. Figure 4 As shown, the area enclosed by the edge of the first barrier 141 near the display area AA and the edge of the second barrier 142 away from the display area AA covers the projection of the second circuit structure 123. Therefore, this embodiment fully utilizes the space between the first barrier 141 and the second barrier 142 to set up the second circuit structure 123. This is equivalent to setting up the second circuit structure 123 in a plane parallel to the substrate 11 without needing additional space. The area formed by the first barrier 141 and the second barrier 142 completely covers the area of ​​the second circuit structure 123, further reducing the bezel width of the display panel and ensuring the reliability of the display panel itself. Furthermore, because the film material forming the barrier 14 contains a large number of organic film layers, it provides good protection for the second circuit structure 123, improving the impact resistance of the display panel.

[0045] Continue to refer to Figure 4Optionally, the display panel may further include: an encapsulation layer 16; the encapsulation layer 16 is located on the side of the light-emitting element 13 away from the substrate 11; the encapsulation layer 16 includes a first inorganic layer 161, a first organic layer 162 and a second inorganic layer 163 disposed sequentially away from the substrate 11; in a plane parallel to the substrate 11, the first organic layer 162 extends to cover the first circuit structure 122, and the first inorganic layer 161 and the second inorganic layer 163 extend to cover the barrier 14.

[0046] As can be seen from the above embodiments, the first organic layer 162 and the second inorganic layer 163 in the encapsulation layer 16 extend to cover all the barrier walls 14, and the first organic layer 162 extends to cover the valley region 15. The vertical projection of the first organic layer 162 on the substrate 11 covers the first circuit structure 122, which is beneficial to protect the first circuit structure 122. The vertical projection of the first inorganic layer 161 and the second inorganic layer 163 on the substrate 11 covers the first circuit structure 122 and the second circuit structure 123, which can protect the first circuit structure 122 and the second circuit structure 123, improve the reliability of the shift register circuit 121, and thus improve the reliability of the entire display panel.

[0047] Continue to refer to Figure 3 and Figure 4 A touch electrode 31 is also provided on the side of the encapsulation layer 16 away from the substrate 11 to realize the touch function of the display panel. In this embodiment, the touch electrode 31 can be arranged in two layers to realize mutual capacitance touch detection. Of course, it can also be arranged as follows: Figure 3 and Figure 4 As shown, the touch electrode 31 is disposed on the same metal layer, the touch trace 33 is disposed on another metal layer, and the touch trace 33 passes through the touch insulating layer 32 and is electrically connected to the corresponding touch electrode 31.

[0048] Continue to refer to Figure 3 and Figure 4 Optionally, the shift register circuit 121 may include two shift registers: a first shift register and a second shift register; the output of the first shift register outputs a scan signal to the pixel driving circuit in the driving circuit layer 12; the output of the second shift register outputs a light emission control signal to the pixel driving circuit in the driving circuit layer 12; one of the first shift registers and the second shift register is set in the first circuit structure 122, and the other shift register is set in the second circuit structure 123.

[0049] In this embodiment, the display panel may include two shift registers. For example, for an LTPS panel, two shift registers are required, referred to in this embodiment as the first shift register and the second shift register. The first shift register is used to generate the scan line number (scan) for the pixel driving circuit, and the second shift register is used to generate the emission control signal (emit) required by the pixel driving circuit. In this embodiment, one of the two shift registers can be located in the first circuit structure 122, and the other in the second circuit structure 123. Compared to the scheme where both shift registers are located in one place, occupying a large amount of non-display area space, this embodiment moves part of the shift register circuit 121 to share the lateral space with the retaining wall 14, which is beneficial for the narrow bezel design of the display panel and does not require compressing the space of other components.

[0050] Continue to refer to Figure 3 and Figure 4 Optionally, the shift register circuit 121 may include three shift registers: a third shift register, a fourth shift register, and a fifth shift register; the output of the third shift register outputs the scan signal of the P-type thin film transistor to the pixel driving circuit in the driving circuit layer 12; the output of the fourth shift register outputs the scan signal of the N-type thin film transistor to the pixel driving circuit in the driving circuit layer 12; the output of the fifth shift register outputs the light emission control signal to the pixel driving circuit in the driving circuit layer 12; one of the third, fourth, and fifth shift registers is located in the second circuit structure 123, and the other two shift registers are located in the first circuit structure 122.

[0051] The display panel may also include three or more shift registers. For example, for an LTPO panel, since its pixel driving circuit simultaneously contains P-type and N-type thin-film transistors, the timing of the scan signals required by these two types of thin-film transistors is different, and therefore the same shift register cannot be used. In this embodiment, a third, fourth, and fifth shift register may be included. The third shift register is used to output the scan signal of the P-type thin-film transistor, the fourth shift register is used to output the scan signal of the N-type thin-film transistor, and the fifth shift register is used to output the light emission control signal. Furthermore, one of the three shift registers is located in the second circuit structure 123, and the rest are located in the first circuit structure 122. Similarly, moving part of the shift register circuit 121 to share the lateral space with the retaining wall 14 is beneficial for the narrow bezel design of the display panel and does not require compressing the space of other components. Compared with the existing LTPO panel's compression encapsulation layer 16 and slit area S2, the reliability is stronger and the bezel is narrower.

[0052] Figure 5This is a schematic diagram of a shift register circuit provided in an embodiment of the present invention. Optionally, the shift register circuit 121 may include at least two shift registers; each shift register includes: a potential control module 121a and an output module 121b; the potential control module 121a is used to control the signal of the first node N2 to be opposite to the signal of the second node N4 according to the first clock signal CK, the second clock signal XCK and the scan trigger signal STV; the output module 121b is used to transmit the first voltage signal VGH to the output terminal OUT of the shift register under the control of the signal of the first node N1, or to transmit the second voltage signal VGL to the output terminal OUT of the shift register under the control of the signal of the second node N4; the output module 121b of the shift register is disposed in the second circuit structure 123; the potential control module 121a of the shift register is disposed in the first circuit structure 122.

[0053] like Figure 5 As shown, whether it's a shift register forming a scan signal or a shift register forming a light emission control signal, whether it's a shift register forming a scan signal for a P-type thin-film transistor or a shift register forming a scan signal for an N-type thin-film transistor, it all includes a potential control module 121a and an output module 121b. The potential control module 121a, under the control of the first clock signal CK, the second clock signal XCK, and the scan trigger signal STV, can transmit the first voltage signal VGH to the first node N2, and then to the output terminal OUT via the output module 121b. It can also, under the control of the first clock signal CK, the second clock signal XCK, and the scan trigger signal STV, transmit the second voltage signal VGL to the second node N4, and then to the output terminal OUT via the output module 121b. The first voltage signal VGH can be high, and the second voltage signal VGL can be low; thus, the signal output from the output terminal OUT achieves high-low level conversion, forming either a scan signal or a light emission control signal. The signal output from the OUT terminal of output module 121b is used to control the pixel driving circuit, and it needs to control the pixel driving circuit of an entire row. Therefore, the components in output module 121b must be larger than those in the potential control module 121a to output a larger signal. Figure 5 As shown, the output module 121b may include a first output transistor M7 and a second output transistor M8. The channel width-to-length ratio of the first output transistor M7 and the second output transistor M8 is relatively large, and they are less affected by external interference signals. In this embodiment, all the output modules 121b of the shift registers are set in the second circuit structure 123, and the potential control module 121a is set in the first circuit structure 122. This not only allows the shift register circuit 121 and the retaining wall 14 to share the horizontal space and reduce the bezel of the display panel, but also minimizes the influence of external signals on the shift register circuit and improves the reliability of the shift register circuit.

[0054] For example, such as Figure 6 As shown, Figure 6 This is a schematic diagram of another shift register circuit provided in an embodiment of the present invention. Figure 6 The specific structure of the shift register circuit for outputting the scan signal is shown. The potential control module 121a includes a first switch M1, a second switch M2, a third switch M3, a fourth switch M4, a fourth switch M5, and a fifth switch M6. The fifth switch M6 is used to connect to the first voltage signal VGH, and the fourth switch M5 is used to connect to the scan trigger signal STV. The first switch M1, the second switch M2, and the third switch M3 form an interlocking structure, thereby clamping the potentials of nodes N2 and N1 together, preventing the first output transistor M7 and the second output transistor M8 from outputting different potential signals, which would cause signal confusion. Therefore, the switches in the potential control module 121a only play a potential control role, unlike the output transistors. Accordingly, this embodiment sets the potential control module 121a and the output module 121b into two parts to reduce the influence of the external environment on the potential control module 121a and even the entire shift register circuit.

[0055] Optionally, the first circuit structure 122 and the second circuit structure 123 are electrically connected through the gate layer of a P-type thin-film transistor, the gate layer of an N-type thin-film transistor, or the first capacitor plate. The first circuit structure 122 and the second circuit structure 123 can be electrically connected through at least one metal layer in the driving circuit layer 12. Preferably, in this embodiment, the connection can be made through the gate layer of a P-type thin-film transistor, the gate layer of an N-type thin-film transistor, or the first capacitor plate. The resistance of each of these metal layers is low, and the wiring is simple, resulting in low process risk in forming the connection line between the first circuit structure 122 and the second circuit structure 123, thereby improving the reliability of the shift register circuit.

[0056] Continue to refer to Figure 4 Optionally, the display panel may further include: a first metal layer 19 disposed on the side of the driving circuit layer 12 away from the substrate 11; the first metal layer 19 is provided with a cathode power line; the cathode power line is disposed between the first circuit structure 122 and the second circuit structure 123; a second metal layer 20 disposed on the side of the first metal layer 19 away from the substrate 11; the light-emitting element 13 includes an anode layer 131, a light-emitting layer and a cathode layer 132 disposed sequentially away from the substrate 11; the cathode power line overlaps the cathode layer 132 through the second metal layer 20 and the anode layer 131; in a plane parallel to the substrate 11, the projection of the second metal layer 20 that overlaps the cathode power line covers the cathode power line; and the projection of the second metal layer 20 that overlaps the cathode power line at least partially overlaps with the first circuit structure 122, and the projection of the second metal layer 20 that overlaps the cathode power line at least partially overlaps with the second circuit structure 123.

[0057] On the side of the driving circuit layer 12 away from the substrate 11, a first metal layer 19 and a second metal layer 20 are sequentially disposed. The first metal layer 19 may form a cathode power line. In this embodiment, the cathode power line is disposed between the first circuit structure 122 and the second circuit structure 123. Figure 4 As shown, the cathode power line and the valley region 15 may overlap on the plane of the substrate 11. Compared with the scheme of placing the cathode power line in the valley region 15 near the display area AA, the cathode power line is effectively widened in this embodiment, reducing the resistance value.

[0058] The second metal layer 20 is disposed above and overlaps with the first metal layer 19. The vertical projection of the second metal layer 20 on the substrate 11 can cover the cathode power line, which is equivalent to further widening the cathode power line and effectively reducing the resistance value of the cathode power line. In this embodiment, the light-emitting element 13 may include an anode layer 131, a light-emitting layer, and a cathode layer 132 disposed sequentially away from the substrate 11, so that the cathode power line passes through the second metal layer 20, the anode layer 131, and the cathode layer 132 in sequence and overlaps with the cathode layer 132 in the non-display area NA, so that the cathode power line provides a cathode power signal to the cathode layer 132.

[0059] Furthermore, the vertical projection of the second metal layer 20, which overlaps the cathode power line, onto the substrate 11 not only covers the cathode power line but also at least a portion of the first circuit structure 122 and at least a portion of the second circuit structure 123. Therefore, the second metal layer 20 has a relatively large width, resulting in a smaller voltage drop when the cathode power line transmits the cathode power signal. Moreover, since the second metal layer 20 covers at least a portion of the first circuit structure 122 and the second circuit structure 123, it further enhances the protection of both circuit structures, improving their reliability.

[0060] Continue to refer to Figure 3 and Figure 4 Optionally, the display panel may further include: a second organic layer 21; the second organic layer 21 is disposed between the second metal layer 20 and the driving circuit layer 12; the second organic layer 21 is used to achieve insulation between the second metal layer 20 and the shift register circuit 121.

[0061] In this embodiment, the second organic layer 21 is disposed between the second metal layer 20 and the driving circuit layer 12, thereby achieving insulation between the second metal layer 20 and the driving circuit layer 12. Figure 3 and Figure 4As shown, the second organic layer 21 provides insulation between the second metal layer 20 and the shift register circuit 121. Furthermore, the second organic layer 21 is more flexible than inorganic materials, further protecting the shift register circuit 121 and improving its reliability, thereby enhancing the reliability of the display panel. Additionally, the second organic layer 21 can, to some extent, isolate external signals from interfering with the shift register circuit 121, improving the accuracy of the shift register circuit's scanning of the display panel.

[0062] Based on the above embodiments, Figure 7 for Figure 1 A cross-sectional view of the display panel along line c-c'. Figure 8 for Figure 1 Another cross-sectional view of the display panel along line end c-c'. Figure 9 for Figure 1 Another cross-sectional view of the display panel along line end c-c'. Figure 10 for Figure 1 Another cross-sectional view of the display panel along line end c-c'. Figures 7 to 10 When the second circuit structure 123 overlaps with the valley region 15, that is Figure 1 and Figure 3 The diagram shown is a cross-sectional view of the valley region 15. Figures 7 to 9 This diagram illustrates three different overlap states of the second metal layer 20 and the anode layer 131 within the valley region 15. The second metal layer 20 and the anode layer 131 may include a variety of different overlap states, including but not limited to... Figures 7 to 9 The structure shown. Furthermore, as... Figure 10 As shown, in some valley regions 15, the structure where the second metal layer 20 and the anode layer 131 overlap may not be provided, and only the anode layer 131 is provided. The valley regions 15 may include various film layer designs, but in this embodiment, the film layers in contact with the encapsulation layer 16 in all valley regions 15 are not organic layers, because the encapsulation layer 16 needs to isolate water and oxygen. If the film layer in contact with the encapsulation layer 16 is an organic layer, it is easy to reduce the encapsulation effect. In this embodiment, the film layers in contact with the encapsulation layer 16 are the second metal layer 20 and / or the anode layer 131, which can ensure a good encapsulation effect of the display panel. Optionally, the substrate 11 is also provided with a buffer layer 23. For example, in this embodiment, before forming the driving circuit layer 12, a four-layer substrate structure of substrate 11, buffer layer 23, substrate 11, and buffer layer 23 is sequentially provided.

[0063] This invention also provides a display device. Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention, such as... Figure 11As shown, the display device provided in this embodiment of the invention includes the display panel 1 described in any embodiment of the invention. The display device can be as follows: Figure 11 The mobile phone shown can also be a computer, television, smart wearable device, etc., and this embodiment does not make any special limitation on it.

[0064] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A display panel, characterized by, The display panel comprises a substrate, a driving circuit layer arranged on one side of the substrate, and a light-emitting element arranged on a side of the driving circuit layer away from the substrate. The display panel comprises a display area and a non-display area surrounding the display area; the light-emitting element is located in the display area; the driving circuit layer comprises a shift register circuit; the shift register circuit is located in the non-display area; The shift register circuit comprises a first circuit structure and a second circuit structure; in a plane parallel to the substrate, a projection of the second circuit structure at least partially overlaps the barrier wall; the first circuit structure is located on a side of the second circuit structure close to the display area; The shift register circuit comprises at least two shift registers; The shift register comprises a potential control module and an output module; The potential control module is configured to control a signal of a first node and a signal of a second node to be opposite in level according to a first clock signal, a second clock signal, and a scan trigger signal; The output module is configured to transmit a first voltage signal to an output end of the shift register under control of the signal of the first node, or transmit a second voltage signal to the output end of the shift register under control of the signal of the second node; The output module of the shift register is arranged on the second circuit structure; the potential control module of the shift register is arranged on the first circuit structure; the potential control module is arranged on a side of the output module close to the display area; a projection of the potential control module does not overlap the barrier wall; a projection of the output module at least partially overlaps the barrier wall. Further comprising: a packaging layer arranged on a side of the light-emitting element away from the substrate; The packaging layer comprises a first inorganic layer, a first organic layer, and a second inorganic layer arranged in sequence away from the substrate; The non-display area of the display panel is provided with a valley region; the thickness of the first inorganic layer in the valley region is greater than the thickness of the first inorganic layer in the display area; the valley region is arranged around the display area; the barrier wall is arranged around the valley region; 2. The display panel of claim 1, wherein, In a plane parallel to the substrate, a projection of the second circuit structure at least partially overlaps the valley region.

3. The display panel of claim 2, wherein: In a plane parallel to the substrate, the first organic layer extends to cover the valley region, and the first inorganic layer and the second inorganic layer extend to cover the barrier wall. Further comprising: a planarization layer arranged between the driving circuit layer and the light-emitting element; the light-emitting element comprises an anode layer, a light-emitting layer, and a cathode layer arranged in sequence away from the substrate; a pixel definition layer arranged on a side of the anode layer away from the substrate; the light-emitting layer is arranged on a side of the pixel definition layer away from the substrate; In a plane parallel to the substrate, a projection of the planarization layer does not overlap the valley region. The barrier wall comprises at least a first barrier wall and a second barrier wall; the first barrier wall is located between the display area and the second barrier wall.

4. The display panel of claim 3, wherein, ​ ​ ​ ​ 5. The display panel of claim 1, wherein, ​ The projection of the first barrier wall and the second barrier wall at least partially covers the second circuit structure.

6. The display panel of claim 5, wherein, Further comprising: a packaging layer; the packaging layer is located on the side of the light emitting element away from the substrate; the packaging layer comprises a first inorganic layer, a first organic layer and a second inorganic layer arranged in sequence away from the substrate; in a plane parallel to the substrate, the first organic layer extends to cover the first circuit structure, and the first inorganic layer and the second inorganic layer extend to cover the barrier wall.

7. The display panel of claim 1, wherein, The first circuit structure and the second circuit structure are electrically connected by a gate layer of a P-type thin film transistor, a gate layer of an N-type thin film transistor or a first capacitor plate.

8. The display panel of claim 1, wherein, Further comprising: a first metal layer; the first metal layer is arranged on the side of the driving circuit layer away from the substrate; the first metal layer is provided with a cathode power supply line; the cathode power supply line is arranged between the first circuit structure and the second circuit structure; a second metal layer arranged on the side of the first metal layer away from the substrate; the light emitting element comprises an anode layer, a light emitting layer and a cathode layer arranged in sequence away from the substrate; the cathode power supply line is overlapped to the cathode layer through the second metal layer and the anode layer; in a plane parallel to the substrate, the projection of the second metal layer overlapping the cathode power supply line covers the cathode power supply line; and the projection of the second metal layer overlapping the cathode power supply line at least partially overlaps the first circuit structure and at least partially overlaps the second circuit structure.

9. The display panel of claim 8, wherein, Further comprising: a second organic layer; the second organic layer is arranged between the second metal layer and the driving circuit layer; the second organic layer is used to realize insulation between the second metal layer and the shift register circuit.

10. A display device, characterized by comprising: The display panel comprises any one of the display panels in claims 1-9.

Images