Apparatus and Method for Phase Shift

Abstract

The present disclosure relates to a pre-fifth generation (5G) or 5G communication system to be provided for supporting higher data rates beyond fourth generation (4G) communication systems such as Long Term Evolution (LTE). According to various embodiments, an antenna device may include: an array antenna including sub-arrays, a power divider, and a reconfigurable phase shifter circuit that may be configured to provide a first phase shift value based on a switch in a first state and a second phase shift value different from the first phase shift value based on the switch in a second state.

Description

Technical Field

[0001] The present disclosure relates to antennas, and for example, to a design and operation method of a phase shifter circuit of an antenna, and an apparatus including the phase shifter circuit. Background Art

[0002] In order to meet the increasing demand for wireless data traffic since the deployment of 4G communication systems, efforts have been made to develop improved 5G or pre-5G communication systems. Therefore, 5G or pre-5G communication systems may also be referred to as "ultra 4G networks" or "post-LTE systems".

[0003] 5G communication systems are considered to be implemented in higher frequency (millimeter wave) bands (e.g., 60 GHz band) in order to achieve higher data rates. In order to reduce the propagation loss of radio waves and increase the transmission distance, beamforming, massive multiple-input multiple-output (MIMO), full-dimensional MIMO (FD-MIMO), array antennas, analog beamforming, and massive antenna technologies have been discussed in 5G communication systems.

[0004] In addition, in 5G communication systems, development for system network improvement is ongoing based on advanced small cells, cloud radio access network (RAN), ultra-dense networks, device-to-device (D2D) communication, wireless backhaul, mobile networks, cooperative communication, coordinated multi-point (CoMP), receiver-side interference cancellation, etc.

[0005] In 5G systems, hybrid FSK and QAM modulation (FQAM) and sliding window superposition coding (SWSC) as advanced coding modulation (ACM), and filter bank multi-carrier (FBMC), non-orthogonal multiple access (NOMA), and sparse code multiple access (SCMA) as advanced access technologies have been developed.

[0006] Beamforming technology is used as one of the technologies to mitigate propagation path loss and increase the propagation distance. Generally, beamforming uses multiple antennas to focus the propagation coverage or increase the directivity of reception in a specific direction. In order to operate beamforming, a communication node may include multiple antennas. Summary of the Invention

[0007] Solution to the Problem

[0008] Embodiments of the present disclosure solve the above-mentioned defects of the prior art and provide a phase shifter circuit applied to an array antenna in a wireless communication system.

[0009] Embodiments of the present disclosure provide a power divider and a phase shifter circuit connected to a sub-array in a wireless communication system.

[0010] Embodiments of the present disclosure provide apparatuses and methods for designing and operating a phase shifter circuit that performs various phase shifts in a wireless communication system.

[0011] Embodiments of the present disclosure provide apparatuses and design methods for a phase shifter circuit that minimizes and / or reduces handover loss in a wireless communication system.

[0012] According to various example embodiments of the present disclosure, an antenna apparatus may include: an array antenna including sub-arrays, a power divider, and a reconfigurable phase shifter circuit, and the reconfigurable phase shifter circuit may be configured to: provide a first phase shift value based on a switch in a first state, and provide a second phase shift value different from the first phase shift value based on the switch in a second state.

[0013] According to various example embodiments of the present disclosure, a device may include: a processor, an array antenna including sub-arrays, a power divider, and a reconfigurable phase shifter circuit, and the processor may be configured to control the array antenna to: radiate a first signal based on a first phase shift of the reconfigurable phase shifter circuit and a passive phase shift of the power divider, and radiate a second signal based on a second phase shift of the reconfigurable phase shifter circuit and the passive phase shift of the power divider, and the first phase shift value and the second phase shift value of the reconfigurable phase shifter circuit may be configured, wherein the boresight of the first signal does not overlap with the boresight of the second signal.

[0014] According to various example embodiments of the present disclosure, a method of designing an antenna apparatus including a phase shifter circuit and a sub-array, in which a main path and at least two sub-paths are connected in parallel in the phase shifter circuit, the method may include: setting variables of the main path, setting variables of the at least two sub-paths, identifying a first value corresponding to the variables of the main path and a second value corresponding to the variables of the at least two sub-paths based on three conditions, and configuring the main path and the at least two sub-paths based on the identified first value and second value, wherein the three conditions may include: a first condition, in which if the main path and the at least two sub-paths are connected in parallel, the reflection coefficient is 0; a second condition, in which if the main path and the at least two sub-paths are connected in parallel, the transmission coefficient is 1; and a third condition, in which the difference between a first phase vector provided based on connection of a first sub-path among the main path and the at least two sub-paths and a second phase vector provided based on connection of a second sub-path among the main path and the at least two sub-paths is a specified phase offset. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] From the following detailed description in conjunction with the accompanying drawings, the above and other aspects, features, and advantages of certain embodiments of the present disclosure will become more apparent, where:

[0016] Figure 1 is a diagram illustrating an example wireless communication system according to various embodiments;

[0017] Figure 2 is a block diagram showing an example configuration of a base station according to various embodiments;

[0018] Figure 3 is a block diagram showing an example configuration of a terminal according to various embodiments;

[0019] Figure 4A is a diagram showing an example of a sub - array according to various embodiments;

[0020] Figure 4B is a graph showing an example of a sub - array according to various embodiments;

[0021] Figure 5 is a diagram showing an example of a functional configuration of a reconfigurable phase shift according to various embodiments;

[0022] Figure 6A is a diagram showing an example of an operation of a reconfigurable phase shift according to various embodiments;

[0023] Figure 6B is a diagram showing an example of an operation of a reconfigurable phase shift according to various embodiments;

[0024] Figure 6C is a diagram illustrating an example of an operation of a reconfigurable phase shift according to various embodiments;

[0025] Figure 6D is a diagram showing an example of an operation of a reconfigurable phase shift according to various embodiments;

[0026] Figure 7A is a diagram showing an example of a phase - shifter circuit according to various embodiments;

[0027] Figure 7B is a diagram showing an example of a phase - shifter circuit according to various embodiments;

[0028] Figure 8A is a diagram showing an example of a phase - shifter circuit according to various embodiments;

[0029] Figure 8B is a graph showing an example of a phase - shifter circuit according to various embodiments;

[0030] Figure 9 is a diagram showing an example of a Quasi - Passive Vector Sum (QPVS) phase - shifter circuit according to various embodiments;

[0031] Figure 10 is a diagram showing an example of the operating principle of a QPVS phase - shifter circuit according to various embodiments;

[0032] Figure 11is a diagram showing an example of the operating principle of a QPVS phase shifter circuit according to various embodiments;

[0033] Figure 12 is a flowchart showing an example method of designing a QPVS phase shifter circuit according to various embodiments;

[0034] Figure 13 is a diagram showing an example performance of a QPVS phase shifter circuit according to various embodiments;

[0035] Figure 14 is a graph showing an example performance of per-phase offset based on the type of phase shifter circuit according to various embodiments;

[0036] Figure 15A is a diagram showing an example of the extended structure of a reconfigurable phase shifter circuit according to various embodiments; and

[0037] Figure 15B is a diagram showing an example of the extended structure of a reconfigurable phase shifter circuit according to various embodiments.

[0038] In all the figures, like reference numerals will be understood to refer to like components, elements, and structures. Detailed Description

[0039] The terms used in this disclosure are used to describe various embodiments and are not intended to limit the scope of this disclosure. Expressions in the singular form may include the plural form unless they are clearly different in context. The terms used herein (including technical or scientific terms) may have the same meanings as those commonly understood by those of ordinary skill in the art referred to in this disclosure. Among the terms used in this disclosure, terms defined in a general dictionary may be interpreted as having the same or similar meanings as the meanings in the context of the related art, and are not to be interpreted as ideal or overly formal meanings unless clearly defined in this disclosure. In some cases, even the terms defined in this disclosure should not be interpreted as excluding embodiments of this disclosure.

[0040] In the various example embodiments of this disclosure to be described below, hardware-based methods will be described as examples. However, the various embodiments of this disclosure include techniques using both hardware and software, and thus do not exclude software-based methods.

[0041] This disclosure generally relates to apparatuses and methods for managing beam coverage in a wireless communication system. For example, this disclosure describes a technique for: if a radio frequency (RF) path in a wireless communication system is not operating properly, restoring a beam pattern to construct a beam coverage that is substantially similar to the existing beam coverage.

[0042] Terms using indication signals (signals, symbols, streams, data, beamforming signals), terms related to beams (multi-beam, multiple beams, single beam, dual beam, quad beam, beamforming), terms indicating components of a device (antenna array, antenna element, communication unit, antenna), and terms indicating network entities (e.g., communication node, radio node, radio unit, network node, transmit / receive point (TRP)) are used to facilitate the explanation. Accordingly, the present disclosure is not limited to the terms to be described, and other terms having technically the same or similar meanings may be used.

[0043] Measures for signal gain or signal quality in the following explanations may include, for example, at least one of beam reference signal received power (BRSRP), reference signal received power (RSRP), reference signal received quality (RSRQ), received signal strength indicator (RSSI), signal-to-interference-and-noise ratio (SINR), carrier-to-interference-and-noise ratio (CINR), SNR, error vector magnitude (EVM), bit error rate (BER), and block error rate (BLER). It will be understood that other terms having equivalent technical meanings or other measures indicating channel quality may be used.

[0044] In the present disclosure, in order to determine whether a specific condition is satisfied or achieved, expressions such as "greater than" or "less than" may be used, for example, and expressions such as "greater than or equal to" or "less than or equal to" are also applicable and not excluded. A condition defined by "greater than or equal to" may be replaced by "greater than" (and vice versa), a condition defined by "less than or equal to" may be replaced by "less than" (and vice versa), and so on.

[0045] As an example, the present disclosure uses terms used in various communication standards (e.g., the 3rd Generation Partnership Project (3GPP)) to provide various example embodiments. The various example embodiments of the present disclosure can be easily used in other communication systems.

[0046] Figure 1 is a diagram showing an example wireless communication system according to various embodiments of the present disclosure. Figure 1 depicts a base station 110, a terminal 120, and a terminal 130 as some of the nodes using a radio channel in a wireless communication system. Although Figure 1 only one base station is depicted, other base stations identical or similar to the base station 110 may also be included.

[0047] Base station 110 may include network infrastructure for providing radio access to terminals 120 and 130. Base station 110 may have a coverage area defined as a specific geographical area based on the signal transmission distance. Base station 110 may be referred to as, for example, an "access point (AP)", "eNodeB (eNB)", "fifth-generation node (5G node)", "network generation node B (gNB)", "radio point", "transmission / reception point (TRP)", or other terms having similar or equivalent technical meanings.

[0048] Each of terminals 120 and 130 may include a device used by a user and communicate with base station 110 via a radio channel. The link from base station 110 to terminal 120 or terminal 130 may be referred to as a downlink (DL), and the link from terminal 120 or terminal 130 to base station 110 may be referred to as an uplink (UL). Terminals 120 and 130 may communicate with each other via a radio channel. In some cases, at least one of terminals 120 and 130 may operate without user participation. For example, at least one of terminals 120 and 130 is a device performing machine type communication (MTC) and may not be carried by a user. Each of terminals 120 and 130 may be referred to as a "user equipment (UE)", "customer premise equipment (CPE)", "mobile station", "subscriber station", "remote terminal", "wireless terminal", "electronic device", or "user device", or other terms having technically equivalent meanings.

[0049] Figure 2 is a block diagram showing an example configuration of a base station in a wireless communication system according to various embodiments of the present disclosure. Figure 2 The configuration in may be understood as the configuration of base station 110. Terms such as "part" or "~device" used hereinafter indicate a unit for processing at least one function or operation, and may be implemented using hardware, software, or a combination of hardware and software.

[0050] Reference Figure 2 , base station 110 includes a wireless communication unit (for example, including a wireless communication circuit) 201, a backhaul communication unit (for example, including a backhaul circuit) 203, a storage unit 205, and a control unit (for example, including a processing circuit) 207.

[0051] The wireless communication unit 201 may include various communication circuits and perform functions for transmitting and receiving signals through a wireless communication channel. For example, the wireless communication unit 201 may perform a conversion function between a baseband signal and a bit string according to the physical layer standard of the system. For example, in data transmission, the wireless communication unit 201 may generate complex symbols by encoding and modulating the transmitted bit string. In addition, in data reception, the wireless communication unit 201 may recover the received bit string by demodulating and decoding the baseband signal. In addition, the wireless communication unit 201 may up-convert the baseband signal to an RF band signal, transmit the signal via an antenna, and down-convert the RF band signal received via the antenna to a baseband signal.

[0052] To this end, the wireless communication unit 201 may include a transmit filter, a receive filter, an amplifier, a mixer, an oscillator, a digital-to-analog converter (DAC), an analog-to-digital converter (ADC), etc. In addition, the wireless communication unit 201 may include multiple transmit paths and receive paths. In addition, the wireless communication unit 201 may include at least one antenna array including multiple antenna elements. In terms of hardware, the wireless communication unit 201 may include a digital unit and an analog unit, and the analog unit may include multiple sub-units according to the operating power and operating frequency. According to various embodiments, the wireless communication unit 201 may include a unit for forming a beam, such as a beamforming unit. For example, the wireless communication unit 201 may include a massive multiple-input multiple-output (MIMO) unit (MMU) for beamforming.

[0053] The wireless communication unit 201 may transmit or receive signals. To this end, the wireless communication unit 201 may include at least one transceiver. For example, the wireless communication unit 201 may transmit a synchronization signal (SS), a reference signal (RS), system information, a message, control information, data, etc. In addition, the wireless communication unit 201 may perform beamforming. In addition, in order to give directivity to the signal to be transmitted or received based on the configuration of the control unit 207, the wireless communication unit 201 may apply beamforming weights to the signal.

[0054] The wireless communication unit 201 may transmit and receive signals as described above. Therefore, the whole or part of the wireless communication unit 201 may be referred to as a "transmitter", a "receiver", or a "transceiver". In addition, hereinafter, transmission and reception on a wireless communication channel are used to mean the above-described processing including the wireless communication unit 201.

[0055] The backhaul communication unit 203 may include various backhaul circuits and provide an interface for communicating with other nodes in the network. For example, the backhaul communication unit 203 may convert a bit string sent from the base station 110 to other nodes (e.g., other access nodes, another base station, an upper-layer node, or a core network) into a physical signal, and convert a physical signal received from other nodes into a bit string.

[0056] The storage unit 205 may store basic programs, application programs, and data such as setting information for operating the base station 110. The storage unit 205 may include a memory. The storage unit 205 may include a volatile memory, a non-volatile memory, or a combination of a volatile memory and a non-volatile memory. The storage unit 205 provides the stored data in response to a request from the control unit 207. According to an embodiment, the storage unit 205 may store the type of the phase shifter circuit. Depending on the phase offset range, the required type of phase shifter circuit may be used.

[0057] The control unit 207 may include various processing circuits and control the overall operation of the base station 110. For example, the control unit 207 transmits and receives signals through the wireless communication unit 201 or the backhaul communication unit 203. In addition, the control unit 207 records data in the storage unit 205 and reads data from the storage unit 205. The control unit 207 may run functions of a protocol stack requested by a communication standard. To this end, the control unit 207 may include at least one processor.

[0058] Figure 2 The configuration of the base station 110 in [description] is merely an example of a base station, and accordingly, examples of base stations for various embodiments of the present disclosure are not limited to Figure 2 the configuration. According to various embodiments, some components may be added, deleted, or modified.

[0059] The base station has been described as but not limited to Figure 2 a single entity in [description]. According to various embodiments of the present disclosure, a base station may be implemented to construct an access network having a distributed deployment as well as a centralized deployment. According to an embodiment, a base station may be divided into a central unit (CU) and a digital unit (DU). The CU may be configured to perform functions of an upper layer (e.g., packet data convergence protocol (PDCP)), and the DU may be configured to perform functions of a lower layer (e.g., media access control (MAC), physical (PHY)). According to various embodiments, a phase shifter circuit for forming a beam coverage may be implemented on the DU of the base station. According to an embodiment, a base station may include a digital unit (DU) and a radio unit (RU). The DU may perform functions such as baseband processing, and according to various embodiments, a phase shifter circuit for forming a beam coverage may be implemented on the RU of the base station.

[0060] Figure 3 It is a block diagram showing an example configuration of a terminal in a wireless communication system according to various embodiments of the present disclosure. Figure 3 The configuration shown can be understood as the configuration of terminal 120. Terms such as "part" or "~device" used hereinafter indicate a unit for processing at least one function or operation, and can be implemented using hardware, software, or a combination of hardware and software.

[0061] Refer to Figure 3 , terminal 120 includes a communication unit (e.g., including communication circuitry) 301, a storage unit 303, and a control unit (e.g., including processing circuitry) 305.

[0062] The communication unit 301 may include various communication circuits and perform functions for transmitting and receiving signals through a wireless communication channel. For example, the communication unit 301 performs a conversion function between a baseband signal and a bit string according to the physical layer standard of the system. For example, in data transmission, the communication unit 301 generates complex symbols by encoding and modulating the transmitted bit string. In addition, in data reception, the communication unit 301 demodulates and decodes the baseband signal to recover the received bit string. In addition, the communication unit 301 up-converts the baseband signal to an RF band signal, transmits the signal via an antenna, and down-converts the RF band signal received via the antenna to a baseband signal. For example, the communication unit 301 may include a transmit filter, a receive filter, an amplifier, a mixer, an oscillator, a DAC, an ADC, etc.

[0063] The communication unit 301 may include multiple transmit paths and receive paths. In addition, the communication unit 301 may include an antenna unit. The communication unit 301 may include at least one antenna array containing multiple antenna elements. In view of the hardware, the wireless communication unit 301 may include digital circuitry and analog circuitry (e.g., a radio frequency integrated circuit (RFIC)). The digital circuitry and the analog circuitry may be implemented in a single package. In addition, the communication unit 301 may include multiple RF chains. The communication unit 301 may perform beamforming. In order to give directivity to the signal to be transmitted or received according to the configuration of the control unit 305, the communication unit 301 may apply beamforming weights to the signal.

[0064] In addition, the communication unit 301 can send and receive signals. To this end, the communication unit 301 can include at least one transceiver. The communication unit 301 can receive DL signals. In addition, the communication unit 301 can send UL signals. The communication unit 301 can include different communication modules to process signals of different frequency bands. In addition, the communication unit 301 can include multiple communication modules, and the communication modules include various communication circuits that support a variety of different radio access technologies. For example, different radio access technologies can include Bluetooth Low Energy (BLE), Wi-Fi, Wi-Fi Gigabit (WiGig), cellular networks (e.g., Long Term Evolution (LTE), New Radio (NR)), etc. In addition, different frequency bands can include Super High Frequency (SHF) (e.g., 2.5 GHz, 5 GHz) bands, millimeter wave (e.g., 38 GHz, 60 GHz, etc.) bands. In addition, the communication unit 301 can use the same type of radio access technology on different frequency bands (e.g., unlicensed bands for Licensed-Assisted Access (LAA), Citizen Broadband Radio Service (CBRS) (e.g., 3.5 GHz)).

[0065] As described above, the communication unit 301 sends and receives signals. The whole or part of the communication unit 301 can be referred to as a "transmitter", "receiver", or "transceiver". In addition, in the following explanations, sending and receiving on a radio channel are used in the sense of including the above processing of the communication unit 301.

[0066] The storage unit 303 stores basic programs, application programs, and data such as setting information for operating the terminal 120. The storage unit 303 can include volatile memory, non-volatile memory, or a combination of volatile memory and non-volatile memory. The storage unit 303 provides the stored data according to the request of the control unit 305.

[0067] The control unit 305 can include various processing circuits and control the overall operation of the terminal 120. For example, the control unit 305 sends and receives signals through the communication unit 301. The control unit 305 records data in the storage unit 303 and reads data from the storage unit 303. The control unit 305 can run the functions of the protocol stack required by the communication standard. To this end, the control unit 305 can include at least one processor. The control unit 305 can include at least one processor or microprocessor, or can be a part of a processor. In addition, a part of the communication unit 301 and the control unit 305 can be referred to as a Communication Processor (CP). The control unit 305 can include various modules for communication. According to various embodiments, the control unit 305 can control the terminal to perform operations according to various embodiments to be described.

[0068] Beamforming technology can be used as one of the techniques to mitigate propagation path loss and increase propagation distance. Generally, beamforming uses multiple antennas to aggregate propagation coverage or increase the directivity for reception in a specific direction. A communication node may include multiple antennas to construct a beamforming coverage, rather than using a single antenna to generate signals in an isotropic pattern. A communication node according to various embodiments may include an MMU. The antennas may be referred to as an antenna array, and each antenna in the array may be referred to as an array antenna or an antenna element. The antenna array may be configured in various types, such as a linear array and a planar array. The antenna array may be referred to as a massive antenna array. The present disclosure describes the antenna array as multiple antennas for communication in a MIMO environment, and notes that beamforming can be easily modified in various embodiments. In addition, to construct a beamforming coverage, a communication node may include a beamforming module connected to the antenna array. An architecture of the beamforming module including a phase / amplitude converter (e.g., a phase shifter) and an amplifier (e.g., a power amplifier (PA)) may be considered.

[0069] Figure 4A and Figure 4B FIG. is a diagram illustrating an example of a sub-array according to various embodiments. For high beamforming gain, more antenna elements than input ports may be used. To describe various example embodiments of the present disclosure, an array antenna including sub-arrays each corresponding to an input port is explained. Each sub-array of the array antenna includes the same number of antenna elements, but various embodiments of the present disclosure are not limited thereto. According to an embodiment, the number of antenna elements of a certain sub-array may be different from the number of antenna elements of other sub-arrays.

[0070] Referring Figure 4A , a sub-array may include multiple antenna elements. In Figure 4A , an n×1 (n is an integer equal to or greater than 2) sub-array is described as a linear array, but various embodiments of the present disclosure are not limited thereto. Various embodiments of the present disclosure may be applied to a 2×2 or 4×2 sub-array.

[0071] By considering antenna gain and beamforming performance, a sub-array may be configured in various forms. For example, the sub-array may be a 2×1 sub-array 401. For example, the sub-array may be a 3×1 sub-array 402. For example, the sub-array may be a 4×1 sub-array 403. For example, the sub-array may be a 6×1 sub-array 404. As the entities (e.g., antenna elements) for radiating signals increase, the antenna gain may increase. That is, the coverage may increase as the number of antenna elements in the sub-array for one input signal (input port) increases. Referring Figure 4B, Curve 450 shows an example gain performance based on the size of the sub - array. The horizontal axis 451 indicates the number of antenna elements, and the vertical axis 452 indicates the array gain. As the number of sub - arrays increases, the gain increases.

[0072] The antenna gain increases as the number of antenna elements in the sub - array increases, while the physical spacing between ports may increase. In the 2×1 sub - array 401, the spacing between the two sub - arrays (i.e., the spacing between ports) can be 1.48λ. λ indicates the signal wavelength. For example, the spacing between ports of the 3×1 sub - array 402 can be 2.22λ. For example, the spacing between ports of the 4×1 sub - array 403 can be 2.96λ. For example, the spacing between ports of the 6×1 sub - array 404 can be 4.44λ. As the number of antenna elements in the sub - array increases, the physical spacing between ports gradually widens (e.g., 1.48λ < 2.22λ < 2.96λ < 4.44λ). As the physical spacing between ports increases, the beam width decreases. Given the same phase - shift range (e.g., phase offset), the antenna array coverage (which can be referred to as beam coverage, tilt angle, or tilt coverage) decreases. That is, as Figure 4A shown, the tilt coverage 412 of the 3×1 sub - array 402 can be narrower than the tilt coverage 411 of the 2×1 sub - array 401. The tilt coverage 413 of the 4×1 sub - array 403 can be narrower than the tilt coverage 412 of the 3×1 sub - array 402. The tilt coverage 414 of the 6×1 sub - array 404 can be narrower than the tilt coverage 413 of the 4×1 sub - array 403.

[0073] When the beam angles that can be formed become narrower by increasing the sub - array size, beams with narrow beam widths are used for beam scanning. Using beam scanning with narrow beam widths results in grating lobes, which cause a performance degradation of the base station. For example, due to the unnecessary array beams in the beams formed at the antenna according to the array factor affecting other base stations, what is needed is an optimal design of the array antenna that takes into account the trade - off between antenna gain and beamforming performance.

[0074] Since the narrow beam - scanning range leads to performance degradation, various embodiments of the present disclosure provide a method for widening the tilt coverage. The signals radiated by applying phase values to each antenna element are overlapped, and the overlapped signals form a beam. The boresight or shape of the formed beam can vary depending on the phase values (e.g., phase pattern) applied to the antenna elements. Since the change in phase values can change the beam boresight, various embodiments of the present disclosure provide a phase - shifter circuit (which can also be referred to as a reconfigurable phase - shifter circuit) for providing various beam boresights without reducing the substantial beam coverage of the array antenna. By configuring the phase - shifter circuit for each specified state, the beam coverage of the array antenna can be widened.

[0075] Figure 5 This is a diagram showing an example functional configuration of a reconfigurable phase shift according to various embodiments. As described above, for antenna beamforming, each antenna element requires a phase shift (e.g., a phase value pattern applied by a phase shifter). Due to increased high power, size, and cost, it is difficult for a base station including an array antenna divided into multiple sub-arrays to implement a phase shifter for the array antenna. Accordingly, an antenna according to various embodiments may include a reconfigurable phase shifter circuit coupled to a power divider.

[0076] Reference Figure 5 , the first distributor circuit 501 represents a 4-port circuit using a passive power divider. The 4 ports are examples, and the number of input ports can be increased or decreased. A 2×1 sub-array can be connected to each input port. Phase shifters can be added to at least some of the branches of the distributor. An array antenna including a 2×1 sub-array can provide a tilt coverage of approximately ±α. An array antenna including a 2×1 sub-array can provide an antenna gain of approximately A dBi (decibels isotropic).

[0077] The second distributor circuit 503 represents a 2-port circuit using a passive power divider. The 2 ports are examples, and the number of input ports can be increased or decreased. A 4×1 sub-array can be connected to each input port. Phase shifters can be added to some of the branches of the distributor. An array antenna including a 4×1 sub-array (which has a wider spacing between ports compared to an array antenna including a 2×1 sub-array) can provide a relatively narrow tilt coverage (e.g., ±β degrees (<α)). An array antenna including a 4×1 sub-array can provide an antenna gain of approximately B dBi. B can be 3 dB less than A. As the number of antenna elements in the sub-array increases, the antenna gain increases by approximately 3 dB.

[0078] The reconfigurable phase shifter circuit 505 according to various embodiments may include an active power divider. The reconfigurable phase shifter circuit 505 can provide an RF path from each input port of the 2 ports to the sub-array. The 2 ports are examples, and the number of input ports can be increased or decreased. A 4×1 sub-array can be connected to each input port. Phase shifters can be added to at least some of the branches of the active power divider.

[0079] Unlike the first splitter circuit 501 or the second splitter circuit 503 that only includes passive devices, an active power splitter according to various embodiments may include switches (e.g., RF switches) to construct various transmission paths. The active power splitter may be adaptively connected to respective circuits of a reconfigurable phase shifter circuit through switching operations. Through the phase shifter circuits connected via switching, the active power splitter may provide a wider range of phase shift values for the sub-array. With various phase shift values, a much wider tilt coverage (e.g., ±2β degrees) may be provided. The example operations of the reconfigurable phase shifter circuit will be described in more detail below with reference to Figure 6A , Figure 6B , Figure 6C and Figure 6D .

[0080] As the range of the phase shift value changes, the reconfigurable phase shifter circuit 505 may obtain a wider tilt coverage than the second circuit 503. An array antenna including the reconfigurable phase shifter circuit 505 may provide a gain B - A that excludes the switching loss (or active loss B - A Loss ) from the antenna gain of approximately B dBi according to the 4×1 sub-array Loss . The embodiments of the phase shifter circuit structure for reducing such insertion loss will be described in more detail below with reference to Figure 7A , Figure 7B , Figure 8A , Figure 8B , Figure 9 , Figure 10 , Figure 11 , Figure 12 and Figure 13 .

[0081] According to various embodiments, by inserting a switching structure that can be connected to various phase shifter circuits into the power splitter, the beam formed by the antenna elements may be increased. In the absence of separate sub-arrays or separate phase shifters for providing different phase values, the active power splitter may provide various power shift values to the antenna elements. For example, the active power splitter may provide the effect of adding additional phase shifters without increasing the substantial product size, thereby providing an increase in tilt coverage (e.g., 2β degrees > β degrees). In addition, since the switches that can be connected to various phase shifter circuits are deployed on the power splitter rather than on the respective branches of the splitter, various ranges of phase shift may be provided through the shape of the splitter regardless of the number of RF switches and the antenna elements of the sub-array. By setting the number of antenna elements at the application level (e.g., a specific beam width request), this deployment structure may be used to provide the necessary phase shift.

[0082] Although the power divider is described in the present disclosure as an example of a passive device for forwarding an input signal per port to each antenna element, the power divider may perform other functions depending on the signal flow and device operation. The passive device for performing the divider function according to various embodiments may be referred to as a coupler, a combiner, a splitter, etc. For example, a passive device that supplies signals to each subarray through an input port performs the divider function and does not exclude the role of other functions as a passive device.

[0083] Figure 6A , Figure 6B , Figure 6C and Figure 6D are diagrams showing operation examples of reconfigurable phase shifts according to various embodiments. To describe the reconfigurable phase shift, an example structure of a reconfigurable divider circuit 505 of Figure 5 is described. The reconfigurable divider circuit may include an input unit, a switching unit (e.g., including switches), a reconfigurable phase shifter circuit, and a power divider. The power divider may also include an active power divider connected to the switches.

[0084] Referring to Figure 6A , an RF signal may be applied to the input port 601. The RF signal is forwarded to a radiator, such as an antenna element, through a specified path. The RF signal is forwarded to the power divider through one of a first phase shifter circuit 611 and a second phase shifter circuit 612 of the reconfigurable phase shifter circuit. The RF signal is radiated to the antenna element through the power divider. The reconfigurable phase shifter circuit may adaptively provide an RF path according to a state set to provide various phase shifts, rather than providing a fixed RF path to the subarray.

[0085] By switching according to a specified state, the reconfigurable phase shifter circuit may include a reconfigurable circuit. According to an embodiment, the reconfigurable phase shifter circuit may include separate physical circuits that are turned on or off according to the switching. According to an embodiment, the reconfigurable phase shifter circuit may include a switching circuit that can be differently reconfigured according to the switching. Each phase shifter circuit configurable in the reconfigurable phase shifter circuit may provide a different phase range. By providing different phase shifts to the RF signal input to the slave port, the beam range that can be formed by the subarray can be increased. The maximum phase shift range may be referred to as a phase offset.

[0086] If a switch (e.g., a single-pole double-throw (SPDT)) is connected to the first reconfigurable phase shifter circuit 611 (hereinafter referred to as the first state), a first phase shift can be applied to the entire power signal divided into the subarray. The antenna elements of the subarray can radiate a signal with a specified phase shift value applied thereto through a path (a distributor path) for transmitting RF signals. If the switch is connected to the second reconfigurable phase shifter circuit 612 (hereinafter referred to as the second state), a second phase shift can be applied to the entire power signal divided into the subarray. The antenna elements of the subarray can radiate a signal with a specified phase shift value applied thereto through a path (a distributor path) for transmitting RF signals.

[0087] By setting different values for the first phase shift and the second phase shift, even if the RF signals in the first state and the second state pass through the same path, different phase shift effects will be exhibited. For example, due to applying different phase shift values before the distributor, an effect similar to that of substantially physically separated phase shifters can be obtained. According to an embodiment, each phase shift value of the reconfigurable phase shifter circuit can be determined based on a phase offset (PO) value. For example, the first phase shift can be set to (+)PO / 2, and the second phase shift can be set to (-)PO / 2. The specific design of the phase shift values will be described in more detail below with reference to Figure 12 more specifically.

[0088] The beamforming module can adaptively configure the reconfigurable phase shifter circuit by switching and provide a signal with a desired phase value to the power distributor. According to an embodiment, the phase shifter circuit connected to the input port and the power distributor by switching can be determined according to a control signal provided by the processor. The control signal can specify the state of beam scanning. The processor can select a phase shifter circuit to provide a phase shift value corresponding to the beamforming range provided by the antenna. According to an embodiment, the phase shifter circuit connected to the input port and the power distributor by switching can be determined according to a predefined order.

[0089] Although the reconfigurable phase shifter circuit provides phase shifter circuits for two states in Figure 6A , Figure 6B , Figure 6C and Figure 6D , various embodiments of the present disclosure are not limited thereto. According to an embodiment, three or more states can be operated according to the design, and phase shifter circuits can be configured for each state. According to an embodiment, only some of the N-element phase shifter circuits can be activated according to a control signal of the processor or a manual input of the user, and then one of the phase shifter circuits activated according to the control signal can be connected to the input port and the power distributor.

[0090] The beamforming module may include phase shifters provided at each branch of the distributor. The separate phase shifters are connected to each antenna element, thereby forming a beam pattern. When doing so, the phase shifter circuit of the present disclosure is deployed before the distributor, and accordingly different phase shifts are provided to the entire subarray, and the phase shift range can be increased without additional phase shifters.

[0091] Although in Figure 6A the phase shifters are deployed at separate branches of the distributor 631, various embodiments of the present disclosure are not limited thereto. Due to the increase in size and cost, it is not easy to install separate phase shifters at each antenna element, so the present disclosure provides a method for differently deploying phase shifters. For example, Figure 6A only some of the phase shifters in

[0092] Reference Figure 6B can be operated, or the phase shifters can be provided only on a certain branch. Depending on the required circuit size and phase adjustment range, various phase shift deployments can be proposed.

[0093] Reference Figure 6C In some embodiments, the phase shifters may not be deployed at some branches of the distributor 632 that are close to the connection of the antenna element (e.g., the N1 element layer from the antenna element). For example, the phase shifter may be deployed only at one of the two branches (branches connected to the antenna element) that are connected to the second layer of the distributor divided into two layers (e.g., a 2-in-1 distributor).

[0094] Reference Figure 6D In some embodiments, the phase shifters may not be deployed at some branches of the distributor 633 that are close to the connection of the input port (e.g., the N2 layer after the input port). For example, the phase shifter may be deployed only at one of the two branches (branches connected to the antenna element) that are connected to the first layer of the distributor divided into two layers (e.g., a 2-in-1 distributor).

[0094] Reference Figure 6D In some embodiments, the phase shifter may be deployed at one branch of the distributor 634 (e.g., a 2-in-1 distributor), and the phase shifter may not be deployed at the other branch. By implementing different phase shifts at each branch, the effect of applying substantially different phase patterns to the antenna elements can be achieved.

[0095] As Figure 6B 、 Figure 6C and Figure 6D shown, according to various embodiments, the beamforming module can apply the phase shift value to the antenna elements in the subarray by designing the distributor to pass through the phase shift path only in a certain path. For example, after the switch, the first phase shifter may be provided at the lower branch of the active power distributor. For example, the second phase shifter and the third phase shifter may be respectively deployed at the lower branches of the subsequent power distributors.

[0096] A phase shifter is added to Figure 6B , Figure 6C and Figure 6D at least one of two branches of the distributor in to illustrate an example of adding a phase shifter to a certain branch, and various embodiments of the present disclosure are not limited thereto. Two or more branches can also be understood as embodiments of the present disclosure.

[0097] As mentioned in Figure 5 , Figure 6A , Figure 6B , Figure 6C and Figure 6D 's description, due to the increase in the number of antenna elements in the MMU, applying a phase shifter to each antenna element may cause a structural burden. In addition, in terms of loss, connecting the feeder to the antenna element alone and connecting each feeder to the phase shift chipset through the layer including the antenna may be inefficient. In some embodiments, to solve this problem, the beamforming module of the MMU may include only the MMU phase shift structure attached to the antenna substrate (e.g., a printed circuit board (PCB) including an antenna module) including a plurality of antenna elements. According to an embodiment, since it is not easy to apply a conventional phase shift chipset, an active power distributor and a reconfigurable phase shifter circuit may be mounted on the surface of the antenna PCB. The reconfigurable phase shifter circuit on the PCB according to various embodiments may be mounted on the antenna PCB according to the surface mount technology (SMT). The phase shifter circuit structure on the same board as the antenna can solve the cost and performance problems of the conventional phase shift chipset.

[0098] As Figure 5 shown, although the tilted coverage increases, the insertion loss (hereinafter referred to as switching loss) caused by switching still exists. For example, compared with the B dBi of the second circuit 503, the array antenna including the 4×1 subarray experiences a gain reduction corresponding to the switching loss. Accordingly, when designing a reconfigurable phase shifter circuit, it is necessary to minimize and / or reduce the switching loss. Now, with reference to Figure 7A , Figure 7B , Figure 8A , Figure 8B , Figure 9 , Figure 10 , Figure 11 , Figure 12 , Figure 13 and Figure 14 the specific design method of the reconfigurable phase shifter circuit for minimizing and / or reducing the switching loss will be described in more detail.

[0099] Figure 7A and Figure 7B are diagrams showing examples of phase shifter circuits according to various embodiments.Figure 7A and Figure 7B the phase shifter circuit in may be included in the reconfigurable phase shifter circuit coupled to Figure 5 or Figure 6A , Figure 6B , Figure 6C and Figure 6D an active power divider. The circuit provides switching between two states. Note, however, that various embodiments of the present disclosure may be applied to switching between two or more states.

[0100] Referring to Figure 7A , the phase shifter circuit 700 includes circuitry for providing a phase shift using the delay difference between two transmission lines and may be referred to as a switched-line phase shifter circuit. Two switches (e.g., SPDT) 710 and 730 may be included to provide an adaptive path between the input from the port and the output to the power divider. In the first state, the first phase shift path 721 is connected to the input switch 710 and the output switch 730. The first phase shift path 721 may provide a phase shift of θ1. In the second state, the second phase shift path 722 is connected to the input switch 710 and the output switch 730. The second phase shift path 722 may provide a phase shift of θ2. Due to the wide loss bandwidth and no limitation on the range of phase offset, the switched-line phase shifter circuit 700 for providing separate transmit paths according to switching (which may ignore the bandwidth of the switches) is easily capable of wide-range phase shift.

[0101] Referring to Figure 7B , the graph 750 shows the switching loss of the switched-line phase shifter circuit 700 shown in Figure 7A . The horizontal axis indicates frequency (unit: GHz), and the vertical axis indicates the transmission coefficient. S(2,1) indicates the S-parameter S21 as the transmission coefficient of the first phase shift path 721, and S(4,3) indicates the S-parameter S21 as the transmission coefficient of the second phase shift path 722. According to the graph 750, there is a -0.8 dB loss (frequency 3.5 GHz) in the first state m1 and the second state m2. Assuming the switch series loss is 0.4 dB, the switching loss is doubled. This is because the signal path includes two series switches with their switching losses. The high switching loss may provide a relatively low antenna gain. In addition, since the switched-line phase shifter circuit 700 may be subject to component damage or reliability verification due to a high-level RF input power based on the MMU characteristics, a phase shifter circuit with a different structure may be considered as an alternative.

[0102] Figure 8A and Figure 8B are schematic diagrams showing examples of phase shifter circuits. Figure 8A and Figure 8B the phase shifter circuit in may be included in the reconfigurable phase shifter circuit coupled to Figure 5 orFigure 6A , Figure 6B , Figure 6C and Figure 6D in a reconfigurable phase shifter circuit coupled to an active power divider. The circuit provides switching between two states, but note that various embodiments of the present disclosure can be applied to switching between two or more states.

[0103] Referring Figure 8A , a phase shifter circuit 800 that provides a phase shift by utilizing the reactance difference loaded onto a main transmission line can be referred to as a loaded-line phase shifter circuit. It may include two switches (e.g., SPDT) 810 and 830 to adaptively increase the reactance between the input from the port and the output to the power divider. In the first state, two first phase-shifting loads 821 can be connected in parallel to the main path 820. The main path 820 can provide a phase shift of θ L . The first phase-shifting load 821 can provide a phase shift of θ1. In the second state, two second phase-shifting loads 822 can be connected in parallel to the main path 820. The second phase-shifting load 822 can provide a phase shift of θ2. Since the switches are connected in a shunt stub structure, the loaded-line phase shifter circuit 800 can provide excellent loss performance (e.g., low switching loss).

[0104] Referring Figure 8B , graph 851 shows the switching loss of the loaded-line phase shifter circuit 800 at low phase offsets. Low phase offsets can indicate phase offsets below a specified threshold. Graph 851 shows the loss performance at low phase offsets. Graph 852 shows the switching loss of the loaded-line phase shifter circuit 800 at high phase offsets. High phase offsets can indicate phase offsets exceeding a specified threshold. For example, graph 851 shows the loss performance at low phase offsets. In the graph, the horizontal axis indicates frequency (unit: GHz), and the vertical axis indicates the transmission coefficient. S(2,1)(m1) indicates the S-parameter S21, which is the transmission coefficient of the phase shifter circuit 800 in the first state with the addition of the first phase-shifting load 821, and S(4,3)(m2) indicates the S-parameter S21, which is the transmission coefficient of the phase shifter circuit 800 in the second state with the addition of the second phase-shifting load 822.

[0105] Referring to graphs 851 and 852, a wide band and low loss (approximately 0.25 dB (m1 = 0.267 dB, m2 = 0.241 dB), loss = approximately 0.625 at 3.5 GHz) are identified at low phase offsets, while a narrow band and high loss (approximately 0.75 dB (m1 = 0.753 dB, m2 = 0.752 dB), loss = 1.75 at 3.5 GHz) are identified at high phase offsets. This is because the bandwidth is limited by the shunt leg structure and the range of available phase offsets is set (below approximately 45 degrees). In addition, since a phase offset below a certain value has no tolerance for processing margin and only a narrowband signal is provided, the loaded line phase shifter circuit 800 may not provide sufficient loss performance at high phase offsets.

[0106] As described above, the switching line phase shifter circuit 700 suffers from loss problems, and the loading line phase shifter circuit 800 suffers from limited phase shift. The present disclosure provides a phase shifter circuit that satisfies loss performance and provides various phase shifts. The disclosed phase shifter circuit provides the required phase shift by adding the signals transmitted through each path via a parallel connection between the main path and the sub-path. Now, the phase shifter circuit provided by coupling the main path and the sub-path can be referred to as a quasi passive vector-sum (QPVS) phase shifter circuit. Reference will be made to Figure 9 , Figure 10 , Figure 11 , Figure 12 and Figure 13 The operation of the QPVS phase shifter circuit is described in more detail.

[0107] Figure 9 is a diagram illustrating an example of a QPVS phase shifter circuit according to various embodiments. Figure 9 The phase shifter circuit can be included with Figure 5 or Figure 6A , Figure 6B , Figure 6C and Figure 6D The active power divider is coupled to a reconfigurable phase shifter circuit. The circuit provides switching between two states (a first state 901 and a second state 902), but it is noted that various embodiments of the present disclosure can be applied to switching between two or more states.

[0108] refer to Figure 9, the QPVS phase shifter circuit 900 may include a main path 910, a first sub-path 921 included in the phase shifter circuit in a first state 901, and a second sub-path 922 included in the phase shifter circuit in a second state 902. To operate one of the first sub-path 921 and the second sub-path 922 according to the state, switches 911 and 931 (e.g., SPDT) may be connected to both ends of the first sub-path 921 or both ends of the second sub-path 922. In the first state 901, the switches 911 and 931 are connected to both ends of the first sub-path 921, and the first sub-path 921 is connected in parallel to the main path 910. In the second state 902, the switches 911 and 931 are connected to both ends of the second sub-path 922, and the second sub-path 922 is connected in parallel to the main path 910.

[0109] The RF signal transmitted through the main path 910 and the RF signal transmitted through the sub-path (e.g., the first sub-path 921 or the second sub-path 922) may be added at the output stage. The RF signal may be represented as a vector. The RF signal output from the QPVS phase shifter circuit (e.g., the RF signal transmitted to the power divider) may correspond to the vector sum of the RF signals. A desired RF signal vector sum may be obtained by controlling the phase shifts of the main path 910, the first sub-path 921, and the second sub-path 922.

[0110] The vector sum of the two RF signals may correspond to the phase shift value of the output RF signal. By considering the desired phase shift range, the main path 910, the first sub-path 921, and the second sub-path 922 may be designed. For example, the main path 910 may be designed such that the RF signal transmitted through the main path 910 has a fixed phase shift (e.g., (+)90 degrees). The first sub-path 921 and the second sub-path 922 may be designed such that the RF signals transmitted through the first sub-path 921 and the second sub-path 922 have phase shifts based on different axes of view of the main path 910. According to an embodiment, the RF signals transmitted through the first sub-path 921 and the second sub-path 922 may be symmetric based on the main path 910. A specific design method will be described in more detail below with reference to Figure 12 A more detailed description of the specific design method will be given.

[0111] The QPVS phase shifter circuit 900 may provide a desired phase (within approximately 150 degrees) by coupling the main path 910 and the sub-path (the first sub-path 921 or the second sub-path 922) set according to the switching. By coupling the main path 910 and the sub-path in parallel, a wide bandwidth may be provided because there is no shunt stub structure. In addition, by deploying switches in parallel in the sub-path, the switch series loss may be reduced (a switching loss lower than that of the switching line phase shifter circuit 700 in FIG. 7 (<2)).

[0112] Figure 10 and Figure 11FIG. is an example showing the operating principle of a QPVS phase shifter circuit according to various embodiments. The QPVS phase shifter circuit represents Figure 9 phase shifter circuit 900. The QPVS phase shifter circuit may include a main path 910 that provides a fixed phase value and sub-paths (a first sub-path 921 in a first state and a second sub-path 922 in a second state) that change the phase value according to switching. The RF signal output from the phase shifter circuit has various phase shifts according to the change range of the sub-path. For example, the phase shift range of the RF signal output from the phase shifter circuit can be determined by the difference between the phase shift value provided by the first sub-path 921 and the phase shift value provided by the second sub-path 922.

[0113] Reference Figure 10 , the QPVS phase shifter circuit provides a small phase shift range. This small phase shift range may indicate that the influence of the phase shift using the sub-path is relatively smaller than the influence of the phase shift using the main path, and the phase shift is less than the reference value.

[0114] Since most of the signal at the input port is transmitted to the main path and the remaining signal is transmitted to the sub-path, the component of the main path dominates in the direction component of the vector sum corresponding to the output signal. In the first state 1001, since the main path component "1 - a" is much larger than the sub-path component "a" (1 - a >> a), the influence of the main path component is large in both the direction and magnitude of the vector sum. For example, "a >> b" may indicate that a is greater than a specified multiple of b (e.g., 10). In the second state 1002, since the main path component "1 - b" is much larger than the sub-path component "b" (1 - b >> b), the influence of the main path component is large in both the direction and magnitude of the vector sum.

[0115] The QPVS phase shifter circuit can provide a low-loss gain by transmitting most of the signal to the main path instead of providing a narrow phase shift. This is because the influence of the switch is low. According to an embodiment, if the influence from the switching loss is quite large, the beamforming module can provide the RF signal transmitted through the corresponding phase shifter circuit to the sub-array. Such a phase shifter circuit can be configured based on the number of antenna elements of the sub-array or the array factor (AF) during the design phase. The beamforming module may include multiple phase shifter circuits, and the phase shifter circuit for providing a narrow phase shift can be identified by the control of the processor.

[0116] Reference Figure 11 , depicts a QPVS phase shifter circuit for providing a wide phase offset range. The wide phase offset range may indicate that the influence of the phase shift using the main path is relatively smaller than the influence of the phase shift using the sub-path, and the phase shift is greater than the reference value.

[0117] Since most of the input port signal is transmitted to the sub-path and the remaining signal is transmitted to the sub-path, the components of the main path dominate in the direction component of the vector sum corresponding to the output signal. In the first state 1101, since the sub-path component "a" is much larger than the main path component "1 - a" (1 - a << a), the influence of the sub-path component is large in terms of both the direction and magnitude of the vector sum. In the second state 1102, since the sub-path component "b" is much larger than the main path component "1 - b" (1 - b << b), the influence of the sub-path component is large in terms of both the direction and magnitude of the vector sum.

[0118] The QPVS phase shifter circuit is highly affected by the phase shift of the sub-path, and the series loss of the switch has a significant impact, but it can provide a wide range of phase shifts. According to an embodiment, if the influence of the switching loss is negligible or a wide range of phase shifts is required, the beamforming module can supply the RF signal transmitted through the corresponding phase shifter circuit to the sub-array. Such a phase shifter circuit can be configured based on the number of antenna elements or AF in the sub-array during the design phase. The beamforming module can include multiple phase shifter circuits, and the phase shifter circuit for providing a narrow range of phase shifts can be identified through the control of the processor.

[0119] To configure the QPVS phase shifter circuit according to various embodiments, impedance matching can be performed. Through impedance matching, the QPVS phase shifter circuit can be configured to maximize the power transmission of the RF signal. By doing so, the main path can be configured to provide a fixed phase (e.g., 90*n (n = 1, 3,...)) as a reference value for the phase shift.

[0120] According to an embodiment, the main path 910 can include an impedance. Each impedance value can be set to achieve impedance matching in parallel connection with the sub-path. Each impedance can be determined to provide a fixed phase shift (e.g., 90n). For example, θ2 can be set to the value 90 - 2θ1. For example, the main path can be designed to have a fixed phase shift of 90 degrees.

[0121] According to an embodiment, the sub-path can include an impedance. The sub-path can be designed to achieve impedance matching with the main path in parallel connection. By doing so, different reactances are provided according to the phase shifts of the first sub-path and the second sub-path according to the switching meaning, and the sub-path can be configured to be symmetric based on the fixed phase of the main path (e.g., if the impedance Z of the first sub-path sub-path#1 is a + jb, then the impedance Z of the second sub-path sub-path#2It is (a - jb). In addition, the difference between the phase shift of the first sub - path and the phase shift of the second sub - path defined according to the switching can be configured to obtain a desired phase offset (e.g., maximum phase range offset). The phase shift value of the impedance can be designed such that the signals of the sub - paths connected for a specified state are symmetric based on the phase of the main path. This is to make the amplitudes of the composite signals of each sub - path and the main path the same. For example, the sub - paths (the first sub - path 921 and the second sub - path 922) can be symmetric based on a fixed phase of 90 degrees of the main path.

[0122] Figure 12 FIG. is a flowchart showing an example method of designing a QPVS phase shifter circuit according to various embodiments. This method can be used as a manufacturing method for designing a circuit. In addition, this method can be used to design a phase shifter circuit for variably setting the impedance of each transmission path. In addition, this method can be used to identify whether a beamforming module or an antenna device includes a phase shifter circuit according to an embodiment of the present disclosure, e.g., whether a QPVS phase shifter circuit is implemented. Hereinafter, the design operations can be performed by a circuit generator, but can be applied to the manufacturing process of a provider, the implementation of a user, or the processing of a design device.

[0123] Reference Figure 12 , in operation 1201, the circuit generator can configure Figure 9 the main - path variables of the QPVS phase shifter circuit. According to an embodiment, the main - path variables can include the first impedance (phase θ1), the second impedance (phase θ2), and the third impedance (phase θ3) in the main path 910. According to an embodiment, θ2 can have a phase value that is an integer multiple of 90 degrees different from θ1 + θ3 to obtain a fixed phase. For example, in an initial operation, if θ1 = θ3, then θ2 can be set to 90 - 2θ1.

[0124] In operation 1203, the circuit generator can configure Figure 9 the sub - path variables of the QPVS phase shifter circuit. The QPVS phase shifter circuit includes Figure 12 two sub - paths in, and the circuit generator can configure the path variables of the first sub - path 921 and the second sub - path 922. According to an embodiment, each sub - path variable can be the first impedance, the second impedance, or the third impedance in the sub - paths 921 and 922.

[0125] In operation 1205, the circuit generator can determine whether the impedance - matching and phase - offset conditions are met. The main path and each sub - path can be coupled. By doing so, in order to minimize and / or reduce the switching loss of the sub - path, the main path and each sub - path can be connected in parallel. If the two paths are connected in parallel, the circuit generator can obtain the reflection parameters of the input and output (e.g., reflection coefficient, parameter S 11) and transmission parameters (e.g., transmission coefficient, parameter S 21 )

[0126] The circuit generator can identify variable values such that the variables configured in operations 1201 and 1203 satisfy the impedance matching and phase shift conditions. For example, according to parameter S of the connection of the main path and the first sub-path 11 can be S 11a , according to parameter S of the connection of the main path and the first sub-path 21 can be S 21a , according to parameter S of the connection of the main path and the second sub-path 11 can be S 11b , and according to parameter S of the connection of the main path and the second sub-path 21 can be S 21b . At this time, the impedance matching condition can be defined as follows

[0127] |S 11a | = |S 11b | = 0...(1)

[0128] |S 21a | = |S 21b | = 1...(2)

[0129] If the desired phase shift range, i.e., the phase offset is PO, the phase offset condition can be defined as follows

[0130] |∠S 21a - ∠S 21b | = PO...(3)

[0131] The circuit generator can identify each variable value such that the variables configured in operations 1201 and 1203 satisfy Equation 1, Equation 2, and Equation 3. If impedance matching is not achieved or the phase shift condition is not satisfied (''No'' in operation 1205), the circuit generator can perform operation 1207. If impedance matching is achieved and the phase shift condition is satisfied (''Yes'' in operation 1205), the circuit generator can perform operation 1209

[0132] In operation 1207, the circuit generator can reset the delay variable of the main path. Since θ2 is set to have a phase value that is an integer multiple n of 90 degrees different from 2θ1 in operation 1201, if sufficient impedance / phase values are not recognized for the corresponding value n, the circuit generator can change the value n. For example, the circuit generator can change the value n from 1 to 3. θ2 can be set to 270 - 2θ1

[0133] In operation 1209, the circuit generator may derive a QPVS phase shifter circuit including a main path and a sub-path based on main path variables and sub-path variables that satisfy impedance matching and phase shift conditions. According to an embodiment, the circuit generator may additionally identify whether a sub-path circuit with a shorter phase can be designed. If a sub-path with a shorter phase "θ" can be designed, the circuit generator may derive a new QPVS phase shifter circuit by replacing the corresponding sub-path. The circuit generator may repeat the corresponding determination operation until the same parameter S with the minimum phase is obtained. 11 and parameter S 21 .

[0134] For example, Figure 12 the design method of first configures the main path variables and then configures the sub-path variables, but various embodiments are not limited thereto. That is, the sub-path variables may be set first, and the main path variables may be adjusted.

[0135] Although only devices configured with impedance and phase are mentioned in Figure 12 , the embodiments of the present disclosure are not limited thereto. According to an embodiment, the sub-path of the QPVS phase shifter circuit may include at least one non-linear device, such as a switch, a diode, or a transistor.

[0136] As described above, the design method has been explained in Figure 12 , but the corresponding design method can be used to determine whether a QPVS phase shifter circuit according to various embodiments is included. In some embodiments, it may be identified whether the QPVS circuit of the present disclosure is implemented based on whether equations 1, 2, and 3 are satisfied. According to an embodiment, a processor connected to the beamforming module may identify whether the QPVS circuit of the present disclosure corresponding to the beamforming module is configured by sending a test RF signal.

[0137] Figure 13 is a diagram showing an example performance of a QPVS phase shifter circuit according to various embodiments.

[0138] Referring to Figure 13 , graph 1300 represents the performance of the switching loss according to the QPVS phase shifter circuit. In graph 1300, the horizontal axis indicates the frequency (unit: GHz), and the vertical axis indicates the relationship with the transmission coefficient, that is, parameter S 21 (unit: dB). In the 3.5 GHz band, at point m3 (parallel connection of the main path and the first sub-path) according to the first state and point m5 (parallel connection of the main path and the second sub-path) according to the second state, their transmission coefficients are -0.694 dB and -0.694 dB, respectively. Assuming that the switch series loss is 0.4 dB, a switching loss of approximately 1.75 times occurs. Compared with Figure 7BCompared with the 0.8 dB loss of the switched-line phase shifter circuit in the graph 750, the QPVS phase shifter circuit can provide enhanced switching loss and provide a stable bandwidth. In addition, compared with Figure 8B the loaded-line phase shifter circuit, the QPVS phase shifter circuit can provide lower loss and broadband width at high phase offsets.

[0139] Figure 14 is a graph showing exemplary performance per phase offset according to the type of phase shifter circuit according to various embodiments. In Figure 7A , Figure 7B , Figure 8A , Figure 8B , Figure 9 , Figure 10 , Figure 11 , Figure 12 and Figure 13 various types of phase shifter circuits have been described. According to an embodiment, the reconfigurable phase shifter circuit connected to the sub-array through a distributor may be a switched-line phase shifter circuit 700. According to an embodiment, the reconfigurable phase shifter circuit connected to the sub-array through a distributor may be a loaded-line phase shifter circuit 800. According to an embodiment, the reconfigurable phase shifter circuit connected to the sub-array through a distributor may be a QPVS phase shifter circuit 900. By doing so, each type of phase shifter circuit has advantages and disadvantages, and the beamforming module can adaptively configure the type of phase shifter circuit operating in the reconfigurable phase shifter circuit by taking advantage of these advantages and disadvantages.

[0140] Referring to Figure 14 , graph 1400 represents the insertion loss of each phase shifter circuit. The horizontal axis indicates the phase offset (unit: °), and the vertical axis indicates the insertion loss (unit: dB). Line 1401 indicates the insertion loss per phase offset of the switched-line phase shifter circuit 700. Line 1403 indicates the insertion loss per phase offset of the loaded-line phase shifter circuit 800. Line 1405 indicates the insertion loss per phase offset of the QPVS phase shifter circuit 900.

[0141] Since insertion loss (e.g., switching loss) affects the ultimately derived antenna gain, it is necessary to minimize and / or reduce this value. In some embodiments, the beamforming module may include a phase shifter circuit of each type. For example, the beamforming module may include a type-3 phase shifter for providing various phase shift ranges. The optimal type of phase shifter circuit varies depending on the phase shift range, and accordingly the beamforming module can adaptively configure the phase shifter circuit according to the phase shift range. For example, if the phase shift is below a first threshold, a loaded-line phase shifter circuit 800 may be set. If the phase shift exceeds the first threshold and is below a second threshold, a QPVS phase shifter circuit 900 may be set. If the phase shift exceeds the second threshold, a switched-line phase shifter circuit 800 may be set.

[0142] Figure 15A is a diagram showing an example of an extended structure of a reconfigurable phase shifter circuit according to various embodiments. Although in Figure 9 , Figure 10 , Figure 11 , Figure 12 and Figure 13 the QPVS circuit includes two sub-paths, two or more sub-paths may also be used. Figure 15A provides an extended structure including multiple bits in a single-bit QPVS phase shifter circuit. Using a single-pole N-throw (SPNT) at the SPDT of the QPVS phase shifter circuit 900 in Figure 9 increases the number of states.

[0143] Referring to Figure 15A , a reconfigurable phase shifter circuit as an extended QPVS circuit may include a main path 1510, a first sub-path 1520-1, a second sub-path 1520-2,..., and an N-th sub-path 1520-N (where N is an integer greater than 3). Each path may be connected in parallel to minimize and / or reduce insertion loss.

[0144] The impedance and phase values of the main path 1510, the first sub-path 1520-1, the second sub-path 1520-2,..., and the N-th sub-path 1520-N (where N is an integer greater than 3) can be adopted in a similar manner using Figure 12 Equation 1, Equation 2, and Equation 3 of

[0145] Figure 15BFIG. is an example showing an extended structure of a reconfigurable phase shifter circuit according to various embodiments. The reconfigurable phase shifter circuit may include Figure 15A a set of extended QPVS circuits. By including more SPNT and QPVS circuits in a hierarchical structure in the Figure 15A extended QPVS phase shifter circuit, the number of states to be operated can be increased.

[0146] Referring to Figure 15B , the reconfigurable phase shifter circuit may be connected in parallel with the first extended QPVS phase shifter circuit 1550-1 to the Nth extended QPVS phase shifter circuit 1550-N through the SPNT of the input port and the SPNT of the output. Insertion loss can be minimized and / or reduced by the parallel connection. According to an embodiment, each extended QPVS phase shifter circuit provides a fixed phase value, and as the number of controllable states increases, the beamforming module can achieve detailed phase adjustment via sub-paths through the switching of each extended QPVS circuit.

[0147] As described above, as the number of antenna elements in the subarray increases (e.g., two subarrays → 4 subarrays), the antenna gain increases. If the size of the subarray increases, the tilt range decreases, resulting in performance degradation. The beamforming module according to various embodiments may provide multiple states through the reconfigurable phase shifter circuit. Assume a case for covering ±A° (A>0). If the reconfigurable phase shifter circuit operates in two states, the combination of the main path and the sub-path of the reconfigurable phase shifter circuit can cover ±A° / 2 in each state. If the reconfigurable phase shifter circuit operates in three states, the combination of the main path and the sub-path of the reconfigurable phase shifter circuit can cover ±A° / 3 in each state.

[0148] According to various embodiments, embodiments of the present disclosure can be identified by configuring each phase shift value not to overlap with the line of sight of the first signal radiated in the first state of the reconfigurable phase shifter circuit and the second signal radiated in the second state of the reconfigurable phase shifter circuit. By deploying the reconfigurable phase shifter circuit before the power divider and physically separating the adjustable beam scanning range, the beam directions of each state may not overlap, although separate branch phase shifters are provided. For example, the directions of separately formed beams can be physically distinguished.

[0149] The apparatus and method according to various embodiments of the present disclosure can provide wide coverage by providing a wide range of phase shifts via the power divider and the phase shifter circuit.

[0150] According to an embodiment, an antenna device includes: an array antenna including sub-arrays, a power divider, and a reconfigurable phase shifter circuit, wherein the reconfigurable phase shifter circuit is configured to provide a first phase shift value based on a switch in a first state and provide a second phase shift value different from the first phase shift value based on the switch in a second state.

[0151] In some embodiments, the reconfigurable phase shifter circuit is arranged after a port input and before a branch of the power divider.

[0152] In some embodiments, the reconfigurable phase shifter circuit includes: a first phase shifter circuit including a main path and at least two sub-paths, the at least two sub-paths including a first sub-path and a second sub-path connected in parallel, wherein the first phase shifter circuit is configured to connect the first sub-path to the main path based on the operation of the switch in the first state and connect the second sub-path to the main path based on the operation of the switch in the second state.

[0153] In some embodiments, the phase provided by the main path provides a fixed value, and the phases provided to the first sub-path and the second sub-path are symmetric based on the fixed value.

[0154] In some embodiments, the difference between the first phase shift vector and the second phase shift vector corresponds to a required phase offset, the first phase shift vector is provided by the parallel connection of the main path and the first sub-path in the first state, and the second phase shift vector is provided by the parallel connection of the main path and the second sub-path in the second state.

[0155] In some embodiments, based on the required phase offset, the phase value of at least one impedance of the main path, the at least one first impedance phase value of the first sub-path, and the at least one second impedance phase value of the second sub-path are determined.

[0156] In some embodiments, the first sub-path or the second sub-path includes at least one of a switch, a diode, or a transistor.

[0157] In some embodiments, at least one impedance of the main path and at least one first impedance value of the first sub-path are determined to achieve impedance matching, and at least one impedance of the main path and at least one second impedance value of the second sub-path are determined to achieve impedance matching.

[0158] In some embodiments, a reconfigurable phase shifter circuit includes a second phase shifter circuit having a switching line structure, wherein the second phase shifter circuit is configured to: in a first state, connect a first circuit in series to an input port and an output port based on the operation of a switch, and in a second state, connect a second circuit in series to the input port and the output port based on the operation of the switch, wherein the first circuit has an impedance providing a first phase shift value, and the second circuit has an impedance providing a second phase shift value.

[0159] In some embodiments, a reconfigurable phase shifter circuit includes a third phase shifter circuit having a loaded line structure, wherein the third phase shifter circuit is configured to: in a first state, connect a first phase shift load in parallel to a main path, an input port, and an output port based on the operation of a switch, in a second state, connect a second phase shift load in parallel to the main path, the input port, and the output port, and connect the second circuit to the input port and the output port, wherein the first circuit has an impedance providing a first phase shift value, and the second circuit has an impedance providing a second phase shift value.

[0160] In some embodiments, the antenna device further includes at least one processor, wherein the at least one processor is configured to: identify a phase offset, identify one of a first phase shifter circuit, a second phase shifter circuit, and a third phase shifter circuit based on the identified phase offset, and control the device to provide a radio frequency (RF) signal of an input port to a subarray using the identified phase shifter circuit.

[0161] In some embodiments, the reconfigurable phase shifter circuit is further configured to provide a circuit having a third phase shift value different from the first phase shift value and the second phase shift value in a third state.

[0162] In some embodiments, it further includes at least one processor, wherein the at least one processor is configured to control the device to send a control signal indicating the first state or the second state to the reconfigurable phase shifter circuit.

[0163] In some embodiments, the at least one processor is configured to: control the antenna array to radiate a first RF signal applying a first phase shift value through a power divider and a subarray in a first state, and control the antenna array to radiate a second RF signal applying a second phase shift value through the power divider and the subarray in a second state.

[0164] In some embodiments, the beam width of a first beam formed to radiate a first RF signal is the same as the beam width of a second beam formed to radiate a second RF signal, and the boresight of the first beam and the boresight of the second beam are different.

[0165] In some embodiments, at least one processor is configured to calculate a first phase shift value and a second phase value based on the number of antenna elements in a sub-array and the number of operating states.

[0166] According to an embodiment, a device includes: at least one processor, an array antenna including a sub-array, a power divider, and a reconfigurable phase shifter circuit, wherein the at least one processor is configured to: control the antenna array to radiate a first signal based on a first phase shift of the reconfigurable phase shifter circuit and a passive phase shift of the power divider, and control the antenna array to radiate a second signal based on a second phase shift of the reconfigurable phase shifter circuit and a passive phase shift of the power divider, wherein the first phase shift value and the second phase shift value of the reconfigurable phase shifter circuit are configured, and wherein the line of sight of the first signal does not overlap with the line of sight of the second signal.

[0167] In some embodiments, at least one processor is configured to calculate a first phase shift value and a second phase value based on the number of antenna elements in a sub-array and the number of operating states.

[0168] According to an embodiment, a method of designing an antenna device, the antenna device including a phase shifter circuit and a sub-array, in which a main path and at least two sub-paths are connected in parallel, the method includes: setting variables of the main path, setting variables of the at least two sub-paths, identifying a first value corresponding to the variables of the main path and a second value corresponding to the variables of the at least two sub-paths based on three conditions, and configuring the main path and the at least two sub-paths based on the identified first value and second value, wherein the three conditions include: a first condition, in which the reflection coefficient is 0 based on connecting the main path and the at least two sub-paths in parallel; a second condition, in which the transmission coefficient is 1 based on connecting the main path and the at least two sub-paths in parallel; and a third condition, in which the difference between a first phase vector and a second phase vector is a specified phase offset, the first phase vector being provided based on connecting the main path and a first sub-path of the at least two sub-paths, and the second phase vector being provided based on connecting the main path and a second sub-path of the at least two sub-paths.

[0169] The method according to the embodiments described in the present disclosure can be implemented in software, hardware, or a combination of hardware and software.

[0170] As for software, a computer-readable storage medium storing one or more programs (software modules) can be provided. The one or more programs stored in the computer-readable storage medium can be configured to be executed by one or more processors of an electronic device. The one or more programs can include instructions for controlling the electronic device to execute the method according to the embodiments described in the claims or the specification of the present disclosure.

[0171] Such a program (software module, software) can be stored in a random access memory, a non-volatile memory (including flash memory), a read-only memory (ROM), an electrically erasable programmable ROM (EEPROM), a magnetic disk storage device, a compact disc (CD)-ROM, a digital versatile disc (DVD) or other optical storage device, and a cassette tape. It can be stored in a memory that combines some or all of these recording media. Multiple memories may be included.

[0172] The program can be stored in an attachable storage device that can be accessed via a communication network such as the Internet, an intranet, a local area network (LAN), a wide area network (WLAN), or a storage area network (SAN), or through a communication network that combines these networks. Such a storage device can access a device that implements an embodiment of the present disclosure through an external port. In addition, a storage device separated on the communication network can access a device that implements an embodiment of the present disclosure.

[0173] In various embodiments of the present disclosure, the elements included in the present disclosure are expressed in singular or plural forms. However, for ease of explanation, the singular or plural expression is appropriately selected according to the proposed situation. The present disclosure is not limited to a single element or multiple elements. An element expressed in the plural form can be configured as a single element, and an element expressed in the singular form can be configured as multiple elements.

[0174] Although the present disclosure has been illustrated and described with reference to various exemplary embodiments, it should be understood that the various embodiments are intended to illustrate rather than limit. Those of ordinary skill in the art will further understand that various changes can be made without departing from the true spirit and full scope of the present disclosure, including the appended claims and their equivalents.

Claims

1. An antenna device, comprising: An array antenna including sub - arrays; A power divider; And A reconfigurable phase shifter circuit, Wherein, the reconfigurable phase shifter circuit is configured to: Provide a first phase shift value based on a switch in a first state, and Provide a second phase shift value different from the first phase shift value based on the switch in a second state, Wherein, the reconfigurable phase shifter circuit includes: a first phase shifter circuit, the first phase shifter circuit includes a main path and at least two sub - paths, the at least two sub - paths include a first sub - path and a second sub - path connected in parallel, Wherein, the first phase shifter circuit is configured to connect the first sub - path to the main path in the first state and connect the second sub - path to the main path in the second state.

2. The antenna device according to claim 1, wherein, The reconfigurable phase shifter circuit is arranged after the port input and before the branches of the power divider.

3. The antenna device according to claim 1, wherein, The phase provided by the main path provides a fixed value, and The phases provided to the first sub - path and the second sub - path are symmetric based on the fixed value.

4. The antenna device according to claim 3, wherein The difference between the first phase shift vector and the second phase shift vector corresponds to the required phase offset, the first phase shift vector is provided by the parallel connection of the main path and the first sub - path in the first state, and the second phase shift vector is provided by the parallel connection of the main path and the second sub - path in the second state.

5. The antenna device according to claim 3, wherein, Based on the required phase offset, determine the phase value of at least one impedance of the main path, at least one first impedance phase value of the first sub - path, and at least one second impedance phase value of the second sub - path.

6. The antenna device according to claim 1, wherein, The first sub - path or the second sub - path includes at least one of a switch, a diode or a transistor.

7. The antenna device according to claim 1, wherein, Determine at least one impedance of the main path and at least one first impedance value of the first sub - path to achieve impedance matching, and Determine at least one impedance of the main path and at least one second impedance value of the second sub - path to achieve impedance matching.

8. The antenna device according to claim 1, wherein, The reconfigurable phase shifter circuit is further configured to provide a third phase shift value different from the first phase shift value and the second phase shift value in a third state.

9. A method for designing an antenna device, the antenna device includes a phase shifter circuit and a sub - array, in the phase shifter circuit, a main path and at least two sub - paths are connected in parallel, the method includes: Set variables of the main path; Set variables of the at least two sub - paths; Identify a first value corresponding to the variables of the main path and a second value corresponding to the variables of the at least two sub - paths based on three conditions; And Configure the main path and the at least two sub - paths based on the identified first value and second value, Wherein, the three conditions include: A first condition, wherein based on the parallel connection of the main path and the at least two sub - paths, the reflection coefficient is 0, A second condition, wherein based on the parallel connection of the main path and the at least two sub - paths, the transmission coefficient is 1, and A third condition, wherein a difference between a first phase vector and a second phase vector is a specified phase offset, the first phase vector being provided based on connecting the main path and a first sub-path of the at least two sub-paths, and the second phase vector being provided based on connecting the main path and a second sub-path of the at least two sub-paths.

Images