Interferometer direction finding method and system based on multi-core DSP

Abstract

The present invention discloses an interferometer direction-finding method and system based on a multi-core DSP. The method comprises: the DSP obtains a host computer instruction; if the instruction is real-time, the DSP configures a radio frequency module, the FPGA obtains an intermediate frequency signal and calculates the corresponding PDW data, the DSP uses an interferometer algorithm to find the direction of the PDW data, then sorts and saves the sorting results, integrates all sorting results of the scanned frequency band and sends them to the host computer; if the instruction is time-sharing, the FPGA configures a frequency synthesis unit of the radio frequency module, the FPGA obtains the intermediate frequency signal and calculates the corresponding PDW data, the DSP uses an interferometer algorithm to find the direction of the PDW data, then sorts and saves the sorting results, and sends the integrated sorting results to the host computer. This step is repeated until the DSP obtains the host computer instruction and parses the host computer instruction to obtain a stop command. The present invention has both real-time control direction-finding and time-sharing control direction-finding functions, and has high real-time performance.

Description

Technical Field

[0001] The present invention relates to the field of radar signal processing, and in particular to an interferometer direction-finding method and system based on a multi-core DSP. Background Art

[0002] Radar jamming and direction-finding systems generally have two working modes. One is real-time control direction-finding, that is, according to the direction-finding start and stop commands, the direction-finding of the external radar signal is continuously performed; the other is time-sharing control direction-finding, that is, under the control of external signals, the direction-finding system performs direction-finding in time. Time-sharing control direction-finding requires the direction-finding system to cooperate with the radar jamming system to quickly provide direction-finding results, determine the azimuth and pitch angle of the jamming target, and achieve effective interference of the radar jamming system, which has high real-time requirements.

[0003] Patent CN111308430A discloses a direction-finding and interference mitigation method and system based on an FPGA and multi-core DSP hardware architecture. This method utilizes multiple DSP cores for parallel computation during direction-finding, saving significant time and avoiding the interference caused by the existing multi-DSP architecture. However, this solution focuses on interference mitigation during direction-finding and does not implement time-sharing control during the process. Summary of the Invention

[0004] The technical problem to be solved by the present invention is: in response to the technical problems existing in the prior art, the present invention provides an interferometer direction finding method and system based on multi-core DSP, which has real-time control direction finding and time-sharing control direction finding functions.

[0005] In order to solve the above technical problems, the technical solution proposed by the present invention is:

[0006] An interferometer direction-finding method based on a multi-core DSP is applied to an interferometer direction-finding system. The interferometer direction-finding system includes a radio frequency module, an FPGA, and a DSP connected in sequence, wherein the FPGA and the DSP are respectively connected to a radio frequency module control terminal, the FPGA is connected to an antenna array, and the DSP is connected to a host computer. The method includes the following steps:

[0007] The DSP obtains the host computer instruction and parses the host computer instruction to obtain the instruction type;

[0008] If it is a real-time working instruction, the DSP parses the host computer instruction to obtain the scanning frequency band, and then selects the target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the RF module. The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data. The DSP uses the interferometer algorithm to find the direction of the PDW data, and then sorts and saves the sorting results. This step is repeated until the target frequency point in the scanning frequency band is selected. All sorting results are integrated and sent to the host computer, and then the process ends and exits.

[0009] If it is a time-sharing work instruction, the FPGA obtains the time-sharing control information of the external device and configures the local oscillator frequency of the frequency synthesizer unit in the RF module according to the frequency information in the time-sharing control information. The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data. The DSP uses the interferometer algorithm to find the direction of the PDW data, and then sorts it and integrates the sorting results and sends them to the host computer. This step is repeated until the DSP obtains the host computer instruction and parses the host computer instruction to obtain a stop command.

[0010] Furthermore, after parsing the host computer instruction to obtain the instruction type, the step of generating a calibration table is also included, specifically including: if it is a calibration instruction, the DSP parses the host computer instruction to obtain the scanning frequency band, and then selects the target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the RF module, the FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data, the DSP calibrates the PDW data and saves the corresponding calibration value to the calibration table, and repeats this step until the target frequency point is selected.

[0011] Furthermore, the specific steps of the DSP using the interferometer algorithm to find the direction of the PDW data include: the DSP obtains the PDW data, calculates the center frequency and measurement frequency of the PDW data, matches the center frequency and measurement frequency to a calibration table to obtain corresponding calibration values, calibrates the PDW data with the calibration values, performs deambiguation calculations on the calibrated PDW data to obtain the azimuth and elevation angles relative to the array surface of the antenna array, performs coordinate transformation on the azimuth and elevation angles to obtain the azimuth and elevation angles actually used as direction finding information.

[0012] Furthermore, the DSP includes core 0, core 1, and core 2. The DSP parses the host computer instruction to obtain a scanning frequency band, and then selects a target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the RF module. The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data. The DSP uses an interferometer algorithm to find the direction of the PDW data, and then sorts and saves the sorting results. This step is repeated until the target frequency point in the scanning frequency band is selected. All sorting results are integrated and sent to the host computer, including the following steps:

[0013] Core 0 selects an initial frequency point from the scanning frequency band as a target frequency point;

[0014] Core 0 configures the local oscillator frequency of the frequency synthesizer unit in the RF module according to the target frequency point, and then sends a data acquisition command to the FPGA;

[0015] The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data and sends it to core 1. Core 1 obtains the PDW data sent by the FPGA and sends it to core 2.

[0016] Core 2 uses an interferometer algorithm to perform direction finding calculations on the PDW data. After obtaining direction finding information, the direction finding information is added to the PDW data. The PDW data with added direction finding information is then subjected to frequency and angle clustering, followed by repetition frequency sorting, to obtain and save the sorting results.

[0017] Core 0 increases the target frequency by a preset step size as the new target frequency, executes the step of configuring the RF unit in the RF module according to the target frequency, until the target frequency exceeds the scanning frequency band, and then integrates all sorting results and sends them to the host computer.

[0018] Furthermore, the DSP includes core 0, core 1, and core 2. The FPGA obtains time-sharing control information from an external device and configures the local oscillator of the frequency synthesizer unit in the radio frequency module according to the frequency information in the time-sharing control information. The FPGA obtains the intermediate frequency signal from the radio frequency module and calculates the corresponding PDW data. The DSP uses an interferometer algorithm to find the direction of the PDW data, then sorts it and integrates the sorting results and sends them to the host computer. This step is repeated until the DSP obtains a host computer instruction. Parsing the host computer instruction to obtain a stop command includes the following steps:

[0019] Core 0 configures the receiver unit in the RF module to switch to a direct channel to receive RF signals, and then sends time-sharing control commands to the FPGA.

[0020] The FPGA obtains time-sharing control information from an external device, and configures the local oscillator frequency of the frequency synthesizer unit in the RF module according to the frequency information, then obtains the intermediate frequency signal from the RF module, calculates the corresponding PDW data, and sends it to core 1;

[0021] Core 1 obtains the PDW data sent by FPGA and sends it to core 2;

[0022] Core 2 uses an interferometer algorithm to perform direction finding calculations on the PDW data. After obtaining direction finding information, the direction finding information is added to the PDW data. After performing frequency and angle clustering on the PDW data with the added direction finding information, if the host computer instruction includes a repetition frequency sorting command, Core 2 performs repetition frequency sorting on the clustering results and calculates the radiation source characteristic parameters to obtain a sorting result. If the host computer instruction does not include a repetition frequency sorting command, Core 2 calculates the radiation source characteristic parameters on the clustering results to obtain a sorting result. Finally, the sorting results are integrated and sent to the host computer.

[0023] If core 0 receives the host computer instruction and parses it to obtain a stop command, it sends a stop command to the FPGA, and the FPGA configures the receiver unit in the RF module to switch to the self-test channel to stop receiving RF signals. Otherwise, the FPGA executes the step of obtaining the time-sharing control information of the external device.

[0024] The present invention also proposes an interferometer direction-finding system based on a multi-core DSP, comprising a radio frequency module, an FPGA, and a DSP connected in sequence, wherein the FPGA and the DSP are respectively connected to the radio frequency module control end, the FPGA is connected to an antenna array, and the DSP is connected to a host computer, wherein:

[0025] The radio frequency module is used to obtain radio frequency signals and convert them into intermediate frequency signals;

[0026] The DSP is used to obtain host computer instructions, parse the host computer instructions to obtain the instruction type, and if it is a real-time working instruction, parse the host computer instructions to obtain a scanning frequency band, and then select the target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the radio frequency module; it is also used to obtain the PDW data sent by the FPGA, use the interferometer algorithm to find the direction of the PDW data, and then sort and save the sorting results. This step is repeated until the target frequency point in the scanning frequency band is selected, and all sorting results are integrated and sent to the host computer;

[0027] The FPGA is used to obtain the intermediate frequency signal from the RF module and calculate the corresponding PDW data; it is also used to obtain the time-sharing control information of the external device when the instruction type is a time-sharing work instruction, and configure the local oscillator of the frequency synthesizer unit in the RF module according to the frequency information in the time-sharing control information.

[0028] Furthermore, the DSP is also used to parse the host computer instruction to obtain the scanning frequency band when the host computer instruction is a calibration instruction, and then select the target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the RF module, calibrate the PDW data and save the corresponding calibration value to the calibration table, and repeat this step until the target frequency point is selected.

[0029] Furthermore, the DSP is also used to obtain PDW data, calculate the center frequency and measurement frequency of the PDW data, match the center frequency and measurement frequency to a calibration table, obtain corresponding calibration values, calibrate the PDW data with the calibration values, perform deambiguation calculations on the calibrated PDW data, obtain the azimuth and elevation angles relative to the array surface of the antenna array, perform coordinate transformation on the azimuth and elevation angles, and obtain the azimuth and elevation angles actually used as direction finding information.

[0030] Furthermore, the DSP includes core 0, core 1, and core 2, and when the instruction type is a real-time working instruction:

[0031] The core 0 is used to select an initial frequency point from the scanning frequency band as the target frequency point, configure the local oscillator frequency of the frequency synthesizer unit in the radio frequency module according to the target frequency point, and then send a data acquisition command to the FPGA; the core 0 is also used to increase the target frequency point by a preset step size as the new target frequency point after the core 2 obtains the sorting result, until the target frequency point exceeds the scanning frequency band, and then integrate all the sorting results and send them to the host computer;

[0032] The core 1 is used to obtain the PDW data sent by the FPGA and send it to the core 2;

[0033] The core 2 is used to perform direction finding calculation on the PDW data using the interferometer algorithm. After obtaining the direction finding information, the direction finding information is added to the PDW data. Then, the PDW data with the added direction finding information is subjected to frequency and angle clustering, and then repetition frequency sorting is performed to obtain and save the sorting results.

[0034] Furthermore, the DSP includes core 0, core 1, and core 2, and when the instruction type is a time-sharing instruction:

[0035] The core 0 is used to configure the receiver unit in the RF module to switch to a through channel to receive RF signals, and then send a time-sharing control command to the FPGA;

[0036] The FPGA is used to obtain time-sharing control information from an external device, and configure the local oscillator frequency of the frequency synthesizer unit in the RF module according to the frequency information, and then obtain the intermediate frequency signal from the RF module and calculate the corresponding PDW data and send it to core 1;

[0037] The core 1 is used to obtain the PDW data sent by the FPGA and send it to the core 2;

[0038] The core 2 is used to perform direction finding calculation on the PDW data using an interferometer algorithm, and after obtaining direction finding information, add the direction finding information to the PDW data. After performing frequency and angle clustering on the PDW data with the added direction finding information, if the host computer instruction includes a repetition frequency sorting command, the core 2 performs repetition frequency sorting on the clustering result and calculates the radiation source characteristic parameters to obtain a sorting result. If the host computer instruction does not include a repetition frequency sorting command, the core 2 calculates the radiation source characteristic parameters on the clustering result to obtain a sorting result. Finally, the sorting results are integrated and sent to the host computer.

[0039] The core 0 is further configured to send a stop command to the FPGA when receiving an instruction from the host computer and parsing the stop command. The FPGA is further configured to configure the receiver unit in the RF module to switch to a self-test channel to stop receiving RF signals.

[0040] Compared with the prior art, the advantages of the present invention are:

[0041] The present invention has two functions: real-time control direction finding and time-sharing control direction finding. It also uses an interferometer algorithm to find the direction, which improves the direction finding accuracy, shortens the time for switching the frequency synthesizer local oscillator, and realizes rapid direction finding and sorting of radiation sources. DSP cores 0, 1, and 2 respectively execute different functions in parallel during the direction finding process and perform data pipeline processing, thereby improving real-time performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Figure 1 Schematic diagram of the interferometer direction-finding system framework according to an embodiment of the present invention.

[0043] Figure 2 Schematic diagram of the DSP multi-core structure of an embodiment of the present invention.

[0044] Figure 3 This is a flow chart of the interferometer direction finding method according to an embodiment of the present invention.

[0045] Figure 4 Schematic diagram of the calibration process according to an embodiment of the present invention.

[0046] Figure 5 This is a real-time workflow diagram of an embodiment of the present invention.

[0047] Figure 6 2 is a time-sharing workflow diagram of an embodiment of the present invention.

[0048] Figure 7 This is a flow chart of the interferometer algorithm direction finding calculation performed by core 2 in real-time and time-sharing operations according to an embodiment of the present invention. DETAILED DESCRIPTION

[0049] The present invention will be further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the scope of protection of the present invention is not limited thereby.

[0050] Interferometer direction finding is a system with many advantages. It uses the phase difference between signals received by direction-finding antennas at different locations in an array to calculate the signal's angle of incidence. Its direction-finding algorithm is relatively simple, computation time is short, and it can achieve highly accurate direction finding. Therefore, we considered applying the interferometer algorithm to a direction-finding system. This would significantly reduce the time required to switch frequency synthesizer local oscillators during time-sharing operation, enabling rapid direction finding and sorting of radiation sources.

[0051] Therefore, if Figure 1As shown, this embodiment proposes an interferometer direction-finding system based on a multi-core DSP with an FPGA+DSP hardware structure, including a radio frequency module, an FPGA, and a DSP connected in sequence. The FPGA and the DSP are respectively connected to the control end of the radio frequency module. The FPGA is connected to an antenna array. The DSP is connected to a host computer through a network interface. The radio frequency module includes a frequency synthesizer unit and a receiver unit. The frequency synthesizer unit is used to provide a local oscillator frequency. The receiver unit is used to convert the radio frequency signal into an intermediate frequency signal using the local oscillator frequency provided by the frequency synthesizer unit. The FPGA converts the intermediate frequency signal into a radar pulse sequence (PDW). The DSP uses an interferometer algorithm to find the direction of the PDW and then uses a sorting algorithm to sort it to obtain a sorting result, and reports the sorting result to the host computer.

[0052] like Figure 2 As shown, the DSP chip in this embodiment uses the TMS320C6678 multi-core processing chip launched by TI, which can design and allocate multi-core tasks. This embodiment uses a total of three cores in the TMS320C6678 processor: Core 0, Core 1, and Core 2. Core 0 mainly implements functions such as initialization of the underlying interface driver, network port communication with the host computer and result reporting, RF module logic control, and direction finding calibration. Core 1 uses SRIO to receive data transmitted from the FPGA to the PDW. Core 2 performs direction finding and sorting based on the PDW data received by Core 1, and feeds the calculation results back to Core 0. Therefore, PDW data processing is performed on Core 1, and direction finding and sorting calculations are performed on Core 2. This realizes the design of parallel processing of data reception and sorting calculations, improving the real-time performance of sorting calculations.

[0053] In this embodiment, the specific functions of core 0 are divided as follows:

[0054] Implement the initialization of the underlying interface driver;

[0055] Realize Ethernet communication with the host computer;

[0056] Realize direction finding phase calibration function;

[0057] Realize the distribution of direction finding working parameters and control of RF modules;

[0058] Realize the reporting of direction finding and sorting results.

[0059] In this embodiment, the specific functions of core 1 are divided as follows:

[0060] Receive SRIO interrupt sent by FPGA;

[0061] According to the set working cycle, PDW data is put into the cache;

[0062] Send inter-core interrupt IPC to core 2 for sorting calculation.

[0063] In this embodiment, the main task of core 2 is to perform direction finding and sorting based on the PDW data received by core 1, and to feed back the calculation results to core 0. The specific functions are as follows:

[0064] The PDW data is fed into the interferometer direction-finding algorithm to calculate the azimuth and elevation of each PDW.

[0065] Azimuth and elevation are added to PDW data as direction-finding information, and the PDW data with added direction-finding information is fed into a sorting algorithm.

[0066] Direction finding is divided into real-time and time-sharing direction finding modes, implementing different sorting and calculation processes. In time-sharing direction finding mode, the sorting algorithm calculation process can be configured by the host computer. Compared to real-time direction finding mode, the host computer can determine whether to skip the repetition sorting calculation in the sorting algorithm during the time-sharing direction finding mode, thereby accelerating the output of sorting results and improving the real-time performance of time-sharing direction finding mode.

[0067] Store the direction finding and sorting results in the cache and send the inter-core interrupt IPC to core 0.

[0068] By configuring the cores of the DSP chip accordingly, pipeline operations such as data uploading, radiation source data processing and sorting calculation are realized, so that the interferometer direction finding system of this embodiment has the advantages of strong real-time performance and parallel computing.

[0069] like Figure 3 As shown, by setting the operating mode on the host computer, the interferometer direction-finding system of this embodiment can perform calibration, real-time direction-finding, and time-sharing direction-finding. In real-time mode, a polling method is used to monitor radar signals within the operating frequency band, and the monitored radar signals are sorted and processed for direction-finding analysis. In time-sharing mode, the direction-finding system's operating time and frequency information are provided by an external device that implements ultra-wideband measurement. The FPGA receives the IO signals controlled by the external device in time-sharing mode and adjusts the device's operating state based on the IO signal information. In the direction-finding operating state, the FPGA controls the RF module's frequency synthesizer unit through IO to rapidly switch the local oscillator frequency, enabling monitoring of radar signals in the specified frequency band. When the direction-finding function is stopped, the FPGA switches the RF module's receiver unit to the self-test channel, stopping the direction-finding function and achieving time-sharing control.

[0070] According to the functional configuration of each part of the interferometer direction finding system based on the multi-core DSP of this embodiment, this embodiment proposes an interferometer direction finding method based on the multi-core DSP, which is applied to the interferometer direction finding system based on the multi-core DSP of the embodiment, and includes the following steps:

[0071] The DSP obtains the host computer instruction and parses the host computer instruction to obtain the instruction type;

[0072] If it is a real-time working instruction, the DSP parses the host computer instruction to obtain the scanning frequency band, and then selects the target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the RF module. The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data. The DSP uses the interferometer algorithm to find the direction of the PDW data, and then sorts and saves the sorting results. This step is repeated until the target frequency point in the scanning frequency band is selected. All sorting results are integrated and sent to the host computer, and then the process ends and exits.

[0073] If it is a time-sharing work instruction, the FPGA obtains the time-sharing control information of the external device and configures the local oscillator frequency of the frequency synthesizer unit in the RF module according to the frequency information in the time-sharing control information. The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data. The DSP uses the interferometer algorithm to find the direction of the PDW data, then sorts it and integrates the sorting results and sends them to the host computer. This step is repeated until the DSP obtains the host computer instruction and parses the host computer instruction to obtain a stop command.

[0074] If it is a calibration instruction, the DSP parses the host computer instruction to obtain the scanning frequency band, and then selects the target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the RF module. The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data. The DSP calibrates the PDW data and saves the corresponding calibration value to the calibration table. This step is repeated until the target frequency point is selected.

[0075] like Figure 4 As shown in the figure, during calibration, DSP Core 0 first controls the RF module and external signal source according to preset parameters. After a certain delay, it notifies the FPGA acquisition unit to collect IF signal data. The FPGA then calculates the PDW data packet and sends it to Core 0. Upon receiving the PDW data packet, Core 0 extracts the frequency and pulse width information from the packet and uses this information to determine if the calibration data is correct. If the data is correct, the phase difference data within the PDW frame is saved in the calibration table for that frequency. Core 0 then controls the RF module to switch to the next frequency. After all frequencies have been monitored, the calibration table is stored in the Flash memory for subsequent direction-finding calibration.

[0076] like Figure 5As shown, when working in real time, all frequency bands are traversed in a certain step by polling. The DSP chip configures the RF module according to the parameters set by the host computer. The RF module converts the RF signal into the corresponding intermediate frequency signal, and the FPGA transmits the generated PDW data frame to the DSP chip. The DSP chip performs direction finding, frequency and angle clustering, re-frequency sorting and result recognition on the PDW data packet. After scanning all frequency bands, the sorted data is integrated and reported to the host computer through the display and control network port, and the above process is repeated. The specific steps include:

[0077] Core 0 selects an initial frequency point from the scanning frequency band as a target frequency point;

[0078] Core 0 configures the local oscillator frequency of the frequency synthesizer unit in the RF module according to the target frequency point, and then sends a data acquisition command to the FPGA;

[0079] The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data and sends it to core 1. Core 1 obtains the PDW data sent by the FPGA and sends it to core 2.

[0080] Core 2 uses an interferometer algorithm to perform direction finding calculations on the PDW data. After obtaining direction finding information, the direction finding information is added to the PDW data. The PDW data with added direction finding information is then subjected to frequency and angle clustering, followed by repetition frequency sorting, to obtain and save the sorting results.

[0081] Core 0 increases the target frequency by a preset step size as the new target frequency, executes the step of configuring the RF unit in the RF module according to the target frequency, until the target frequency exceeds the scanning frequency band, and then integrates all sorting results and sends them to the host computer.

[0082] like Figure 6 As shown, when performing time-sharing work, the FPGA obtains the current frequency information based on the IO control signal provided by the external ultra-wideband measurement device. The FPGA then quickly switches the local oscillator frequency of the intermediate frequency synthesis unit of the RF module through GPIO. The receiver unit of the RF module uses this local oscillator frequency to convert the RF signal into the corresponding intermediate frequency signal. The FPGA collects the intermediate frequency signal and sends it to the algorithm to generate the PDW data frame, which is then transmitted to the DSP chip. The DSP chip performs interferometer direction finding, frequency and angle clustering, and re-frequency sorting radiation source identification on the PDW data packet in sequence to obtain the sorting results. The sorted results are integrated and reported to the host computer through the display and control network port. The specific steps include:

[0083] Core 0 configures the receiver unit in the RF module to switch to a direct channel to receive RF signals, and then sends time-sharing control commands to the FPGA.

[0084] The FPGA obtains time-sharing control information from an external device, and configures the local oscillator frequency of the frequency synthesizer unit in the RF module according to the frequency information, then obtains the intermediate frequency signal from the RF module, calculates the corresponding PDW data, and sends it to core 1;

[0085] Core 1 obtains the PDW data sent by FPGA and sends it to core 2;

[0086] Core 2 uses an interferometer algorithm to perform direction finding calculations on the PDW data. After obtaining direction finding information, the direction finding information is added to the PDW data. After performing frequency and angle clustering on the PDW data with the added direction finding information, if the host computer instruction includes a repetition frequency sorting command, Core 2 performs repetition frequency sorting on the clustering results and calculates the radiation source characteristic parameters to obtain a sorting result. If the host computer instruction does not include a repetition frequency sorting command, Core 2 calculates the radiation source characteristic parameters on the clustering results to obtain a sorting result. Finally, the sorting results are integrated and sent to the host computer.

[0087] If core 0 receives the host computer instruction and parses it to obtain a stop command, it sends a stop command to the FPGA, and the FPGA configures the RF unit in the RF module to switch to the self-test channel to stop receiving RF signals. Otherwise, the FPGA executes the step of obtaining the time-sharing control information of the external device.

[0088] like Figure 7 As shown, during the processing of real-time work instructions and time-sharing work instructions, the DSP uses an interferometer algorithm to find the direction of the PDW data. Specifically, the DSP obtains PDW data, calculates the center frequency and measurement frequency of the PDW data, matches the center frequency and measurement frequency to a calibration table, obtains corresponding calibration values, and calibrates the PDW data using the calibration values. In this embodiment, the calibration values are phase calibration values, and the calibration method is specifically to subtract the phase calibration value from the original PDW measurement channel phase value. For the calibrated PDW data, the phase subtraction value is deambiguated three times to obtain the azimuth and elevation angles relative to the array face of the antenna array. The azimuth and elevation angles are transformed into coordinates to obtain the azimuth and elevation angles actually used as direction finding information.

[0089] The above description is merely a preferred embodiment of the present invention and does not constitute any form of limitation to the present invention. Although the present invention has been disclosed above with reference to the preferred embodiment, it is not intended to limit the present invention. Therefore, any simple modifications, equivalent variations, and modifications to the above embodiment that do not depart from the technical solution of the present invention and are based on the technical essence of the present invention shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. An interferometer direction finding method based on multi-core DSP, characterized in that: The method is applied to an interferometer direction-finding system, which includes a radio frequency module, an FPGA, and a DSP connected in sequence, wherein the FPGA and the DSP are respectively connected to the radio frequency module control end, the FPGA is connected to an antenna array, and the DSP is connected to a host computer. The method includes the following steps: The DSP obtains the host computer instruction and parses the host computer instruction to obtain the instruction type; If it is a real-time working instruction, the DSP parses the host computer instruction to obtain the scanning frequency band, and then selects the target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the RF module. The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data. The DSP uses the interferometer algorithm to find the direction of the PDW data, and then sorts and saves the sorting results. This step is repeated until the target frequency point in the scanning frequency band is selected. All sorting results are integrated and sent to the host computer, and then the process ends and exits. If it is a time-sharing work instruction, the FPGA obtains the time-sharing control information of the external device and configures the local oscillator frequency of the frequency synthesizer unit in the RF module according to the frequency information in the time-sharing control information. The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data. The DSP uses the interferometer algorithm to find the direction of the PDW data, then sorts it and integrates the sorting results and sends them to the host computer. This step is repeated until the DSP obtains the host computer instruction and parses the host computer instruction to obtain a stop command. The specific steps of using the DSP to find the direction of the PDW data using the interferometer algorithm include: the DSP acquires the PDW data, calculates the center frequency and measurement frequency of the PDW data, matches the center frequency and measurement frequency to a calibration table to obtain corresponding calibration values, calibrates the PDW data using the calibration values, performs deambiguation calculations on the calibrated PDW data to obtain the azimuth and elevation angles relative to the array surface of the antenna array, and performs coordinate transformation on the azimuth and elevation angles to obtain the azimuth and elevation angles actually used as direction finding information.

2. The interferometer direction finding method based on multi-core DSP according to claim 1, characterized in that: After parsing the host computer instruction to obtain the instruction type, the step of generating a calibration table is also included, specifically including: if it is a calibration instruction, the DSP parses the host computer instruction to obtain a scanning frequency band, and then selects the target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the RF module, the FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data, the DSP calibrates the PDW data and saves the corresponding calibration value to the calibration table, and repeats this step until the target frequency point is selected.

3. The interferometer direction finding method based on multi-core DSP according to claim 1, characterized in that: The DSP includes core 0, core 1, and core 2. The DSP parses the host computer instruction to obtain a scanning frequency band, and then selects a target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the radio frequency module. The FPGA obtains the intermediate frequency signal from the radio frequency module and calculates the corresponding PDW data. The DSP uses an interferometer algorithm to find the direction of the PDW data, and then sorts and saves the sorting results. This step is repeated until the target frequency point in the scanning frequency band is selected. All sorting results are integrated and sent to the host computer, including the following steps: Core 0 selects an initial frequency point from the scanning frequency band as a target frequency point; Core 0 configures the local oscillator frequency of the frequency synthesizer unit in the RF module according to the target frequency point, and then sends a data acquisition command to the FPGA; The FPGA obtains the intermediate frequency signal from the RF module and calculates the corresponding PDW data and sends it to core 1. Core 1 obtains the PDW data sent by the FPGA and sends it to core 2. Core 2 uses an interferometer algorithm to perform direction finding calculations on the PDW data. After obtaining direction finding information, the direction finding information is added to the PDW data. The PDW data with added direction finding information is then subjected to frequency and angle clustering, followed by repetition frequency sorting, to obtain and save the sorting results. Core 0 increases the target frequency by a preset step size as the new target frequency, executes the step of configuring the RF unit in the RF module according to the target frequency, until the target frequency exceeds the scanning frequency band, and then integrates all sorting results and sends them to the host computer.

4. The interferometer direction finding method based on multi-core DSP according to claim 1, characterized in that: The DSP includes core 0, core 1, and core 2. The FPGA obtains time-sharing control information from an external device and configures the local oscillator of the frequency synthesizer unit in the radio frequency module according to the frequency information in the time-sharing control information. The FPGA obtains the intermediate frequency signal from the radio frequency module and calculates the corresponding PDW data. The DSP uses an interferometer algorithm to find the direction of the PDW data, then sorts it and integrates the sorting results and sends them to the host computer. This step is repeated until the DSP obtains a host computer instruction. Parsing the host computer instruction to obtain a stop command includes the following steps: Core 0 configures the receiver unit in the RF module to switch to a direct channel to receive RF signals, and then sends time-sharing control commands to the FPGA. The FPGA obtains time-sharing control information from an external device, and configures the local oscillator frequency of the frequency synthesizer unit in the RF module according to the frequency information, then obtains the intermediate frequency signal from the RF module, calculates the corresponding PDW data, and sends it to core 1; Core 1 obtains the PDW data sent by FPGA and sends it to core 2; Core 2 uses an interferometer algorithm to perform direction finding calculations on the PDW data. After obtaining direction finding information, the direction finding information is added to the PDW data. After performing frequency and angle clustering on the PDW data with the added direction finding information, if the host computer instruction includes a repetition frequency sorting command, Core 2 performs repetition frequency sorting on the clustering results and calculates the radiation source characteristic parameters to obtain a sorting result. If the host computer instruction does not include a repetition frequency sorting command, Core 2 calculates the radiation source characteristic parameters on the clustering results to obtain a sorting result. Finally, the sorting results are integrated and sent to the host computer. If core 0 receives the host computer instruction and parses it to obtain a stop command, it sends a stop command to the FPGA. The FPGA configures the receiver unit in the RF module to switch to the self-test channel to stop receiving RF signals. Otherwise, the FPGA executes the step of obtaining time-sharing control information of the external device.

5. An interferometer direction finding system based on multi-core DSP, characterized in that: It includes a radio frequency module, an FPGA, and a DSP connected in sequence, and the FPGA and DSP are respectively connected to the radio frequency module control end, the FPGA is connected to the antenna array, and the DSP is connected to the host computer, wherein: The radio frequency module is used to obtain radio frequency signals and convert them into intermediate frequency signals; The DSP is used to obtain host computer instructions, parse the host computer instructions to obtain the instruction type, and if it is a real-time working instruction, parse the host computer instructions to obtain a scanning frequency band, and then select the target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the radio frequency module; it is also used to obtain the PDW data sent by the FPGA, use the interferometer algorithm to find the direction of the PDW data, and then sort and save the sorting results. This step is repeated until the target frequency point in the scanning frequency band is selected, and all sorting results are integrated and sent to the host computer; The FPGA is used to obtain the intermediate frequency signal from the radio frequency module and calculate the corresponding PDW data; it is also used to obtain the time-sharing control information of the external device when the instruction type is a time-sharing work instruction, and configure the local oscillator of the frequency synthesizer unit in the radio frequency module according to the frequency information in the time-sharing control information; The specific steps of using the DSP to find the direction of the PDW data using the interferometer algorithm include: the DSP acquires the PDW data, calculates the center frequency and measurement frequency of the PDW data, matches the center frequency and measurement frequency to a calibration table to obtain corresponding calibration values, calibrates the PDW data using the calibration values, performs deambiguation calculations on the calibrated PDW data to obtain the azimuth and elevation angles relative to the array surface of the antenna array, and performs coordinate transformation on the azimuth and elevation angles to obtain the azimuth and elevation angles actually used as direction finding information.

6. The multi-core DSP-based interferometer direction-finding system according to claim 5, characterized in that: The DSP is also used to parse the host computer instruction for a calibration instruction to obtain a scanning frequency band, then select a target frequency point in the scanning frequency band to configure the local oscillator frequency of the frequency synthesizer unit in the RF module, calibrate the PDW data and save the corresponding calibration value in the calibration table, and repeat this step until the target frequency point is selected.

7. The multi-core DSP-based interferometer direction-finding system according to claim 5, characterized in that: The DSP includes core 0, core 1, and core 2. When the instruction type is a real-time working instruction: The core 0 is used to select an initial frequency point from the scanning frequency band as the target frequency point, configure the local oscillator frequency of the frequency synthesizer unit in the radio frequency module according to the target frequency point, and then send a data acquisition command to the FPGA; the core 0 is also used to increase the target frequency point by a preset step size as the new target frequency point after the core 2 obtains the sorting result, until the target frequency point exceeds the scanning frequency band, and then integrate all the sorting results and send them to the host computer; The core 1 is used to obtain the PDW data sent by the FPGA and send it to the core 2; The core 2 is used to perform direction finding calculation on the PDW data using the interferometer algorithm. After obtaining the direction finding information, the direction finding information is added to the PDW data. Then, the PDW data with the added direction finding information is subjected to frequency and angle clustering, and then repetition frequency sorting is performed to obtain and save the sorting results.

8. The multi-core DSP-based interferometer direction-finding system according to claim 5, characterized in that: The DSP includes core 0, core 1 and core 2, and the instruction type is a time-sharing instruction: The core 0 is used to configure the receiver unit in the RF module to switch to a through channel to receive RF signals, and then send a time-sharing control command to the FPGA; The FPGA is used to obtain time-sharing control information from an external device, and configure the local oscillator frequency of the frequency synthesizer unit in the RF module according to the frequency information, and then obtain the intermediate frequency signal from the RF module and calculate the corresponding PDW data and send it to core 1; The core 1 is used to obtain the PDW data sent by the FPGA and send it to the core 2; The core 2 is used to perform direction finding calculation on the PDW data using an interferometer algorithm, and after obtaining direction finding information, add the direction finding information to the PDW data. After performing frequency and angle clustering on the PDW data with the added direction finding information, if the host computer instruction includes a repetition frequency sorting command, the core 2 performs repetition frequency sorting on the clustering result and calculates the radiation source characteristic parameters to obtain a sorting result. If the host computer instruction does not include a repetition frequency sorting command, the core 2 calculates the radiation source characteristic parameters on the clustering result to obtain a sorting result. Finally, the sorting results are integrated and sent to the host computer. The core 0 is further configured to send a stop command to the FPGA when receiving an instruction from the host computer and parsing the stop command. The FPGA is further configured to configure the receiver unit in the RF module to switch to a self-test channel to stop receiving RF signals.

Images