Method for determining ac system harmonic impedance considering multi-dc feed-in influence

Abstract

The application relates to the technical field of electric power, and provides an alternating current system harmonic impedance determination method, device, computer equipment, storage medium and computer program product considering the influence of multiple direct current feed-ins. The application can improve the accuracy and efficiency of determining the harmonic impedance. The method comprises the following steps: in response to a to-be-faulted setting bus selection instruction, determining a to-be-faulted setting bus from an alternating current-direct current power grid system; in the case that the to-be-faulted setting bus is set with a simulation fault and the alternating current-direct current power grid system is simulated to run, obtaining the lowest positive sequence voltage amplitude of each preset bus during the fault period of the to-be-faulted setting bus, corresponding to the fault residual voltage of the direct current site of each preset bus; determining the first impedance of the direct current site with the fault residual voltage less than a first threshold value and determining the second impedance of the direct current site with the fault residual voltage greater than the first threshold value and less than a second threshold value; and determining the harmonic impedance of the alternating current system according to the first impedance, the second impedance and a node harmonic admittance matrix.

Description

Technical Field

[0001] This application relates to the field of power technology, and in particular to a method, apparatus, computer equipment, storage medium, and computer program product for determining the harmonic impedance of an AC system considering the influence of multiple DC feeds. Background Technology

[0002] With the development of power technology, in order to optimize resource allocation, improve the utilization of clean energy, and meet the urgent needs of energy conservation and emission reduction, long-distance, large-capacity high-voltage direct current transmission technology has been vigorously developed. The power system exhibits the significant characteristics of AC and DC grid hybridization and large-scale cross-regional power transmission, and the complexity and operational difficulty of the power grid have been significantly increased.

[0003] With the large-scale integration of power electronic devices into the system, including renewable energy sources such as wind and solar power on the power generation side, a large number of conventional and flexible DC transmission lines on the transmission network side, and various power electronic loads on the load side, the harmonic characteristics of AC / DC systems are becoming increasingly complex. The frequency of grid harmonics has gradually shifted from being dominated by low-frequency harmonics and having a high content of specific subharmonics to a wide frequency range, profoundly changing the operating characteristics of the power grid. The harmonic problems faced in the safe and stable operation of the power grid have shifted from primarily addressing power quality issues caused by excessive harmonics on the low-voltage side to addressing the problem of excessive harmonic currents and even resonance amplification on both high- and low-voltage sides. Currently, the occurrence of large harmonic currents in AC power grids is commonplace. With changes in operating modes and the operating modes of nearby conventional DC lines, it is easy for harmonic voltages at flexible DC sites to exceed limits, which will affect the reliability and adaptability of power grid equipment. Therefore, it is necessary to study how to accurately obtain the harmonic impedance of AC / DC hybrid power grids to verify the extent of harmonic exceedances.

[0004] Traditional techniques typically treat DC as a harmonic current circuit without considering its influence, and only calculate the harmonic impedance of the AC system. However, the accuracy of determining harmonic impedance using this technique is relatively low. Summary of the Invention

[0005] Therefore, it is necessary to provide a method, apparatus, computer equipment, computer-readable storage medium, and computer program product for determining the harmonic impedance of an AC system that takes into account the influence of multiple DC feeds, in order to address the above-mentioned technical problems.

[0006] Firstly, this application provides a method for determining the harmonic impedance of an AC system considering the effects of multiple DC feeds. The method includes:

[0007] In response to the instruction to select the bus to be set for fault in the AC / DC power grid system, the bus to be set for fault is determined from the AC / DC power grid system;

[0008] When a simulated fault is set on the bus to be faulted and the AC / DC power grid system is simulated, the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system is obtained during the fault period of the bus to be faulted, which is used as the fault residual voltage of the DC station of each preset bus.

[0009] Determine the first impedance of the DC station whose fault residual voltage is less than the first threshold, and determine the second impedance of the DC station whose fault residual voltage is greater than the first threshold and less than the second threshold.

[0010] The harmonic impedance of the AC system is determined based on the first impedance, the second impedance, and the node harmonic admittance matrix; the node harmonic admittance matrix is ​​obtained based on the impedance and connection relationship of the components in the AC system of the AC / DC power grid system.

[0011] In one embodiment, each preset busbar includes each conventional busbar and each flexible busbar; the conventional busbar is an AC busbar connected to a conventional DC system; the flexible busbar is an AC busbar connected to a flexible DC system.

[0012] When simulating a fault on the bus to be faulted and running the AC / DC power grid system, the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system is obtained during the fault period of the bus to be faulted, corresponding to the fault residual voltage of the DC substation of each preset bus, including:

[0013] When a simulated fault is set on the bus to be faulted and the AC / DC power grid system is simulated, the lowest positive sequence voltage amplitude of each conventional bus and each flexible bus in the AC / DC power grid system is obtained during the fault period of the bus to be faulted, which corresponds to the fault residual voltage of each conventional bus and each flexible bus DC station.

[0014] In one embodiment, determining the first impedance of a DC station whose corresponding fault residual voltage is less than a first threshold, and determining the second impedance of a DC station whose corresponding fault residual voltage is greater than the first threshold and less than a second threshold, includes:

[0015] The first impedance is the impedance of the first conventional type and the impedance of the second conventional type of the DC station of the conventional bus whose fault residual voltage is less than the first threshold, and the flexible impedance of the DC station of the flexible bus whose fault residual voltage is less than the first threshold.

[0016] The impedance of the second conventional type of DC station of the conventional bus whose corresponding fault residual voltage is greater than the first threshold and less than the second threshold is used as the second impedance.

[0017] In one embodiment, determining the impedance of a first conventional type and the impedance of a second conventional type for a DC station of a conventional bus whose corresponding fault residual voltage is less than a first threshold, determining the flexible impedance of a DC station of a flexible bus whose corresponding fault residual voltage is less than the first threshold, and determining the impedance of a second conventional type for a DC station of a conventional bus whose corresponding fault residual voltage is greater than the first threshold and less than the second threshold, includes:

[0018] Using conventional DC models and test signal methods, the impedance of the first conventional type and the impedance of the second conventional type of DC station for conventional buses with fault residual voltage less than the first threshold are determined. Using flexible DC models and test signal methods, the flexible impedance of the DC station for flexible buses with fault residual voltage less than the first threshold is determined. Using conventional DC models and test signal methods, the impedance of the second conventional type of DC station for conventional buses with fault residual voltage greater than the first threshold and less than the second threshold is determined.

[0019] In one embodiment, determining the harmonic impedance of the AC system based on the first impedance, the second impedance, and the nodal harmonic admittance matrix includes:

[0020] Based on the row number of the preset bus corresponding to the DC station in the node harmonic admittance matrix, the admittances corresponding to the first impedance and the second impedance are accumulated to the diagonal position of the corresponding row in the node harmonic admittance matrix to obtain the processed node harmonic admittance matrix.

[0021] The inverse matrix of the processed nodal harmonic admittance matrix is ​​obtained by using the Gaussian elimination method. Based on the diagonal elements in the inverse matrix, the harmonic impedance of the AC system is determined.

[0022] In one embodiment, the method further includes:

[0023] Obtain the harmonic impedance calculation frequency and the fundamental frequency impedance parameters of the components;

[0024] The harmonic admittance matrix of a node is obtained by calculating the frequency, fundamental frequency impedance parameters, and the admittance and connection relationship of the components based on the harmonic impedance; the admittance of a component is obtained based on the impedance of the component.

[0025] Secondly, this application also provides a device for determining the harmonic impedance of an AC system considering the effects of multiple DC feeds. The device includes:

[0026] The bus determination module is used to determine the bus to be set for fault from the AC / DC power grid system in response to a bus selection command for setting a bus to be faulted in the AC / DC power grid system.

[0027] The fault residual voltage module is used to obtain the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system during the fault period of the bus to be faulted, when a simulated fault is set on the bus to be faulted and the AC / DC power grid system is simulated, and the corresponding value is used as the fault residual voltage of the DC station of each preset bus.

[0028] The impedance determination module is used to determine the first impedance of a DC station whose fault residual voltage is less than a first threshold, and to determine the second impedance of a DC station whose fault residual voltage is greater than the first threshold and less than a second threshold.

[0029] The harmonic impedance determination module is used to determine the harmonic impedance of the AC system based on the first impedance, the second impedance, and the node harmonic admittance matrix; the node harmonic admittance matrix is ​​obtained based on the impedance and connection relationship of the components in the AC system of the AC / DC power grid system.

[0030] Thirdly, this application also provides a computer device. The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to perform the following steps:

[0031] In response to the command to select a fault-setting bus in the AC / DC power grid system, the fault-setting bus is determined from the AC / DC power grid system. With a simulated fault set on the fault-setting bus and the AC / DC power grid system simulated, the lowest positive-sequence voltage amplitude of each preset bus in the AC / DC power grid system is obtained during the fault period of the fault-setting bus, corresponding to the fault residual voltage of the DC station of each preset bus. The first impedance of the DC station with a fault residual voltage less than a first threshold and the second impedance of the DC station with a fault residual voltage greater than the first threshold and less than a second threshold are determined. The harmonic impedance of the AC system is determined based on the first impedance, the second impedance, and the node harmonic admittance matrix. The node harmonic admittance matrix is ​​obtained based on the impedance and connection relationship of the components in the AC system of the AC / DC power grid system.

[0032] Fourthly, this application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, performs the following steps:

[0033] In response to the command to select a fault-setting bus in the AC / DC power grid system, the fault-setting bus is determined from the AC / DC power grid system. With a simulated fault set on the fault-setting bus and the AC / DC power grid system simulated, the lowest positive-sequence voltage amplitude of each preset bus in the AC / DC power grid system is obtained during the fault period of the fault-setting bus, corresponding to the fault residual voltage of the DC station of each preset bus. The first impedance of the DC station with a fault residual voltage less than a first threshold and the second impedance of the DC station with a fault residual voltage greater than the first threshold and less than a second threshold are determined. The harmonic impedance of the AC system is determined based on the first impedance, the second impedance, and the node harmonic admittance matrix. The node harmonic admittance matrix is ​​obtained based on the impedance and connection relationship of the components in the AC system of the AC / DC power grid system.

[0034] Fifthly, this application also provides a computer program product. The computer program product includes a computer program that, when executed by a processor, performs the following steps:

[0035] In response to the command to select a fault-setting bus in the AC / DC power grid system, the fault-setting bus is determined from the AC / DC power grid system. With a simulated fault set on the fault-setting bus and the AC / DC power grid system simulated, the lowest positive-sequence voltage amplitude of each preset bus in the AC / DC power grid system is obtained during the fault period of the fault-setting bus, corresponding to the fault residual voltage of the DC station of each preset bus. The first impedance of the DC station with a fault residual voltage less than a first threshold and the second impedance of the DC station with a fault residual voltage greater than the first threshold and less than a second threshold are determined. The harmonic impedance of the AC system is determined based on the first impedance, the second impedance, and the node harmonic admittance matrix. The node harmonic admittance matrix is ​​obtained based on the impedance and connection relationship of the components in the AC system of the AC / DC power grid system.

[0036] The aforementioned method, apparatus, computer equipment, storage medium, and computer program product for determining harmonic impedance of an AC system considering the influence of multiple DC feeds, in response to a command to select a fault-prone bus in an AC / DC power grid system, determines a fault-prone bus from the AC / DC power grid system. While simulating a fault on the fault-prone bus and simulating the operation of the AC / DC power grid system, it obtains the lowest positive-sequence voltage amplitude of each preset bus in the AC / DC power grid system during the fault period of the fault-prone bus. Correspondingly, it determines the fault residual voltage of the DC station corresponding to each preset bus, determines the first impedance of the DC station whose fault residual voltage is less than a first threshold, and determines the second impedance of the DC station whose fault residual voltage is greater than the first threshold but less than a second threshold. Based on the first impedance, the second impedance, and the node harmonic admittance matrix, it determines the harmonic impedance of the AC system. The node harmonic admittance matrix is ​​obtained based on the impedance and connection relationships of the components in the AC system within the AC / DC power grid system. This scheme acquires AC / DC power grid system data, including electromechanical data and the connection relationships between AC and DC systems. Responding to a fault-setting bus selection command for the AC / DC power grid system, it determines the fault-setting bus from the AC / DC power grid system, sets a simulated fault on the fault-setting bus, and simulates the AC / DC power grid system. During the fault period of the fault-setting bus, it acquires the lowest positive-sequence voltage amplitude of each preset bus in the AC / DC power grid system, corresponding to the residual fault voltage of the DC stations connected to each preset bus. It then determines the first impedance of DC stations with residual fault voltage less than a first threshold, and the second impedance of DC stations with residual fault voltage greater than the first threshold but less than a second threshold. Based on the impedance and connection relationships of components in the AC system of the AC / DC power grid system, it obtains the node harmonic admittance matrix. Based on the first impedance, the second impedance, and the node harmonic admittance matrix, it determines the harmonic impedance of the AC system, thereby improving the accuracy and efficiency of harmonic impedance determination. Attached Figure Description

[0037] Figure 1 This is a flowchart illustrating a method for determining the harmonic impedance of an AC system that considers the effects of multiple DC feeds in one embodiment.

[0038] Figure 2 This is a flowchart illustrating the impedance determination step in one embodiment;

[0039] Figure 3 This is a schematic diagram of a hyperbolic function-corrected PI model for an AC line in another embodiment;

[0040] Figure 4 This is a block diagram of an AC system harmonic impedance determination device that considers the effects of multiple DC feeds in one embodiment.

[0041] Figure 5This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0043] In one embodiment, such as Figure 1 As shown, a method for determining the harmonic impedance of an AC system considering the influence of multiple DC feeds is provided. This embodiment illustrates the application of this method to a terminal or server, and includes the following steps:

[0044] Step S101: In response to the instruction for selecting the bus to be set for fault in the AC / DC power grid system, determine the bus to be set for fault in the AC / DC power grid system.

[0045] In this step, the AC / DC power grid system includes both AC and DC systems; the bus to be set for fault can be a calculation bus, because harmonic impedance calculation is to calculate the equivalent impedance to ground of a certain bus, so a calculation bus needs to be set; the command to select the bus to be set for fault can be a command generated by the user triggering or clicking on a certain bus.

[0046] Specifically, the system acquires the electromechanical data of the AC / DC power grid to be calculated. This electromechanical data may include all electromechanical data in the AC / DC power grid system and the connection relationships between multiple AC systems and multiple DC systems in the AC / DC power grid system. It may also include the fundamental frequency impedance parameters of the four types of components (generators, transformers, AC lines, and loads) in the AC system (AC power grid), the harmonic models of each component, and the network topology connection relationships (which may be the connection relationships between components). The system receives and responds to the bus selection command for the AC / DC power grid system to be set for fault, and selects one bus from multiple buses in the AC / DC power grid system as the bus to be set for fault.

[0047] For example, the electromechanical data of the AC / DC power grid to be calculated can be loaded into simulation software (the simulation software can be power system analysis software BPA). (The AC / DC power grid electromechanical data can be power grid mode data, including power flow data and stability data. The power flow data can be a *.dat power flow file, and the stability data can be a *.swi stability file.) The harmonic impedance calculation frequency f can be set according to the required harmonic impedance calculation frequency. cal In response to the fault-prone bus selection command for AC / DC power grid systems, the harmonic impedance calculation bus is set.

[0048] Step S102: When setting a simulated fault on the bus to be faulted and performing a simulated operation on the AC / DC power grid system, obtain the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system during the fault period of the bus to be faulted, and use it as the fault residual voltage of the DC station of each preset bus.

[0049] In this step, such as Figure 2 As shown, the simulated fault can be a metallic three-phase short-circuit fault; the DC station of the preset bus can be a DC station connected to the preset bus, and the DC station can be a point where the DC system is located, connected to a certain AC bus; the preset bus can be a conventional bus or a flexible bus. The conventional bus is an AC bus connected to the conventional DC system, and can be a bus that connects both the conventional DC system and the AC system at the same time, and can be named a conventional DC-AC converter bus. The flexible bus is an AC bus connected to the flexible DC system, and can be a bus that connects both the flexible DC system and the AC system at the same time, and can be named a flexible DC-AC converter bus.

[0050] Specifically, a simulated fault is set for the bus to be faulted, and the AC / DC power grid system is simulated to obtain the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system during the fault period of the bus to be faulted. The lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system is used as the fault residual voltage of the DC station of each preset bus.

[0051] Exemplarily, simulation software can be used to automatically number the conventional DC-AC conversion buses (conventional buses, which are AC buses connected to conventional DC systems and can be buses that connect both conventional DC systems and AC systems) and flexible DC-AC conversion buses (flexible buses, which are AC buses connected to flexible DC systems and can be buses that connect both flexible DC systems and AC systems) in the electromechanical data of AC-DC power grids, such as denoted as 1, 2, ……, n. The electrical distance of each DC station from the harmonic impedance calculation bus is measured using the lowest positive-sequence voltage amplitude during the fault period (a short-circuit fault is carried out to measure the electrical distance according to the proposed method). For example, assuming the fault point is bus A and there are other buses B, C, and D around, the lower the voltage of bus B, C, or D during the fault, the closer the electrical distance of this bus to the fault point is considered. The voltage drop method is proposed. The specific implementation method can be as follows: Based on electromechanical simulation software, such as BPA (Power System Analysis Software) or PSASP (Power System Analysis Synthesis Program), first open the electromechanical data of the AC-DC power grid. Set a metallic three-phase short-circuit fault at the harmonic impedance calculation bus (i.e., the bus where the fault is to be set. For example, an AC bus may be connected to a conventional DC system or a flexible DC system, which are two types of DC systems. The harmonic impedance calculation bus is a certain AC bus that needs to be calculated. Considering the influence of the DC system when calculating the harmonic impedance can obtain a more accurate harmonic impedance result) and simulate. The fault duration can be set to 0.1 - 0.2 s. Statistically record the lowest positive-sequence voltage amplitudes of each conventional DC-AC conversion bus and each flexible DC-AC conversion bus during the fault, denoted as the fault residual voltage of the DC station, and the symbol can be set as U DC f1 , U DC f2 , ……, U DC fn .

[0052] Step S103, determine the first impedance of the DC stations whose corresponding fault residual voltages are less than the first threshold, and determine the second impedance of the DC stations whose corresponding fault residual voltages are greater than the first threshold and less than the second threshold.

[0053] In this step, as Figure 2 shown, the first threshold can be set as u1, where 0 < u1 < 1; the second threshold can be set as u2, where 0 < u2 < 1 and u1 < u2.

[0054] Specifically, as Figure 2As shown, users can set a first threshold and a second threshold, then filter out DC stations with fault residual voltage less than the first threshold from all DC stations, and determine the impedance of this first part of DC stations as the first impedance. Similarly, users can filter out DC stations with fault residual voltage greater than the first threshold and less than the second threshold from all DC stations, and determine the impedance of this second part of DC stations as the second impedance.

[0055] Step S104: Determine the harmonic impedance of the AC system based on the first impedance, the second impedance, and the nodal harmonic admittance matrix.

[0056] In this step, the nodal harmonic admittance matrix is ​​obtained based on the impedance and connection relationship of the components in the AC system of the AC / DC power grid system.

[0057] Specifically, the node harmonic admittance matrix is ​​obtained based on the impedance of the components (which can be of four types, including generators, transformers, AC lines, and loads in the AC / DC power grid) in the AC system and the connection relationship of the components. Based on the first impedance, the second impedance, and the node harmonic admittance matrix, the equivalent impedance to ground of the bus to be calculated can be obtained, which is used as the harmonic impedance of the AC system.

[0058] In the above-mentioned method for determining the harmonic impedance of an AC system considering the influence of multiple DC feeds, in response to the command for selecting the bus to be set for fault in the AC / DC power grid system, the bus to be set for fault is determined from the AC / DC power grid system. Simulated faults are set on the bus to be set for fault, and the AC / DC power grid system is simulated. During the fault period of the bus to be set for fault, the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system is obtained. Corresponding to the residual fault voltage of each preset bus's DC station, the first impedance of the DC station with a residual fault voltage less than a first threshold and the second impedance of the DC station with a residual fault voltage greater than the first threshold and less than a second threshold are determined. Based on the first impedance, the second impedance, and the node harmonic admittance matrix, the harmonic impedance of the AC system is determined. The node harmonic admittance matrix is ​​obtained based on the impedance and connection relationships of the components in the AC system within the AC / DC power grid system. This scheme acquires AC / DC power grid system data, including electromechanical data and the connection relationships between AC and DC systems. Responding to a fault-setting bus selection command for the AC / DC power grid system, it determines the fault-setting bus from the AC / DC power grid system, sets a simulated fault on the fault-setting bus, and simulates the AC / DC power grid system. During the fault period of the fault-setting bus, it obtains the lowest positive-sequence voltage amplitude of each preset bus in the AC / DC power grid system, the corresponding fault residual voltage of the DC stations connected to each preset bus, determines the first impedance of DC stations with fault residual voltage less than a first threshold, and determines the second impedance of DC stations with fault residual voltage greater than the first threshold and less than a second threshold. Based on the impedance and connection relationships of components in the AC system of the AC / DC power grid system, it obtains the node harmonic admittance matrix. Based on the first impedance, the second impedance, and the node harmonic admittance matrix, it determines the harmonic impedance of the AC system, thereby improving the accuracy and efficiency of harmonic impedance determination.

[0059] In one embodiment, step S102, which involves setting a simulated fault on the bus to be faulted and simulating the operation of the AC / DC power grid system, specifically includes obtaining the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system during the fault period of the bus to be faulted, and the corresponding residual voltage of the DC station of each preset bus.

[0060] In this embodiment, each preset busbar includes each conventional busbar and each flexible busbar; the conventional busbar is an AC busbar connected to a conventional DC system; the flexible busbar is an AC busbar connected to a flexible DC system.

[0061] Specifically, when a simulated fault is set on the bus to be faulted and the AC / DC power grid system is simulated, the lowest positive sequence voltage amplitude of each conventional bus and each flexible bus (i.e., each conventional DC-AC converter bus and each flexible DC-AC converter bus mentioned above) in the AC / DC power grid system during the fault period of the bus to be faulted is obtained, which corresponds to the fault residual voltage of each conventional bus and each flexible bus DC station.

[0062] The technical solution of this embodiment obtains the lowest positive sequence voltage amplitude of each conventional bus and each flexible bus in the AC / DC power grid system during the fault period of the bus to be faulted, and uses it as the fault residual voltage of each conventional bus and each flexible bus DC station, thereby obtaining the fault residual voltage of the DC station of the bus to be considered, which is beneficial to improving the accuracy of determining harmonic impedance in the future.

[0063] In one embodiment, the above method can also obtain the first impedance and the second impedance through the following steps, specifically including: taking the first conventional type impedance and the second conventional type impedance of the DC station of the conventional bus with the corresponding fault residual voltage less than the first threshold, and the flexible impedance of the DC station of the flexible bus with the corresponding fault residual voltage less than the first threshold, as the first impedance; taking the second conventional type impedance of the DC station of the conventional bus with the corresponding fault residual voltage greater than the first threshold and less than the second threshold as the second impedance.

[0064] In this embodiment, as Figure 2 As shown, the first conventional type of impedance can be the harmonic impedance (harmonic impedance characteristics) of a conventional DC (conventional DC system) converter transformer or converter; the second conventional type of impedance can be the harmonic impedance (harmonic impedance characteristics) of a conventional DC (conventional DC system) filter; and the flexible impedance can be the harmonic impedance (harmonic impedance characteristics) of a flexible DC (flexible DC system) converter transformer or converter.

[0065] Specifically, such as Figure 2 As shown, conventional buses with fault residual voltage less than a first threshold are selected from conventional buses, and the impedance of the first and second conventional types of DC stations of the selected conventional buses is determined. Similarly, flexible buses with fault residual voltage less than the first threshold are selected from flexible buses, and the flexible impedance of the DC stations of the selected flexible buses is determined. The first and second conventional types of impedances and the flexible impedance obtained above are used as the first impedance. Furthermore, conventional buses with fault residual voltage greater than the first threshold and less than the second threshold are selected from conventional buses, and the impedance of the second conventional type of DC stations of the selected conventional buses is determined as the second impedance.

[0066] For example, such as Figure 2As shown in the figure, considering the simplification with engineering thinking, the first threshold u1 (0 < u1 < 1) and the second threshold u2 (0 < u2 < 1) are set, and the residual voltages of each DC station fault are compared with the thresholds u1 and u2. ① When the residual voltage of the DC station fault is lower than u1 (when the residual voltage of the DC station fault is less than the first threshold), it indicates that the electrical distance of the DC station from the harmonic impedance calculation bus is very close, and the DC impedance characteristics need to be considered in detail (the DC system impedance needs to be considered in detail), that is: for the conventional DC (conventional DC bus / conventional DC system) connected to this DC station, the harmonic impedance characteristics of the converter transformer, converter, and filter of the conventional DC (conventional DC system) need to be considered in detail. For the flexible DC (flexible DC bus / flexible DC system) connected to this DC station, the harmonic impedance characteristics of the converter transformer and converter of the flexible DC (flexible DC system) need to be considered in detail, that is, the first conventional type of impedance, the second conventional type of impedance, and the flexible impedance to be considered are used as the first impedance. ② When the residual voltage of the DC station fault is between u1 and u2 (when the residual voltage of the DC station fault is greater than the first threshold and less than the second threshold), it indicates that the electrical distance is relatively close, and only the conventional DC filter is considered, that is: for the conventional DC (conventional DC bus / conventional DC system) connected to this DC station, the harmonic impedance characteristics of the converter transformer and converter of the conventional DC (conventional DC system) can be ignored, and only the harmonic impedance characteristics of the conventional DC (conventional DC system) filter are considered. For the flexible DC (flexible DC bus / flexible DC system) connected to this DC station, the harmonic impedance characteristics of the converter transformer and converter of the flexible DC (flexible DC system) are ignored, that is, the second conventional type of impedance to be considered is used as the second impedance. ③ When the residual voltage of the DC station fault is higher than u2, it indicates that the electrical distance is far, and the DC system impedance is ignored, that is, the conventional DC (conventional DC bus / conventional DC system) and flexible DC (flexible DC bus / flexible DC system) connected to this DC station are ignored.

[0067] The technical solution of this embodiment is beneficial to improving the accuracy and efficiency of subsequent determination of harmonic impedance by accurately obtaining the first impedance and the second impedance.

[0068] In one embodiment, the above method can also determine the impedance through the following steps, specifically including: using the conventional DC model and the test signal method to determine the first conventional type of impedance and the second conventional type of impedance of the DC station of the conventional bus corresponding to the fault residual voltage less than the first threshold, using the flexible DC model and the test signal method to determine the flexible impedance of the DC station of the flexible bus corresponding to the fault residual voltage less than the first threshold, and using the conventional DC model and the test signal method to determine the second conventional type of impedance of the DC station of the conventional bus corresponding to the fault residual voltage greater than the first threshold and less than the second threshold.

[0069] In this embodiment, the conventional DC model can be a conventional DC model built on electromagnetic simulation software (such as PSCAD, electromagnetic transient simulation software); the flexible DC model can be a flexible DC model built on simulation software (such as PSCAD, electromagnetic transient simulation software); the test signal method can be a method that treats the system under test as a black box system, injects a small signal harmonic source, measures the port voltage and current, and uses FFT (Fast Fourier Transform) to calculate the harmonic impedance.

[0070] Specifically, the calculation needs to consider the harmonic impedance of the DC system, including the harmonic impedance of conventional DC converter transformers and converters, the harmonic impedance of conventional DC filters, and the harmonic impedance of flexible DC converter transformers and converters. The method for obtaining these three types of harmonic impedance values ​​is as follows: based on the electromagnetic models (such as PSCAD models) of each conventional and flexible DC system, the test signal method is used to obtain these three types of harmonic impedance values. The harmonic impedance values ​​should include the calculated harmonic frequency f. cal The corresponding harmonic impedance.

[0071] The technical solution of this embodiment uses conventional DC models, flexible DC models, and test signal methods to obtain the first conventional type of impedance, the second conventional type of impedance, and the flexible impedance that need to be considered (determined) for the selected DC sites, thereby improving the accuracy and efficiency of subsequent determination of harmonic impedance.

[0072] In one embodiment, the above method can also obtain the node harmonic admittance matrix through the following steps, specifically including: obtaining the harmonic impedance calculation frequency and the fundamental frequency impedance parameter of the component; and obtaining the node harmonic admittance matrix based on the harmonic impedance calculation frequency, the fundamental frequency impedance parameter, and the admittance and connection relationship of the component.

[0073] In this embodiment, the admittance of the component is obtained based on the impedance of the component; the harmonic impedance calculation frequency can be the harmonic impedance calculation frequency of the bus to be faulted, which can be used to indicate which frequency of harmonic impedance needs to be calculated; the electromechanical data of the AC / DC power grid to be calculated can include the fundamental frequency impedance parameter, which can be the impedance parameter at 50Hz; the impedance can be the reciprocal of the admittance.

[0074] Specifically, before calculating the harmonic impedance of an AC system, it is necessary to determine the harmonic impedance models of each component of the AC power grid. The AC power grid mainly includes four types of components: generators, transformers, AC lines, and loads. The following model is used: Generator impedance Z G =R a +jhX d n (where R is in the formula) a X is the armature resistance. d n(where d is the d-axis transient reactance and h is the harmonic order), transformer impedance Z T =R T +jhX T (where R is in the formula) T For leakage resistance, X T For leakage inductance, the AC circuit adopts a hyperbolic function-corrected PI model that considers the distribution characteristics of line parameters. The hyperbolic function-corrected PI model (equivalent circuit) of the AC circuit is as follows: Figure 3 As shown, Figure 3 Formula for calculating intermediate parameters: Impedance of AC lines

[0075] Admittance of AC lines In the formula, Z(h) = (r1 + jhx1)l, Y(h) = jhx c l, r1 is the positive-sequence resistance per unit length, x1 is the positive-sequence inductive reactance per unit length, and x c The positive sequence capacitive reactance per unit length is given, where l is the line length. The load model is divided into constant power load and constant impedance load. The constant impedance load is used to simulate parallel admittance elements, while the constant power load is used for parallel admittance.

[0076] Parallel admittance of constant impedance load In the formula, P0 represents the active power of the load, Q0 represents the reactive power of the load (positive for inductive and negative for capacitive), and U represents the load voltage. The calculation of the nodal harmonic admittance matrix of the AC power grid can be based on the electromechanical data of the AC / DC power grid, obtaining the fundamental frequency impedance parameters of the above four types of components in the power grid, and according to the harmonic model of each component (i.e., the harmonic calculation model of the above four types of components) and the network topology connection relationship (including the connection relationship of the above components), the required harmonic frequency f is calculated. cal The following nodal harmonic admittance matrix is ​​formed row by row (using the nodal voltage method):

[0077]

[0078] The technical solution of this embodiment obtains the node harmonic admittance matrix by calculating the frequency, fundamental frequency impedance parameters, and the admittance and connection relationship of the components based on the harmonic impedance. This results in a more accurate node harmonic admittance matrix, which helps to improve the accuracy of subsequent determination of harmonic impedance.

[0079] In one embodiment, the step S104 above, which determines the harmonic impedance of the AC system based on the first impedance, the second impedance, and the node harmonic admittance matrix, specifically includes: according to the row number of the preset bus corresponding to the DC station in the node harmonic admittance matrix, accumulating the admittances corresponding to the first impedance and the second impedance to the diagonal position of the corresponding row in the node harmonic admittance matrix to obtain the processed node harmonic admittance matrix; using the Gaussian elimination method to obtain the inverse matrix of the processed node harmonic admittance matrix, and determining the harmonic impedance of the AC system based on each diagonal element in the inverse matrix.

[0080] Specifically, the corresponding harmonic frequency f will be calculated. cal The harmonic impedances Z1 of the conventional DC converter transformer and converter, Z2 of the conventional DC filter, and Z3 of the flexible DC converter transformer and converter need to be considered. Calculate the corresponding admittance values ​​using the following formula:

[0081]

[0082] Y1, Y2, and Y3 are used as parallel admittance elements. Based on the row number of the preset bus (conventional DC-AC converter bus or flexible DC-AC converter bus) corresponding to the DC station in the node admittance matrix, the admittance values ​​Y1, Y2, and Y3 are accumulated and added to the node admittance matrix Y of the AC system harmonic impedance scan. h The processed nodal harmonic admittance matrix is ​​obtained by finding the diagonal position of the corresponding row. The inverse matrix Z of the processed nodal harmonic admittance matrix is ​​then solved using Gaussian elimination. h Z h Each diagonal element of the matrix represents the node harmonic impedance value (harmonic impedance of the AC system). Alternatively, the harmonic impedance of the AC system can be determined based on the value of the bus to be faulted at the corresponding position in the inverse matrix, thus obtaining the harmonic impedance of the AC system considering the influence of multiple DC feeds.

[0083] The technical solution of this embodiment uses the harmonic impedance of the AC port of a conventional DC system, the harmonic impedance of the AC port of a flexible DC system, and the harmonic impedance of a conventional DC filter as parallel admittance elements, and injects them into the node admittance matrix Y of the AC system harmonic impedance scanning. h This allows the harmonic impedance scanning to take into account the influence of DC system connection, thereby calculating the harmonic impedance of AC / DC hybrid systems, which helps to improve the accuracy and efficiency of determining harmonic impedance.

[0084] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0085] Based on the same inventive concept, this application also provides an AC system harmonic impedance determination device considering the influence of multiple DC feeds for implementing the AC system harmonic impedance determination method considering the influence of multiple DC feeds described above. The solution provided by this device is similar to the solution described in the above method. Therefore, the specific limitations of one or more AC system harmonic impedance determination device embodiments considering the influence of multiple DC feeds provided below can be found in the limitations of the AC system harmonic impedance determination method considering the influence of multiple DC feeds described above, and will not be repeated here.

[0086] In one embodiment, such as Figure 4 As shown, an AC system harmonic impedance determination device considering the influence of multiple DC feeds is provided. The device 400 may include:

[0087] The bus determination module 401 is used to determine the bus to be set for fault from the AC / DC power grid system in response to the bus selection command for the AC / DC power grid system.

[0088] The fault residual voltage module 402 is used to obtain the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system during the fault period of the bus to be set up with a simulated fault and to simulate the operation of the AC / DC power grid system. The voltage residual voltage of each preset bus is used as the fault residual voltage of the DC station of each preset bus.

[0089] Impedance determination module 403 is used to determine the first impedance of a DC station whose fault residual voltage is less than a first threshold, and to determine the second impedance of a DC station whose fault residual voltage is greater than the first threshold and less than a second threshold.

[0090] The harmonic impedance determination module 404 is used to determine the harmonic impedance of the AC system based on the first impedance, the second impedance, and the node harmonic admittance matrix; the node harmonic admittance matrix is ​​obtained based on the impedance and connection relationship of the components in the AC system of the AC / DC power grid system.

[0091] In one embodiment, each preset bus includes each conventional bus and each flexible bus; the conventional bus is an AC bus connected to a conventional DC system; the flexible bus is an AC bus connected to a flexible DC system; the fault residual voltage module 402 is also used to obtain, during the fault period of the bus to be faulted, the lowest positive sequence voltage amplitude of each conventional bus and each flexible bus in the AC / DC power grid system, corresponding to the fault residual voltage of each conventional bus and each flexible bus at the DC station, when a simulated fault is set on the bus to be faulted and the AC / DC power grid system is simulated, and the fault residual voltage of each conventional bus and each flexible bus is used as the fault residual voltage of the DC station.

[0092] In one embodiment, the device 400 further includes: an impedance as a module, used to take the first conventional type impedance and the second conventional type impedance of the DC station of the conventional bus corresponding to the fault residual voltage less than the first threshold, and the flexible impedance of the DC station of the flexible bus corresponding to the fault residual voltage less than the first threshold as the first impedance; and to take the second conventional type impedance of the DC station of the conventional bus corresponding to the fault residual voltage greater than the first threshold and less than the second threshold as the second impedance.

[0093] In one embodiment, the impedance module is further configured to: use a conventional DC model and a test signal method to determine the first conventional type impedance and the second conventional type impedance of a DC station of a conventional bus whose fault residual voltage is less than the first threshold; use a flexible DC model and the test signal method to determine the flexible impedance of a DC station of a flexible bus whose fault residual voltage is less than the first threshold; and use the conventional DC model and the test signal method to determine the second conventional type impedance of a DC station of a conventional bus whose fault residual voltage is greater than the first threshold and less than the second threshold.

[0094] In one embodiment, the harmonic impedance determination module 404 is further configured to, based on the row number of the preset bus corresponding to the DC station in the node harmonic admittance matrix, accumulate the admittances corresponding to the first impedance and the second impedance to the diagonal position of the corresponding row in the node harmonic admittance matrix to obtain the processed node harmonic admittance matrix; obtain the inverse matrix of the processed node harmonic admittance matrix using the Gaussian elimination method; and determine the harmonic impedance of the AC system based on each diagonal element in the inverse matrix.

[0095] In one embodiment, the device 400 further includes: a matrix obtaining module, configured to obtain the harmonic impedance calculation frequency and the fundamental frequency impedance parameter of the element; obtain the node harmonic admittance matrix based on the harmonic impedance calculation frequency, the fundamental frequency impedance parameter, and the admittance and connection relationship of the element; the admittance of the element is obtained based on the impedance of the element.

[0096] The modules in the AC system harmonic impedance determination device considering the influence of multiple DC feeds described above can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of a computer device in software form, so that the processor can call and execute the corresponding operations of each module.

[0097] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 5 As shown, the computer device includes a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides the environment for the operation of the operating system and computer programs in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. The computer device also includes input / output interfaces, which are connection circuits for exchanging information between the processor and external devices. These interfaces are connected to the processor via a bus and are referred to as I / O interfaces. When the computer program is executed by the processor, it implements a method for determining the harmonic impedance of an AC system considering the effects of multiple DC feeds. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the computer device casing, or an external keyboard, touchpad, or mouse.

[0098] Those skilled in the art will understand that Figure 5 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0099] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0100] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.

[0101] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0102] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0103] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0104] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0105] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for determining the harmonic impedance of an AC system considering the influence of multiple DC feeds, characterized in that, The method includes: In response to a fault-setting bus selection command for an AC / DC power grid system, a fault-setting bus is determined from the AC / DC power grid system. When a simulated fault is set on the bus to be faulted and the AC / DC power grid system is simulated, the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system is obtained during the fault period of the bus to be faulted, and is used as the fault residual voltage of the DC station of each preset bus. Determining the first impedance of DC stations with fault residual voltage less than a first threshold, and determining the second impedance of DC stations with fault residual voltage greater than the first threshold and less than a second threshold, includes: The first impedance is the impedance of the first conventional type and the second conventional type of the DC station of the conventional bus whose fault residual voltage is less than the first threshold, and the flexible impedance of the DC station of the flexible bus whose fault residual voltage is less than the first threshold; the second impedance is the impedance of the second conventional type of the DC station of the conventional bus whose fault residual voltage is greater than the first threshold and less than the second threshold. Determining the harmonic impedance of the AC system based on the first impedance, the second impedance, and the node harmonic admittance matrix includes: accumulating the admittances corresponding to the first impedance and the second impedance to the diagonal position of the corresponding row in the node harmonic admittance matrix according to the row number of the preset bus corresponding to the DC station in the node harmonic admittance matrix, to obtain a processed node harmonic admittance matrix; obtaining the inverse matrix of the processed node harmonic admittance matrix using Gaussian elimination, and determining the harmonic impedance of the AC system based on each diagonal element in the inverse matrix; the node harmonic admittance matrix is ​​obtained based on the impedance and connection relationship of the components in the AC system of the AC / DC power grid system.

2. The method according to claim 1, characterized in that, Each preset busbar includes a conventional busbar and a flexible busbar; the conventional busbar is an AC busbar connected to a conventional DC system; the flexible busbar is an AC busbar connected to a flexible DC system. The step of setting a simulated fault on the bus to be faulted and simulating the operation of the AC / DC power grid system, obtaining the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system during the fault period of the bus to be faulted, which corresponds to the fault residual voltage of the DC station of each preset bus, includes: When a simulated fault is set on the bus to be faulted and the AC / DC power grid system is simulated, the lowest positive sequence voltage amplitude of each conventional bus and each flexible bus in the AC / DC power grid system during the fault period of the bus to be faulted is obtained, which corresponds to the fault residual voltage of each conventional bus and each flexible bus DC station.

3. The method according to claim 2, characterized in that, The process of determining the impedance of the first conventional type and the impedance of the second conventional type of the DC station corresponding to the conventional bus with a fault residual voltage less than the first threshold, determining the flexible impedance of the DC station corresponding to the flexible bus with a fault residual voltage less than the first threshold, and determining the impedance of the second conventional type of the DC station corresponding to the conventional bus with a fault residual voltage greater than the first threshold and less than the second threshold includes: Using a conventional DC model and a test signal method, the impedance of the first conventional type and the impedance of the second conventional type for the DC station of the corresponding conventional bus whose fault residual voltage is less than the first threshold are determined. Using a flexible DC model and the test signal method, the flexible impedance of the DC station of the corresponding flexible bus whose fault residual voltage is less than the first threshold is determined. Using the conventional DC model and the test signal method, the impedance of the second conventional type for the DC station of the corresponding conventional bus whose fault residual voltage is greater than the first threshold and less than the second threshold is determined.

4. The method according to claim 1, characterized in that, The method further includes: Obtain the harmonic impedance calculation frequency and the fundamental frequency impedance parameter of the component; The node harmonic admittance matrix is ​​obtained by calculating the frequency based on the harmonic impedance, the fundamental frequency impedance parameter, and the admittance and connection relationship of the element; the admittance of the element is obtained based on the impedance of the element.

5. A device for determining the harmonic impedance of an AC system considering the influence of multiple DC feeds, characterized in that, The device includes: The bus determination module is used to determine the bus to be set for fault from the AC / DC power grid system in response to the bus selection command for the AC / DC power grid system. The fault residual voltage module is used to obtain the lowest positive sequence voltage amplitude of each preset bus in the AC / DC power grid system during the fault period of the bus to be faulted, when a simulated fault is set on the bus to be faulted and the AC / DC power grid system is simulated, and the corresponding value is used as the fault residual voltage of the DC station of each preset bus. An impedance determination module is used to determine the first impedance of a DC station whose fault residual voltage is less than a first threshold, and to determine the second impedance of a DC station whose fault residual voltage is greater than the first threshold and less than a second threshold. This includes: using the first and second conventional type impedances of the DC station with the corresponding conventional bus fault residual voltage less than the first threshold, and the flexible impedance of the DC station with the corresponding flexible bus fault residual voltage less than the first threshold, as the first impedance; and using the second conventional type impedance of the DC station with the corresponding conventional bus fault residual voltage greater than the first threshold and less than the second threshold, as the second impedance. The harmonic impedance determination module is used to determine the harmonic impedance of the AC system based on the first impedance, the second impedance, and the node harmonic admittance matrix. The determination includes: accumulating the admittances corresponding to the first impedance and the second impedance to the diagonal position of the corresponding row in the node harmonic admittance matrix according to the row number of the preset bus corresponding to the DC station in the node harmonic admittance matrix, thus obtaining a processed node harmonic admittance matrix; obtaining the inverse matrix of the processed node harmonic admittance matrix using Gaussian elimination; and determining the harmonic impedance of the AC system based on each diagonal element in the inverse matrix. The node harmonic admittance matrix is ​​obtained based on the impedance and connection relationship of the components in the AC / DC power grid system.

6. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 4.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 4.

8. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 4.

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