Pixel circuit and driving system

Abstract

The present application provides a pixel circuit and a driving system. The pixel circuit includes a driving module, a light-emitting control module and a light-emitting device. The light-emitting control module, the light-emitting device and the driving module are all connected in series between a first power supply signal and a second power supply signal, and the control end of the light-emitting control module is connected to the light-emitting control signal. The light-emitting control signal includes at least one pulse signal, and the light-emitting control module turns off the light-emitting device under the action of the pulse signal. The pulse signal is set according to the spectrum of the brightness waveform of a frame display period. The present application can effectively reduce the amplitude of the low-frequency component in the brightness spectrum, thereby improving the flicker perception and flicker value.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a pixel circuit and a driving system. Background Art

[0002] Light-emitting devices such as mini LEDs, micro LEDs and organic LEDs have the advantages of high brightness, high contrast and high color gamut, and have been widely used in the field of high-performance display. In existing pixel circuits, leakage is a serious problem. In the subsequent light-emitting process of the light-emitting device, due to leakage current, the gate potential of the driving transistor will change, resulting in a large change in brightness within a frame display cycle under low-frequency driving, resulting in flicker (Flicker), which affects the display quality of the display device. Summary of the invention

[0003] The present application provides a pixel circuit and a driving system to solve the technical problem in the prior art that a display panel is prone to flickering under low-frequency driving.

[0004] The present application provides a pixel circuit, which includes:

[0005] Light emitting device;

[0006] a driving module, connected to the light emitting device to drive the light emitting device to emit light; and

[0007] A light-emitting control module connected to the driving module, wherein the light-emitting control module, the light-emitting device and the driving module are connected in series between a first power supply signal and a second power supply signal, and a control end of the light-emitting control module is connected to the light-emitting control signal;

[0008] Wherein, the light emitting control signal includes at least one pulse signal, and the light emitting control module turns off the light emitting device under the action of the pulse signal, and the pulse signal is set according to the frequency spectrum of the brightness waveform of a frame display period.

[0009] Optionally, in some embodiments of the present application, the light emitting control signal further includes a first reference pulse signal and a second reference pulse signal, the first reference pulse signal is located at the beginning of a frame display period, and the second reference pulse signal is located at at least one time dividing point of a frame display period;

[0010] There is a time interval between any two of the pulse signal, the first reference pulse signal and the second reference pulse signal, or the pulse signal is partially overlapped with the first reference pulse signal or the second reference pulse signal.

[0011] Optionally, in some embodiments of the present application, the pixel circuit operates in one of a plurality of driving modes, the refresh frequency of each driving mode is different, and the light emitting control signal has a corresponding set of pulse signals in each driving mode.

[0012] Optionally, in some embodiments of the present application, the pixel circuit operates at least in a first driving mode or a second driving mode, and a refresh frequency of the first driving mode is less than a refresh frequency of the second driving mode;

[0013] Wherein, within a frame display period, the number of the pulse signals in the first driving mode is greater than or equal to the number of the pulse signals in the second driving mode.

[0014] Optionally, in some embodiments of the present application, the pulse signal corresponds to a low-frequency component setting in the frequency spectrum of the brightness waveform of a frame display period, and the frequency of the low-frequency component is less than 60 Hz.

[0015] Optionally, in some embodiments of the present application, a frame display cycle includes a first display stage and a second display stage, the display brightness of the first display stage is greater than the display brightness of the second display stage, and the distribution density of the pulse signal in the first display stage is greater than the distribution density of the pulse signal in the second display stage.

[0016] Correspondingly, the present application also provides a driving system, which includes a signal generating module, wherein the signal generating module has an output terminal, and the output terminal is used to output the light emitting control signal in the pixel circuit described in any one of the above items.

[0017] Optionally, in some embodiments of the present application, the signal generating module includes a storage unit and a pulse signal generating unit;

[0018] The storage unit is used to store parameter information of the pulse signal. The pulse signal generating unit is connected to the storage unit. The pulse signal generating unit is used to generate the pulse signal according to the parameter information.

[0019] Optionally, in some embodiments of the present application, the parameter information includes a pulse start position control parameter, a pulse step type control parameter, a pulse start position parameter, and a pulse end position parameter.

[0020] Optionally, in some embodiments of the present application, the pulse signal generating unit includes a counter, a first judging subunit and a second judging subunit;

[0021] Among them, the counter is used to count according to the pulse starting position control parameter and the pulse step type control parameter to obtain a first parameter; the first judgment subunit compares the first parameter with the pulse starting position parameter, if the first parameter is less than the pulse starting position parameter, the counter continues to count, if the first parameter is equal to the pulse starting position parameter, the starting position of the pulse signal is determined; the second judgment subunit compares the first parameter with the pulse ending position parameter, if the first parameter is less than the pulse ending position parameter, the counter continues to count, if the first parameter is equal to the pulse ending position parameter, the ending position of the pulse signal is determined.

[0022] Optionally, in some embodiments of the present application, the storage unit stores multiple groups of the parameter information, each group of the parameter information corresponds to a refresh frequency, and the pulse signal generating unit obtains the corresponding parameter information according to different refresh frequencies.

[0023] Optionally, in some embodiments of the present application, the signal generating module also includes a start signal generating unit and a GOA circuit, the pulse signal generating unit is arranged in the start signal generating unit, the start signal generating unit is used to generate a start signal including the pulse signal, the GOA circuit is connected to the start signal generating unit, and the GOA circuit is used to generate multiple levels of the light-emitting control signal according to the start signal including the pulse signal.

[0024] Optionally, in some embodiments of the present application, the driving system further includes a driving chip, and the start signal generating unit is disposed in the driving chip.

[0025] Optionally, in some embodiments of the present application, the signal generating module further includes a first GOA circuit, the first GOA circuit is connected to the pulse signal generating unit, and the first GOA circuit is used to generate multiple levels of the pulse signal.

[0026] The present application provides a pixel circuit and a driving system. The pixel circuit includes a driving module, a light-emitting control module and a light-emitting device. The light-emitting control module, the light-emitting device and the driving module are all connected in series between a first power supply signal and a second power supply signal, and the control end of the light-emitting control module is connected to the light-emitting control signal. The present application adds at least one pulse signal to the light-emitting control signal. Since the light-emitting control module is turned off under the action of the pulse signal, the light-emitting device does not emit light. Therefore, the pulse signal is set according to the spectrum of the brightness waveform of a frame display cycle, which can reduce the brightness of the light in the time period corresponding to the pulse signal, thereby reducing the low-frequency component in the brightness spectrum of a frame display cycle, and improving the flicker perception and flicker value. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0028] Figure 1 is a structural schematic diagram of a pixel circuit provided by the present application;

[0029] Figure 2 This application provides Figure 1 The signal timing diagram of the pixel circuit shown;

[0030] Figure 3 A schematic diagram of brightness changes of a display panel provided in the present application within a frame display period;

[0031] Figure 4 is a first structural schematic diagram of a pixel circuit provided by the present application;

[0032] Figure 5 It is a timing diagram of the light-emitting control signal provided by the present application;

[0033] Figure 6 is a schematic diagram of the frequency characteristics of an integrator for processing a brightness signal provided by the present application;

[0034] Figure 7 It is a structural schematic diagram of a GOA circuit provided by the present application;

[0035] Figure 8 This is a schematic diagram of the original driving brightness waveform and its brightness spectrum at a refresh frequency of 30 Hz provided by the present application;

[0036] Fig. 9 This is a schematic diagram of the brightness waveform increment and its brightness spectrum caused by the pulse signal at a refresh rate of 30 Hz provided by the present application;

[0037] Fig.10 This is a schematic diagram of a new driving brightness waveform and its brightness spectrum at a refresh rate of 30 Hz provided by the present application;

[0038] Fig.11 This is a schematic diagram of the original driving brightness waveform and its brightness spectrum at a refresh frequency of 10 Hz provided by the present application;

[0039] Fig.12 This is a schematic diagram of the brightness waveform increment and its brightness spectrum caused by the pulse signal at a refresh rate of 10 Hz provided by the present application;

[0040] Fig.13This is a schematic diagram of a new driving brightness waveform and its brightness spectrum at a refresh rate of 10 Hz provided by the present application;

[0041] Fig.14 is a first structural schematic diagram of the drive system provided by the present application;

[0042] Fig.15 It is a structural schematic diagram of the signal generating module provided by the present application;

[0043] Fig.16 It is a structural schematic diagram of a pulse signal generating unit provided by the present application;

[0044] Fig.17 It is a schematic diagram of the flow of determining the pulse starting position parameters provided by the present application;

[0045] Fig.18 It is a flow chart of determining pulse termination position parameters provided by the present application;

[0046] Fig.19 is a signal timing diagram of the start signal provided in the present application and the start signal including the pulse signal;

[0047] Fig. 20 is a second structural schematic diagram of the drive system provided by the present application;

[0048] Fig.21 This is the third structural schematic diagram of the drive system provided by this application. DETAILED DESCRIPTION

[0049] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0050] In the description of this application, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, features defined as "first" and "second" etc. may explicitly or implicitly include one or more of the features, and therefore should not be understood as limiting this application.

[0051] The present application provides a driving system, which is described in detail below. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments of the present application.

[0052] See also Figure 1 and Figure 2 . Figure 1 FIG. 2 is a schematic diagram of a pixel circuit provided by the present application. Figure 1 The signal timing diagram of the pixel circuit shown in FIG. In one frame display period, the driving timing of the pixel circuit 10 includes a reset phase t1, a data writing and compensation phase t2, and a light emitting phase t3.

[0053] In the reset phase t1, the n-1th level scan signal S(n-1) is at a low potential, the third transistor T3 and the sixth transistor T6 are turned on, and the gate of the driving transistor Td and the anode of the light emitting device D are reset to the reset voltage Vi.

[0054] At this time, the enable signal EM and the nth level scan signal Sn are at high potentials, the first transistor T1 , the second transistor T2 , the fourth transistor T4 and the fifth transistor T5 are all turned off, and the light emitting device D does not emit light.

[0055] In the data writing and compensation stage t2, the nth level scanning signal Sn is at a low potential, the first transistor T1, the second transistor T2 and the driving transistor Td are all turned on, and the data voltage Da charges the gate of the driving transistor Td through the first transistor T1, the driving transistor Td and the second transistor T2. When the gate potential of the driving transistor Td rises to Vdata-Vth (Vth is the threshold voltage of the driving transistor Td), the driving transistor Td is turned off, and the gate potential of the driving transistor Td no longer rises, thereby achieving threshold voltage compensation for the driving transistor Td.

[0056] At this time, the enable signal EM is still maintained at a high potential, the fourth transistor T4 and the fifth transistor T5 are both turned off, and the light emitting device D does not emit light.

[0057] In the light-emitting stage t3, the enable signal EM changes from a high potential to a low potential, and the fourth transistor T4 and the fifth transistor T5 are both turned on. At this time, the power supply voltage VDD starts to charge the anode of the light-emitting device D. When the charge reaches the start-up voltage of the light-emitting device D, the light-emitting device D starts to emit light.

[0058] It is understandable that, since the second transistor T2 and the third transistor T3 are both connected to the gate of the driving transistor Td, the leakage current characteristics of the two transistors will directly affect the brightness stability of the light-emitting stage t3. The leakage current of the LTPS (Low Temperature Poly-Silicon) transistor commonly used in OLED (Organic Light-Emitting Diode) displays is relatively large, and the gate potential of the driving transistor Td will change, resulting in a large change in brightness within a frame display period under low-frequency driving, resulting in flickering.

[0059] For details, please refer to Figure 3 , Figure 3 The schematic diagram of the brightness change of the display panel provided in this application within a frame display cycle. The dotted line P represents the target brightness of the display panel within a frame display cycle. The curve Q represents the actual brightness change trend of the display panel within a frame display cycle. Figure 3 It can be seen that within a frame display period, the brightness change of the display screen is ΔL, which is relatively large and is prone to flickering.

[0060] For this, see Figure 4 and Figure 5 , Figure 4 This is a first structural schematic diagram of a pixel circuit provided in this application. Figure 5 1 is a timing diagram of the light emitting control signal provided by the present application. The embodiment of the present application provides a pixel circuit 10. The pixel circuit 10 includes a driving module 10a, a light emitting control module 10b and a light emitting device D. The light emitting control module 10b, the light emitting device D and the driving module 10a are all connected in series between a first power signal VDD and a second power signal VSS. The control end of the light emitting control module 10b is connected to the light emitting control signal EM.

[0061] The driving module 10a at least includes a driving transistor Td. The light control module 10b at least includes a light control transistor T0. The source and drain of the driving transistor Td, the source and drain of the light control transistor T0, and the light emitting device D are all connected in series between the first power signal VDD and the second power signal VSS. The gate of the light control transistor T0 is connected to the light control signal EM. The light control signal EM includes at least one pulse signal C. The light control transistor T0 is turned off under the action of the pulse signal C. The pulse signal C is set according to the spectrum of the brightness distribution of a frame display period.

[0062] The spectrum of the brightness distribution of a frame display period refers to: collecting the brightness signal of the display panel within a frame display period, converting the brightness signal into a digital signal. Then, all digital signals are Fourier transformed to obtain a set of amplitudes of signals with different frequencies. Alternatively, the brightness signals of multiple frames of the display panel are continuously collected within a period of time, and all brightness signals are converted into digital signals. Then, all digital signals are Fourier transformed to obtain a set of amplitudes of signals with different frequencies. In the following embodiments, the spectrum of the brightness distribution is referred to as the brightness spectrum.

[0063] Wherein, the first power signal VDD and the second power signal VSS are both used to output a preset voltage value. In addition, in the embodiment of the present application, the potential of the first power signal VDD is greater than the potential of the second power signal VSS. Specifically, the potential of the second power signal VSS can be the potential of the ground terminal. Of course, it can be understood that the potential of the second power signal VSS can also be other.

[0064] In the embodiment of the present application, at least one pulse signal C is added to the light-emitting control signal EM. Since the light-emitting control module 10b is turned off under the action of the pulse signal C, the light-emitting device D does not emit light. Therefore, the pulse signal C is set according to the spectrum of the brightness waveform of a frame display cycle. The light-emitting brightness of the time period corresponding to the pulse signal can be reduced, thereby reducing the low-frequency component in the brightness spectrum of a frame display cycle, thereby improving the flicker perception and flicker value.

[0065] See also Figure 6 , Figure 6 1 is a frequency characteristic diagram of an integrator for processing brightness signals provided by the present application, wherein the horizontal axis is frequency, the unit is Hertz (Hz), and the vertical axis is level (Level), the unit is dB, which is a numerical value without any unit mark.

[0066] Among them, the frequency characteristics of the integrator are the same as the response characteristics of human vision to different frequencies. When the frequency is below 60Hz, its level increases sharply. That is, in a frame display cycle, the brightness will change over time. The different frequency components of the signal can be obtained by Fourier transforming the time domain signal of the brightness. The sensitivity of the human eye to different frequency components is different. For example, in the range of less than 60Hz, when the brightness amplitude is the same, the higher the frequency, the lighter the flicker perception of the human eye, and the less sensitive it is. That is, the human eye is more sensitive to flicker at a frequency below 60Hz in the brightness spectrum. When the display panel is at a low refresh rate (such as <60Hz), if there is a large drop or rise in brightness within a frame display cycle, then the brightness spectrum has a large amplitude component at a low frequency (such as <60Hz), the flicker value will be large, and the human eye will also clearly perceive the flicker.

[0067] In the periodic continuous brightness waveform, the position with high brightness corresponds to the peak phase of the low-frequency component. In order to further eliminate the low-frequency component in the brightness spectrum, some embodiments of the present application set the low-frequency component in the brightness spectrum corresponding to the pulse signal C in a frame display period, and the frequency of the low-frequency component is less than 60 Hz. Since the light-emitting control transistor T0 is turned off under the action of the pulse signal C, the light-emitting device D does not emit light, thereby reducing the light-emitting brightness of the time period corresponding to the pulse signal C, thereby reducing the low-frequency component in the brightness spectrum of a frame display period, and improving the flicker perception and flicker value.

[0068] Of course, in some embodiments of the application, the range of the low frequency in the low frequency component can also be set according to the flicker specification requirements of the display panel in actual applications, and the present application does not make any specific limitation on this.

[0069] In addition, compared with the existing LTPO (Low Temperature Polycrystalline Oxide) technology, the IGZO (Indium Gallium Zinc Oxide) transistor with lower leakage current is used to solve the problem of severe flickering under low-frequency driving. The embodiment of the present application can only use LTPS transistors, and there is no need to combine LTPS transistors with IGZO transistors. The structure and process of the pixel circuit 10 are simpler, which effectively reduces the cost.

[0070] It should be noted that, in the embodiment of the present application, the pixel circuit 10 may be Figure 1 The pixel circuit 10 shown. However, Figure 1 The pixel circuit 10 shown is only an example and cannot be understood as a limitation of the present application. For example, the present application embodiment is described by taking each transistor as a P-type transistor as an example, but each transistor can also be an N-type transistor, a dual-gate transistor, etc. For another example, the pixel circuit 10 can also include other types of threshold voltage compensation structures or power supply voltage VDD compensation structures, etc., which are not limited in the present application.

[0071] In addition, in the embodiment of the present application, the light control module 10a may include Figure 1 The transistor T4 and / or the transistor T5 in the light emitting device D can be used as long as the light emitting control module 10a controls the light emitting device D to emit light or not emit light under the control of the light emitting control signal EM. The light emitting control signal EM can be obtained by superimposing the enable signal EM(n) with the pulse signal C. The light emitting control signal EM can also be obtained by superimposing the pulse signal C on other signals that can control the light emitting device D to emit light.

[0072] For details, please refer to Figure 7 , Figure 7 1 is a schematic diagram of the structure of a GOA circuit provided by the present application. The GOA circuit 30 includes a multi-stage cascaded GOA unit 31. The GOA circuit 30 is used to generate a multi-stage enable signal based on a clock signal XCK, a high-level signal Vgh and a low-level signal Vgl, and based on a start signal EM_STV, such as a first-stage enable signal EM(1), a second-stage enable signal EM(2), a third-stage enable signal EM(3), an n-1th-stage enable signal EM(n-1), an nth-stage enable signal EM(n), etc.

[0073] Among them, the first reference pulse signal A and the second reference pulse signal B exist in the start signal EM_STV. The start signal EM_STV is transmitted through the GOA circuit 30 levels, and the enable signal EM(n) of each level is output. The waveform of the enable signal EM(n) of each level is the same as that of the start signal EM_STV, and there is a time offset. Therefore, the signal timing of the start signal EM_STV determines the timing of the enable signal EM(n). The pulse signal C can be added to the timing of the start signal EM_STV, so that the enable signal EM(n) output by the GOA circuit 30 also includes the pulse signal C, that is, the light-emitting control signal EM is formed.

[0074] It should be noted that, since the function of the pulse signal C is to add a non-luminous time period in a frame display cycle according to the pulse signal C in the original driving brightness waveform, the pulse signal C can be provided by the GOA circuit 30 that generates the enable signal EM(n). It can also be generated by a group of GOA circuits alone, or added to the GOA circuit that generates other signals that can control the luminous state of the light-emitting device D. The present application does not impose any restrictions on this.

[0075] The following embodiments of the present application are described by taking the light-emitting control transistor T0 as a P-type transistor and the light-emitting control signal EM as an example obtained by superimposing the enable signal EM(n) with the pulse signal C, but this should not be construed as a limitation of the present application.

[0076] In the embodiment of the present application, the light emitting control signal EM further includes a first reference pulse signal A and a second reference pulse signal B. The first reference pulse signal A is located at the beginning of a frame display period. The second reference pulse signal B has a certain time interval with the first reference pulse signal A and is located at at least one time division point of a frame display period. The time division point refers to a 2-equal division point, a 3-equal division point, a 4-equal division point, a 32-equal division point, etc. of a frame display period.

[0077] It can be understood that the first reference pulse signal A and the second reference pulse signal B constitute the enable signal EM(n). In a frame display cycle, and within the action time period of the first reference pulse signal A, the pixel circuit 10 is in the reset stage t1 and the data writing and compensation stage t2 to perform reset and compensation charging. At this time, the first reference pulse signal A is a high-level pulse, the light-emitting control transistor T0 is turned off, and the light-emitting device D does not emit light. In the light-emitting stage t3 of a frame display cycle, the original enable signal EM(n) remains at a low level, and the light-emitting device D emits light. However, due to the addition of the high-level second reference pulse signal B, the light-emitting device D does not emit light during the action time period of the second reference pulse signal B. The second reference pulse signal B is used to adjust the screen brightness using PWM (PulseWidth Modulation) technology.

[0078] Generally, the same first reference pulse signal A and the second reference pulse signal B are generally used between display panels of the same model. However, since the temporal brightness waveform of each display panel is different, the pulse signal C can be adjusted independently for each display panel to achieve the best flicker reduction effect. That is, the pixel circuit 10 can be applied to multiple display panels, and the light emitting control signal EM can have a corresponding set of pulse signals C in each display panel.

[0079] From the above analysis, it can be seen that in the periodic continuous brightness waveform, the position with high brightness corresponds to the peak phase of the low-frequency component. Therefore, more pulse signals C can be set in the time period with higher brightness in each frame display cycle. For example, for a brightness waveform with gradually decreasing brightness in a frame display cycle, the pulse signal C is more concentrated in the early time in a frame cycle. For a brightness waveform with gradually increasing brightness in a frame display cycle, the pulse signal C is more concentrated in the later time in a frame. For a brightness waveform of any shape, the pulse signal C is more concentrated at a position close to the maximum value of the brightness waveform.

[0080] Specifically, a frame display period can be set to include a first display stage and a second display stage according to the brightness distribution of a frame display period. The display brightness of the first display stage is greater than the display brightness of the second display stage. In this case, the distribution density of the pulse signal C in the first display stage is set to be greater than the distribution density of the pulse signal C in the second display stage, thereby simplifying the setting steps of the pulse C. Of course, multiple display stages can be set according to the actual brightness distribution, and this application does not make specific limitations on this.

[0081] In the embodiment of the present application, the pixel circuit 10 can operate in multiple driving modes. Each driving mode corresponds to a refresh frequency. The refresh frequency refers to the number of times the screen frame is refreshed per second, that is, the number of frame display cycles per second. Under different refresh frequencies, the light emitting control signal EM may include a group of pulse signals C with different positions, pulse widths and quantities. The term "multiple" refers to two or more.

[0082] Specifically, the pixel circuit 10 can operate in the first driving mode or the second driving mode. The refresh frequency of the first driving mode is less than the refresh frequency of the second driving mode. In one frame display period, the number of pulse signals C in the first driving mode is greater than or equal to the number of pulse signals C in the second driving mode.

[0083] It is understandable that, since the refresh frequency of the first driving mode is lower than the refresh frequency of the second driving mode, the duration of the light-emitting phase t3 of a frame display cycle in the first driving mode is longer than that in the second driving mode. The longer the light-emitting duration, the greater the change in the light-emitting brightness due to leakage and other reasons, and the greater the possibility of flickering. Therefore, by setting the number of pulse signals C in the first driving mode to be greater than or equal to the number of pulse signals C in the second driving mode, different pulse signals C can be set in the light-emitting control signal EM in different driving modes, thereby better improving flickering.

[0084] For example, when the refresh frequency is 10 Hz, the number of pulse signals C in one frame display period is not less than 10. When the refresh frequency is 15 Hz, the number of pulse signals C in one frame display period is not less than 5. When the refresh frequency is 20 Hz, the number of pulse signals C in one frame display period is not less than 5. When the refresh frequency is 30 Hz, the number of pulse signals C in one frame display period is not less than 1. The embodiments of the present application are not listed one by one here.

[0085] In the embodiment of the present application, at any refresh frequency, the number of pulse signals C can be 1 or more. In a frame display period, the start time and the end time of each pulse signal C can appear at any position in the frame display period.

[0086] Specifically, the pulse signal C may be arranged to at least partially overlap with the first reference pulse signal A or at least partially overlap with the second reference pulse signal B. Alternatively, the pulse signal C may have a time interval with the first reference pulse signal A and the second reference pulse signal. When the pulse signal C overlaps with the first reference pulse signal A or the second reference pulse signal B, the function of the pulse signal C to reduce the low-frequency component is not affected.

[0087] In the embodiment of the present application, the position, pulse width and number of pulses of the pulse signal C in the light-emitting control signal EM are determined by the original driving brightness waveform. The original driving brightness waveform refers to the brightness waveform driven by the enable signal EM(n) without the pulse signal C. Specifically, the low-frequency component in the brightness spectrum obtained by Fourier transform of the original driving brightness waveform determines the position, pulse width and number of pulses of the pulse signal C in the light-emitting control signal EM.

[0088] It can be understood that after the pulse signal C is introduced into the light emitting control signal EM, compared with the original driving brightness waveform, under the action of the pulse signal C, a new brightness change, that is, a brightness waveform increment, will be introduced. Among them, the low-frequency component in the original driving brightness waveform spectrum and the low-frequency component in the brightness increment spectrum introduced by the pulse signal C have the same amplitude as much as possible at the same frequency and the opposite phase as much as possible. In this way, the low-frequency amplitude component in the original driving brightness waveform spectrum can be eliminated or reduced, thereby reducing the flicker value and reducing the flicker perception of the human eye.

[0089] Specifically, the method for obtaining the position, pulse width and number of the pulse signal C may include the following steps:

[0090] 101. Under the driving of the enable signal EM, an original driving brightness waveform is measured and obtained.

[0091] Specifically, a brightness measuring instrument such as a brightness meter may be used to detect the brightness in a frame display period to obtain a brightness signal, and the brightness signal is converted into a digital signal to obtain an original driving brightness waveform.

[0092] 102. Perform Fourier transform on the original driving brightness waveform to obtain the amplitude and phase of each low-frequency component.

[0093] The principle and process of Fourier transforming the original driving brightness waveform are well known to those skilled in the art and will not be described in detail here. The brightness spectrum of the original driving brightness waveform can be obtained by Fourier transforming. The brightness spectrum includes frequency domain amplitude information and frequency domain phase information. Thus, the amplitude and phase of each low-frequency (<60Hz) component in the brightness spectrum of the original driving brightness waveform can be obtained.

[0094] 103. According to the amplitude and phase of each low-frequency component, the negative increment of the brightness waveform with equal amplitude and opposite phase is matched.

[0095] Specifically, the negative increments of the brightness waveform with equal amplitude and opposite phase can be matched according to the amplitude and phase of each low-frequency component. Alternatively, some low-frequency components can be taken, and then the negative increments of the brightness waveform with equal amplitude and opposite phase can be matched according to the amplitude and phase of each low-frequency component.

[0096] 104. The position, width and number of the negative value increment of the brightness waveform are correspondingly superimposed on the enable signal EM(n) or other signals capable of controlling the light emitting device D to emit light, thereby obtaining a pulse signal C and a light emitting control signal EM.

[0097] Among them, because the light-emitting device D does not emit light under the action of the pulse signal C, the position, pulse width and number of the pulse signal C can be determined according to the position, width and number of the negative value increment of the brightness waveform. Then, it is superimposed on the enable signal EM(n) or other signals that can control the light-emitting device D to emit light, and the light-emitting control signal EM can be obtained.

[0098] In one embodiment of the present application, a refresh frequency of 30 Hz is taken as an example for description.

[0099] Please also see Figure 8-Figure 10 . Figure 8 This is a schematic diagram of the original driving brightness waveform and its brightness spectrum at a refresh frequency of 30 Hz provided in this application. Fig. 9 This application provides a schematic diagram of the brightness waveform increment and its brightness spectrum caused by a pulse signal at a refresh rate of 30 Hz. Fig.10 This is a schematic diagram of a new driving brightness waveform and its brightness spectrum at a refresh frequency of 30 Hz provided in this application.

[0100] Specifically, in Figure 7 In the figure, (a) is the original driving brightness waveform, (b) is the frequency domain amplitude spectrum of the original driving brightness waveform, and (c) is the frequency domain phase spectrum of the original driving brightness waveform. Figure 8 In the figure, Figure (d) shows the brightness waveform increment introduced by the pulse signal C, Figure (e) shows the frequency domain amplitude spectrum of the brightness waveform increment, and Figure (f) shows the frequency domain phase spectrum of the brightness waveform increment. Fig. 9 In the figure, Figure (g) is the new driving brightness waveform, that is, the brightness waveform obtained by superimposing the pulse signal C on the original driving, Figure (h) is the frequency domain amplitude spectrum of the new driving brightness waveform, and Figure (i) is the frequency domain phase spectrum of the new driving brightness waveform.

[0101] As shown in Figure (b) and Figure (c), at a refresh rate of 30Hz, the original driving brightness waveform has a frequency component with an amplitude of 31.29 and a phase of -90.45° at a frequency of 30Hz. In this regard, combined with Figure (a) and Figure (d), the number of additional pulse signals C is 4. The position and pulse width of each pulse signal C can be found in Figure (d). As shown in Figure (e) and Figure (f), the brightness waveform increment has a frequency component with an amplitude of 31.18 and a phase of 90.49° at a frequency of 30Hz.

[0102] It can be seen that the amplitude of the low-frequency component of the brightness waveform increment introduced by the pulse signal C is nearly equal to the low-frequency component of the original driving brightness waveform, and the phase is nearly opposite. The original brightness waveform is superimposed with the brightness waveform, and the component amplitude of the new driving brightness waveform at 30Hz is 0.52. The component amplitude at 30Hz frequency domain is reduced to 1 / 60 of the original. Therefore, the setting of the pulse signal C can eliminate or reduce the low-frequency amplitude component of the original driving brightness waveform, thereby reducing the flicker perception of the human eye and reducing the Flicker value.

[0103] It should be noted that although the amplitude at 60 Hz changes from 15.91 to 31.84, the above analysis shows that the human eye is extremely insensitive to flicker at 60 Hz. Therefore, the setting of the pulse signal C greatly improves flicker.

[0104] Furthermore, the Flicker JEITA value of the original driver calculated by the JEITA method is -21.9dB, and the Flicker JEITA value of the new driver is -56.72dB, which shows that the flicker has been greatly improved. The JEITA method calculates the flicker value based on the amplitude of different frequency signals, which is more in line with the human eye's perception of different flicker frequencies, and the measurement results are more objective and stable.

[0105] In one embodiment of the present application, a refresh frequency of 10 Hz is taken as an example for description.

[0106] Please also see Figure 11-13 . Fig.11 This is a schematic diagram of the original driving brightness waveform and its brightness spectrum at a refresh frequency of 10 Hz provided in this application. Fig.12 This application provides a schematic diagram of the brightness waveform increment and its brightness spectrum caused by a pulse signal at a refresh rate of 10 Hz. Fig.13 This is a schematic diagram of a new driving brightness waveform and its brightness spectrum at a refresh frequency of 10 Hz provided in this application.

[0107] Specifically, in Fig.11 In the figure, (a) is the original driving brightness waveform, (b) is the frequency domain amplitude spectrum of the original driving brightness waveform, and (c) is the frequency domain phase spectrum of the original driving brightness waveform. Fig.12 In the figure, Figure (d) shows the brightness waveform increment introduced by the pulse signal C, Figure (e) shows the frequency domain amplitude spectrum of the brightness waveform increment, and Figure (f) shows the frequency domain phase spectrum of the brightness waveform increment. Fig.13 In the figure, Figure (g) is the new driving brightness waveform, that is, the brightness waveform obtained by superimposing the pulse signal C on the original driving, Figure (h) is the frequency domain amplitude spectrum of the new driving brightness waveform, and Figure (i) is the frequency domain phase spectrum of the new driving brightness waveform.

[0108] As shown in Figure (b) and Figure (c), at a refresh rate of 10Hz, the amplitudes of the frequency components of the original driving brightness waveform at 10Hz, 20Hz, 30Hz, 40Hz and 50Hz are relatively large, with amplitudes of 31.31, 15.91, 11.11, 11.41 and 5.83 respectively. In this regard, in combination with Figure (a) and Figure (d), the number of additional pulse signals C is 20. The position and pulse width of each pulse signal C can be found in Figure (d). As shown in Figure (e) and Figure (f), after the original brightness waveform and the brightness waveform are brightened and superimposed, the amplitudes of the frequency components of the new driving brightness waveform at 10Hz, 20Hz, 30Hz, 40Hz and 50Hz are relatively small, with amplitudes of 1.35, 1.06, 1.86, 0.99 and 1.32 respectively. The original drive Flicker JEITA value is -18.91dB, and the new drive Flicker JEITA value is -44.75dB. Therefore, the setting of the pulse signal C can eliminate or reduce the low-frequency amplitude component of the original drive brightness waveform, thereby reducing the human eye's flicker perception and reducing the Flicker value.

[0109] Accordingly, see Fig.14 , Fig.14 1 is a first structural diagram of the driving system provided by the present application. The embodiment of the present application provides a driving system 100. The driving system 100 includes a signal generating module 20. The signal generating module 20 has an output terminal 20a. The output terminal 20a is used to output the light emitting control signal EM in the pixel circuit 10 described in any of the above embodiments.

[0110] In the embodiments of this application, please refer to Fig.15 , Fig.15 2 is a schematic diagram of the structure of the signal generating module provided in the present application. The signal generating module 20 includes a storage unit 21 and a pulse signal generating unit 22.

[0111] The storage unit 21 is used to store parameter information of the pulse signal C. The pulse signal generating unit 22 is connected to the storage unit 21 to obtain the parameter information of the pulse signal C. The pulse signal generating unit 22 is used to generate the pulse signal C according to the parameter information.

[0112] The storage unit 21 may be a MIPI (Mobile Industry Processor Interface) register, a ROM (Read-Only Memory) or an external Flash IC (Flash memory chip).

[0113] The parameter information can be obtained according to the acquisition method of the position, pulse width and number of the pulse signal C in the above-mentioned embodiment, which will not be repeated here. The parameter information can be stored in the storage unit 21 by OTP (One Time Programmable) burning or Flash burning when the display device is produced.

[0114] In the embodiment of the present application, the storage unit 21 can store multiple sets of parameter information, each set of parameter information corresponds to a refresh frequency. The pulse signal generating unit 22 obtains corresponding parameter information according to different refresh frequencies.

[0115] It is understandable that the drive system 100 may include multiple drive modes, each of which corresponds to a different refresh frequency. As can be seen from the above embodiments, at different refresh frequencies, the position, pulse width and number of the pulse signal C included in the light emitting control signal EM may be different. Therefore, the embodiment of the present application stores multiple sets of parameter information in the storage unit 21. When the drive system 100 adopts different refresh frequencies, the pulse signal generating unit 22 can obtain the corresponding parameter information and generate the corresponding pulse signal C, thereby improving the switching efficiency of the drive system 100 at different refresh frequencies.

[0116] In the embodiment of the present application, the parameter information of the pulse signal C may include a pulse start position control parameter, a pulse step type control parameter, a pulse start position parameter, and a pulse end position parameter.

[0117] The pulse start position control parameter is used to control the start position reference point of the pulse signal C. The reference point can be a frame synchronization signal or a frame blanking signal, and can be defined by a data bit at the lowest.

[0118] Among them, the pulse step type control parameter can be understood as a counting unit. For example, the pulse step type can be a line synchronization duration or a clock signal high level pulse, which can be defined by a data bit at the lowest. For example, the counter count can be increased by one every time the rising edge of the clock signal comes.

[0119] The pulse start position parameter refers to the rising edge position or falling edge position of the pulse signal C. Because the embodiment of the present application is described by taking the transistor as a P-type transistor as an example, the pulse start position parameter here refers to the rising edge position of the pulse signal C.

[0120] For example, the light emitting control signal EM may include N pulse signals C. N is an integer greater than or equal to 1. Each pulse signal C has a pulse starting position parameter. For example, the starting position parameter of pulse i describes the starting time position of the i-th pulse signal C, and each parameter is a fixed data bit length. i is an integer greater than or equal to 1 and less than or equal to N. For example, the bit length is 24, and the time range that can be represented is 0 to 16777215. The unit of each number is determined by the pulse step type control parameter.

[0121] The pulse termination position parameter refers to the rising edge position or falling edge position of the pulse signal C. Because the embodiment of the present application is described by taking the transistor as a P-type transistor as an example, the pulse termination position parameter here refers to the falling edge position of the pulse signal C.

[0122] For example, the light emitting control signal EM may include N pulse signals C. N is an integer greater than or equal to 1. Each pulse signal C has a pulse termination position parameter. For example, the termination position parameter of pulse i describes the time position of the termination of the i-th pulse signal C, and each parameter is a fixed data bit length. For example, the bit length is 24, and the time range that can be represented is 0 to 16777215. The unit of each number is determined by the pulse step type control parameter.

[0123] Among them, the pulse end position parameter and the pulse start position parameter work in pairs.

[0124] See also Fig.16 , Fig.16 2 is a schematic diagram of the structure of the pulse signal generating unit provided in the present application. In the embodiment of the present application, the pulse signal generating unit 22 includes a counter 221, a first judging subunit 222 and a second judging subunit 223.

[0125] The counter 221 counts according to the pulse starting position control parameter and the pulse step type control parameter to obtain the first parameter. The first judgment subunit 222 compares the first parameter with the pulse starting position parameter. If the first parameter is less than the pulse starting position parameter, the counter 221 continues to count. If the first parameter is equal to the pulse starting position parameter, the starting position of the pulse signal is determined. The second judgment subunit 223 compares the first parameter with the pulse termination position parameter. If the first parameter is less than the pulse termination position parameter, the counter 221 continues to count. If the first parameter is equal to the pulse termination position parameter, the termination position of the pulse signal is determined.

[0126] For details, please refer to Fig.17 and Fig.18 , Fig.17 It is a flow chart of determining pulse starting position parameters provided in this application. Fig.18The embodiment of the present application is described by taking the ith pulse signal C as an example, but this should not be construed as limiting the present application.

[0127] like Fig.17 As shown, the counter 221 starts counting according to the pulse starting position control parameter. Then counting is performed according to the pulse step type control parameter. The first judgment subunit 222 compares the count value with the pulse i starting position parameter. If the count value is less than the pulse i starting position parameter, the counter 221 continues counting, and the count value is +1. If the count value is equal to the pulse i starting position parameter, the starting position of the pulse signal is determined. At this time, if the start signal STV_EM is at a low level, the start signal STV_EM changes from a low level to a high level, that is, the rising edge position of pulse i is determined. If the start signal STV_EM is at a high level, for example, the second pulse signal B in the start signal STV_EM exists at this position, the start signal STV_EM remains at a high level.

[0128] Then, if Fig.18 As shown, after determining the starting position of pulse i, the counter 221 continues to count, and the second judgment subunit 223 compares the count value with the pulse termination position parameter. If the count value is less than the pulse termination position parameter, the counter 221 continues to count. If the count value is equal to the pulse termination position parameter, the termination position of the pulse signal is determined. At this time, if the start signal STV_EM) is at a high level, the start signal STV_EM changes from a high level to a low level, that is, the falling edge position of pulse i is determined. If the start signal STV_EM is at a low level, the start signal STV_EM remains at a low level.

[0129] Therefore, if Fig.19 As shown, the refresh frequency is 30Hz as an example. After being processed by the pulse signal generating unit 22, the start signal STV_EM including the pulse signal C can be obtained compared with the start signal STV_EM. In one frame display cycle, in the start signal STV_EM including the pulse signal C, the first pulse signal C is inserted in the t1-t2 time period, the second pulse signal C is inserted in the t3-t4 time period, the third pulse signal C is inserted in the t5-t6 time period, and the fourth pulse signal C is inserted in the t7-t8 time period. It can be seen that the second pulse signal C and the third pulse signal C are partially overlapped with the second reference pulse signal B.

[0130] In the embodiments of this application, please refer to Fig. 20 , Fig. 20is a second structural schematic diagram of the driving system provided by the present application. In an embodiment of the present application, the signal generating module 20 also includes a start signal generating unit 41 and a GOA circuit 30. The pulse signal generating unit 22 is arranged in the start signal generating unit 41. The start signal generating unit 41 is used to generate a start signal STV_EM including a pulse signal C. The GOA circuit 30 is connected to the start signal generating unit 41. The GOA circuit 30 generates a multi-level light emitting control signal EM according to the start signal STV_EM including the pulse signal C. The multi-level light emitting control signal EM is transmitted to different pixel circuits 10 respectively.

[0131] Furthermore, the driving system 100 further includes a driving chip 40. A start signal generating unit 41 is disposed in the driving chip 40. The driving chip 40 is a chip for driving the display panel to display a picture. One of the functions of the driving chip 40 is to generate a start signal EM_STV. Then, the GOA circuit 30 generates a multi-level enable signal EM(n) according to the start signal EM_STV.

[0132] In the embodiment of the present application, the pulse signal C is superimposed on the start signal EM_STV to obtain the start signal STV_EM including the pulse signal C. Then, the GOA circuit 30 can generate the multi-level light emitting control signal EM according to the start signal STV_EM of the pulse signal C.

[0133] Of course, in other embodiments of this application, please refer to Fig.21 , Fig.21 3 is a schematic diagram of the third structure of the driving system provided by the present application. In the embodiment of the present application, the signal generating module 20 includes a first GOA circuit 50. The first GOA circuit 50 is connected to the pulse signal generating unit 22. The first GOA circuit 50 is used to generate a multi-level pulse signal C.

[0134] The first GOA circuit 50 and Fig. 20 The GOA circuits 30 in the display are independent of each other. It can be understood that since the pulse signal C is used to add a non-luminous time period in the original brightness waveform according to the position of the pulse signal C in a frame display period, the pulse signal C can be provided by the GOA circuit 30 or generated by a group of first GOA circuits 50 alone.

[0135] In the embodiment of the present application, a group of first GOA circuits 50 are used alone to generate a multi-level pulse signal C, and the light-emitting state of the light-emitting device D in the pixel circuit 10 can be directly controlled by the pulse signal C. Thus, the control accuracy of the pulse signal C on the light-emitting brightness of a frame display cycle can be improved.

[0136] The driving system provided by the present application is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A pixel circuit, characterized in that: include: Light emitting device; A driving module, connected to the light emitting device to drive the light emitting device to emit light; as well as A light-emitting control module connected to the driving module, wherein the light-emitting control module, the light-emitting device and the driving module are connected in series between a first power supply signal and a second power supply signal, and a control end of the light-emitting control module is connected to the light-emitting control signal; Among them, the light-emitting control signal includes at least one pulse signal, and the light-emitting control module turns off the light-emitting device under the action of the pulse signal. The pulse signal is set according to the spectrum of the brightness waveform of a frame display period, and the pulse signal is more concentrated at a position close to the maximum value of the brightness waveform.

2. The pixel circuit according to claim 1, characterized in that: The light emitting control signal further includes a first reference pulse signal and a second reference pulse signal, wherein the first reference pulse signal is located at the beginning of a frame display period, and the second reference pulse signal is located at at least one time-equally divided point of a frame display period; There is a time interval between any two of the pulse signal, the first reference pulse signal and the second reference pulse signal, or the pulse signal is partially overlapped with the first reference pulse signal or the second reference pulse signal.

3. The pixel circuit according to claim 1, characterized in that: The pixel circuit operates in one of a plurality of driving modes, the refresh frequency of each driving mode is different, and the light emitting control signal has a corresponding set of pulse signals in each driving mode.

4. The pixel circuit according to claim 3, characterized in that: The pixel circuit operates at least in a first driving mode or a second driving mode, and a refresh frequency of the first driving mode is less than a refresh frequency of the second driving mode; Wherein, within a frame display period, the number of pulses of the pulse signal in the first driving mode is greater than or equal to the number of pulses of the pulse signal in the second driving mode.

5. The pixel circuit according to claim 1, characterized in that: The pulse signal corresponds to a low-frequency component setting in the spectrum of the brightness waveform of a frame display period, and the frequency of the low-frequency component is less than 60 Hz.

6. The pixel circuit according to claim 1, characterized in that: A frame display cycle includes a first display stage and a second display stage, the display brightness of the first display stage is greater than the display brightness of the second display stage, and the distribution density of the pulse signal in the first display stage is greater than the distribution density of the pulse signal in the second display stage.

7. A drive system, characterized in that: It comprises a signal generating module, wherein the signal generating module has an output terminal, and the output terminal is used to output the light emitting control signal in the pixel circuit as claimed in any one of claims 1 to 6.

8. The drive system according to claim 7, characterized in that: The signal generating module comprises a storage unit and a pulse signal generating unit; The storage unit is used to store parameter information of the pulse signal. The pulse signal generating unit is connected to the storage unit. The pulse signal generating unit is used to generate the pulse signal according to the parameter information.

9. The drive system according to claim 8, characterized in that: The parameter information includes a pulse start position control parameter, a pulse step type control parameter, a pulse start position parameter, and a pulse end position parameter.

10. The drive system according to claim 9, characterized in that: The pulse signal generating unit includes a counter, a first judging subunit and a second judging subunit; Among them, the counter is used to count according to the pulse starting position control parameter and the pulse step type control parameter to obtain a first parameter; the first judgment subunit compares the first parameter with the pulse starting position parameter, if the first parameter is less than the pulse starting position parameter, the counter continues to count, if the first parameter is equal to the pulse starting position parameter, the starting position of the pulse signal is determined; the second judgment subunit compares the first parameter with the pulse ending position parameter, if the first parameter is less than the pulse ending position parameter, the counter continues to count, if the first parameter is equal to the pulse ending position parameter, the ending position of the pulse signal is determined.

11. The drive system according to claim 8, characterized in that: The storage unit stores multiple groups of parameter information, each group of parameter information corresponds to a refresh frequency, and the pulse signal generating unit obtains corresponding parameter information according to different refresh frequencies.

12. The drive system according to claim 8, characterized in that: The signal generating module also includes a start signal generating unit and a GOA circuit. The pulse signal generating unit is arranged in the start signal generating unit. The start signal generating unit is used to generate a start signal including the pulse signal. The GOA circuit is connected to the start signal generating unit. The GOA circuit is used to generate multiple levels of the light emitting control signal according to the start signal including the pulse signal.

13. The drive system according to claim 12, characterized in that: The driving system further includes a driving chip, and the start signal generating unit is arranged in the driving chip.

14. The drive system according to claim 8, characterized in that: The signal generating module further includes a first GOA circuit, which is connected to the pulse signal generating unit and is used to generate multiple levels of the pulse signal.

Images