Display device

Abstract

The present invention provides a display device capable of suppressing moisture from entering a light-emitting layer and suppressing stress generated in a stacked structure. The display device (1) includes: a flexible first substrate (21); a thin-film transistor layer (40) disposed above the first substrate (21); a first planarization layer (51) formed of an organic material and disposed above the thin-film transistor layer; a first barrier layer (61) formed of an inorganic material and disposed above the first planarization layer; a first electrode (71) disposed above the first barrier layer. A first through-hole (51h) penetrating the first planarization layer is formed in the first planarization layer, and a second through-hole (61h) penetrating the first barrier layer and at least a part of which is connected to the first through-hole (51h) is formed in the first barrier layer. A part of the first electrode (71) is filled in the first through-hole (51h) and the second through-hole (61h). In a top view, the area of the second through-hole (61h) is 30% or more of the area of the first electrode (71).

Description

Technical Field

[0001] The present invention relates to a display device. Background Art

[0002] In recent years, display devices using flexible substrates formed of organic materials such as plastics have been proposed. In such a display device, as a light-emitting element, for example, an organic EL (Electro-Luminescence) element is used. Such an organic EL element may deteriorate due to the ingress of moisture. In particular, in the case of using a substrate formed of an organic material, it is difficult to suppress the ingress of moisture in the substrate compared to the case of using a substrate formed of an inorganic material such as glass. Therefore, moisture may ingress into the organic EL element from the substrate side.

[0003] In the image display device described in Patent Document 1, it is desired to suppress the ingress of moisture from the organic planarization film into the light-emitting layer by disposing an inorganic insulating film between the light-emitting layer included in the organic EL element and the organic planarization film covering the thin film transistor.

[0004] Prior Art Documents

[0005] Patent Document 1: Japanese Patent Laid-Open Publication No. 2016-24887

[0006] However, in the image display device described in Patent Document 1, when forming the electrode film disposed on the upper surface of the inorganic insulating film, since the organic planarization film is heated, gas is generated in the organic planarization film. This gas cannot permeate through the inorganic insulating film and remains in the organic planarization film, thereby applying stress to the inorganic insulating film. Therefore, the inorganic insulating film may peel off from the organic planarization film. Summary of the Invention

[0007] The present invention has been completed to solve the above problems, and provides a display device capable of suppressing the ingress of moisture into the light-emitting layer and capable of suppressing the stress generated in the laminated structure.

[0008] To achieve the above object, a display device according to one aspect of the present invention includes: a flexible first substrate; a first lower barrier layer disposed above one main surface of the first substrate and formed of an inorganic material; a thin film transistor layer disposed above the first lower barrier layer and including thin film transistors; a first planarization layer disposed above the thin film transistor layer and formed of an organic material; a first barrier layer disposed above the first planarization layer and formed of an inorganic material; a first electrode disposed above the first barrier layer; a second electrode disposed above the first electrode; and a light emitting layer disposed between the first electrode and the second electrode and emitting light by supplying current through the first electrode and the second electrode. A first through hole penetrating the first planarization layer is formed in the first planarization layer, and a second through hole is formed in the first barrier layer. The second through hole penetrates the first barrier layer and at least a part thereof is connected to the first through hole. A part of the first electrode is filled in the first through hole and the second through hole. When looking down at the main surface of the first substrate, the area of the second through hole is 30% or more of the area of the first electrode.

[0009] In addition, in order to achieve the above object, a display device according to another aspect of the present invention includes: a flexible first substrate; a first lower barrier layer disposed above one main surface of the first substrate and formed of an inorganic material; a thin film transistor layer disposed above the first lower barrier layer and including thin film transistors; a first planarization layer disposed above the thin film transistor layer and formed of an organic material; a first barrier layer disposed above the first planarization layer and formed of an inorganic material; a first electrode disposed above the first barrier layer; a second electrode disposed above the first electrode; and a light-emitting layer disposed between the first electrode and the second electrode and emitting light by supplying current through the first electrode and the second electrode; a second planarization layer disposed between the thin film transistor layer and the first planarization layer and formed of an organic material; a second barrier layer disposed between the second planarization layer and the first planarization layer and formed of an inorganic material; and a relay electrode disposed between the second barrier layer and the first planarization layer. A first through-hole penetrating the first planarization layer is formed in the first planarization layer, a second through-hole is formed in the first barrier layer, the second through-hole penetrates the first barrier layer and at least a part thereof is connected to the first through-hole, a third through-hole penetrating the second planarization layer is formed in the second planarization layer, a fourth through-hole is formed in the second barrier layer, the fourth through-hole penetrates the second barrier layer and at least a part thereof is connected to the third through-hole, a part of the first electrode is filled in the first through-hole and the second through-hole, a part of the relay electrode is filled in the third through-hole and the fourth through-hole, at least a part of the fourth through-hole is disposed at a position different from that of the second through-hole when looking down on the main surface of the first substrate, and the relay electrode is electrically connected to the first electrode in the first through-hole.

[0010] According to the present invention, a display device capable of suppressing moisture from entering the light-emitting layer and capable of suppressing stress generated in the stacked structure can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a block diagram showing an example of the overall configuration of the display device according to Embodiment 1.

[0012] Figure 2 It is a schematic plan view showing an example of the configuration of a sub-pixel according to Embodiment 1.

[0013] Figure 3 It is a schematic cross-sectional view showing the stacked structure of a sub-pixel according to Embodiment 1.

[0014] Figure 4 It is a flowchart showing the process of the manufacturing method of the display device according to Embodiment 1.

[0015] Figure 5 It is a schematic cross-sectional view showing the stacked structure of sub-pixels of the display device of Embodiment 2.

[0016] Figure 6 It is a schematic top view showing an example of the configuration of sub-pixels of the display device of Embodiment 3.

[0017] Figure 7 It is a schematic cross-sectional view showing the stacked structure of sub-pixels of the display device of Embodiment 3.

[0018] Figure 8 It is a schematic top view showing an example of the configuration of sub-pixels of the display device of Embodiment 4.

[0019] Figure 9 It is a schematic cross-sectional view showing the stacked structure of sub-pixels of the display device of Embodiment 4.

[0020] Figure 10 It is a schematic top view showing an example of the configuration of sub-pixels of the display device of Embodiment 5.

[0021] Figure 11 It is a schematic cross-sectional view showing the stacked structure of sub-pixels of the display device of Embodiment 5.

[0022] Figure 12 It is a schematic cross-sectional view showing the stacked structure of sub-pixels of the display device of Embodiment 6.

[0023] Explanation of reference numerals:

[0024] 1 Display device

[0025] 10 Pixel

[0026] 11B, 11G, 11R, 111R, 211R, 311R, 411R, 511R Sub-pixels

[0027] 12 Display unit

[0028] 13 Gate driver

[0029] 15 Data driver

[0030] 16 Controller

[0031] 17 Power supply

[0032] 21 First substrate

[0033] 21a, 21b Main surface

[0034] 31 First lower barrier layer

[0035] 40 Thin film transistor layer

[0036] 51 First planarization layer

[0037] 51h First through-hole

[0038] 61, 261, 361, 461 First barrier layer

[0039] 61h, 261h, 361h, 461h Second through-hole

[0040] 71, 271, 371, 471, 571 First electrode

[0041] 72 Second electrode

[0042] 74 Light-emitting layer

[0043] 80 Cofferdam

[0044] 122 Second substrate

[0045] 132 Second lower barrier layer

[0046] 261ha, 261hb, 261hc, 361ha Through-hole

[0047] 452 Second planarization layer

[0048] 452h Third through-hole

[0049] 462, 562 Second barrier layer

[0050] 462h Fourth through-hole

[0051] 473 Relay electrode

[0052] 562a Fifth through-hole Detailed implementation mode

[0053] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the embodiments described below all represent a specific example of the present invention. Therefore, the numerical values, shapes, materials, constituent elements, arrangement positions and connection forms of the constituent elements, processes, and the order of processes shown in the following embodiments are examples and are not intended to limit the present invention. Therefore, constituent elements that are not described in the independent claims representing the uppermost concept of the present invention among the constituent elements of the following embodiments are described as optional constituent elements.

[0054] In addition, each figure is a schematic diagram and is not necessarily a strictly drawn figure. Therefore, the scales and the like are not necessarily the same in each figure. In addition, in each figure, substantially the same constituent elements are labeled with the same reference numerals, and repeated descriptions are omitted or simplified.

[0055] In addition, in this specification, terms such as "above" and "below" do not refer to above (vertically above) and below (vertically below) in the absolute spatial sense, but are used as terms defined by the relative positional relationship based on the stacking order of the stacked components. In addition, terms such as "above" and "below" are applicable not only to the case where two components are arranged at intervals from each other and there are other components between the two components, but also to the case where the two components are arranged in contact with each other.

[0056] (Embodiment 1)

[0057] The display device of Embodiment 1 will be described.

[0058] [1-1. Overall Configuration]

[0059] First, with reference to Figure 1 the overall configuration of the display device of this embodiment will be described. Figure 1 is a block diagram showing an example of the overall configuration of the display device 1 of this embodiment.

[0060] As Figure 1 shown, the display device 1 of this embodiment includes a display unit 12, a gate driver 13, a data driver 15, a controller 16, and a power supply 17. In this embodiment, the display device 1 is an active matrix type color display device.

[0061] The display unit 12 is an image display unit having a plurality of pixels 10 arranged in a matrix. Each of the plurality of pixels 10 has at least one sub-pixel. In this embodiment, each of the plurality of pixels 10 has sub-pixels 11R, 11G, and 11B corresponding to the emission colors of R, G, and B, respectively. Each of the plurality of pixels 10 includes a pixel circuit that controls the light emission of the pixel. Each pixel circuit has one or more sub-pixel circuits. Each of the sub-pixels 11R, 11G, and 11B includes a sub-pixel circuit that controls the light emission of the sub-pixel.

[0062] The display unit 12 has at least one control signal line cs(i) (i is an integer from 1 to N, where N is an integer greater than 1 representing the number of rows of the matrix) connected to the pixel circuits included in the plurality of pixels 10 arranged in each row of the matrix. The control signal line cs(i) transmits the control signal supplied from the gate driver 13 to the pixel 10.

[0063] The display unit 12 has three data signal lines Ldr(j), Ldg(j), and Ldb(j) (where j is an integer from 1 to M, and M is an integer greater than 1 representing the number of columns in the matrix) connected to the respective pixel circuits of the multiple pixels 10 arranged in each column of the matrix. The data signal lines Ldr(j), Ldg(j), and Ldb(j) respectively transmit data signals associated with the emission luminances of R, G, and B supplied from the data driver 15 to the pixel circuits of the pixels 10.

[0064] The controller 16 receives an image signal from the outside and supplies signals for displaying an image of each frame corresponding to the image signal to the gate driver 13 and the data driver 15 in the display unit 12.

[0065] The gate driver 13 is a circuit that outputs a control signal to the display unit 12 according to a signal from the controller 16. The gate driver 13 outputs one driving pulse in sequence for each horizontal period.

[0066] The data driver 15 is a circuit that outputs a data signal to the display unit 12 according to a signal from the controller 16.

[0067] The power supply 17 supplies power and the like to the display unit 12, the gate driver 13, the data driver 15, and the controller 16.

[0068] [1-2. Structure of Sub-pixels]

[0069] Next, with reference to Figure 2 and Figure 3 the structure of the sub-pixel 11R will be described. Figure 2 is a schematic top view showing an example of the structure of the sub-pixel 11R of the present embodiment. Figure 2 is a top view of the sub-pixel 11R when looking down on the main surface 21a of the first substrate 21 described later. In Figure 2 the outlines of the first electrode 71 included in the sub-pixel 11R, and the outlines of the first through-hole 51h and the second through-hole 61h are indicated by dashed lines. Figure 3 is a schematic cross-sectional view showing the stacked structure of the sub-pixel 11R of the present embodiment. In Figure 3 the cross-section along line III-III of Figure 2 is shown. Additionally, in each of the figures after Figure 2 the X-axis, Y-axis, and Z-axis are shown. The X-axis, Y-axis, and Z-axis represent a right-handed orthogonal coordinate system. In the present embodiment, the sub-pixels 11R, 11G, and 11B included in the pixel 10 have the same structure as each other. Hereinafter, the structure of the pixel 10 will be described focusing on the sub-pixel 11R.

[0070] As shown in Figure 3As shown, the sub-pixel 11R of the display device 1 according to the present embodiment includes a first substrate 21, a first lower barrier layer 31, a thin film transistor layer 40, a first planarization layer 51, a first barrier layer 61, a first electrode 71, a light emitting layer 74, and a second electrode 72. In the present embodiment, the sub-pixel 11R further includes a bank 80.

[0071] The first substrate 21 is a flexible plate-like member that serves as a base for the sub-pixel 11R. The first substrate 21 has a main surface 21a and a main surface 21b. As the first substrate 21, for example, a substrate containing an organic material such as a polyimide resin including aromatic polyimide, fluorinated polyimide, or an acrylic resin can be used.

[0072] The first lower barrier layer 31 is an insulating layer formed of an inorganic material and disposed above one main surface 21a of the first substrate 21. As the first lower barrier layer 31, silicon oxide (SiO x ), silicon nitride (SiN x ), aluminum oxide (Al x O y ) and other inorganic material films can be used. Through the first lower barrier layer 31, moisture can be prevented from infiltrating into the light emitting layer 74 from the first substrate 21.

[0073] The thin film transistor layer 40 is a layer disposed above the first lower barrier layer 31 and has a circuit including thin film transistors and the like formed thereon. The thin film transistor layer 40 includes the main part of the sub-pixel circuit. The thin film transistor layer 40 includes, for example, a semiconductor layer containing an oxide semiconductor or the like, an insulating layer, and a conductive layer.

[0074] The first planarization layer 51 is an insulating layer formed of an organic material and disposed above the thin film transistor layer 40. A first through-hole 51h penetrating the first planarization layer 51 is formed in the first planarization layer 51. The first planarization layer 51 is formed of an organic material such as a polyimide resin including fluorinated polyimide or an acrylic resin, for example.

[0075] The first barrier layer 61 is an insulating layer formed of an inorganic material and disposed above the first planarization layer 51. As the first barrier layer 61, inorganic material films such as silicon oxide, silicon nitride, and aluminum oxide can be used. The first barrier layer 61 prevents moisture from infiltrating into the light emitting layer 74 from the first planarization layer 51 and the layers below it.

[0076] A second through-hole 61h penetrating the first barrier layer 61 and at least partially connected to the first through-hole 51h is formed in the first barrier layer 61. Thus, although the second through-hole 61h is formed in the first barrier layer 61, a part of the first electrode 71 is filled in the second through-hole 61h, so that moisture can be prevented from infiltrating into the light emitting layer 74 through the second through-hole 61h.

[0077] In addition, as Figure 2 shown, when looking down at the main surface 21a of the first substrate 21, the area of the second through-hole 61h is 30% or more of the area of the first electrode 71. The area of the second through-hole 61h may also be 50% or more of the area of the first electrode 71. In addition, the area of the second through-hole 61h may also be 70% or more of the area of the first electrode 71. The effects resulting from the relationship between the area of the second through-hole 61h and the area of the first electrode 71 will be described later.

[0078] The first electrode 71 is a conductive layer disposed above the first barrier layer 61. The first electrode 71 and the second electrode 72 function as electrodes for supplying current to the light-emitting layer 74. In the present embodiment, the first electrode 71 is an anode to which a higher potential than the second electrode 72 is applied. The first electrode 71 is also disposed in the first through-hole 51h and the second through-hole 61h. In other words, a part of the first electrode 71 is filled in the first through-hole 51h and the second through-hole 61h. In the present embodiment, the first electrode 71 is electrically connected to the conductive layer included in the thin-film transistor layer 40 via the first through-hole 51h and the second through-hole 61h. In this way, the first through-hole 51h and the second through-hole 61h function as contact holes. The first electrode 71 is formed of a metal material such as an Ag alloy or Al, which has a high reflectance for light generated in the light-emitting layer 74. Thereby, the light generated in the light-emitting layer 74 can be efficiently utilized.

[0079] The second electrode 72 is a conductive layer disposed above the first electrode 71. The second electrode 72 functions as an electrode for supplying current to the light-emitting layer 74. In the present embodiment, the second electrode 72 is a cathode to which a lower potential than the first electrode 71 is applied. The second electrode 72 is formed of a conductive material such as indium tin oxide (ITO), which has light-transmittance for light generated in the light-emitting layer 74.

[0080] The light-emitting layer 74 is a layer disposed between the first electrode 71 and the second electrode 72 and emits light by supplying current via the first electrode 71 and the second electrode 72. The light-emitting layer 74 includes, for example, a hole injection layer, a hole transport layer, an organic EL layer, an electron transport layer, an electron injection layer, and the like. Thereby, an organic EL element can be formed by the light-emitting layer 74, the first electrode 71, and the second electrode 72. In addition, the light-emitting layer 74 may also include an inorganic material layer. In addition, in the present embodiment, the light-emitting layer 74 is disposed in the region surrounded by the dam 80, but may also be disposed above the dam 80.

[0081] The bank 80 is a wall-shaped insulating layer that divides the pixel 10 and the sub-pixels 11R, 11G, and 11B. In other words, the bank 80 is disposed on the boundary between adjacent sub-pixels. The bank 80 is formed using, for example, a fluorinated polyimide-based material, an acrylic material, a phenol resin, or the like. The first electrode 71 and the light-emitting layer 74 are disposed in the region surrounded by the bank 80. In addition, as Figure 3 shown, the second electrode 72 is disposed above the light-emitting layer 74 and the bank 80. That is, the second electrode 72 is disposed on the entire surface of the region in the display unit 1 where a plurality of pixels 10 are disposed.

[0082] In addition, other layers or the like may be formed above the second electrode 72. For example, a polarizing plate or the like may be disposed above the second electrode 72. In addition, a resin film, an inorganic barrier film, or the like may be disposed between the second electrode 72 and the polarizing plate. In addition, an adhesive for bonding the polarizing plate or the like may be disposed between the polarizing plate and the second electrode 72.

[0083] [1-3. Manufacturing method]

[0084] Next, with reference to Figure 4 the manufacturing method of the display device 1 of the present embodiment will be described. Figure 4 is a flowchart showing the process of the manufacturing method of the display device 1 of the present embodiment.

[0085] As Figure 4 shown, first, a first substrate 21 (S10) is prepared.

[0086] Next, a first lower barrier layer 31 disposed above the main surface 21a of the first substrate 21 is formed (S12). Specifically, as the first lower barrier layer 31, a silicon oxide film, a silicon nitride film, an aluminum oxide film, or the like is formed in at least the region corresponding to a plurality of pixels 10 on the main surface 21a of the first substrate 21. For example, the first lower barrier layer 31 can be formed using a plasma CVD (Chemical Vapor Deposition) method, an ALD (Atomic Layer Deposition) method, or the like.

[0087] Next, a thin-film transistor layer 40 including thin-film transistors disposed above the first lower barrier layer 31 is formed (S14). Specifically, each conductive layer, each insulating layer, and each semiconductor layer included in the thin-film transistor layer 40 are formed. For example, each conductive layer and each semiconductor layer can be formed using a sputtering method or the like. For example, each insulating layer can be formed using a plasma CVD method or the like. In addition, for example, patterning of each layer can be performed using a photolithography method and an etching method or the like.

[0088] Next, a first planarization layer 51 is formed above the thin film transistor layer 40 (S16). For example, a solution obtained by dissolving a polyimide-based resin in a solvent is coated on the thin film transistor layer 40, and then fired, thereby forming the first planarization layer 51.

[0089] Next, a first through-hole 51h penetrating the first planarization layer 51 is formed in the first planarization layer 51 (S18). For example, the first through-hole 51h can be formed using photolithography and etching methods. Alternatively, the first through-hole 51h can be formed simultaneously when forming the first planarization layer 51. For example, by exposing and developing the polyimide-based resin, the first through-hole 51h can be patterned simultaneously with the formation of the first planarization layer 51.

[0090] Next, a first barrier layer 61 is formed above the first planarization layer 51 (S20). Specifically, as the first barrier layer 61, a silicon oxide film, a silicon nitride film, an aluminum oxide film, etc. are formed on the first planarization layer 51. For example, the first barrier layer 61 can be formed using plasma CVD method, ALD method, etc.

[0091] Next, a second through-hole 61h penetrating the first barrier layer 61 is formed in the first barrier layer 61 (S22). For example, the second through-hole 61h can be formed using photolithography and etching methods.

[0092] Next, a first electrode 71 is formed above the first barrier layer 61 (S24). Specifically, after forming a conductive film such as an Ag alloy film on the upper surface of the first barrier layer 61 and inside the first through-hole 51h and the second through-hole 61h using a sputtering method or the like, the conductive film is patterned into a specified shape using photolithography and etching methods, thereby forming the first electrode 71. When forming such a first electrode 71, the first planarization layer 51 near the second through-hole 61h is heated. Along with this, gas is generated from the first planarization layer 51 near the second through-hole 61h. Since the generated gas is trapped by the first barrier layer 61 and the first electrode 71, stress is generated in the first barrier layer 61 near the second through-hole 61h. However, in the present embodiment, since the area of the second through-hole 61h in plan view is 30% or more of the area of the first electrode 71, the stress can be dispersed over a relatively wide range. Therefore, peeling and cracking of the first barrier layer 61 caused by stress can be suppressed. In addition, since the first electrode 71 filled in the second through-hole 61h is formed of a metal material that is less likely to crack and has a higher moisture barrier property than an inorganic film such as SiN, moisture intrusion from the second through-hole 61h into the light-emitting layer 74 can be suppressed.

[0093] Next, a dike is formed above the first barrier layer 61 (S26). Specifically, a solution obtained by dissolving a phenol resin in a solvent is uniformly coated on the entire surface above the first barrier layer 61, that is, on the first barrier layer 61 and the first electrode 71, and then exposure and development are performed to form a dike 80 having a specified shape.

[0094] Next, a light-emitting layer 74 is formed above the first electrode 71 (S28). Specifically, the light-emitting layer 74 is formed in the region surrounded by the dike 80. For example, a coating method using inkjet (in other words, a printing method) can be used to form each organic material layer included in the light-emitting layer 74. Alternatively, a part of the light-emitting layer 74 may be formed on the dike 80.

[0095] Next, a second electrode 72 is formed above the light-emitting layer 74 and the dike 80 (S30). Specifically, the second electrode 72 is formed on the entire surface of the light-emitting layer 74 and the dike 80 using a sputtering method or the like.

[0096] Through the manufacturing method described above, the display unit 12 of the display device 1 can be manufactured.

[0097] [1-4. Summary]

[0098] As described above, the display device 1 of the present embodiment includes: a flexible first substrate 21; a first lower barrier layer 31 disposed above one main surface 21a of the first substrate 21 and formed of an inorganic material; a thin-film transistor layer 40 disposed above the first lower barrier layer 31 and including thin-film transistors; a first planarization layer 51 disposed above the thin-film transistor layer 40 and formed of an organic material; a first barrier layer 61 disposed above the first planarization layer 51 and formed of an inorganic material; a first electrode 71 disposed above the first barrier layer 61; a second electrode 72 disposed above the first electrode 71; and a light-emitting layer 74 disposed between the first electrode 71 and the second electrode 72 and emitting light by supplying current via the first electrode 71 and the second electrode 72. A first through-hole 51h penetrating the first planarization layer 51 is formed in the first planarization layer 51. A second through-hole 61h penetrating the first barrier layer 61 and at least partially connected to the first through-hole 51h is formed in the first barrier layer 61. A part of the first electrode 71 is filled in the first through-hole 51h and the second through-hole 61h. When the main surface 21a of the first substrate 21 is viewed from above, the area of the second through-hole 61h is 30% or more of the area of the first electrode 71.

[0099] Thus, since the first barrier layer 61 is disposed below the light-emitting layer 74 and the first electrode 71 is filled in the second through-hole 61h formed in the first barrier layer 61, it is possible to suppress moisture from entering the light-emitting layer 74 from a position below the first barrier layer 61. In addition, when the first electrode 71 is formed, the first planarization layer 51 near the second through-hole 61h is heated. Along with this, gas is generated from the first planarization layer 51 near the second through-hole 61h. The generated gas is trapped by the first barrier layer 61, so stress is generated in the first barrier layer 61 near the second through-hole 61h. Conventionally, due to the idea of ensuring the required contact resistance value and covering with the first barrier layer 61 having as wide an area as possible to block moisture, the area of the portion penetrating the first barrier layer 61 in the second through-hole 61h when viewed from above is about several percent of the area of the first electrode 71. Therefore, stress is applied to the vicinity of the second through-hole 61h of the first barrier layer 61, and the first barrier layer 61 may peel off. However, in the present embodiment, the area of the portion penetrating the first barrier layer 61 in the second through-hole 61h when viewed from above is 30% or more of the area of the first electrode 71. Therefore, the stress can be dispersed over a relatively wide range. Therefore, peeling and cracking of the first barrier layer 61 caused by stress can be suppressed.

[0100] (Embodiment 2)

[0101] The display device according to Embodiment 2 will be described. The display device according to the present embodiment is different from the display device 1 according to Embodiment 1 in that, in addition to having the first lower barrier layer 31 below the thin-film transistor layer 40, it further has another layer of barrier layer. Hereinafter, with reference to Figure 5 The display device according to the present embodiment will be described centering on the differences from the display device 1 according to Embodiment 1. Figure 5 It is a schematic cross-sectional view showing the stacked structure of the sub-pixel 111R of the display device according to the present embodiment.

[0102] As Figure 5 shown, similar to the sub-pixel 11R of Embodiment 1, the sub-pixel 111R of the present embodiment includes a first substrate 21, a first lower barrier layer 31, a thin-film transistor layer 40, a first planarization layer 51, a first barrier layer 61, a first electrode 71, a light-emitting layer 74, a second electrode 72, and a dam 80. In the present embodiment, the sub-pixel 111R further includes a second substrate 122 and a second lower barrier layer 132.

[0103] The second substrate 122 is a flexible plate-like member disposed between the first lower barrier layer 31 and the thin-film transistor layer 40. As the second substrate 122, for example, a substrate containing an organic material such as a polyimide-based resin such as fluorinated polyimide or an acrylic-based resin can be used.

[0104] The second lower barrier layer 132 is an insulating layer formed of an inorganic material and disposed between the second substrate 122 and the thin film transistor layer 40. As the second lower barrier layer 132, an inorganic material film such as silicon oxide, silicon nitride, or aluminum oxide can be used.

[0105] As described above, the display device of this embodiment includes the second lower barrier layer 132 in addition to the first lower barrier layer 31. Therefore, even if cracks or the like occur in one of the barrier layers of the first lower barrier layer 31 and the second lower barrier layer 132, the other barrier layer can suppress the intrusion of moisture from the first substrate 21 toward the light-emitting layer 74. Therefore, the intrusion of moisture into the light-emitting layer 74 can be further reliably suppressed.

[0106] (Implementation 3)

[0107] A display device according to Embodiment 3 will be described. The display device of this embodiment is different from the display device 1 of Embodiment 1 in terms of the shape of the first through-hole. Figure 6 as well as Figure 7 The display device of this embodiment will be described mainly focusing on differences from the display device 1 of the first embodiment. Figure 6 2 is a schematic plan view showing an example of the structure of a sub-pixel 211R of the display device of this embodiment. Figure 6 In FIG. 1 , the outline of the first electrode 271 included in the sub-pixel 211R and the outlines of the first through-portion 51 h and the second through-portion 261 h are indicated by dotted lines. Figure 7 2 is a schematic cross-sectional view showing the stacked structure of the sub-pixel 211R of the display device of this embodiment. Figure 7 It is indicated in Figure 6 The cross section of line VII-VII.

[0108] like Figure 7 As shown, the sub-pixel 211R of this embodiment includes a first substrate 21 , a first lower barrier layer 31 , a thin film transistor layer 40 , a first planarization layer 51 , a first barrier layer 261 , a first electrode 271 , a light emitting layer 74 , a second electrode 72 , and a bank 80 .

[0109] Similar to the first barrier layer 61 in the first embodiment, the first barrier layer 261 in this embodiment is an insulating layer formed of an inorganic material and disposed above the first planarization layer 51. The first barrier layer 261 in this embodiment has a second through portion 261h penetrating the first barrier layer 261. Figure 6 as well as Figure 7 As shown, the second through-hole portion 261h includes a first electrode 271 along the long side direction (ie, Figure 6A plurality of elongated through-holes 261ha, 261hb, and 261hc extending in the Y-axis direction.

[0110] As Figure 7 shown, the first electrode 271 of the present embodiment is a conductive layer disposed above the first barrier layer 261. A part of the first electrode 271 is filled in the first through-hole 51h and the second through-hole 261h.

[0111] As described above, the second through-hole 261h of the present embodiment includes a plurality of elongated through-holes 261ha, 261hb, and 261hc extending along the long side direction of the first electrode 271. Thus, the contact area between the first electrode 271 and the first barrier layer 261 and the first planarization layer 51 can be made larger than the contact area between the first electrode 71 and the first barrier layer 61 and the first planarization layer 51 in Embodiment 1. Therefore, the adhesion (in other words, the bonding strength) between the first electrode 271 and the first barrier layer 261 and the first planarization layer 51 can be improved, and thus peeling of the first electrode 271 can be suppressed. In addition, some of the through-holes among the plurality of through-holes included in the second through-hole 261h may not be connected to the first through-hole 51h. In the present embodiment, the through-hole 261hb is connected to the first through-hole 51h, and the through-holes 261ha and 261hc are not connected to the first through-hole 51h.

[0112] In addition, each of the through-holes 261ha, 261hb, and 261hc extends along the long side direction of the first electrode 271. A part of the upper surface of the first electrode 271 located above each through-hole may be slightly recessed. That is, a recess extending along the long side direction of the first electrode 271 may be formed on the upper surface of the first electrode 271. When forming the light-emitting layer 74 on the upper surface of such a first electrode 271 by an inkjet coating method, if a solution that becomes the raw material of the light-emitting layer 74 is coated in a direction intersecting the long side direction of the recess, a portion where the solution is not coated may be generated in the recess.

[0113] In the present embodiment, since each through-hole extends along the long side direction of the first electrode 271, this recess also extends along the long side direction of the first electrode 271. Generally, since the solution is coated along the long side direction of the sub-pixel 211R, that is, the long side direction of the first electrode 271, when forming the light-emitting layer 74 of the present embodiment, the solution is coated along the long side direction of the recess. Therefore, the interruption of the coating of the solution at the recess can be reduced. Thus, the uniformity of the film thickness of the light-emitting layer 74 can be improved.

[0114] (Embodiment 4)

[0115] A description will be given of the display device according to Embodiment 4. The display device according to this embodiment is different from the display device 1 according to Embodiment 1 in terms of the shape of the first through-hole. Hereinafter, with reference to Figure 8 A description will be given of the display device according to this embodiment, centering on the differences from the display device 1 according to Embodiment 1. Figure 8 It is a schematic plan view showing an example of the configuration of the sub-pixel 311R of the display device according to this embodiment. In Figure 8 The outline of the first electrode 371 included in the sub-pixel 311R, and the outlines of the first through-hole 51h and the second through-hole 361h are indicated by broken lines. Figure 9 It is a schematic cross-sectional view showing the stacked structure of the sub-pixel 311R of the display device according to this embodiment. In Figure 9 It shows Figure 8 a cross-section of the IX-IX line of

[0116] As Figure 9 shown, the sub-pixel 311R according to this embodiment includes a first substrate 21, a first lower barrier layer 31, a thin film transistor layer 40, a first planarization layer 51, a first barrier layer 361, a first electrode 371, a light-emitting layer 74, a second electrode 72, and a dam 80.

[0117] Similar to the first barrier layer 61 according to Embodiment 1, the first barrier layer 361 according to this embodiment is an insulating layer formed of an inorganic material and disposed above the first planarization layer 51. A second through-hole 361h penetrating the first barrier layer 361 is formed in the first barrier layer 361 according to this embodiment. As Figure 8 and Figure 9 shown, the second through-hole 361h includes a plurality of through-holes 361ha arranged in a staggered lattice pattern.

[0118] As Figure 9 shown, the first electrode 371 according to this embodiment is a conductive layer disposed above the first barrier layer 361. A part of the first electrode 371 is filled in the first through-hole 51h and the second through-hole 361h.

[0119] As described above, the second through-hole 361h according to this embodiment includes a plurality of through-holes 361ha arranged in a staggered lattice pattern. Thereby, the contact area between the first electrode 371 and the first barrier layer 361 and the first planarization layer 51 can be made larger than the contact area between the first electrode 71 and the first barrier layer 61 and the first planarization layer 51 according to Embodiment 1. Therefore, the adhesion (in other words, the bonding strength) between the first electrode 371 and the first barrier layer 361 and the first planarization layer 51 can be improved, and thus peeling of the first electrode 371 can be suppressed.

[0120] (Embodiment 5)

[0121] A display device according to Embodiment 5 will be described. The display device of this embodiment is different from the display device 1 of Embodiment 1 mainly in that, in addition to having the first barrier layer 61 above the thin-film transistor layer 40, it also has another layer of barrier layer. Hereinafter, with reference to Figure 10 and Figure 11 The display device of this embodiment will be described centering on the differences from the display device 1 of Embodiment 1. Figure 10 FIG. is a schematic plan view showing an example of the configuration of the sub-pixel 411R of the display device of this embodiment. In Figure 10 The outlines of the first electrode 471 and the relay electrode 473 included in the sub-pixel 411R, and the outlines of the first through-hole 51h, the second through-hole 461h, the third through-hole 452h, and the fourth through-hole 462h are shown by dotted lines. Figure 11 FIG. is a schematic cross-sectional view showing the stacked structure of the sub-pixel 411R of the display device of this embodiment. In Figure 11 is shown Figure 10 The cross-section of the XI-XI line of.

[0122] As Figure 11 shown, the sub-pixel 411R of this embodiment includes a first substrate 21, a first lower barrier layer 31, a thin-film transistor layer 40, a first planarization layer 51, a first barrier layer 461, a first electrode 471, a light-emitting layer 74, a second electrode 72, and a dam 80. In this embodiment, the sub-pixel 411R further includes a second planarization layer 452, a second barrier layer 462, and a relay electrode 473.

[0123] Similar to the first barrier layer 61 of Embodiment 1, the first barrier layer 461 of this embodiment is an insulating layer formed of an inorganic material and disposed above the first planarization layer 51. A second through-hole 461h penetrating the first barrier layer 461 is formed in the first barrier layer 461 of this embodiment. In this embodiment, as Figure 10 shown, when looking down at the main surface 21a of the first substrate 21, the area of the second through-hole 461h may not be 30% or more of the area of the first electrode 471.

[0124] As Figure 11 shown, the first electrode 471 of this embodiment is a conductive layer disposed above the first barrier layer 461. A part of the first electrode 471 is filled in the first through-hole 51h and the second through-hole 461h.

[0125] The second planarization layer 452 is an insulating layer formed of an organic material and disposed between the thin film transistor layer 40 and the first planarization layer 51. A third through-hole 452h penetrating the second planarization layer 452 is formed in the second planarization layer 452. The second planarization layer 452 is formed of an organic material such as a polyimide resin such as fluorinated polyimide or an acrylic resin.

[0126] The second barrier layer 462 is an insulating layer formed of an inorganic material and disposed between the second planarization layer 452 and the first planarization layer 51. As the second barrier layer 462, an inorganic material film such as a silicon oxide, a silicon nitride, or an aluminum oxide can be used. The second barrier layer 462 inhibits moisture from infiltrating into the light emitting layer 74 from the second planarization layer 452 and the layers below it.

[0127] A fourth through-hole 462h penetrating the second barrier layer 462 and at least partially connected to the third through-hole 452h is formed in the second barrier layer 462. Thus, although the fourth through-hole 462h is formed in the second barrier layer 462, a part of a relay electrode 473 described later is filled in the fourth through-hole 462h, so that moisture can be inhibited from infiltrating into the light emitting layer 74 via the fourth through-hole 462h. In addition, when looking down at the main surface 21a of the first substrate 21, at least a part of the fourth through-hole 462h is disposed at a position different from that of the second through-hole 461h.

[0128] The relay electrode 473 is a conductive layer disposed between the second barrier layer 462 and the first planarization layer 51. In the present embodiment, the relay electrode 473 is electrically connected to the conductive layer included in the thin film transistor layer 40 via the third through-hole 452h and the fourth through-hole 462h. Thus, the third through-hole 452h and the fourth through-hole 462h function as contact holes. The relay electrode 473 is formed of a metal material such as an Ag alloy or Al, for example. The relay electrode 473 is also disposed in the third through-hole 452h and the fourth through-hole 462h. In other words, a part of the relay electrode 473 is filled in the third through-hole 452h and the fourth through-hole 462h. In addition, the relay electrode 473 is electrically connected to the first electrode 471 in the first through-hole 51h. Thereby, the first electrode 471 is electrically connected to the conductive layer included in the thin film transistor layer 40 via the relay electrode 473.

[0129] As described above, the display device of the present embodiment includes not only the first barrier layer 461 but also the second barrier layer 462. Since the relay electrode 473 is filled in the fourth through-hole 462h formed in the second barrier layer 462, it is possible to suppress moisture from entering the light-emitting layer 74 from the second planarization layer 452 via the fourth through-hole 462h. Thus, even when cracks or the like occur in one of the barrier layers, i.e., the first barrier layer 461 and the second barrier layer 462, moisture can be suppressed from entering the light-emitting layer 74 from the second planarization layer 452 by the other barrier layer. Therefore, it is possible to more reliably suppress moisture from entering the light-emitting layer 74.

[0130] In addition, regarding the manufacturing method of the display device of the present embodiment, the second planarization layer 452, the second barrier layer 462, and the relay electrode 473 can be manufactured by the same manufacturing methods as those of the first planarization layer 51, the first barrier layer 61, and the first electrode 71 in Embodiment 1. Here, when the relay electrode 473 is formed, the second planarization layer 452 near the fourth through-hole 462h is heated. Along with this, gas is generated from the second planarization layer 452 near the fourth through-hole 462h. The generated gas is trapped by the second barrier layer 462 and the relay electrode 473, so stress is generated in the second barrier layer 462 near the fourth through-hole 462h.

[0131] However, in the present embodiment, when looking down at the main surface 21a of the first substrate 21, at least a part of the fourth through-hole 462h is arranged at a position different from that of the second through-hole 461h. Thus, the stress generation sites are dispersed near the fourth through-hole 462h and near the second through-hole 461h. Therefore, compared with the case where the fourth through-hole 462h and the second through-hole 461h are formed at the same position when looking down at the main surface 21a of the first substrate 21, stress can be dispersed. Therefore, peeling and cracking of the first barrier layer 461 and the second barrier layer 462 caused by stress can be suppressed.

[0132] (Embodiment 6)

[0133] The display device of Embodiment 6 will be described. The display device of the present embodiment is different from the display device of Embodiment 5 in that through-holes for releasing gas generated from the second planarization layer are formed in the second barrier layer. Hereinafter, with reference to Figure 12 The display device of the present embodiment will be described centering on the differences from the display device of Embodiment 5. Figure 12 It is a schematic cross-sectional view showing the stacked structure of the sub-pixel 511R of the display device of the present embodiment.

[0134] As Figure 12As shown, similar to the sub-pixel 411R of Embodiment 5, the sub-pixel 511R of this embodiment includes a first substrate 21, a first lower barrier layer 31, a thin film transistor layer 40, a first planarization layer 51, a first barrier layer 461, a second planarization layer 452, a second barrier layer 562, a relay electrode 473, a first electrode 571, a light-emitting layer 74, a second electrode 72, and a cofferdam 80.

[0135] The second barrier layer 562 of this embodiment is an insulating layer formed of an inorganic material and disposed between the second planarization layer 452 and the first planarization layer 51. A fourth through-hole 462h that penetrates the second barrier layer 562 and is at least partially connected to the third through-hole 452h is formed in the second barrier layer 562. In this embodiment, a fifth through-hole 562a is formed in the second barrier layer 562. The fifth through-hole 562a is disposed below the first through-hole 51h, penetrates the second barrier layer 562, and is not filled with the relay electrode 473.

[0136] Hereinafter, the effect of the fifth through-hole 562a of this embodiment will be described. For example, the fifth through-hole 562a is formed before the relay electrode 473 is formed. Specifically, after the second barrier layer 562 is formed, the fifth through-hole 562a is formed simultaneously with the fourth through-hole 462h using photolithography and etching methods. Then, the relay electrode 473 is formed. The relay electrode 473 is filled in the third through-hole 452h and the fourth through-hole 462h, but the relay electrode 473 is not formed in the fifth through-hole 562a. When the relay electrode 473 is formed, the second planarization layer 452 near the fourth through-hole 462h is heated. Along with this, gas is generated from the second planarization layer 452 near the fourth through-hole 462h. In this embodiment, since the fifth through-hole 562a is formed, at least a part of the generated gas is released through the fifth through-hole 562a. Therefore, the stress generated by the gas generated when the relay electrode 473 is formed can be reduced.

[0137] In addition, since the first electrode 571 is filled in the fifth through-hole 562a, it is possible to suppress moisture from infiltrating into the light-emitting layer 74 from the second planarization layer 452 through the fifth through-hole 562a. In addition, when the main surface 21a of the first substrate 21 is viewed from above, the area of the fifth through-hole 562a may be smaller than the area of the fourth through-hole 462h. Thereby, heating of the second planarization layer 452 when the first electrode 571 is filled in the fifth through-hole 562a can be suppressed. Therefore, the gas generated in the second planarization layer 452 can be reduced, and thus the stress generated in the second barrier layer 562 can be reduced. As described above, in this embodiment, it is possible to suppress moisture from infiltrating into the light-emitting layer 74 from the second planarization layer 452, and it is possible to suppress the stress generated in the second barrier layer 562. Therefore, peeling and cracking of the second barrier layer 562 can be further suppressed.

[0138] (Other embodiments)

[0139] As described above, the display device of the present invention has been described according to the embodiments. However, the display device of the present invention and the like are not limited to the above embodiments. Other embodiments achieved by combining any constituent elements in the embodiments, modification examples obtained by those skilled in the art making various modifications that can be conceived within the scope without departing from the gist of the present invention, and various devices incorporating the processing circuit and the like of the present embodiment are also included in the present invention.

[0140] For example, the second substrate 122 and the second lower blocking layer 132 of the above-described embodiment 2 can be applied to the display devices of the above-described embodiments 3 to 6.

[0141] In addition, when looking down at the main surface 21a of the first substrate 21 of the display devices of the above-described embodiments 5 and 6, the area of the second through-hole 461h can be 30% or more of the area of the first electrode 471 or 571.

[0142] In addition, in each of the above embodiments, the pixel has three sub-pixels. However, the number of sub-pixels of the pixel may be one or more. For example, the pixel may have four sub-pixels corresponding to the emission colors of R, G, B, and W (white).

[0143] Industrial applicability

[0144] The present invention is useful, for example, for flexible organic EL flat panel displays.

Claims

1. A display device, characterized in that: The display device includes: A flexible first substrate; A first lower barrier layer, disposed above one main surface of the first substrate and formed of an inorganic material; A thin film transistor layer, disposed above the first lower barrier layer and including thin film transistors; A first planarization layer, disposed above the thin film transistor layer and formed of an organic material; A first barrier layer, disposed above the first planarization layer and formed of an inorganic material; A first electrode, disposed above the first barrier layer and formed of a metal material having a higher moisture barrier property than an inorganic film; A second electrode, disposed above the first electrode; And A light emitting layer, disposed between the first electrode and the second electrode and emitting light by supplying current through the first electrode and the second electrode, A first through hole penetrating the first planarization layer is formed in the first planarization layer, A second through hole is formed in the first barrier layer, the second through hole penetrates the first barrier layer and at least a part thereof is connected to the first through hole, A part of the first electrode is filled in the first through hole and the second through hole, When looking down on the main surface of the first substrate, the area of the second through hole is 30% or more of the area of the first electrode, and the area of the second through hole is larger than the area of the first through hole.

2. The display device according to claim 1, characterized in that: When looking down on the main surface of the first substrate, the second through hole includes a plurality of long strip-shaped through holes extending along the long side direction of the first electrode.

3. The display device according to claim 1, characterized in that: When looking down on the main surface of the first substrate, the second through hole includes a plurality of through holes arranged in a staggered lattice pattern.

4. The display device according to claim 1, characterized in that: The display device further includes: A flexible second substrate, disposed between the first lower barrier layer and the thin film transistor layer; and A second lower barrier layer, disposed between the second substrate and the thin film transistor layer and formed of an inorganic material.

5. A display device, characterized in that: The display device includes: A flexible first substrate; A first lower barrier layer, disposed above one main surface of the first substrate and formed of an inorganic material; A thin film transistor layer, disposed above the first lower barrier layer and including thin film transistors; A first planarization layer, disposed above the thin film transistor layer and formed of an organic material; A first barrier layer, disposed above the first planarization layer and formed of an inorganic material; A first electrode, disposed above the first barrier layer; A second electrode, disposed above the first electrode; A light emitting layer, disposed between the first electrode and the second electrode and emitting light by supplying current through the first electrode and the second electrode; A second planarization layer, disposed between the thin film transistor layer and the first planarization layer and formed of an organic material; A second barrier layer, disposed between the second planarization layer and the first planarization layer and formed of an inorganic material; And A relay electrode is disposed between the second barrier layer and the first planarization layer. A first through-hole penetrating the first planarization layer is formed in the first planarization layer. A second through-hole is formed in the first barrier layer. The second through-hole penetrates the first barrier layer and at least a part thereof is connected to the first through-hole. A third through-hole penetrating the second planarization layer is formed in the second planarization layer. A fourth through-hole is formed in the second barrier layer. The fourth through-hole penetrates the second barrier layer and at least a part thereof is connected to the third through-hole. A part of the first electrode is filled in the first through-hole and the second through-hole. A part of the relay electrode is filled in the third through-hole and the fourth through-hole. When looking down at the main surface of the first substrate, at least a part of the fourth through-hole is disposed at a position different from that of the second through-hole. The relay electrode and the first electrode are electrically connected inside the first through-hole. When looking down at the main surface of the first substrate, the area of the second through-hole is larger than that of the first through-hole.

6. The display device according to claim 5, wherein A fifth through-hole is formed in the second barrier layer. The fifth through-hole is disposed below the first through-hole, penetrates the second barrier layer, and is not filled with the relay electrode.

7. The display device according to claim 5 or 6, wherein When looking down at the main surface of the first substrate, the second through-hole includes a plurality of elongated through-holes extending along the long side direction of the first electrode.

8. The display device according to claim 5 or 6, wherein When looking down at the main surface of the first substrate, the second through-hole includes a plurality of through-holes arranged in a staggered grid pattern.

9. The display device according to claim 5 or 6, wherein The display device further includes: A flexible second substrate disposed between the first lower barrier layer and the thin film transistor layer; and A second lower barrier layer disposed between the second substrate and the thin film transistor layer and formed of an inorganic material.

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