A silicon carbide power device and a processing and manufacturing method thereof

Abstract

The invention relates to the technical field of microelectronic devices, and in particular to a silicon carbide power device and a processing and manufacturing method thereof; the invention firstly adopts a high-temperature vapor deposition method to prepare a silicon carbide ingot, then shapes the silicon carbide ingot to obtain a silicon carbide crystal rod, then slices the silicon carbide ingot to obtain a silicon carbide wafer, then grinds, polishes, detects and cleans the silicon carbide wafer in sequence to obtain a silicon carbide substrate, then prepares a silicon carbide epitaxial layer on the upper surface of the silicon carbide substrate by a chemical vapor deposition method to obtain a silicon carbide wafer, then injects aluminum ions into the silicon carbide wafer by an ion implanter to form a P-type doping region and nitrogen ions to form an N-type conductive region of a drain and a source, and then prepares a junction barrier Schottky diode in a JFET region, etc.; the invention can effectively solve the problems of poor high temperature and high voltage tolerance, low switching speed and high production cost in the prior art.

Description

Technical Field

[0001] The present invention relates to the technical field of microelectronic devices, and in particular to a silicon carbide power device and a processing and manufacturing method thereof. Background Art

[0002] In recent years, with the continuous development of microelectronics technology, the application of Si-based power electronic devices in some extreme environments such as high temperature, high pressure, and high humidity has been increasingly restricted. As a representative of the third generation of semiconductor materials, silicon carbide (SiC) materials have a bandgap width of about 3 times that of silicon materials, a breakdown electric field of 8 times that of silicon materials, and a thermal conductivity of 3 times that of silicon, which greatly improves the withstand voltage capacity and current density of SiC devices. Due to the different characteristics of the two materials, the breakdown electric field of SiC materials is about 10 times that of Si materials, so that at the same breakdown voltage, its on-resistance is only 1 / 100 to 1 / 200 of that of Si devices, which greatly reduces the conduction loss and switching loss of SiC devices. While improving system efficiency, it also makes the devices work more reliably in harsh environments such as high temperature, high power, and high humidity. Therefore, SiC devices can double the power, temperature, frequency, and radiation resistance of power electronic systems. At the same time, due to the high thermal conductivity of silicon carbide, the volume and weight of the heat dissipation system in the system can be greatly reduced, so that the system can achieve higher efficiency. Therefore, SiC devices are not only widely used in traditional industrial fields such as DC and AC power transmission, uninterruptible power supply, switching power supply, industrial control, etc., but also have broad application prospects in new energy such as solar energy and wind energy.

[0003] Although the cost of SiC base materials per unit area has been significantly reduced compared to the past decade, it is still more than one order of magnitude higher than the corresponding cost of silicon (Si) wafers (influencing factors include: limited radial size of SiC ingots and limited production speed of SiC). In addition, current SiC power devices still have defects such as low critical breakdown voltage, limited switching rate and high reverse leakage current in actual application. Summary of the invention

[0004] The purpose of the present invention is to solve the shortcomings of the prior art and the problems raised in the above background technology.

[0005] In order to achieve the above-mentioned purpose, the present invention adopts the following technical scheme: a silicon carbide power device, comprising a silicon carbide substrate and a silicon carbide epitaxial layer completely covering the upper surface thereof, a P-type doped region is buried in the silicon carbide epitaxial layer, an N-type conductive region is buried in the P-type doped region, an oxide layer for connecting each P-type doped region and the N-type conductive region is provided on the upper surface of the silicon carbide epitaxial layer, a source electrode completely covering the oxide layer and the upper surface of the silicon carbide is also provided on the silicon carbide epitaxial layer, a gate electrode is provided inside the oxide layer, the lower surface of the silicon carbide substrate is completely covered with a drain electrode, and a junction barrier Schottky diode is provided in the JFET region in the silicon carbide epitaxial layer.

[0006] Furthermore, a passivation layer is provided on the upper surface of the source electrode, and the passivation layer is divided into a first passivation film and a second passivation film from top to bottom; the first passivation film is an oxide and the thickness of the first passivation film is not greater than 0.1 microns, and the second passivation film is polyimide and the thickness of the second passivation film is between 0.3 and 2 microns.

[0007] Furthermore, the implantation depth of the P-type doping region is between 0.3 and 2.5 microns, the implantation depth of the N-type conductive region is between 0.15 and 1.25 microns, and the implantation depth of the JFET region is between 0.15 and 1.25 microns.

[0008] A method for manufacturing a silicon carbide power device comprises the following steps:

[0009] S1, preparing silicon carbide ingot by high temperature vapor deposition method;

[0010] S2, shaping the silicon carbide ingot to obtain a silicon carbide crystal rod;

[0011] S3, slicing the silicon carbide ingot to obtain silicon carbide wafers;

[0012] S4, grinding, polishing, inspecting and cleaning the silicon carbide wafer in sequence, thereby obtaining a silicon carbide substrate;

[0013] S5, preparing a silicon carbide epitaxial layer on the upper surface of the silicon carbide substrate by chemical vapor deposition, thereby obtaining a silicon carbide wafer;

[0014] S6, cleaning the silicon carbide wafer, preparing a silicon dioxide film on the silicon carbide epitaxial layer, and transferring a pattern on the silicon dioxide film by photolithography;

[0015] S7, implanting aluminum ions into the silicon carbide wafer by an ion implanter to form a P-type doped region, and then annealing the silicon carbide wafer to activate the implanted aluminum ions;

[0016] S8, removing the silicon dioxide film on the silicon carbide wafer;

[0017] S9, injecting nitrogen ions into the P-type doping region by an ion implanter to form N-type conductive regions of the drain and the source, and then annealing the silicon carbide wafer to activate the nitrogen ions injected into the P-type doping region;

[0018] S10, preparing a junction barrier Schottky diode in the JFET region;

[0019] S11, preparing a gate between the source electrode and the drain electrode;

[0020] S12, preparing a passivation layer on the upper surface of the silicon carbide wafer;

[0021] S13, drilling holes in the passivation layer and sputtering metal to form drain-source electrodes;

[0022] S14, packaging the finished product.

[0023] Furthermore, in S1, the silicon carbide seed crystal is first fixed on a fixture at the top of the reactor, and then the driving device of the connecting rod where the fixture is located is started, so that the connecting rod is displaced in the vertical direction and rotated about its own central axis, and then the coil outside the reactor is started, so that a temperature gradient with a uniform temperature increase from top to bottom is generated inside the reactor, and then the reaction gas and the carrier gas are introduced from the bottom of the reactor;

[0024] In the S5, the silicon carbide substrate is fixed on the clamp at the top of the reactor, and then the driving device of the connecting rod where the clamp is located outside the reactor is started, so that the connecting rod is displaced in the vertical direction and rotated about its own central axis, and then the coil outside the reactor is started, so that a temperature gradient with a uniform temperature increase from top to bottom is generated inside the reactor, and then the reaction gas and the carrier gas are introduced from the bottom of the reactor.

[0025] Furthermore, in S1, the angular velocity of the rotation of the connecting rod is between 1 rad / s and 18.85 rad / s, and the angular velocity of the rotation of the connecting rod decreases as the radial width of the growth layer on the silicon carbide seed crystal increases;

[0026] In S1, the connecting rod moves upward in the vertical direction, and the displacement speed of the connecting rod in the vertical direction is equal to the thickness increase speed of the long life layer;

[0027] In said S1, the temperature of the area where the lower end of the long life layer is located is between 1850 and 2400°C;

[0028] In the S1, the reaction gas is completely decomposed in the heating area inside the reactor and several reactions occur, and highly saturated silicon carbide gas is produced. The silicon carbide gas forms silicon carbide clusters through homogeneous phase nucleation. These clusters sublime and grow on the seed crystals. At the same time, the residual waste gas inside the reactor is discharged from the top of the reactor;

[0029] In S5, the rotation angle of the connecting rod is between 16 rad / s and 20 rad / s, and the angular velocity of the rotation of the connecting rod remains unchanged;

[0030] In S5, the connecting rod moves upward in a vertical direction, and the displacement speed of the connecting rod in the vertical direction is equal to the thickness increase speed of the silicon carbide epitaxial layer;

[0031] In said S5, the temperature of the region where the silicon carbide epitaxial layer is located is 1450-1700° C.;

[0032] In the S5, the reaction gas is completely decomposed in the heating area inside the reactor and several reactions occur, and highly saturated silicon carbide gas is produced. The silicon carbide gas forms silicon carbide clusters through homogeneous phase nucleation. These clusters sublime and grow on the silicon carbide substrate. At the same time, the residual exhaust gas inside the reactor is discharged from the top of the reactor.

[0033] Furthermore, in said S1 and said S5, the reaction gas is SiH4, SiCl4, C2H4 and C3H8, etc., and the carrier gas is hydrogen;

[0034] In S1 and S5, the reactor is composed of an outer layer of heat insulating material and an inner layer of graphite crucible.

[0035] Furthermore, in S2, the silicon carbide crystal ingot is processed by flat grinding, orientation and rounding in sequence to obtain a silicon carbide crystal rod;

[0036] In S3, the silicon carbide crystal rod is cut into silicon carbide wafers by multi-wire cutting.

[0037] Furthermore, in S7 and S9, the surface of the silicon carbide wafer needs to be covered with a carbon mask or an aluminum nitride mask before annealing to protect the surface of the silicon carbide wafer.

[0038] Furthermore, in said S14, the encapsulation is subdivided into the steps of dicing, die bonding, welding, plastic sealing, printing, pin tinning, aging, rib cutting, testing, inspection and packaging, which are performed in sequence.

[0039] Compared with the prior art, the advantages and positive effects of the present invention are:

[0040] 1. The present invention sets a junction barrier Schottky diode in the JFET region of the silicon carbide epitaxial layer, and sequentially covers the source with a first passivation film (the first passivation film is oxide) and a second passivation film (the second passivation film is polyimide).

[0041] Among them, the junction barrier Schottky diode has the characteristics of high surge current tolerance in forward mode, low leakage current and high blocking voltage in reverse mode; in addition, the PN junction area of ​​the junction barrier Schottky diode is relatively small, which determines that its on-resistance and off-state loss are lower, and the reverse recovery characteristics are better. Among them, the first passivation film and the second passivation film can cooperate to isolate the plastic packaging material for the silicon carbide power device, prevent the silicon carbide power device from being corroded by water vapor and improve the stability of the silicon carbide power device. Thereby improving the critical breakdown voltage, high temperature tolerance and switching rate of the silicon carbide power device in practical applications, while also reducing the reverse leakage current of the silicon carbide power device.

[0042] 2. The present invention prepares a silicon carbide ingot by high-temperature vapor deposition in a reactor and prepares a silicon carbide epitaxial layer on the upper surface of a silicon carbide substrate by chemical vapor deposition. The reactor is composed of an outer layer of thermal insulation material and an inner layer of a graphite crucible. A connecting rod is provided on the top of the reactor, and a clamp is provided at the end of the connecting rod located in the reactor. A driving device is designed outside the reactor for driving the connecting rod to displace in the vertical direction and rotate around its own central axis.

[0043] In this way, the driving device and the reactor can cooperate to make the silicon carbide ingot and the silicon carbide epitaxial layer grow uniformly and quickly, and the prepared silicon carbide ingot has the characteristics of large radial size, thereby effectively reducing the production cost of silicon carbide power devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 Schematic diagram of the process system for preparing silicon carbide ingots by high temperature vapor deposition method in the present invention;

[0045] Figure 2 Schematic diagram of the process system for preparing silicon carbide ingots by chemical vapor deposition in the present invention;

[0046] Figure 3 It is a schematic diagram of the structure of the junction barrier Schottky diode in the present invention;

[0047] Figure 4 It is a schematic diagram of the structure of the silicon carbide power device in the present invention;

[0048] The numbers in the figure represent: 1-driving device; 2-connecting rod; 3-clamp; 4-coil; 5-insulating material; 6-graphite crucible; 7-reactor; 8-silicon carbide seed crystal; 9-silicon carbide ingot; 10-silicon carbide substrate; 11-silicon carbide epitaxial layer; 12-P-type doping region; 13-N-type conductive region; 14-junction barrier Schottky diode; 15-oxide layer; 16-gate; 17-first passivation film; 18-second passivation film; 19-passivation layer; 20-drain; 21-silicon carbide wafer. DETAILED DESCRIPTION

[0049] In order to more clearly understand the above-mentioned purpose, features and advantages of the present invention, the present invention is further described below in conjunction with the accompanying drawings and embodiments. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0050] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways than those described herein. Therefore, the present invention is not limited to the specific embodiments of the following disclosure.

[0051] A silicon carbide power device of this embodiment, referring to Figure 1-4 : It includes a silicon carbide substrate 10 and a silicon carbide epitaxial layer 11 completely covering the upper surface thereof, a P-type doped region 12 is buried in the silicon carbide epitaxial layer 11, an N-type conductive region 13 is buried in the P-type doped region 12, an oxide layer 15 is provided on the upper surface of the silicon carbide epitaxial layer 11 for connecting each P-type doped region 12 and the N-type conductive region 13, a source electrode completely covering the oxide layer 15 and the upper surface of silicon carbide is also provided on the silicon carbide epitaxial layer 11, a gate electrode 16 is provided inside the oxide layer 15, the lower surface of the silicon carbide substrate 10 is completely covered with a drain electrode 20, and a junction barrier Schottky diode 14 is provided in the JFET region in the silicon carbide epitaxial layer 11.

[0052] Among them, the junction barrier Schottky diode 14 has a very high surge current tolerance in the forward mode, and has a very low leakage current and a high blocking voltage in the reverse mode. In addition, the PN junction area in the junction barrier Schottky diode 14 is relatively small, which makes it also have the advantages of low on-resistance, low off-state loss and good reverse recovery characteristics.

[0053] A passivation layer 19 is provided on the upper surface of the source electrode, and the passivation layer 19 is divided into a first passivation film 17 and a second passivation film 18 from top to bottom; the first passivation film 17 is an oxide (in the present embodiment, the first passivation layer 19 is pure silicon oxide, pure silicon nitride or a mixture of silicon oxide and silicon nitride) and the thickness of the first passivation film 17 is not more than 0.1 microns, and the second passivation film 18 is polyimide (because it has excellent mechanical properties, radiation resistance and dielectric properties), and the thickness of the second passivation film 18 is between 0.3 and 2 microns.

[0054] The implantation depth of the P-type doping region 12 is between 0.3 and 2.5 microns, the implantation depth of the N-type conductive region 13 is between 0.15 and 1.25 microns, and the implantation depth of the JFET region is between 0.15 and 1.25 microns.

[0055] A method for manufacturing a silicon carbide power device comprises the following steps:

[0056] S1, preparing a silicon carbide ingot 9 by high temperature vapor deposition method.

[0057] S2, shaping the silicon carbide ingot 9 (including the processing of flat grinding, orientation and rounding in sequence) to obtain a silicon carbide crystal rod. This is because the shape of the silicon carbide ingot 9 is not a standard cylindrical shape, but a truncated cone shape similar to a yurt.

[0058] S3, slicing the silicon carbide ingot 9 and obtaining silicon carbide wafers. This is because silicon carbide has the characteristics of high hardness and high brittleness, which makes its cutting time-consuming and low yield. Therefore, in order to improve the cutting efficiency of the silicon carbide crystal rod, a multi-wire cutting method is required.

[0059] S4, since the silicon carbide wafer is subjected to impact force during the cutting process, which may cause damage on the surface of the silicon carbide wafer, the silicon carbide wafer needs to be ground, polished, inspected and cleaned in sequence to obtain a silicon carbide substrate 10 with a smooth surface, no near-surface dislocations, and no stress. It is worth noting that the quality of the silicon carbide substrate 10 largely determines the quality of the silicon carbide epitaxial layer 11, that is, determines the quality of the silicon carbide power device.

[0060] S5 , preparing a silicon carbide epitaxial layer 11 on the upper surface of the silicon carbide substrate 10 by chemical vapor deposition, thereby obtaining a silicon carbide wafer 21 .

[0061] S6, cleaning the silicon carbide wafer 21, preparing a silicon dioxide film on the silicon carbide epitaxial layer 11, and transferring the pattern on the silicon dioxide film by photolithography.

[0062] S7. Since the carbon-silicon bonding force is relatively strong, the diffusion constant in silicon carbide is extremely low. If the traditional diffusion method is continued to be used for doping, the silicon dioxide (SiO2) layer on the surface of the silicon carbide epitaxial layer 11 cannot provide effective protection, and silicon carbide is unstable at high temperatures above 1800°C. Therefore, it is necessary to use an ion implanter to inject aluminum ions into the silicon carbide wafer 21 to form a P-type doped region 12, and then anneal the silicon carbide wafer 21 to activate the injected aluminum ions.

[0063] S8 , removing the silicon dioxide film on the silicon carbide wafer 21 .

[0064] S9, nitrogen ions are implanted into the P-type doping region 12 by an ion implanter to form the drain 20 and the N-type conductive region 13 of the source, and then the silicon carbide wafer 21 is annealed to activate the nitrogen ions implanted into the P-type doping region 12. In this step, the reason for using an ion implanter is the same as that in S7 above.

[0065] S10, preparing a junction barrier Schottky diode 14 in the JFET region. The specific steps are integrating a mesh p+ region in the drift region of the Schottky diode, and forming a Schottky contact on the n-type drift region and an ohmic contact on the p+ region with a metal anode.

[0066] S11 , preparing a gate 16 between the source electrode and the drain electrode 20 .

[0067] S12, in order to avoid breakdown between electrodes, a passivation layer 19 needs to be prepared on the upper surface of the silicon carbide wafer 21.

[0068] S13, drilling holes in the passivation layer 19 and sputtering metal to form drain-source electrodes.

[0069] S14, packaging the finished product, wherein the packaging is subdivided into the steps of dicing, bonding, welding, plastic sealing, printing, tinning of pins, aging, cutting, testing, inspection and packaging.

[0070] Worth noting:

[0071] In S1, the silicon carbide seed crystal 8 is first fixed on the clamp 3 at the top of the reactor 7, and then the driving device 1 located on the connecting rod 2 where the clamp 3 is located outside the reactor 7 is started, so that the connecting rod 2 is displaced in the vertical direction and rotates around its own central axis, and then the coil 4 outside the reactor 7 is started, so that a temperature gradient with a uniform increase from top to bottom is generated inside the reactor 7, and then the reaction gas and the carrier gas are introduced from the bottom of the reactor 7.

[0072] In S1 , the angular velocity of the rotation of the connecting rod 2 is between 1 rad / s and 18.85 rad / s, and the angular velocity of the rotation of the connecting rod 2 decreases linearly with the increase of the radial width of the growth layer on the silicon carbide seed crystal 8 .

[0073] In S1, the connecting rod 2 moves upward in the vertical direction, and the displacement speed of the connecting rod 2 in the vertical direction is equal to the thickness increase speed of the long-lived layer.

[0074] In S1, the temperature of the area at the lower end of the long life layer is between 1850 and 2400°C.

[0075] In S1, the reaction gas is completely decomposed in the heating area inside the reactor 7 and several reactions occur, producing highly saturated silicon carbide gas. The silicon carbide gas forms silicon carbide clusters through homogeneous phase nucleation. These clusters sublime and grow on the seed crystal. At the same time, the residual exhaust gas inside the reactor 7 is discharged from the top of the reactor 7.

[0076] Worth noting:

[0077] In S5, the silicon carbide substrate 10 is fixed on the clamp 3 at the top of the reactor 7, and then the driving device 1 of the connecting rod 2 where the clamp 3 is located outside the reactor 7 is started, so that the connecting rod 2 is displaced in the vertical direction and rotates around its own central axis, and then the coil 4 outside the reactor 7 is started, so that a temperature gradient with a uniform temperature increase from top to bottom is generated inside the reactor 7, and then the reaction gas and the carrier gas are introduced from the bottom of the reactor 7.

[0078] In S5 , the rotation angle of the connecting rod 2 is between 16 rad / s and 20 rad / s, and the angular velocity of the rotation of the connecting rod 2 remains unchanged.

[0079] In S5 , the tie rod 2 moves upward in the vertical direction, and the displacement speed of the tie rod 2 in the vertical direction is equal to the thickness increase speed of the silicon carbide epitaxial layer 11 .

[0080] In S5, the temperature of the region where the silicon carbide epitaxial layer 11 is located is between 1450°C and 1700°C.

[0081] In S5, the reaction gas is completely decomposed in the heating area inside the reactor 7 and several reactions occur, producing highly saturated silicon carbide gas. The silicon carbide gas forms silicon carbide clusters through homogeneous phase nucleation. These clusters sublime and grow on the silicon carbide substrate 10. At the same time, the residual exhaust gas inside the reactor 7 is discharged from the top of the reactor 7.

[0082] Worth noting:

[0083] In S1 and S5, the reaction gas is SiH4, SiCl4, C2H4 and C3H8, etc., and the carrier gas is hydrogen.

[0084] In S1 and S5 , the reactor 7 is composed of an outer insulating material 5 and an inner graphite crucible 6 .

[0085] Worth noting:

[0086] In S7 and S9 , the annealing temperature of the silicon carbide wafer 21 is relatively high (usually higher than 1600 degrees), which may cause decomposition of the surface silicon carbide. Therefore, the surface of the silicon carbide wafer 21 needs to be covered with a carbon mask or an aluminum nitride mask before annealing to protect the surface of the silicon carbide wafer 21 .

[0087] The above description is only a preferred embodiment of the present invention and does not limit the present invention in other forms. Any technician familiar with the profession may use the technical content disclosed above to change or modify it into an equivalent embodiment with equivalent changes and apply it to other fields. However, any simple modification, equivalent change and modification made to the above embodiment based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the protection scope of the technical solution of the present invention.

Claims

1. A silicon carbide power device, characterized in that: The invention comprises a silicon carbide substrate (10) and a silicon carbide epitaxial layer (11) completely covering the upper surface thereof, wherein a P-type doped region (12) is embedded in the silicon carbide epitaxial layer (11), an N-type conductive region (13) is embedded in the P-type doped region (12), an oxide layer (15) for connecting each P-type doped region (12) and the N-type conductive region (13) is provided on the upper surface of the silicon carbide epitaxial layer (11), a source electrode completely covering the oxide layer (15) and the upper surface of the silicon carbide is also provided on the silicon carbide epitaxial layer (11), a gate electrode (16) is provided inside the oxide layer (15), the lower surface of the silicon carbide substrate (10) is completely covered with a drain electrode (20), and a junction barrier Schottky diode (14) is provided in the JFET region in the silicon carbide epitaxial layer (11); A method for manufacturing a silicon carbide power device comprises the following steps: S1, preparing a silicon carbide ingot (9) by a high temperature vapor deposition method; S2, shaping the silicon carbide crystal ingot (9) to obtain a silicon carbide crystal rod; S3, slicing the silicon carbide ingot (9) to obtain silicon carbide wafers; S4, grinding, polishing, inspecting and cleaning the silicon carbide wafer in sequence, thereby obtaining a silicon carbide substrate (10); S5, preparing a silicon carbide epitaxial layer (11) on the upper surface of the silicon carbide substrate (10) by chemical vapor deposition, thereby obtaining a silicon carbide wafer (21); S6, cleaning the silicon carbide wafer (21), preparing a silicon dioxide film on the silicon carbide epitaxial layer (11), and transferring a pattern onto the silicon dioxide film by photolithography; S7, using an ion implanter to implant aluminum ions into the silicon carbide wafer (21) to form a P-type doped region (12), and then annealing the silicon carbide wafer (21) to activate the implanted aluminum ions; S8, removing the silicon dioxide film on the silicon carbide wafer (21); S9, using an ion implanter to implant nitrogen ions into the P-type doping region (12) to form a drain (20) and a source N-type conductive region (13), and then annealing the silicon carbide wafer (21) to activate the nitrogen ions implanted into the P-type doping region (12); S10, preparing a junction barrier Schottky diode (14) in the JFET region; S11, preparing a gate (16) between a source electrode and a drain electrode (20); S12, preparing a passivation layer (19) on the upper surface of the silicon carbide wafer (21); S13, drilling holes on the passivation layer (19) and sputtering metal to form drain-source electrodes; S14, packaging the finished product; In the step S1, a silicon carbide seed crystal (8) is first fixed on a fixture (3) at the top of the reactor (7), and then a driving device (1) located outside the reactor (7) and on a connecting rod (2) where the fixture (3) is located is started, so that the connecting rod (2) is displaced in a vertical direction and rotates about its own central axis, and then a coil (4) outside the reactor (7) is started, so that a temperature gradient with a uniform temperature increase from top to bottom is generated inside the reactor (7), and then a reaction gas and a carrier gas are introduced from the bottom of the reactor (7); In the S5, the silicon carbide substrate (10) is fixed on the clamp (3) at the top of the reactor (7), and then the driving device (1) of the connecting rod (2) where the clamp (3) is located is started, so that the connecting rod (2) is displaced in the vertical direction and rotates about its own central axis, and then the coil (4) outside the reactor (7) is started, so that a temperature gradient with a uniform temperature increase from top to bottom is generated inside the reactor (7), and then the reaction gas and the carrier gas are introduced from the bottom of the reactor (7).

2. A silicon carbide power device according to claim 1, characterized in that: A passivation layer (19) is provided on the upper surface of the source electrode, and the passivation layer (19) is divided into a first passivation film (17) and a second passivation film (18) from top to bottom; the first passivation film (17) is an oxide and the thickness of the first passivation film (17) is not greater than 0.1 micrometers, and the second passivation film (18) is polyimide and the thickness of the second passivation film (18) is between 0.3 and 2 micrometers.

3. A silicon carbide power device according to claim 1, characterized in that: The implantation depth of the P-type doping region (12) is between 0.3 and 2.5 micrometers, the implantation depth of the N-type conductive region (13) is between 0.15 and 1.25 micrometers, and the implantation depth of the JFET region is between 0.15 and 1.25 micrometers.

4. The method for manufacturing a silicon carbide power device according to claim 1, characterized in that: In S1, the angular velocity of the rotation of the connecting rod (2) is between 1 rad / s and 18.85 rad / s, and the angular velocity of the rotation of the connecting rod (2) decreases as the radial width of the growth layer on the silicon carbide seed crystal (8) increases; In S1, the connecting rod (2) moves upward in a vertical direction, and the displacement speed of the connecting rod (2) in the vertical direction is equal to the thickness increase speed of the long life layer; In said S1, the temperature of the area where the lower end of the long life layer is located is between 1850 and 2400°C; In the S1, the reaction gas is completely decomposed in the heating area inside the reactor (7) and several reactions occur, thereby generating highly saturated silicon carbide gas. The silicon carbide gas forms silicon carbide clusters through homogeneous phase nucleation. These clusters sublime and grow on the seed crystals. At the same time, the residual waste gas inside the reactor (7) is discharged from the top of the reactor (7); In S5, the rotation angle of the connecting rod (2) is between 16 rad / s and 20 rad / s, and the angular velocity of the rotation of the connecting rod (2) remains unchanged; In S5, the connecting rod (2) moves upward in the vertical direction, and the displacement speed of the connecting rod (2) in the vertical direction is equal to the thickness increase speed of the silicon carbide epitaxial layer (11); In S5, the temperature of the region where the silicon carbide epitaxial layer (11) is located is between 1450°C and 1700°C; In the S5, the reaction gas is completely decomposed in the heating area inside the reactor (7) and several reactions occur, thereby generating highly saturated silicon carbide gas. The silicon carbide gas forms silicon carbide clusters through homogeneous phase nucleation. These clusters sublime and grow on the silicon carbide substrate (10). At the same time, the residual exhaust gas inside the reactor (7) is discharged from the top of the reactor (7).

5. The method for manufacturing a silicon carbide power device according to claim 1, characterized in that: In the S1 and S5, the reaction gas is SiH4, SiCl4, C2H4 and C3H8, etc., and the carrier gas is hydrogen; In S1 and S5, the reactor (7) is composed of an outer layer of heat insulating material (5) and an inner layer of graphite crucible (6).

6. The method for manufacturing a silicon carbide power device according to claim 1, characterized in that: In S2, the silicon carbide crystal ingot (9) is processed in sequence by flat grinding, orientation and rounding to obtain a silicon carbide crystal rod; In S3, the silicon carbide crystal rod is cut into silicon carbide wafers by multi-wire cutting.

7. The method for manufacturing a silicon carbide power device according to claim 1, characterized in that: In S7 and S9, the surface of the silicon carbide wafer (21) needs to be covered with a carbon mask or an aluminum nitride mask before annealing to protect the surface of the silicon carbide wafer (21).

8. The method for manufacturing a silicon carbide power device according to claim 1, characterized in that: In the S14, the encapsulation is subdivided into the steps of dicing, bonding, welding, plastic sealing, printing, tinning of pins, aging, cutting, testing, inspection and packaging.

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