Organic light emitting diode display with reduced lateral leakage

Abstract

An organic light emitting diode (OLED) display is provided that can have an array of organic light emitting diode pixels each having an OLED layer interposed between a cathode and an anode. A voltage can be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layer can allow a leakage current to pass between adjacent anodes in the display. To reduce the leakage current and attendant cross-talk in the display, a pixel defining layer can break the continuity of the OLED layer. The pixel defining layer can have a steep sidewall, a sidewall with an undercut, or a sidewall surface with multiple curves to break the continuity of the OLED layer. A control gate coupled to a bias voltage and covered by a gate dielectric can be used to form an organic thin film transistor that turns off the leakage current channel between adjacent anodes on the display.

Description

[0001] Divisional Application Instructions

[0002] This application is a divisional application of Chinese patent application filed on April 27, 2018, with application number 201880029891.X and entitled "Organic Light Emitting Diode Display with Reduced Lateral Leakage". Background Technology

[0003] This invention relates generally to electronic devices, and more particularly to electronic devices having a display.

[0004] Electronic devices typically include displays. For example, an electronic device may have an organic light-emitting diode (OLED) display based on organic light-emitting diode pixels. In this type of display, each pixel includes a light-emitting diode and a thin-film transistor (TFT), which controls the application of signals to the light-emitting diode to generate light. The light-emitting diode may include an OLED layer positioned between an anode and a cathode.

[0005] To emit light from a given pixel in an organic light-emitting diode (OLED) display, a voltage is applied to the anode of that pixel. Ideally, the voltage at the anode of a given pixel should not affect any adjacent pixels. However, the conductivity of the OLED layer at the anode allows lateral conduction from the anode of a given pixel to the anodes of adjacent pixels. This can cause pixel crosstalk, which allows nominally 'off' pixels to emit light due to leakage from adjacent 'on' pixels. Pixel crosstalk can degrade display performance and cause color shifts in the resulting image.

[0006] It may be desirable to reduce the distance between pixels in a display in order to increase the display's resolution. However, pixel crosstalk caused by lateral conduction through the OLED layer can worsen as the distance between pixels decreases.

[0007] Therefore, there is a desire to provide improved displays for electronic devices. Summary of the Invention

[0008] This invention discloses an electronic device that may have a display such as an organic light-emitting diode (OLED) display. The OLED display may have an array of OLED pixels, each of which has an OLED layer interposed between a cathode and an anode.

[0009] Each OLED pixel can have a corresponding anode. A voltage can be applied to the anode of each OLED pixel to control how much light is emitted from each OLED pixel. OLED layers formed above the anode, such as hole injection layers and hole transport layers, can be conductive. The conductivity of the OLED layers allows leakage current to pass between adjacent anodes in the display.

[0010] To reduce leakage current and associated crosstalk in a display, structures can be positioned between adjacent anodes. For example, conductive contacts coupled to a bias voltage can be inserted between adjacent anodes in the display. Alternatively, T-shaped or tapered structures can be inserted between adjacent anodes in the display. When depositing the OLED layer, the T-shaped or tapered structure breaks the continuity of the OLED layer and prevents leakage current from flowing between adjacent anodes. Another method to break the continuity of the OLED layer is to form trenches in the underlying substrate before depositing the OLED layer.

[0011] A pixel definition layer, interposed between adjacent anodes in a display, can be used to break the continuity of the OLED layer and prevent leakage current from flowing between adjacent anodes. The pixel definition layer may have steep sidewalls to break the continuity of the OLED layer. The pixel definition layer may have undercut sidewalls to break the continuity of the OLED layer. The pixel definition layer may be formed from multiple layers of material to allow etching of the desired sidewall surfaces. The pixel definition layer may have sidewall surfaces with multiple curves to break the continuity of the OLED layer.

[0012] An energy source can be used to expose the OLED layer to energy, thereby damaging the OLED layer and reducing the conductivity of the exposed portions of the OLED layer. A fluorinated self-aligned monolayer can be formed beneath the OLED layer to selectively disorder the OLED layer and cause reduced conductivity in the affected portions.

[0013] Each organic light-emitting diode (OLED) pixel may include a leakage current control transistor coupled to a bias voltage. The leakage current control transistor can be asserted to prevent crosstalk within the display when the emitting transistor of the OLED pixel is asserted.

[0014] A control gate coupled to a bias voltage and covered by a gate dielectric can be used to form an organic thin-film transistor (OST) that shuts off leakage current channels between adjacent anodes on a display. The control gate can overlap with or be embedded within the pixel definition layer.

[0015] The display may include a reflective layer formed beneath the patterned anode to improve the display's efficiency. To reduce lateral leakage while maintaining improved efficiency, the size of the patterned anode may be reduced. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of an exemplary electronic device with a display according to the implementation scheme.

[0017] Figure 2 This is a schematic diagram of an exemplary display according to the implementation scheme.

[0018] Figure 3This is a diagram of an exemplary pixel circuit according to an implementation scheme.

[0019] Figure 4 A cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment shows lateral current leakage between adjacent anodes.

[0020] Figure 5 A cross-sectional side view of an exemplary organic light-emitting diode (OLED) display according to an embodiment is shown, illustrating different layers of the OLED.

[0021] Figure 6 An exemplary method for forming a patterned hole layer of an organic light-emitting diode display according to an embodiment is shown.

[0022] Figure 7 An exemplary method is shown, according to an embodiment, in which a portion of the hole layer is selectively exposed to energy through a mask layer to reduce conductivity and lateral current leakage.

[0023] Figure 8 An exemplary method is shown, according to an embodiment, for selectively exposing portions of the hole layer to energy in the absence of a mask layer to reduce conductivity and lateral current leakage.

[0024] Figure 9 An exemplary method is shown, according to an embodiment, of selectively disordering a portion of the hole layer using a fluorinated self-aligned monolayer to reduce conductivity and lateral current leakage.

[0025] Figure 10 This is a diagram of an exemplary pixel circuit with a leakage current control transistor according to an implementation scheme.

[0026] Figure 11 It is a timing diagram based on the implementation scheme, which shows a transistor with leakage current control, such as Figure 10 The operation of the pixel circuit is an example of the pixel.

[0027] Figure 12 This is a cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment, the display having conductive contacts coupled to a bias voltage interposed between adjacent anodes.

[0028] Figure 13 This is a cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment, wherein trenches are formed in the substrate to disrupt the continuity of the OLED layer.

[0029] Figure 14 This is a cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment, wherein a T-shaped structure is inserted between adjacent anodes.

[0030] Figure 15 This is a cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment, wherein a tapered insulating structure is inserted between adjacent anodes.

[0031] Figure 16 This is a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display according to an embodiment, which has a pixel definition layer that disrupts the continuity of the OLED layer.

[0032] Figure 17 This is a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display according to an embodiment, which has steep sidewalls that disrupt the continuity of the OLED layers.

[0033] Figure 18 The image shows a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display according to an embodiment, the display having a pixel definition layer that is undercut to disrupt the continuity of the OLED layer.

[0034] Figure 19 The image shows a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display according to an embodiment, the display having a pixel definition layer having multiple layers forming sidewall surfaces that disrupt the continuity of the OLED layers.

[0035] Figure 20 The image shows a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display according to an embodiment, the display having a pixel definition layer with sidewall surfaces having curves that disrupt the continuity of the OLED layer.

[0036] Figure 21 This is a cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment, the display having a control gate that is coplanar with the anode contact and forms a p-type field-effect transistor (FET) to eliminate lateral leakage.

[0037] Figure 22 This is a cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment, the display having a control gate that is coplanar with the anode and forms a p-type field-effect transistor (FET) to eliminate lateral leakage.

[0038] Figure 23 This is a cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment, the display having a control gate covered by a pixel definition layer and formed with a p-type organic thin-film transistor (TFT) to eliminate lateral leakage.

[0039] Figure 24This is a cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment, the display having a control gate embedded within a pixel definition layer and receiving a positive bias voltage to eliminate lateral leakage.

[0040] Figure 25 A top view of an exemplary organic light-emitting diode display according to an embodiment shows control gates arranged in a grid.

[0041] Figure 26 A top view of an exemplary organic light-emitting diode display according to an embodiment is shown, illustrating control gates arranged in columns.

[0042] Figure 27 This is a cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment, the display having a reflective layer for improving pixel efficiency. Detailed Implementation

[0043] Figure 1 The illustration shows exemplary electronic devices of various types that may be equipped with displays. Electronic device 10 may be a computing device such as a laptop computer, a computer monitor containing an embedded computer, a tablet computer, a cellular phone, a media player or other handheld or portable electronic device, a smaller device (such as a wristwatch, a hanging device, a headset or handset, a device embedded in glasses or other devices worn on a user's head, or other wearable or micro-devices), a display, a computer monitor containing an embedded computer, a computer monitor not containing an embedded computer, a gaming device, a navigation device, an embedded system (such as a system in which an electronic device with a display is installed in a kiosk or a car), or other electronic device. Electronic device 10 may have the shape of a pair of glasses (e.g., a support frame), may be formed with a helmet-shaped shell, or may have other configurations for helping to mount and secure components of one or more displays on or near a user's head.

[0044] like Figure 1 As shown, the electronic device 10 may include control circuitry 16 for supporting the operation of the device 10. The control circuitry may include memory, such as hard disk drive memory, non-volatile memory (e.g., flash memory configured to form a solid-state drive or other electrically programmable read-only memory), volatile memory (e.g., static random access memory or dynamic random access memory), and so on. Processing circuitry in the control circuitry 16 can be used to control the operation of the device 10. This processing circuitry may be based on one or more microprocessors, microcontrollers, digital signal processors, baseband processors, power management units, audio chips, application-specific integrated circuits, etc.

[0045] The input-output circuitry in device 10, such as input-output device 12, can be used to allow data to be supplied to device 10 and to allow data to be supplied from device 10 to external devices. Input-output device 12 may include buttons, joysticks, scroll wheels, touchpads, keypads, keyboards, microphones, speakers, audio generators, vibrators, cameras, sensors, LEDs and other status indicators, data ports, etc. Users can control the operation of device 10 by supplying commands through input-output device 12 and can receive status information and other outputs from device 10 using the output resources of input-output device 12.

[0046] Input-output device 12 may include one or more displays, such as display 14. Display 14 may be a touchscreen display including touch sensors for acquiring touch input from a user, or display 14 may be touch-insensitive. The touch sensor of display 14 may be based on an array of capacitive touch sensor electrodes, an acoustic touch sensor structure, a resistive touch component, a force-based touch sensor structure, a light-based touch sensor, or other suitable touch sensor arrangement. The touch sensor for display 14 may be formed by electrodes formed on a common display substrate having pixels of display 14, or may be formed by a separate touch sensor panel overlapping the pixels of display 14. If desired, display 14 may be touch-insensitive (i.e., the touch sensor may be omitted). Display 14 in electronic device 10 may be a head-up display, which can be viewed without requiring the user to move away from a typical viewpoint, or may be a head-mounted display incorporated into a device worn on the user's head. If desired, display 14 may also be a holographic display for displaying holograms.

[0047] Software, such as operating system code and applications, can be run on device 10 using control circuitry 16. During operation of device 10, the software running on control circuitry 16 can display images on display 14.

[0048] Figure 2 This is an illustration of an exemplary display. Figure 2 As shown, the display 14 may include layers, such as a substrate layer 26. The substrate layer, such as layer 26, may be formed of a rectangular planar material layer or a material layer having other shapes (e.g., circular or other shapes having one or more curved edges and / or straight edges). The substrate layer of the display 14 may include a glass layer, a polymer layer, a silicon layer, a composite film comprising polymeric and inorganic materials, a metal foil, etc.

[0049] Display 14 may have an array of pixels 22 for displaying images to a user, such as a pixel array 28. The pixels 22 in array 28 may be arranged in rows and columns. The edges of array 28 may be straight or curved (i.e., each row and / or column of pixels 22 in array 28 may have the same length or may have different lengths). Any suitable number of rows and columns may exist in array 28 (e.g., ten or more, one hundred or more, or one thousand or more, etc.). Display 14 may include pixels 22 of different colors. For example, display 14 may include red pixels, green pixels, and blue pixels.

[0050] The display driver circuit 20 can be used to control the operation of the pixel 28. The display driver circuit 20 may be formed of an integrated circuit, a thin-film transistor circuit, and / or other suitable circuits. Figure 2 An exemplary display driver circuit 20 includes a display driver circuit 20A and additional display driver circuitry such as a gate driver circuit 20B. The gate driver circuit 20B may be formed along one or more edges of the display 14. For example, the gate driver circuit 20B may be arranged along the left and right sides of the display 14, such as... Figure 2 As shown.

[0051] like Figure 2 As shown, the display driver circuit 20A (e.g., one or more display driver integrated circuits, thin-film transistor circuits, etc.) may include communication circuitry for communicating with system control circuitry via signal path 24. Path 24 may be formed by traces or other cables on a flexible printed circuit. Control circuitry may be located on one or more printed circuits in the electronic device 10. During operation, the control circuitry (e.g., Figure 1 The control circuit 16) can provide image data to circuits such as the display driver integrated circuit in circuit 20 for displaying the image on the display 14. Figure 2 The display driver circuit 20A is located at the top of the display 14. This is merely illustrative. The display driver circuit 20A may be located at both the top and bottom of the display 14, or it may be located in other parts of the device 10.

[0052] In order to display an image on pixel 22, display driver circuit 20A can supply corresponding image data to data line D when a control signal is sent to a supporting display driver circuit, such as gate driver circuit 20B, via signal path 30. Utilizing Figure 2 In an exemplary arrangement, the data line D extends vertically through the display 14 and is associated with a corresponding column of pixels 22.

[0053] The gate driver circuit 20B (sometimes referred to as the gate line driver circuit or the horizontal control signal circuit) may be implemented using one or more integrated circuits, and / or using thin-film transistor circuitry on the substrate 26. Horizontal control lines G (sometimes referred to as gate lines, scan lines, emit control lines, etc.) extend horizontally through the display 14. Each gate line G is associated with a corresponding row of pixels 22. Multiple horizontal control lines, such as gate lines G associated with each row of pixels, may be present if desired. Individually controlled signal paths and / or global signal paths in the display 14 may also be used to deliver other signals (e.g., power signals, etc.).

[0054] Gate driver circuit 20B asserts control signals on gate lines G in display 14. For example, gate driver circuit 20B may receive clock signals and other control signals from circuit 20A on path 30, and in response to the received signals, may sequentially assert gate line signals on gate lines G, starting from the gate line signals G in the first row of pixels 22 in array 28. When each gate line is asserted, data from data line D may be loaded into the corresponding row of the pixel. In this way, control circuits such as display driver circuits 20A and 20B may provide signals to pixel 22 to instruct pixel 22 to display a desired image on display 14. Each pixel 22 may have light-emitting diodes and circuitry (e.g., thin-film circuitry on substrate 26) that respond to control signals and data signals from display driver circuit 20.

[0055] Gate driver circuitry 20B may include gate driver circuit blocks, such as gate driver row blocks. Each gate driver row block may include circuitry such as output buffers and other output driver circuitry, register circuitry (e.g., registers that may be linked together to form a shift register), and signal lines, power lines, and other interconnects. Each gate driver row block may provide one or more gate signals to one or more corresponding gate lines in the corresponding pixel row of the pixel array in the effective area of ​​display 14.

[0056] A schematic diagram of an exemplary pixel circuit of the type that can be used for each pixel 22 in array 28 is shown in Figure 3 It is shown in the middle. For example... Figure 3 As shown, display pixel 22 may include a light-emitting diode 38. A positive power supply voltage ELVDD can be provided to a positive power supply terminal 34, and a ground power supply voltage ELVSS can be provided to a ground power supply terminal 36. Diode 38 has an anode (terminal AN) and a cathode (terminal CD). The state of drive transistor 32 controls the amount of current flowing through diode 38, and thus controls the amount of emitted light 40 from display pixel 22. Since the cathode CD of diode 38 is coupled to ground terminal 36, the cathode terminal CD of diode 38 may sometimes be referred to as the ground terminal of diode 38.

[0057] To ensure that transistor 38 remains in the desired state between consecutive data frames, display pixel 22 may include a storage capacitor, such as storage capacitor Cst. A voltage on storage capacitor Cst is applied to the gate of transistor 32 at node A to control transistor 32. One or more switching transistors, such as switching transistor 30, may be used to load data into storage capacitor Cst. When switching transistor 30 is off, data line D is isolated from storage capacitor Cst, and the gate voltage at terminal A is equal to the data value stored in storage capacitor Cst (i.e., the data value from the previous frame of display data displayed on display 14). When a gate line G (sometimes referred to as a scan line) in a row associated with display pixel 22 is determined, switching transistor 30 is turned on, and a new data signal on data line D is loaded into storage capacitor Cst. The new signal on capacitor Cst is applied to the gate of transistor 32 at node A, thereby regulating the state of transistor 32 and adjusting the corresponding amount of light 40 emitted by light-emitting diode 38. If desired, light-emitting diodes (e.g., such as...) used to control display pixels in display 14... Figure 3 The circuitry for operating the display pixel circuit (including transistors, capacitors, etc.) can be configured in other ways (e.g., including a configuration for compensating for changes in the threshold voltage in the drive transistor 32). Figure 3 The display pixel circuit is only illustrative.

[0058] Figure 4 This is a cross-sectional side view of an exemplary display having organic light-emitting diode (OLED) display pixels. As shown, the display 14 may include a substrate 26. The substrate 26 may be formed of glass, plastic, polymer, silicon, or any other desired material. Anodes such as anodes 42-1, 42-2, and 42-3 may be formed on the substrate. Anodes 42-1, 42-2, and 42-3 may be formed of a conductive material and may be covered by an OLED layer 45 and a cathode 54. The OLED layer 45 may include one or more layers for forming organic light-emitting diodes. For example, layer 45 may include one or more of a hole injection layer (HIL), a hole transport layer (HTL), an emitter layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). The cathode 54 may be a conductive layer formed on the OLED layer 45. The cathode layer 54 may form a common cathode terminal for all diodes in the display 14 (see example...). Figure 3 The cathode terminal CD). The cathode layer 54 can be formed of a transparent conductive material (e.g., indium tin oxide, a metal layer thin enough to be transparent, a combination of a thin metal and indium tin oxide, etc.). Each anode in the display 14 can be controlled independently, so that each diode in the display 14 can be controlled independently. This allows each pixel 22 to produce an independently controlled amount of light.

[0059] Anodes 42-1, 42-2, and 42-3 can each be associated with a corresponding pixel. For example, anode 42-1 can be associated with pixel 22-1, anode 42-2 with pixel 22-2, and anode 42-3 with pixel 22-3. To emit light from a pixel, a voltage can be applied to the anode of the corresponding pixel. For example, where it is desired to emit light from pixel 22-2 (not from pixels 22-1 and 22-3), a voltage can be applied to anode 42-2, causing light 56 ​​to be emitted from pixel 22-2. As mentioned earlier, it is ideal if no light is emitted from pixels 22-1 and 22-3 due to the voltage applied to anode 42-2. However, as shown, leakage can occur through the OLED layer 45 between anodes 42-2 and 42-1, and between anodes 42-2 and 42-3. A resistance 58 (i.e., the resistance associated with the OLED layer) may be present between anode 42-2 and the adjacent anode, which helps prevent leakage. The higher the resistance, the less leakage current will reach anodes 42-1 and 42-3. However, the resistance may not be high enough to completely eliminate leakage between anode 42-2 and anodes 42-1 and 42-3. As shown, light 56 ​​can be emitted from pixels 22-1 and 22-3 even if pixels 22-1 and 22-3 are intended to be off. The resistance 58 between adjacent anodes can decrease as the distance 60 between adjacent anodes decreases. To maximize display resolution, a smaller distance 60 between adjacent anodes is desirable. However, this reduces the resistance 58 between anodes and increases crosstalk between pixels.

[0060] Although Figure 4 As not shown, display 14 may optionally include a pixel definition layer (PDL). The pixel definition layer may be formed of a dielectric material and may be interposed between adjacent anodes of the display. The pixel definition layer may have openings in which anodes are formed, thereby defining the area of ​​each pixel. Each of the following embodiments of an organic light-emitting diode display may optionally include a pixel definition layer.

[0061] Figure 5 It is a cross-sectional side view of an exemplary display having organic light-emitting diode display pixels. Figure 5 It shows Figure 4Details of the OLED layer 45. As shown, the OLED layer 45 (sometimes referred to as an organic stack, organic stack, or organic light-emitting diode (OLED) stack) may include a hole injection layer (HIL) 44, a hole transport layer (HTL) 46, an emitter layer (EML) 48, an electron transport layer (ETL) 50, and an electron injection layer (EIL) 52 interposed between the anode 42 and the cathode 54. The hole injection layer and the hole transport layer may be collectively referred to as the hole layer (i.e., hole layer 62). The electron transport layer and the electron injection layer may be collectively referred to as the electron layer (i.e., electron layer 64). The emitter layer 48 may include an organic electroluminescent material. As shown, the hole layer 62 and the electron layer 64 may be a capping layer (common layer) covering the entire array.

[0062] Ideally, adjacent diodes in display 14 operate independently. In practice, the presence of a common layer such as hole layer 62 provides an opportunity for leakage current from one diode to flow laterally into adjacent diodes, potentially damaging them. For example, the process of applying a drive current between anode 42-1 and cathode 54 could generate lateral leakage current through hole layer 62 (e.g., current from anode 42-1 to anode 42-2). To reduce leakage between anodes through hole layer 62, it might be desirable to form the hole layer as a discontinuous patterned layer between adjacent anodes.

[0063] Included Figure 5 The example of the layer between the anode 42 and the cathode 54 is merely illustrative. Additional layers (i.e., electron blocking layers, charge generating layers, hole blocking layers, etc.) may be included between the anode 42 and the cathode 54 if desired. Generally, any desired layer may be included between the anode and cathode, and any layer formed on the display can be considered a common lateral conductive layer. Each layer in the OLED layer 45 can be formed of any desired material. In some embodiments, the layers may be formed of organic materials. However, in some cases, one or more layers may be formed of inorganic materials or materials doped with organic or inorganic dopants.

[0064] exist Figure 5 In the example, a patterned anode layer is formed beneath the common cathode layer. This example is merely illustrative. If desired, the organic light-emitting diode can be inverted so that the cathode is patterned pixel by pixel, and the anode is the common layer. In this case, the order of the OLED layers in the organic stack 45 can also be inverted. For example, an electron injection layer can be formed on the patterned cathode, an electron transport layer can be formed on the electron injection layer, an emission layer can be formed on the electron transport layer, a hole transport layer can be formed on the emission layer, a hole injection layer can be formed on the hole transport layer, and a common anode layer can be formed on the hole injection layer.

[0065] In subsequent embodiments, the patterned anode is described as being positioned below the common cathode layer. However, it should be understood that in each of these embodiments, the anode and cathode may be inverted as previously described.

[0066] Figure 6 A cross-sectional side view of the display is shown after various steps in an exemplary method for forming an organic light-emitting diode display with a patterned hole layer. As shown, at step 102, an anode 42 (sometimes referred to as a patterned electrode) may be disposed on a substrate 26. Next, at step 104, a hole layer 62 may be deposited. Instead of being deposited as a capping layer (such as...) Figure 5 As shown), Figure 6 The hole layer 62 can be deposited such that only the anode 42 is covered by the hole layer, and gaps 66 exist between the portions of the hole layer. Although in Figure 6 While depicted as a single layer, it is understood that hole layer 62 may include a hole injection layer and a hole transport layer (e.g., as shown in the image). Figure 5 (As shown). Forming the hole layer 62 as a discontinuous layer prevents leakage current from passing between adjacent anodes.

[0067] Finally, at step 106, an additional layer for the organic light-emitting diode display can be formed on the hole layer. The additional layer can be formed as a capping layer that continuously covers the entire pixel array of the display. The emitting layer 48, the electron layer 64, and the cathode 54 (sometimes referred to as the common electrode) can all be formed as capping layers on the hole layer 62.

[0068] As previously mentioned, in some cases, the patterned electrode 42 may be a patterned cathode layer instead of a patterned anode layer. In these embodiments, the electron layer 64 may be selectively deposited on the patterned electrode 42. Both the electron layer 64 and the hole layer 62 can be considered as a common lateral conductive layer. Therefore, Figure 6 A common lateral conductive layer is shown selectively deposited on the patterned electrode 42. A common electrode is formed on the lateral conductive layer and the patterned electrode.

[0069] Figure 7 An exemplary method for forming an organic light-emitting diode (OLED) display with a selectively modified hole layer is illustrated. As shown, at step 202, an anode 42 may be formed on a substrate 26. Then, at step 204, a hole layer 62 may be formed as a capping layer across the entire display. As previously mentioned, the conductivity of the hole layer 62 can cause lateral leakage between adjacent anodes. To prevent this lateral leakage, the hole layer can be selectively modified to have regions of reduced conductivity between the anodes. These regions of reduced conductivity can increase the resistance between adjacent anodes and reduce the incidence of crosstalk between pixels.

[0070] At step 206, energy 70 may be emitted toward region 72 of the hole layer between adjacent anodes. Energy 70 may be emitted from energy source 69 (sometimes referred to as a light source). Energy 70 may cause localized damage to the hole layer 62 in region 72, thereby reducing the conductivity of the hole layer relative to the remainder of the hole layer. Energy source 69 may be an ultraviolet light source, a laser source, an electron beam, a focused ion beam (FIB), a gas cluster ion beam, or any other desired type of energy source. Figure 7 An embodiment in which energy 70 is emitted toward hole layer 62 through mask 74 is illustrated. Mask 74 ensures that only region 72 is exposed to energy 70. For example, in an embodiment using an ultraviolet light source, mask 74 ensures that only region 72 is exposed to ultraviolet light 70. Mask 74 may be opaque to energy 70 to prevent energy 70 from passing through the mask, and may have openings that overlap with region 72 and allow energy to reach region 72. Exposure to energy in region 72 of hole layer 62 can cause chemical changes or morphological changes that reduce conductivity. In some embodiments, energy 70 may be powerful enough to physically remove a portion of hole layer 62.

[0071] Finally, at step 208, an emitter layer 48, an electron layer 64, and a cathode 54 may be formed. The emitter layer, electron layer, and cathode may also be formed as a capping layer. After the formation of the additional layers, the reduced conductivity of region 72 of the hole layer 62 will reduce lateral leakage between adjacent anodes.

[0072] Figure 7 The entirety of region 72 is depicted as damaged to form a region of reduced conductivity (i.e., Figure 7 (The hole layer 62 in region 72 is damaged throughout its entire depth). However, this example is merely illustrative. Regions of reduced conductivity may extend through some or all of the hole layer. Additionally, hole layer 62 may include a hole injection layer and a hole transport layer. Some or all of the hole injection layer and hole transport layer may include regions of reduced conductivity. Furthermore, the example of energy exposure occurring immediately after the deposition of the hole layer (and before the deposition of the additional layer) is merely illustrative. Energy exposure may occur after the deposition of the emitter layer, after the deposition of the electron layer, or after the deposition of the cathode, if desired. Multiple energy exposure steps may be performed if desired.

[0073] Figure 7 Mask 74 can also be omitted during the process, such as Figure 8 As shown. Figure 8An exemplary method for forming an organic light-emitting diode (OLED) display with a selectively varying hole layer without using a mask is shown. As shown, at step 302, an anode 42 may be formed on a substrate 26. Next, at step 304, a hole layer 62 may be formed as a capping layer across the entire display. At step 306, an energy source 69 may directly apply energy 70 to a region 72 of the hole layer 62 without an intermediate mask layer. Except for the absence of a mask layer, Figure 8 Steps 302, 304, 306, and 308 in the above can be combined with Figure 7 Steps 202, 204, 206, and 208 are the same. For example, in an embodiment where the energy source 69 is a laser source, the mask layer can be omitted.

[0074] exist Figure 7 and Figure 8 In this context, hole layer 62 is described as being exposed to energy to selectively reduce the conductivity of the layer. However, it should be understood that any layer in the display can be exposed to energy to selectively reduce conductivity.

[0075] Figure 9 This illustrates yet another exemplary method for forming an organic light-emitting diode display with regions of reduced conductivity in the hole layer of the display. At step 402, an anode 42 may be formed between the pixel definition layers (PDL) 76. As previously described... Figure 4 The pixel definition layer 76 may optionally be formed on the substrate 26 between the anodes of the display. Figure 9 At step 404, a fluorinated self-aligned monolayer (SAM) 78 may be formed on each pixel definition layer. The fluorinated SAM may include fluorocarbon compound units bonded to hydrocarbon units. After forming the fluorinated SAM on each pixel definition layer, the OLED stack may be formed at step 406. A hole layer 62 may be formed on the anode and the pixel definition layer (including the incorporated fluorinated self-aligned monolayer). An emitter layer 48, an electron layer 64, and a cathode 54 may be formed over the hole layer. The fluorinated SAM 78 disrupts the molecular stacking of the overlying hole layer 62 by disrupting the π-π* stacking. This disordered region of the hole layer (i.e., region 80) may have reduced conductivity relative to the unaffected portion of the hole layer. The reduced conductivity region 80 may help reduce lateral leakage between adjacent anodes.

[0076] Figure 10 An exemplary organic light-emitting diode pixel 22 is shown, which may be provided with a leakage current absorber to prevent crosstalk between pixels. As shown, the pixel may include a driving transistor 32 and a light-emitting diode 38 (as combined). Figure 3(As described). A pixel may include an emitting transistor 82. The emitting transistor 82 may be coupled in series with a driving transistor 32. An emitting transistor such as transistor 82 may sometimes be referred to as an emitting enable transistor because light emission is enabled when the emitting transistor is turned on. For example, in... Figure 10 In this configuration, the driving transistor 32 can be adjusted to generate a desired amount of driving current through the light-emitting diode 38, so that the desired amount of light 40 is emitted only when the emitting transistor 82 is turned on. When the emitting transistor 82 is turned off, other pixel control circuit operations can be performed (e.g., data loading, threshold voltage compensation to eliminate the dependence of the light-emitting driving current on the threshold voltage of the driving transistor 32, etc.). The emitting transistor 82 can be controlled by an emission control signal (EM).

[0077] like Figure 10 As shown, pixel 22 may include a transistor 84 (sometimes referred to as a leakage current control transistor) for reducing lateral leakage within the display. As previously described, in an organic light-emitting diode (OLED) display, leakage current can propagate to adjacent pixels and cause unintended light emission. This unintended light emission occurs when leakage current flows through the LEDs of adjacent pixels. To prevent leakage current from flowing through the LEDs of adjacent pixels, the pixel may include a low-impedance path to absorb the leakage current. Transistor 84 may be coupled between node 86 and ground terminal 88. Ground terminal 88 may be an analog ground (i.e., 0 volts), while the ground supply voltage (i.e., ELVSS) of the LED may be negative. Node 86 may be interposed between emitter transistor 82 and drive transistor 32. The gate of transistor 84 may receive a bias voltage (V 偏置 When the bias voltage is controlled to turn on transistor 84, a low-impedance path is provided for the leakage current. By guiding the leakage current to ground through transistor 84, the leakage current will not reach the LED and will not cause the LED to emit light unintentionally. To avoid confusion regarding the role of the leakage current control transistor, Figure 10 Additional details of the organic light-emitting diode pixel 22 are omitted. However, it should be understood that pixel 22 may include additional circuitry (i.e., switching transistors for data loading and / or threshold voltage compensation, additional emitter transistors, capacitors for storing data, etc.).

[0078] In some implementation schemes, V 偏置 It can be a global bias voltage. In other words, every pixel in the entire display can receive the same V. 偏置 Voltage value. However, this can lead to unnecessary power consumption. When the emitting transistor 82 is turned off, the light-emitting diode 38 is prevented from emitting light (regardless of the presence of leakage current). Therefore, the power consumed by controlling the leakage path when the emitting transistor 82 is turned off is unnecessary.

[0079] To reduce power consumption in the display, and also to reduce pixel crosstalk due to lateral leakage, the bias voltage (V) can be controlled line by line in sync with the transmit control signal (EM). 偏置 ).like Figure 11 As shown, the emission control signal (EM1) associated with the first row of the display can be asserted at t0 to enable light emission. Additionally, at t0, the bias voltage (V) associated with the first row can be increased. 偏置,1 This provides a leakage current receiver within the pixel. Similarly, the emission control signal (EM2) associated with the second row of the display can be asserted at t1 to enable light emission. Additionally, at t1, the bias voltage (V) associated with the second row can be increased. 偏置,2 This provides a leakage current receiver within the pixel. This timing can continue for each row of the display. The transmit control signal (EM) associated with the last row of the display... n Light emission can be asserted to be enabled at t2. Additionally, at t2, the bias voltage (V) associated with the last row can be increased. 偏置,n This provides a leakage current receiver within the pixel. When the emitter control signal for each row is deasserted, the bias voltage for that row is reduced. In other words, the current leakage control transistor is asserted and deasserted synchronously with the assertion and deassertion of the emitter transistor. The leakage current transistor can be asserted at all times while the emitter transistor is asserted, and the leakage current transistor can be deasserted at all times while the emitter transistor is deasserted.

[0080] Figure 12 Another embodiment of an organic light-emitting diode display with reduced lateral leakage is shown. For example... Figure 12 As shown, an anode 42 may be formed on a substrate 26. A hole layer 62 (which may include a hole injection layer and a hole transport layer) may be formed above the anode, an emitter layer 48 may be formed above the hole layer, and an electron layer 64 (which may include an electron injection layer and an electron transport layer) may be formed above the emitter layer. A cathode 54, which may be formed of a transparent conductive material, may be positioned above the electron layer.

[0081] Figure 12An organic light-emitting diode (OLED) display may include an additional conductive layer 90. The conductive layer 90 (sometimes referred to as conductive contacts) may be coupled to a bias voltage. Biasing the conductive layer with an appropriate voltage causes it to act as an absorber of leakage current that would otherwise flow between adjacent anodes. The conductive contacts 90 may be formed between each row and each column of the display (i.e., having an opening for each anode of the display). Alternatively, the conductive contacts may be formed only between columns of the display or only between rows of the display. In some embodiments, horizontal crosstalk between pixels poses a greater risk of damaging the display. In these embodiments, conductive contacts coupled to the bias voltage may be formed between adjacent columns of the display. These examples are merely illustrative, and the conductive layer may be formed in any desired location to reduce lateral leakage between anodes.

[0082] The conductive layer 90 may be formed of the same material as the anode 42. The anode 42 may have been optimized to contact the hole layer 62. Therefore, forming the conductive layer 90 of the same material as the anode ensures that the conductive layer 90 and the hole layer 62 will be compatible. If desired, the anode 42 and the conductive contact 90 may also be formed in the same processing steps. The example of the conductive contact 90 formed of the same material as the anode 42 is merely illustrative. If desired, the conductive contact 90 may be formed of a different material than the anode 42. The conductive contact 90 may be coupled to any desired bias voltage. In some cases, the value of the bias voltage may be traded between power consumption and the effectiveness of leakage reduction. The value of the bias voltage may be optimized based on these two factors and according to the specific application of the display.

[0083] Figure 13This is a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display having trenches to reduce conductivity and lateral leakage between adjacent anodes. Anode 42 may be formed on a substrate such as substrate 26. Trench 92 may be formed in substrate 26. The trenches allow each layer in the region within and above the trench to be lower when OLED layers such as hole layer 62, emitter layer 48, electron layer 64, and cathode 54 are deposited across the entire array. For example, hole layer 62 may have a first portion formed in the trench and a second portion not formed in the trench, the second portion being formed in a plane higher than the first portion. Emitter layer 48 may have a first portion formed above the trench and a second portion not formed above the trench, the second portion being formed in a plane higher than the first portion. Electron layer 64 may have a first portion formed above the trench and a second portion not formed above the trench, the second portion being formed in a plane higher than the first portion. Cathode 54 may have a first portion formed above the trench and a second portion not formed above the trench, the second portion being formed in a plane higher than the first portion. As shown, the hole layer 62 may have a portion formed in the trench 92. The portion of the hole layer 62 in the trench 92 may be surrounded by the substrate 26. The emitter layer 48 may have a portion interposed above the trench 92 between the portions of the hole layer 62. The electron layer 64 may have a portion interposed above the trench 92 between the portions of the emitter layer 48. The cathode 54 may have a portion interposed above the trench 92 between the portions of the electron layer 64.

[0084] By forming trenches 92 in the substrate prior to depositing the OLED layer, the continuity of the OLED layer is disrupted, thereby reducing conductivity and suppressing current leakage between adjacent anodes. The hole layer 62 is likely the most likely to conduct leakage current. Disrupting the continuity between the hole layer and the trench reduces leakage.

[0085] If needed, the depth of trench 92 and the thickness of cathode layer 54 can be selected to allow cathode 54 to remain a continuous layer. If the depth of the trench is sufficiently reduced, the portion of the cathode above the trench will contact the portion of the cathode that does not overlap with the trench. This will maintain the continuity of the cathode throughout the array. Increasing the thickness of the cathode, despite the trench below, can also help ensure a continuous cathode layer.

[0086] Figure 14An exemplary method for reducing lateral leakage in an organic light-emitting diode (OLED) display by forming an insulating structure between the anodes of the OLED display is shown. At step 502, an anode 42 may be formed on a substrate 26. Next, at step 504, an insulating layer 94 may be formed as a capping layer over the entire display. The insulating layer 94 may be formed of any desired insulating material. After depositing the insulating layer 94, an additional layer 96 may be formed over the insulating layer 94. Layer 96 may be formed as a capping layer over the entire display. Layer 96 may be formed of a conductive or insulating material. At step 508, layer 96 may be etched to remove a portion of layer 96 over the anode 42. A portion of layer 96 may remain in the region between adjacent anodes in the display. The insulating layer 94 may then be etched at step 510. If desired, layer 96 may act as a mask layer for etching the insulating layer 94. Alternatively, an additional mask layer may be used if desired. The etching of the insulating layer 94 may be a slight isotropic etching that results in the removal of a portion of the insulating layer 94 in region 98. The resulting structure between the anodes 42 (i.e., structure 95) may have a T-shape, wherein the overhanging portion of layer 96 does not overlap with insulating layer 94. Insulating structure 95 may disrupt the continuity of the OLED layers between the anodes 42, thereby reducing lateral leakage in the display.

[0087] Step 512 shows a cross-sectional side view of the organic light-emitting diode display after the OLED layer and cathode 54 are formed over the anode and insulating structure. As shown, the hole layer 62, the emitter layer 48, the electron layer 64, and the cathode 54 can be deposited as capping layers across the entire array. Thus, each layer has a portion on the insulating structure 95 and another portion over the anode 42. For example, the hole layer 62 may have a first portion overlapping and directly contacting the anode 42 and a second portion overlapping and directly contacting the structure 95. The emitter layer 48 may have a first portion overlapping and directly contacting the first portion of the hole layer 62 and a second portion overlapping and directly contacting the second portion of the hole layer 62. The electron layer 64 may have a first portion overlapping and directly contacting the first portion of the emitter layer 48 and a second portion overlapping and directly contacting the second portion of the emitter layer 48. The cathode 54 may have a first portion overlapping and directly contacting the first portion of the electron layer 64 and a second portion overlapping and directly contacting the second portion of the electron layer 64.

[0088] To maintain the continuity of the cathode 54, layer 96 of structure 95 can be formed of a conductive material. Therefore, when the layer thickness is appropriately selected, the portion of the cathode 54 that overlaps with the anode can be in direct contact and electrically connected through layer 96. Layer 96 also reduces the lateral resistivity of the cathode 54, which can help reduce power consumption in the display.

[0089] Figure 15An exemplary method for forming an organic light-emitting diode (OLED) display with a tapered insulating structure to reduce lateral leakage is shown. At step 602, an anode 42 may be formed on a substrate 26. Next, at step 604, an insulating structure 99 may be formed between adjacent anodes 42 within the display. The insulating structure 99 may be formed of any desired insulating material. The insulating structure 99 may have a tapered shape. The upper surface of the insulating structure 99 may have a first width, while the lower surface of the insulating structure 99 may have a second width less than the first width. The insulating structure may have a trapezoidal cross-sectional shape. The insulating structure may have a height less than 3 micrometers, less than 5 micrometers, less than 10 micrometers, greater than 1 micrometer, between 1 micrometer and 5 micrometers, or any other desired height. These examples of the dimensions and shapes of the insulating structure 99 are merely illustrative. The insulating structure 99 may have any desired shape and dimensions.

[0090] At step 606, the OLED layer and cathode can be formed as a capping layer across the entire display. The presence of the insulating structure 99 disrupts the continuity of the OLED layer, thereby reducing lateral leakage between the anodes of the OLED layer. Figure 15 As shown in the cross-sectional side view, the hole layer 62 may have a first portion that overlaps and directly contacts the anode 42 and a second portion that overlaps and directly contacts the insulating structure 99. The emitter layer 48 may have a first portion that overlaps and directly contacts the first portion of the hole layer 62 and a second portion that overlaps and directly contacts the second portion of the hole layer 62. The electron layer 64 may have a first portion that overlaps and directly contacts the first portion of the emitter layer 48 and a second portion that overlaps and directly contacts the second portion of the emitter layer 48. The cathode 54 may have a first portion that overlaps and directly contacts the first portion of the electron layer 64 and a second portion that overlaps and directly contacts the second portion of the electron layer 64.

[0091] The previous examples have already been described (e.g., Figure 14 and Figure 15 The structure includes a feature between adjacent anodes 42 to disrupt the continuity of the hole layer (62), thereby reducing lateral leakage between anodes. In another exemplary example, a pixel definition layer may be used to disrupt the continuity of the hole layer 62 between adjacent anodes. Figure 16 A cross-sectional side view of an exemplary organic light-emitting diode display having a pixel definition layer that disrupts the continuity of the hole layer 62.

[0092] like Figure 16As shown, a pixel defining layer 76 may be formed on a substrate 26 between the anodes of the display. The pixel defining layer may be opaque, thus defining the area of ​​each pixel emitting light. The pixel defining layer may be formed of any desired material. The pixel defining layer may be formed of one or more materials (e.g., silicon nitride, silicon dioxide, etc.). If desired, the pixel defining layer may also be formed of an organic material. The shape of each pixel defining layer may form interruptions in the overlying organic light-emitting diode display layer. As previously mentioned, it may be advantageous to form interruptions in the hole layer 62 (to prevent lateral leakage through the hole layer 62). However, it may also be desirable to maintain continuity in one or more other layers in the display (e.g., cathode 54). Therefore, the shape of the pixel defining layer may be designed such that the hole layer 62 deposited above the pixel defining layer has interruptions, while the cathode 54 deposited above the pixel defining layer does not have interruptions. The emitting layer 48 and the electron layer 64 may optionally have interruptions. The pixel defining layer 76 may have any desired shape to help achieve these discontinuities and continuity. For example, each pixel-defined layer may have steep sidewalls, undercut sidewalls, or sidewalls with multiple curves (e.g., fan-shaped sidewalls).

[0093] Figure 17 This is a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display having a pixel-defining layer with steep sidewalls that disrupt the continuity of the hole layer. As shown, the pixel-defining layer 76 has an upper (top) surface 112 and a sidewall surface 114 (sometimes referred to as a sidewall, side surface, or edge surface). The sidewall surface 114 may form an angle 116 relative to the upper surface 118 of the anode 42. The upper surface 118 of the anode 42 may be parallel to the upper surface 112 of the pixel-defining layer 76. The angle 116 may be any desired angle (e.g., greater than 70°, greater than 75°, greater than 80°, greater than 85°, greater than 88°, greater than 90°, greater than 95°, less than 70°, less than 75°, less than 80°, less than 85°, less than 88°, less than 90°, less than 95°, between 75° and 90°, between 80° and 90°, between 85° and 90°). Figure 17 As shown, when the hole layer 62 is deposited over the pixel definition layer 76, an interruption portion 120 is formed. Thus, the hole layer 62 may have a first portion formed on a first side of the interruption portion (e.g., the portion above the upper surface 112 of the PDL 76) and a second portion formed on a second opposite side of the interruption portion, electrically isolated from the first portion. Therefore, the portion of the hole layer 62 above the first pixel can be electrically isolated from the portion of the hole layer 62 above the second adjacent pixel. Additionally, as... Figure 17 As shown, the interrupted portion 120 does not extend into the cathode layer 54. Maintaining the continuity of the cathode layer 54 ensures the proper operation of the organic light-emitting diode display.

[0094] If desired, anode 42 can be portions of varying heights to facilitate the desired discontinuities and continuity within the organic light-emitting diode layer. For example... Figure 17 As shown, the anode 42 may have a first height 122 in a first region (e.g., the portion of the anode that does not overlap with the pixel definition layer 76) and a second height 124 in a second region (e.g., the portion of the anode that overlaps with the pixel definition layer 76). The second height 124 may be greater than the first height 122. This example is merely illustrative. If desired, the anode 42 may have an upper surface with the same height across the entire anode. For all embodiments herein, the anode may have a consistent height across the entire upper surface of the anode, or it may have one or more portions with different heights.

[0095] Figure 18 This is a cross-sectional side view of an exemplary organic light-emitting diode display with a pixel-defining layer that has an undercut that disrupts the continuity of the hole layer. (Example:) Figure 18 As shown, the pixel definition layer 76 has an upper (top) surface 112 and a sidewall surface 114 (sometimes referred to as sidewall, side surface, or edge surface). The sidewall 114 has an undercut 126 that facilitates the formation of interrupted portions in the cavity layer 62. The undercut 126 can be considered as a recess in the sidewall 114. The sidewall 114 may extend vertically downward (e.g., along the negative Z direction). Above the undercut 126, the sidewall may also extend along the negative X direction. To form the undercut 126, the sidewall may extend along the positive X direction. Thus, a portion of the pixel definition layer 76 may overlap with the recess 128. Figure 18 As shown, when the hole layer 62 is deposited over the pixel definition layer 76, the undercut 126 forms an interruption portion. The hole layer 62 may have a first portion formed on a first side of the interruption portion (e.g., the portion above the upper surface 112 of the PDL 76) and a second portion formed on a second opposite side of the interruption portion, electrically isolated from the first portion. Therefore, the portion of the hole layer 62 above the first pixel may be electrically isolated from the portion of the hole layer 62 above the second adjacent pixel. Additionally, as... Figure 18 As shown, the emitting layer 48, the electron layer 64, and the cathode layer 54 remain continuous (despite the undercut 126). Maintaining the continuity of the cathode layer 54 ensures the proper operation of the organic light-emitting diode display.

[0096] exist Figure 18 In the example, pixel definition layer 76 is depicted as a single material layer. However, to facilitate the formation of the desired undercut shape in the sidewalls of the pixel definition layer, the pixel definition layer can be formed from multiple layers of material.

[0097] Figure 19This is a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display having a pixel-defining layer, which has multiple layers forming desired sidewall surfaces that disrupt the continuity of the hole layer. The pixel-defining layer can be formed by depositing one or more material layers and then etching those layers. The etched layers and etching process can have various properties that can be adjusted to achieve a desired sidewall shape (e.g., the type of material deposited, the thickness of the deposited material, the selectivity of the etching process, etc.). Figure 19 An example is shown where the pixel definition layer 76 includes a first layer 76-1, a second layer 76-2, and a third layer 76-3. The first, second, and third layers can be formed of any desired material. In an exemplary example, layer 76-1 is formed of silicon dioxide, layer 76-2 is formed of silicon nitride, and layer 76-3 is formed of silicon dioxide.

[0098] Pixel definition layers 76-1, 76-2, and 76-3 can have any desired thickness. For example... Figure 19 As shown, layer 76-1 has a first thickness 130, layer 76-2 has a second thickness 132, and layer 76-3 has a third thickness 134. These thicknesses can be the same or different. In one exemplary example, thickness 132 can be the same as thickness 134, while thickness 130 can be different from thicknesses 132 and 134 (e.g., smaller). In another exemplary example, thicknesses 130, 132, and 134 can all be the same. Each thickness can be any desired distance (e.g., less than 10 micrometers, less than 1 micrometer, less than 100 nanometers, less than 80 nanometers, less than 60 nanometers, less than 40 nanometers, less than 30 nanometers, less than 20 nanometers, greater than 10 micrometers, greater than 1 micrometer, greater than 100 nanometers, greater than 80 nanometers, greater than 60 nanometers, greater than 40 nanometers, greater than 30 nanometers, greater than 20 nanometers, between 20 and 100 nanometers, between 20 and 80 nanometers, between 20 and 60 nanometers, between 40 and 60 nanometers, between 20 and 40 nanometers, etc.). In one example, layer 76-1 can have a thickness of 30 nanometers, layer 76-2 can have a thickness of 55 nanometers, and layer 76-3 can have a thickness of 55 nanometers. In another example, layer 76-1 can have a thickness of 55 nanometers, layer 76-2 can have a thickness of 55 nanometers, and layer 76-3 can have a thickness of 55 nanometers.

[0099] Pixel definition layers 76-1, 76-2, and 76-3 can be etched to have any desired sidewall angle. Each pixel definition layer can have a corresponding sidewall portion. For example... Figure 19As shown, layer 76-1 has a sidewall portion 114-1, layer 76-2 has a sidewall portion 114-2, and layer 76-3 has a sidewall portion 114-3. Sidewall portions 114-1, 114-2, and 114-3 can be combined to form the sidewall (114) of the pixel definition layer. Each sidewall portion can be planar and positioned at a corresponding angle relative to the X-axis (parallel to the upper surface 118 of the anode 42). Sidewall portion 114-1 is positioned at an angle 136 relative to the X-axis, sidewall portion 114-2 is positioned at an angle 138 relative to the X-axis, and sidewall portion 114-3 is positioned at an angle 140 relative to the X-axis. Angles 136, 138, and 140 can each be any desired angle (e.g., 30°, 60°, 80°, 100°, between 20° and 40°, between 50° and 70°, between 95° and 110°, greater than 20°, greater than 45°, greater than 60°, greater than 80°, greater than 90°, greater than 95°, greater than 100°, greater than 120°, less than 20°, less than 45°, less than 60°, less than 80°, less than 90°, less than 95°, less than 100°, less than 120°, etc.). In an exemplary arrangement, angle 136 can be 60°, angle 138 can be 100°, and angle 140 can be 30°. This type of arrangement (e.g., where angle 138 is greater than 90°) produces a combination similar to... Figure 18 The undercut is described above. When the hole layer 62 is deposited over the pixel definition layer 76, the undercut forms an interruption portion 120. Thus, the hole layer 62 may have a first portion formed on a first side of the interruption portion (e.g., the portion above the PDL 76) and a second portion formed on a second opposite side of the interruption portion, electrically isolated from the first portion. Therefore, the portion of the hole layer 62 above the first pixel can be electrically isolated from the portion of the hole layer 62 above the second adjacent pixel. Additionally, as... Figure 19 As shown, the emitting layer 48, the electron layer 64, and the cathode layer 54 remain continuous. Maintaining the continuity of the cathode layer 54 ensures the proper operation of the organic light-emitting diode display.

[0100] Figure 20 This is a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display having a pixel-defining layer with sidewall surfaces having curves that disrupt the continuity of the hole layer. To form a pixel-defining layer with this type of sidewall, the pixel-defining layer can be formed from an organic dielectric material. The organic dielectric material can be patterned using photolithography (e.g., exposure to light). Figure 20The curve shown indicates that light used to pattern the pixel definition layer 76 can be emitted along the negative Z direction, causing the light to be reflected from the upper surface 118 of the anode 42. The wavelength of the light and the thickness of the pixel definition layer 76 can be controlled to generate a standing wave (due to thin-film interference effects). The sidewall profile then reflects the shape of the standing wave, resulting in a curved sidewall surface 114. The sidewall surface 114 may sometimes be described as having a fan-shaped or sinusoidal shape. When the hole layer 62 is deposited over the pixel definition layer 76, the sinusoidal surface of the sidewall 114 forms an interrupted portion. The hole layer 62 may have a first portion formed on a first side of the interrupted portion (e.g., the portion above the PDL 76) and a second portion formed on a second opposite side of the interrupted portion, electrically isolated from the first portion. Therefore, the portion of the hole layer 62 above the first pixel may be electrically isolated from the portion of the hole layer 62 above the second adjacent pixel. Additionally, as Figure 20 As shown, the emitting layer 48, the electron layer 64, and the cathode layer 54 remain continuous. Maintaining the continuity of the cathode layer 54 ensures the proper operation of the organic light-emitting diode display.

[0101] Figure 21 The image shows a cross-sectional side view of an illustrative organic light-emitting diode (OLED) display, which has a control gate formed as a p-type field-effect transistor (FET) to eliminate lateral leakage. Figure 21 As shown, the display 14 includes an anode 42 on a substrate 26. A hole layer 62 (which may include a hole transport layer and a hole injection layer), an emitter layer 48, an electron layer 64 (which may include an electron transport layer and an electron injection layer), and a common electrode layer 54 (e.g., a cathode) are formed above the anode 42. A pixel definition layer 76 is also formed between the anodes 42. In this embodiment, the display also includes a control gate to form an organic thin-film transistor. Figure 21 As shown, a control gate 142 may be formed between adjacent anodes 42. The control gate may be covered by a dielectric material 144 (e.g., a gate dielectric) that insulates the control gate (below the gate dielectric) from the hole layer 62 (above the gate dielectric). The dielectric material 144 may be formed of any desired material (e.g., silicon dioxide). When a bias voltage (e.g., a positive bias voltage) is applied to the gate 142, the current channel formed by the hole layer 62 may be electrically cut off, thereby preventing lateral leakage between adjacent anodes. A pixel definition layer 76 may be patterned such that it does not overlap with the control gate 142. In other words, the pixel definition layer 76 may have a recess (sometimes referred to as an opening, slot, or hole) that overlaps with the control gate.

[0102] The control gate 142 can be a conductive layer formed of any desired conductive material. For example, the control gate 142 can be formed of aluminum, indium tin oxide (ITO), or another desired conductive material. In some embodiments, the control gate 142 can be formed of the same material as another layer in the display. This allows for faster and lower-cost manufacturing (because a single manufacturing step can be used to form both the control gate and the other layer in the display). Figure 21 In this example, the control gate 142 is formed in the same layer as the anode contact 146. The contact 146 may be a conductive layer for contacting the corresponding anode 42 (e.g., providing a signal to it). The conductive layer 142 may be formed of the same material as the contact 146, may be formed during the same manufacturing steps as the contact 146, may be formed using the same mask as the contact 146, and / or may be formed in the same plane as the contact 146 (e.g., such that the conductive layer 142 and the contact 146 are coplanar).

[0103] The example of the control gate 142 formed from the same layer as contact 146 is merely illustrative. In another embodiment, such as Figure 22 As shown, the control gate 142 may be formed of the same layer as the anode 42. The conductive layer 142 may be formed of the same material as the anode 42, may be formed during the same manufacturing steps as the anode 42, may be formed using the same mask as the anode 42, and / or may be formed in the same plane as the anode 42 (e.g., such that the conductive layer 142 and the anode 42 are coplanar). In an exemplary example, both layer 142 and anode 42 may be formed of aluminum. (In conjunction with the above) Figure 21 The discussion is similar. Figure 22 The pixel definition layer has an opening that overlaps with the control gate 142. The dielectric layer 144 may have opposing first and second sides, wherein the first side directly contacts the hole layer 62, and the second side directly contacts the control gate 142. If desired, the dielectric layer may also directly contact the pixel definition layer 76 (e.g., a first edge of the dielectric layer may contact a first portion of the pixel definition layer, and a second edge of the dielectric layer may contact a second portion of the pixel definition layer). Figure 21 and Figure 22 In one implementation, the pixel definition layer 76 may be formed of an organic material (sometimes referred to as an organic film).

[0104] Figure 23 The image shows a cross-sectional side view of an illustrative organic light-emitting diode (OLED) display having a control gate formed as a p-type organic thin-film transistor (TFT) to eliminate lateral leakage. Figure 23In one embodiment, the display 14 includes an anode formed of multiple layers of metal. For example, each anode has an electrically connected first layer 42-1 and a second layer 42-2 (e.g., layer 42-1 directly contacts layer 42-2 through an opening in the dielectric layer 150). The first layer 42-1 may be formed of the same material as the second layer 42-2 or a different material. In one exemplary embodiment, the anode layer 42-1 is formed of indium tin oxide (ITO), while the anode layer 42-2 is formed of aluminum. This example is merely illustrative, and each anode layer may be formed of any desired material.

[0105] like Figure 23 As shown, the display also includes a control gate to form an organic thin-film transistor. (As illustrated...) Figure 23 As shown, a control gate 148 (sometimes referred to as a conductive layer) may be formed between adjacent anodes 42. Specifically, the control gate 148 may be formed between second layers 42-2 of adjacent anodes. The conductive layer 148 may be formed of the same material as the anode layer 42-2, may be formed during the same manufacturing steps as the anode layer 42-2, may be formed using the same mask as the anode layer 42-2, and / or may be formed in the same plane as the anode layer 42-2 (e.g., such that the conductive layer 148 and the anode layer 42-2 are coplanar). To insulate the control gate 148 (ensuring that the control gate 148 is not electrically connected to adjacent anodes), an insulating layer 152 may be interposed between the control gate and the anodes. The insulating layer 152 (sometimes referred to as a dielectric layer 152 or planarization layer 152) may be formed of silicon dioxide (SiO2) or another desired dielectric material. The control gate may be covered with an insulating material 150 (e.g., a gate dielectric) that insulates the control gate and is interposed between anode layers 42-1 and 42-2. The dielectric material 150 can be formed of any desired material (e.g., silicon dioxide). When a bias voltage (e.g., a positive bias voltage) is applied to the gate 148, the current channel formed by the hole layer 62 can be electrically cut off, thereby preventing lateral leakage between adjacent anodes. A pixel definition layer 76 (which can be formed of an organic material) is also formed above the control gate 148. The dielectric layer 150 can be interposed between and in direct contact with the control gate 148 and the pixel definition layer 76.

[0106] exist Figure 23 In this arrangement, the control gate 148 is separated from the hole layer 62 by a dielectric layer 150 and a pixel definition layer 76. The thickness of these layers is proportional to the positive bias voltage required for the control gate 148 to reduce lateral leakage between adjacent anodes.

[0107] like Figure 24As shown, an organic light-emitting diode (OLED) display may include a control gate 148 formed within a pixel definition layer 76. When a positive bias voltage is applied to the control gate 148, the current channel formed by the hole layer 62 can be electrically cut off, thereby preventing lateral leakage between adjacent anodes. The thinnest portion of the hole layer 62 may be adjacent to the pixel definition layer 76. Therefore, forming the control gate 148 in the pixel definition layer 76 allows the control gate 148 to control the current channel at its thinnest point, thereby minimizing leakage current. Figure 24 This arrangement also allows the control gate 148 to be formed as a layer separate from the anode layer 42-2 (or anode layer 42-1). In some cases, this can make manufacturing the display easier. Additionally, Figure 24 The position of the control gate 148 confines holes within the active pixel region, thus reducing edge emission.

[0108] like Figure 24 As shown, the control gate 148 can be embedded in the pixel definition layer 76. The control gate can be completely surrounded by the pixel definition layer 76 (e.g., such that all surfaces of the control gate are in direct contact with the pixel definition layer 76). The pixel definition layer 76 can be formed of any desired material (e.g., silicon dioxide). To embed the control gate 148 in the pixel definition layer 76, the pixel definition layer 76 can be formed using multiple deposition steps (e.g., a first layer is deposited below the control gate, a second layer is deposited above the control gate, and a third layer is deposited on the edge of the control gate).

[0109] Figure 23 and Figure 24 The example of the anode 42 being formed of two layers is merely illustrative. The anode of the organic light-emitting diode display 14 (in all embodiments herein) may be formed of any desired number of layers. Figure 23 and Figure 24 The control gate shown can be used in displays with single-layer or multi-layer anodes.

[0110] Figures 21 to 24 All embodiments of organic light-emitting diode displays include control gates for controlling lateral leakage between adjacent anodes in the display. These control gates can be arranged in a grid, column, or other desired pattern.

[0111] Figure 25 and Figure 26 A top view of an exemplary organic light-emitting diode display illustrating the arrangement of the control gate. (See attached image.) Figure 25 As shown, the control gate (e.g., Figure 21 and Figure 22 Control gate 142 or Figure 23 and Figure 24The control gate 148 can be arranged in a grid between each anode 42 in the display. This type of arrangement reduces leakage between all anodes. Figure 26 In the alternative embodiment shown, the control gate can be arranged as a column between adjacent pixel columns in an organic light-emitting diode display. Figure 26 By controlling the gate, leakage between adjacent pixel columns will be reduced. This type of arrangement is suitable for displays with pixels of the same color in a common column (e.g., a column of red pixels, a column of green pixels, a column of blue pixels, etc.). In this type of arrangement, leakage between adjacent red pixels may be more permissible (while still maintaining the desired display performance) compared to leakage between pixels of different colors. Therefore, reducing leakage between columns may be sufficient to obtain satisfactory display performance. Figure 25 and Figure 26 The control gate pattern shown is merely illustrative. Typically, control gates can be positioned across the entire display in any desired manner (e.g., between adjacent rows, in an irregular pattern, etc.).

[0112] In addition to lateral leakage between adjacent pixels, some organic light-emitting diode displays may have lower-than-expected efficiency. Figure 27 The image shows a cross-sectional side view of an illustrative organic light-emitting diode (OLED) display, which has a reflective layer for improving pixel efficiency. Figure 27 As shown, display 14 includes an anode 42 covered by a hole layer 62, an emitter layer 48, an electron layer 64, and a cathode layer 54. Display 14 may additionally include a reflective layer 156 beneath the anode 42. The reflective layer 156 can be formed across the entire display (such that areas not covered by the anode are covered by the reflective layer). An additional dielectric layer 154 can be formed above the reflective layer and between the anode. If desired, the dielectric layer 154 can be a pixel definition layer. The reflective layer 156 and the dielectric layer 154 contribute to improved efficiency in the area between adjacent anodes, thereby enhancing the efficiency of the display.

[0113] exist Figure 27 In this embodiment, a reflective layer 156 is formed below and in direct contact with the anode 42. Therefore, the reflective layer 156 can be formed of a dielectric material (e.g., to ensure that the anodes are not short-circuited together through the reflective layer). In embodiments where the reflective layer 156 is not formed in direct contact with the anode (e.g., an intermediate insulating layer is present), the reflective layer can be formed of a conductive or non-conductive material. The reflective layer can have any desired reflectivity (e.g., greater than 90%, greater than 95%, greater than 80%, greater than 60%, greater than 40%, less than 95%, less than 90%, less than 80%, less than 60%, etc.).

[0114] To reduce inter-pixel coupling due to lateral leakage, the anode size can be reduced. Because the reflective layer increases the effective pixel size, the anode does not need to be as large to achieve the desired light output. Reducing the anode size can reduce inter-pixel coupling caused by lateral leakage between adjacent anodes without sacrificing pixel performance. In an exemplary embodiment, the width of the anode ( Figure 27 The distance in the middle (158) can be smaller than the distance between adjacent anodes ( Figure 27 Distance 160 in the distance. Distance 158 can be any desired distance (e.g., less than 0.1 μm, less than 1 μm, less than 10 μm, less than 50 μm, less than 100 μm, less than 1000 μm, greater than 0.1 μm, greater than 1 μm, greater than 10 μm, greater than 50 μm, greater than 100 μm, greater than 1000 μm, etc.). Similarly, distance 160 can be any desired distance (e.g., less than 0.1 μm, less than 1 μm, less than 10 μm, less than 50 μm, less than 100 μm, less than 1000 μm, greater than 0.1 μm, greater than 1 μm, greater than 10 μm, greater than 50 μm, greater than 100 μm, greater than 1000 μm, etc.).

[0115] If desired, one or more of the above embodiments can be used in combination in a single organic light-emitting diode display. Additionally, in the foregoing embodiments, an example is provided of forming a common lateral conductive layer (i.e., hole layer 62) on the patterned anode. However, in each embodiment, the common lateral conductive layer may conversely be formed on the patterned cathode. In embodiments where the patterned electrode is the cathode, the common lateral conductive layer may be an electron layer. In embodiments where the patterned electrode is the cathode, the common electrode may be the anode.

[0116] Additionally, several of the foregoing embodiments describe arrangements for forming interruptions in a common lateral conductive layer (e.g., hole layer 62) in an organic light-emitting diode display. However, it should be understood that examples of forming interruptions in the common lateral conductive layer are merely illustrative. In some embodiments, the common lateral conductive layer may have a thinned portion (e.g., thinner than a portion of the common lateral conductive layer directly above the anode) that at least partially reduces the conductivity of the lateral conductive layer (rather than completely interrupting it), thereby at least partially reducing lateral leakage. The thickness of the thinned portion may be less than 80% of the thickness of the portion on the anode, less than 60% of the thickness of the portion on the anode, less than 40% of the thickness of the portion on the anode, less than 20% of the thickness of the portion on the anode, less than 100% of the thickness of the portion on the anode, etc. In embodiments where the common lateral conductive layer has an interrupted portion, the common lateral conductive layer may be considered to have a thinned portion with zero thickness.

[0117] In various embodiments, the display may include a substrate and a pixel array including a first pixel and a second pixel. The first pixel may include a first organic light-emitting diode (OLED) and a first patterned electrode on the substrate, and the second pixel may include a second OLED and a second patterned electrode on the substrate. The display may also include a common lateral conductive layer forming part of both the first and second OLEDs, and a structure interposed between the first and second patterned electrodes. This structure may reduce the amount of leakage current through the common lateral conductive layer between the first and second patterned electrodes.

[0118] The structure may include conductive contacts coupled to a bias voltage. The conductive contacts may be formed on a substrate, and a common lateral conductive layer may be formed over and in direct contact with the first and second patterned electrodes and the conductive contacts. The conductive contacts may be formed of the same material as the first and second patterned electrodes.

[0119] The structure may include an insulating layer having a first width and an additional layer formed over the insulating layer having a second width greater than the first width. The structure may be a T-shaped structure. The display may also include an emitter layer formed over a common lateral conductive layer, an additional common lateral conductive layer formed over the emitter layer, and a common electrode formed over the additional common lateral conductive layer. The common electrode has a first portion over a first patterned electrode and a second portion over a second patterned electrode, and the additional layer of the structure may include a conductive layer electrically connecting the first portion of the common electrode to the second portion of the common electrode.

[0120] The structure may include an insulating structure, which may include an upper surface having a first width and a lower surface having a second width less than the first width. A common lateral conductive layer may have a first portion formed above a first patterned electrode, a second portion formed above a second patterned electrode, and a third portion formed above the insulating structure. The third portion of the common lateral conductive layer may not be electrically connected to the first and second portions of the common lateral conductive layer.

[0121] The structure may include trenches in a substrate, and a common lateral conductive layer may have a first portion formed over a first patterned electrode, a second portion formed over a second patterned electrode, and a third portion formed in the trenches. The display may also include an additional layer formed on the substrate. The structure may include trenches in the additional layer, and the common lateral conductive layer may have a first portion formed over a first patterned electrode, a second portion formed over a second patterned electrode, and a third portion formed in the trenches. The structure may include disordered portions of the common lateral conductive layer, and these disordered portions may be formed over a fluorinated self-aligned monolayer. The structure may include damaged portions of the common lateral conductive layer, which have reduced conductivity relative to portions of the common lateral conductive layer overlapping the first and second patterned electrodes. The common lateral conductive layer may include a laterally conductive injection layer and a laterally conductive transport layer.

[0122] In various embodiments, the method may include forming first patterned electrodes and second patterned electrodes for a first OLED display pixel and a second OLED display pixel on a substrate, depositing a common lateral conductive layer over the first and second patterned electrodes forming a portion of the first and second OLED display pixels, and emitting energy from an energy source into a region of the common lateral conductive layer interposed between the first and second patterned electrodes. This region of the common lateral conductive layer may have reduced conductivity relative to the unexposed portion of the common lateral conductive layer. Emitting energy into this region of the common lateral conductive layer may include emitting energy through a mask layer, and the mask layer may have openings overlapping the region of the common lateral conductive layer. The energy source may include one of an ultraviolet light source and a laser light source. The energy source may include one of an electron beam, a focused ion beam, and a gas cluster ion beam.

[0123] In various embodiments, a method of operating an organic light-emitting diode (OLED) display pixel has a driving transistor, an emitting transistor, and an OLED connected in series between a first power supply terminal and a second power supply terminal, a node interposed between the driving transistor and the emitting transistor, and a leakage current control transistor interposed between the node and a ground terminal. The method may include asserting the emitting transistor at a first time to enable the OLED display pixel to emit light, asserting the leakage current control transistor at a first time, deasserting the emitting transistor at a second time to prevent the OLED display pixel from emitting light after the emission period, and deasserting the leakage current control transistor at a second time. The leakage current control transistor may have a gate that receives a bias voltage. The leakage current control transistor may be asserted at all times while the emitting transistor is asserted, and the leakage current control transistor may be deasserted at all times while the emitting transistor is deasserted.

[0124] In various embodiments, the display includes: a substrate; a pixel array including first organic light-emitting diode (OLED) pixels and second OLED pixels, the first OLED pixels including a first patterned electrode on the substrate, and the second OLED pixels including a second patterned electrode on the substrate; a pixel defining layer on the substrate, the pixel defining layer being interposed between the first patterned electrode and the second patterned electrode; and a lateral conductive layer formed above the pixel defining layer, the lateral conductive layer having a first portion forming a portion of the first OLED pixel and a second portion forming a portion of the second OLED pixel. The first portion may be electrically isolated from the second portion by at least one interrupted portion in the lateral conductive layer formed by the pixel defining layer.

[0125] A lateral conductive layer may be formed above and in direct contact with the pixel definition layer, the first patterned electrode, and the first patterned electrode. The display may further include an emitter layer formed above the lateral conductive layer and a common electrode formed above the emitter layer. The pixel definition layer may have a top surface and sidewall surfaces, and at least one interruption in the lateral conductive layer may be formed by a recess in the sidewall surface. The pixel definition layer may have a top surface and sidewall surfaces, and at least one interruption in the lateral conductive layer may be formed by multiple curves in the sidewall surface. The pixel definition layer may have a top surface and sidewall surfaces, and at least one interruption in the lateral conductive layer may be formed by an undercut in the sidewall surface.

[0126] A pixel defining layer may include at least a first material layer and a second material layer. The pixel defining layer may include a first material layer, a second material layer, and a third material layer. The first material layer may be formed of the same material as the third material layer, and the first material layer may be formed of a different material than the second material layer. The first material layer may be formed of silicon dioxide, the second material layer may be formed of silicon nitride, and the third material layer may be formed of silicon dioxide, with the second material layer interposed between the first and third material layers. The first material layer may have a first thickness, the second material layer may have a second thickness equal to the first thickness, and the third material layer may have a third thickness equal to the first thickness. Alternatively, the first material layer may have a first thickness, the second material layer may have a second thickness, and the third material layer may have a third thickness, and the first and third thicknesses may be different. A first material layer may be inserted between a first patterned electrode and a second material layer, and a second material layer may be inserted between a first material layer and a third material layer. The first material layer may have a first sidewall forming a first angle relative to the upper surface of the first patterned electrode, the second material layer may have a second sidewall forming a second angle relative to the upper surface of the first patterned electrode, and the third material layer may have a third sidewall forming a third angle relative to the upper surface of the first patterned electrode. The first angle may be less than 90 degrees, the second angle may be greater than 90 degrees, and the third angle may be less than 90 degrees.

[0127] In various embodiments, the display may include: a substrate; a pixel array including a first organic light-emitting diode (OLED) pixel and a second OLED pixel, the first OLED pixel including a first patterned electrode on the substrate, and the second OLED pixel including a second patterned electrode on the substrate; a lateral conductive layer formed over the first and second patterned electrodes, the lateral conductive layer having a first portion forming a portion of the first OLED pixel and a second portion forming a portion of the second OLED pixel; and a control gate interposed between the first and second patterned electrodes and coupled to a bias voltage.

[0128] The control gate may be formed as an organic thin-film transistor (OST), which, when coupled to a bias voltage, shuts off the current channel in the lateral conductive layer between the first and second patterned electrodes. The display may also include a gate dielectric interposed between the control gate and the lateral conductive layer. The gate dielectric may have opposing first and second sides, the first side being in direct contact with the control gate and the second side being in direct contact with the lateral conductive layer.

[0129] The control gate may be formed of the same material as the first patterned electrode and the second patterned electrode, and the control gate, the first patterned electrode, and the second patterned electrode may be coplanar. The display may further include a first contact coupled to the first patterned electrode and a second contact coupled to the second patterned electrode. The control gate may be formed of the same material as the first contact and the second contact, and the control gate, the first contact, and the second contact may be coplanar. The display may further include a pixel definition layer interposed between the first patterned electrode and the second patterned electrode. The pixel definition layer may overlap with the control gate. The control gate may be embedded in the pixel definition layer.

[0130] In various embodiments, the display includes: a substrate; a reflective layer formed on the substrate; a pixel array including a first organic light-emitting diode (OLED) pixel and a second OLED pixel, the first OLED pixel including a first patterned electrode on the reflective layer, and the second OLED pixel including a second patterned electrode on the reflective layer; a dielectric layer formed over the reflective layer and between the first and second patterned electrodes; and a lateral conductive layer formed over the dielectric layer, the first and second patterned electrodes, and having a first portion forming a portion of the first OLED pixel and a second portion forming a portion of the second OLED pixel.

[0131] According to one embodiment, a display is provided, the display comprising: a substrate; a pixel array including a first organic light-emitting diode (OLED) pixel and a second OLED pixel, wherein the first OLED pixel includes a first patterned electrode on the substrate, and the second OLED pixel includes a second patterned electrode on the substrate; a pixel defining layer on the substrate, the pixel defining layer being interposed between the first patterned electrode and the second patterned electrode; and a lateral conductive layer formed above the pixel defining layer, the lateral conductive layer having a first portion forming a portion of the first OLED pixel and a second portion forming a portion of the second OLED pixel, the first portion being electrically isolated from the second portion by at least one interrupted portion in the lateral conductive layer formed by the pixel defining layer.

[0132] According to another embodiment, a lateral conductive layer is formed above and in direct contact with the pixel definition layer, the first patterned electrode, and the first patterned electrode.

[0133] According to another embodiment, the display includes an emitter layer formed above a lateral conductive layer and a common electrode formed above the emitter layer.

[0134] According to another embodiment, the pixel definition layer has an upper surface and a sidewall surface, and at least one interrupted portion of the lateral conductive layer is formed by a recess in the sidewall surface.

[0135] According to another implementation, the pixel definition layer includes at least a first material layer and a second material layer.

[0136] According to another embodiment, the pixel definition layer includes a first material layer, a second material layer, and a third material layer, wherein the first material layer is formed of the same material as the third material layer, and the second material layer is formed of a different material than the second material layer.

[0137] According to another embodiment, the first material layer is formed of silicon dioxide, the second material layer is formed of silicon nitride, the third material layer is formed of silicon dioxide, and the second material layer is interposed between the first material layer and the third material layer.

[0138] According to another embodiment, the pixel definition layer includes a first material layer, a second material layer, and a third material layer. The first material layer is interposed between a first patterned electrode and a second material layer, and the second material layer is interposed between the first material layer and the third material layer. The first material layer has a first sidewall at a first angle relative to the upper surface of the first patterned electrode, the second material layer has a second sidewall at a second angle relative to the upper surface of the first patterned electrode, and the third material layer has a third sidewall at a third angle relative to the upper surface of the first patterned electrode. The first angle is less than 90 degrees, the second angle is greater than 90 degrees, and the third angle is less than 90 degrees.

[0139] According to another embodiment, the pixel definition layer has an upper surface and a sidewall surface, and at least one interrupted portion in the lateral conductive layer is formed by multiple curves in the sidewall surface.

[0140] According to one embodiment, a display is provided, the display comprising: a substrate; a pixel array including a first pixel and a second pixel, the first pixel including a first organic light-emitting diode and a first patterned electrode on the substrate, the second pixel including a second organic light-emitting diode and a second patterned electrode on the substrate; a common lateral conductive layer forming a portion of both the first organic light-emitting diode and the second organic light-emitting diode; and a structure interposed between the first patterned electrode and the second patterned electrode, the structure reducing the amount of leakage current through the common lateral conductive layer between the first patterned electrode and the second patterned electrode.

[0141] According to another embodiment, the structure includes conductive contacts coupled to a bias voltage.

[0142] According to another embodiment, the conductive contacts are formed of the same material as the first patterned electrode and the second patterned electrode.

[0143] According to another embodiment, the structure includes an insulating structure, and the insulating structure includes an upper surface having a first width and a lower surface having a second width less than the first width.

[0144] According to another embodiment, the common lateral conductive layer has a first portion formed above a first patterned electrode, a second portion formed above a second patterned electrode, and a third portion formed above an insulating structure, wherein the third portion of the common lateral conductive layer is not electrically connected to the first and second portions of the common lateral conductive layer.

[0145] According to another embodiment, the structure includes trenches in a substrate, and a common lateral conductive layer has a first portion formed above a first patterned electrode, a second portion formed above a second patterned electrode, and a third portion formed in the trenches.

[0146] According to one embodiment, a display is provided, the display comprising: a substrate; a pixel array including a first organic light-emitting diode (OLED) pixel and a second OLED pixel, the first OLED pixel including a first patterned electrode on the substrate, and the second OLED pixel including a second patterned electrode on the substrate; a lateral conductive layer formed over the first and second patterned electrodes, the lateral conductive layer having a first portion forming a portion of the first OLED pixel and a second portion forming a portion of the second OLED pixel; and a control gate interposed between the first and second patterned electrodes and coupled to a bias voltage.

[0147] According to another embodiment, the control gate forms an organic thin-film transistor that, when coupled to a bias voltage, shuts off the current channel in the lateral conductive layer between the first patterned electrode and the second patterned electrode.

[0148] According to another embodiment, the display includes a gate dielectric interposed between a control gate and a lateral conductive layer.

[0149] According to another embodiment, the control gate is formed of the same material as the first patterned electrode and the second patterned electrode, and the control gate, the first patterned electrode, and the second patterned electrode are coplanar.

[0150] According to another embodiment, the display includes a first contact coupled to a first patterned electrode and a second contact coupled to a second patterned electrode, a control gate formed of the same material as the first and second contacts, and the control gate, the first contact, and the second contact being coplanar.

[0151] According to another embodiment, the display includes a pixel definition layer interposed between a first patterned electrode and a second patterned electrode, the pixel definition layer overlapping a control gate.

[0152] According to another embodiment, the display includes a pixel definition layer interposed between a first patterned electrode and a second patterned electrode, and a control gate is embedded within the pixel definition layer.

[0153] The foregoing description is merely illustrative, and various modifications can be made by those skilled in the art without departing from the scope and substance of the described embodiments. The aforementioned embodiments can be implemented independently or in any combination.

Claims

1. A display, comprising: Base; A pixel array, the pixel array including a first organic light-emitting diode pixel and a second organic light-emitting diode pixel, wherein the first organic light-emitting diode pixel includes a first patterned electrode on the substrate, and wherein the second organic light-emitting diode pixel includes a second patterned electrode on the substrate; At least one dielectric layer is located on the substrate, the at least one dielectric layer being interposed between the first patterned electrode and the second patterned electrode; and A lateral conductive layer is formed above the at least one dielectric layer, the lateral conductive layer having a first portion forming a portion of the first organic light-emitting diode pixel and a second portion forming a portion of the second organic light-emitting diode pixel, the first portion being electrically isolated from the second portion by at least one interruption portion in the lateral conductive layer formed by the at least one dielectric layer, wherein the at least one dielectric layer includes a first dielectric layer, a second dielectric layer and a third dielectric layer, wherein the third dielectric layer is located between the first dielectric layer and the second dielectric layer, wherein the first dielectric layer directly contacts the upper surface and a first edge surface of the first patterned electrode, wherein the first dielectric layer has a second edge surface, the second edge surface forming an angle with the upper surface of the first patterned electrode, and wherein the angle is less than 80 degrees.

2. The display according to claim 1, wherein the lateral conductive layer is formed over and in direct contact with the at least one dielectric layer, the first patterned electrode, and the first patterned electrode.

3. The display according to claim 2, further comprising: An emission layer is formed above the lateral conductive layer; and A common electrode is formed above the emitter layer.

4. The display according to claim 1, wherein the at least one dielectric layer has an upper surface and a sidewall surface, and wherein the at least one interrupted portion in the lateral conductive layer is formed by a recess in the sidewall surface.

5. The display according to claim 1, wherein the first dielectric layer is in direct contact with the upper surface of the substrate.

6. A display, comprising: Base; A pixel array, the pixel array including a first organic light-emitting diode pixel and a second organic light-emitting diode pixel, wherein the first organic light-emitting diode pixel includes a first patterned electrode on the substrate, and wherein the second organic light-emitting diode pixel includes a second patterned electrode on the substrate; and At least one dielectric layer is located on the substrate and is interposed between the first patterned electrode and the second patterned electrode. The at least one dielectric layer includes a first layer formed to directly contact the top surface and edge surface of the first patterned electrode. The first layer has an edge angled relative to the top surface of the first patterned electrode, wherein the angle is less than 80 degrees. The at least one dielectric layer also includes a second layer formed on the top surface of the first layer and having an edge, and a third layer formed on the top surface of the second layer and having an edge. The edge of the first layer extends toward the center of the first patterned electrode beyond the edge of the second layer.

7. The display of claim 6, wherein the first layer and the third layer are formed of silicon dioxide, and wherein the second layer is formed of silicon nitride.

8. The display according to claim 6, further comprising: A conductive layer is formed on the at least one dielectric layer, the conductive layer having a first portion and a second portion forming the portion of the first organic light-emitting diode pixel, wherein the second portion is electrically isolated from the first portion through a gap caused by the at least one dielectric layer.

9. The display of claim 6, wherein the first layer is in direct contact with the top surface of the substrate.

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