Polyphase voltage converter and controller thereof, integrated circuit and temperature reporting method

Abstract

Disclosed are a multiphase voltage converter, a controller thereof, an integrated circuit and a temperature reporting method. The multiphase voltage converter includes a plurality of integrated circuits (ICs) and a controller. Each IC includes a control pin for receiving a control signal, a monitoring pin and a temperature detection circuit. The controller includes a monitoring pin, and the monitoring pin of the controller is coupled to the monitoring pin of each IC to receive a monitoring signal. The temperature detection circuit is connected to or disconnected from the monitoring pin of the IC in response to the control signal and the monitoring signal. The controller of the multiphase voltage converter can independently monitor the temperature of each IC, thereby enabling dynamic thermal balancing, single-IC state diagnosis and other related functions.

Description

Technical Field

[0001] Embodiments of the present invention relate to an electronic circuit, and more specifically, to a multiphase voltage converter. Background Technology

[0002] In power conversion applications, interleaved multiphase voltage converters are widely used in high-power and high-current applications because they can provide high current output while having low current ripple and optimized heat and power distribution.

[0003] A traditional interleaved multiphase voltage converter consists of multiple parallel-coupled phases and a controller. Each phase provides temperature information via a pin TMON; the controller has a monitoring pin, which is also coupled to the TMON pins of each phase. Thus, the controller can obtain the highest temperature of each phase in the interleaved multiphase voltage converter. However, traditional interleaved multiphase voltage converters cannot obtain the temperature of a single, individual phase. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides a multiphase voltage converter and its controller, integrated circuit, and temperature reporting method.

[0005] According to an embodiment of the present invention, a multiphase voltage converter is provided, comprising multiple integrated circuits (ICs) and a controller. Each IC provides one phase of the multiphase voltage converter. Each IC includes a control pin, a monitoring pin, and a temperature detection circuit for detecting the temperature of the IC in which it resides. The controller includes multiple control pins and a monitoring pin. Each control pin of the controller is coupled to a control pin of the corresponding IC to provide a control signal, and the monitoring pin of the controller is coupled to a monitoring pin of each IC to receive a monitoring signal. The temperature detection circuit, in response to the control signal and the monitoring signal, connects or disconnects from the monitoring pin of the IC in which the temperature detection circuit resides.

[0006] According to an embodiment of the present invention, an IC for a multiphase voltage converter is provided, comprising a first pin, a second pin, a third pin, a fourth pin, a temperature detection circuit, a high-side switch, and a low-side switch. The first pin receives a control signal. The second pin is coupled to multiple ICs and, together with the multiple ICs, provides a monitoring signal. The third pin receives an input voltage. The fourth pin is coupled to a reference ground. The temperature detection circuit detects the temperature of the IC. The high-side switch includes a first terminal and a second terminal; the first terminal of the high-side switch is coupled to the third pin of the IC to receive the input voltage. The low-side switch includes a first terminal and a second terminal; the first terminal of the low-side switch is coupled to the second terminal of the high-side switch, and the second terminal of the low-side switch is coupled to the fourth pin of the IC. The high-side switch and the low-side switch are respectively turned on and off under the control of the control signal, and the temperature detection circuit is connected to or disconnected from the second pin under the control of the monitoring signal and the control signal.

[0007] According to an embodiment of the present invention, a temperature reporting method is proposed. The temperature reporting method includes: receiving a control signal through a first pin of an IC; detecting the temperature of the IC through a temperature detection circuit; sending a monitoring signal through a second pin of the IC based on the temperature of the IC; receiving an input voltage through a third pin of the IC; controlling the on / off state of a power switch according to the control signal to convert the input voltage into an output voltage; and finally, connecting or disconnecting the temperature detection circuit from the second pin of the IC based on the monitoring signal and the control signal.

[0008] According to an embodiment of the present invention, a controller for a multiphase voltage converter is provided, comprising: multiple control pins, monitoring pins, and a control loop. The multiple control pins provide multiple control signals to multiple ICs, wherein each IC provides one phase of the multiphase voltage converter. The monitoring pins are connected to each IC to receive monitoring signals. The control loop provides multiple control signals based on the output voltage of the multiphase voltage converter and the monitoring signals. The controller sends instructions to multiple chips via the monitoring pins, and one of the control signals transitions to a first state to acquire the temperature of the chip corresponding to the stated control signal. Attached Figure Description

[0009] To better understand this invention, it will be described in detail with reference to the following drawings. The same elements are given the same reference numerals.

[0010] Figure 1 A schematic diagram of the structure of a multiphase voltage converter 100 according to an embodiment of the present invention is shown;

[0011] Figure 2 An embodiment of the present invention is shown. Figure 1 The circuit structure diagram of integrated circuit (IC) 102 in the diagram;

[0012] Figure 3 An embodiment of the present invention is shown. Figure 1 The circuit structure diagram of controller 101 in the middle;

[0013] Figure 4A A waveform diagram of a multiphase voltage converter 100 according to an embodiment of the present invention is shown;

[0014] Figure 4B A waveform diagram of a multiphase voltage converter 100 according to another embodiment of the present invention is shown;

[0015] Figure 5 A schematic diagram of the structure of a multiphase voltage converter 500 according to an embodiment of the present invention is shown;

[0016] Figure 6 An embodiment of the present invention is shown. Figure 5 The circuit diagram of IC502 in the image;

[0017] Figure 7 A schematic diagram of the structure of a multiphase voltage converter 700 according to an embodiment of the present invention is shown;

[0018] Figure 8 An embodiment of the present invention is shown. Figure 7 The circuit diagram of IC702 in the image;

[0019] Figure 9 A temperature reporting method 900 for a multiphase voltage converter according to an embodiment of the present invention is shown. Detailed Implementation

[0020] Specific embodiments of the present invention will now be described in detail. It should be noted that the embodiments described herein are for illustrative purposes only and are not intended to limit the invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that these specific details are not necessary to practice the invention. In other instances, well-known circuits, materials, or methods have not been specifically described to avoid obscuring the invention.

[0021] Figure 1 A schematic diagram of a multiphase voltage converter 100 according to an embodiment of the present invention is shown. Figure 1 In the illustrated embodiment, the multiphase voltage converter 100 includes three integrated circuits (ICs) 102 (i.e., 102-1, 102-2, and 102-3) and a controller 101. Those skilled in the art will understand that the multiphase voltage converter 100 may also include more or fewer ICs 102. In one embodiment, each IC 102 provides one phase of the multiphase voltage converter.

[0022] exist Figure 1 In the illustrated embodiment, each IC 102 includes a control pin PWM, a monitoring pin TMON, and a controller 101. The controller 101 includes control pins PWM1, PWM2, PWM3, and a monitoring pin TMON. The control pin PWM1 of the controller 101 is coupled to the control pin PWM of IC 102-1 to provide the control signal PWM1; the control pin PWM2 of the controller 101 is coupled to the control pin PWM of IC 102-2 to provide the control signal PWM2; and the control pin PWM3 of the controller 101 is coupled to the control pin PWM of IC 102-3 to provide the control signal PWM3. The monitoring pin TMON of the controller 101 is coupled to the monitoring pin TMON of each IC 102 to receive the monitoring signal TMON. In one embodiment, when the controller 101 needs to obtain the temperature of a specific IC 102, and the control signal PWM provided to that specific IC 102 changes to a first state (e.g., logic high), the controller 101 provides an instruction CMD, and the monitoring signal TMON is in the first state under the control of the instruction CMD. The monitoring signal TMON being in the first state may include, but is not limited to: the monitoring signal TMON being pulled high to a threshold Vth1 or higher within a duration Tp2. For example, when controller 101 needs to obtain the temperature of IC 102-1, controller 101 immediately sends a command CMD through the monitoring pin TMON after the rising edge of control signal PWM1. Within a duration Tp2, the monitoring signal TMON is pulled high to a threshold Vth1 or higher by the command CMD. In another embodiment, the monitoring signal TMON becoming the first state may also include: the monitoring signal TMON being pulled high to a threshold Vth1 or higher within a duration Tp2, and then pulled low to a low level (e.g., 0V) within a duration Td3. For example, when controller 101 needs to obtain the temperature of IC 102-1, controller 101 immediately sends a command CMD through the monitoring pin TMON after the rising edge of control signal PWM1. The monitoring signal TMON is pulled high to a threshold Vth1 or higher by the command CMD within a duration Tp2, and then pulled low to 0V within a duration Td3. In one embodiment, the controller 101 also has a feedback pin FB for receiving a feedback signal Vfb representing the output voltage Vo of the multiphase voltage converter 100.

[0023] like Figure 1As shown, each IC102 further includes a temperature detection circuit 11 and a switch 12. The temperature detection circuit 11 provides a temperature signal Tse, which represents the temperature of the IC102 in which the temperature detection circuit 11 is located. When the switch 12 is turned on, the temperature detection circuit 11 is connected to the monitoring pin TMON of the IC102 in which it is located via the switch 12. The control pin PWM of IC102 is coupled to the controller 101 to receive the corresponding control signal PWM, that is: the control pin PWM of IC102-1 is coupled to the controller 101 to receive the control signal PWM1; the control pin PWM of IC102-2 is coupled to the controller 101 to receive the control signal PWM2; the control pin PWM of IC102-3 is coupled to the controller 101 to receive the control signal PWM3. In one embodiment, when the monitoring signal TMON becomes the first state, the temperature detection circuit 11 connects or disconnects from the monitoring pin TMON of the IC102 in which it is located according to the received control signal PWM.

[0024] In one embodiment, each IC 102 further includes a comparator circuit 13 and a logic circuit 14. The comparator circuit 13 is coupled to the monitoring pin TMON of the corresponding IC 102 to receive the monitoring signal TMON. The comparator circuit 13 provides a comparison signal Vc by comparing the monitoring signal TMON with a threshold Vth1. The threshold Vth1 may be, for example, 2.5V. The logic circuit 14 is coupled to the comparator circuit 13 to receive the comparison signal Vc, and coupled to the control pin PWM of the IC 102 containing the logic circuit 14 to receive the control signal PWM. The logic circuit 14 provides a switch control signal Ct based on the control signal PWM and the comparison signal Vc, for controlling the switch 12.

[0025] In one embodiment, each IC102 further includes a fault indicator 15. When the fault signal Ft indicates a general fault, the fault indicator 15 pulls the monitoring signal TMON high to the voltage source VCC.

[0026] In one embodiment, each IC 102 further includes an acknowledgment circuit 19. The acknowledgment circuit 19 is coupled to the monitoring pin TMON of the IC to provide an acknowledgment signal ACK. The acknowledgment signal ACK is used to indicate that the IC 102 has received the instruction CMD and responded. The acknowledgment signal ACK includes, for example, including but not limited to, pulling the monitoring signal TMON low and maintaining it low for a duration Tack after receiving the instruction CMD.

[0027] Figure 1The illustrated embodiment can independently monitor the temperature of each IC102, meaning the controller can read the temperature of each IC102 separately. This allows the controller to further implement dynamic thermal balance, single-chip status diagnostics, and other related functions.

[0028] Figure 2 An embodiment of the present invention is shown. Figure 1 The circuit structure diagram of IC102 in the diagram. Figure 2 An embodiment of IC102 is shown. Those skilled in the art should understand that the specific circuit structure of IC102 is not limited to... Figure 2 As shown.

[0029] exist Figure 2 In the illustrated embodiment, the comparator circuit 13 further includes a comparator CMP1. The comparator CMP1 has a positive input for receiving a monitoring signal TMON, an inverting input for receiving a threshold Vth1, and an output for providing a comparison signal Vc. The logic circuit 14 further includes a flip-flop 16 and a single-pulse circuit 141. In one embodiment, the single-pulse circuit 141 receives a control signal PWM and provides a single pulse Pul based on the received control signal PWM. In one embodiment, the flip-flop 16 includes a D flip-flop. The flip-flop 16 has a clock input Clk, a data input D, and an output Q. The clock input Clk is coupled to the output of the comparator circuit 13 to receive the comparison signal Vc. The data input D is coupled to the single-pulse circuit 141 to receive the single pulse Pul. The output Q provides a logic signal Sta2 based on the comparison signal Vc and the control signal PWM to control the switch 12. In one embodiment, the flip-flop 16 provides the logic signal Sta2 based on the control signal PWM when the comparison signal Vc is at its rising edge. In one embodiment, when the monitoring signal TMON is greater than the threshold Vth1, the comparison signal Vc becomes logic high. If the single pulse Pul is in the first state at this time, the logic signal Sta2 becomes valid to turn on the switch 12, and the temperature signal Tsen is transmitted to the monitoring pin TMON through the switch 12.

[0030] exist Figure 2 In the illustrated embodiment, logic circuit 14 further includes a tri-state detection module 17. The tri-state detection module 17 receives a control signal PWM and provides a logic signal Sta1 based on the control signal PWM. In one embodiment, when the control signal PWM is tri-state (e.g., near a level between voltage source VCC and 0V), the logic signal Sta1 becomes active to turn on switch 12, and the temperature signal Tsen is connected to the monitoring pin TMON via switch 12, regardless of the voltage on the monitoring pin TMON.

[0031] In some embodiments, logic high (“1”) includes a level between a high level threshold (e.g., 2V) and a voltage source VCC (e.g., 3.3V), logic low (“0”) includes a level between zero voltage (0V) and a low level threshold (e.g., 1V), and tri-state includes a level between a high level threshold and a low level threshold.

[0032] exist Figure 2 In the illustrated embodiment, logic circuit 14 further includes gate circuit 18. Gate circuit 18 receives logic signals Sta1 and Sta2, and provides a switch control signal Ct based on logic signals Sta1 and Sta2 to control the on and off of switch 12. In one embodiment, gate circuit 18 includes an OR gate.

[0033] exist Figure 2 In the illustrated embodiment, the fault indicator 15 further includes a switch 151 and a driver 152. When switch 151 is turned on, the monitoring pin TMON is connected to the voltage source VCC via switch 151. In one embodiment, when the fault signal Ft indicates a general fault, driver 152 turns on switch 151. In one embodiment, a general fault may include, but is not limited to, overcurrent faults, short-circuit faults, and / or overvoltage faults.

[0034] exist Figure 2 In the illustrated embodiment, the verification circuit 19 includes a switch 191 and a driver 192. Switch 191 has a first terminal coupled to a monitoring pin TMON, a second terminal coupled to a reference ground, and a control terminal coupled to the driver 192. The driver 192 receives a switch control signal Ct and controls switch 191. After switch 12 is turned on, switch 191 pulls the monitoring pin TMON low.

[0035] Figure 3 An embodiment of the present invention is shown. Figure 1 The circuit structure diagram of controller 101 in the diagram. Figure 3 An embodiment of controller 101 is shown. Those skilled in the art should understand that the specific circuit structure of controller 101 is not limited to... Figure 3 As shown.

[0036] exist Figure 3In the illustrated embodiment, the controller 101 includes a monitoring signal scanning circuit 31 and a control loop 32. The monitoring signal scanning circuit 31 receives a monitoring signal TMON and control signals PWM1 to PWM3, wherein the monitoring signal TMON represents the highest temperature of all ICs 102 or the temperature of one of the ICs 102. The monitoring signal scanning circuit 31 provides a maximum temperature signal T-max representing the highest temperature of all ICs 102, and multiple phase temperature signals (T-phase 1, T-phase 2, and T-phase 3) representing the temperatures of ICs 102-1, 102-2, and 102-3, respectively. In one embodiment, the monitoring signal TMON is in a first state under the control of the instruction CMD. After a duration Tp3, the monitoring signal scanning circuit 31 samples the monitoring signal TMON and records the sampled signal into a register as one of the phase temperature signals T-phase 1, T-phase 2, or T-phase 3. In another embodiment, when the monitoring pin TMON of the controller 101 receives the acknowledgment signal ACK, the monitoring signal scanning circuit 31 samples the monitoring signal TMON and records the sampled signal into a register as one of the phase temperature signals T-phase 1, T-phase 2 or T-phase 3.

[0037] In one embodiment, the monitoring signal scanning circuit 31 further provides a temperature error signal Fault_TMON based on the monitoring signal TMON to indicate that a temperature fault has occurred in one of the ICs 102. For example, when the monitoring signal TMON is greater than the threshold Vth2, the temperature error signal Fault_TMON becomes valid to indicate that a temperature fault has occurred.

[0038] In one embodiment, the monitoring signal scanning circuit 31 further provides a general error signal Fault_VCC to indicate a general fault based on the monitoring signal TMON. For example, when the monitoring signal TMON is greater than the threshold Vth3, the general error signal Fault_VCC becomes valid to indicate that a general fault has occurred.

[0039] Control loop 32 receives a feedback signal Vfb representing the output voltage Vo, a maximum temperature signal T-max, and phase temperature signals T-phase 1 to T-phase 3, and provides control signals PWM1 to PWM3 based on the output voltage Vo, the maximum temperature signal T-max, and the phase temperature signals T-phase 1 to T-phase 3. In one embodiment, control loop 32 further provides control signals PWM1 to PWM3 based on a temperature error signal Fault_TMON. In another embodiment, control loop 32 further provides control signals PWM1 to PWM3 based on a general error signal Fault_VCC.

[0040] Figure 4A A waveform diagram of a multiphase voltage converter 100 according to an embodiment of the present invention is shown. Figure 4A The waveforms from top to bottom are, in order: control signal PWM1, control signal PWM2, control signal PWM3, monitoring signal TMON, switch control signal Ct-1 used to control switch 12 in IC102-1, switch control signal Ct-2 used to control switch 12 in IC102-2, and switch control signal Ct-3 used to control switch 12 in IC102-3.

[0041] In one embodiment, after the multiphase voltage converter 100 is enabled, the temperature detection circuit 11 of each IC 102 is connected to the monitoring pin TMON to provide a temperature signal Tsen, at which point the monitoring signal TMON represents the highest temperature of all ICs 102. Figure 4A As shown, before time t1, switch 12 of IC102-1 is turned on under the control of switch control signal Ct-1, switch 12 of IC102-2 is turned on under the control of switch control signal Ct-2, and switch 12 of IC102-3 is turned on under the control of switch control signal Ct-3. Therefore, the monitoring signal TMON represents the highest temperature of all IC102s. At time t1, controller 101 needs to acquire the temperature of IC102-2. When control signal PWM2 becomes logic high, controller 101 pulls the monitoring signal TMON high to a value greater than the threshold Vth1. At time t2, the monitoring signal TMON is greater than the threshold Vth1. Switch control signal Ct-1 controls switch 12 of IC102-1 to turn off, switch control signal Ct-3 controls switch 12 of IC102-3 to turn off, and switch 12 of IC102-2 remains on. Figure 4AAs shown, the monitoring signal TMON increases to above the threshold Vth1 within duration Td1 and maintains this value within duration Td2. At the end of duration Td2, the controller 101 pulls the monitoring signal TMON low (e.g., low to 0V) within duration Td3 to reset the monitoring signal TMON. After the pull-up and pull-down operations, the monitoring signal TMON represents the temperature of IC102-2. The controller 101 samples the monitoring signal TMON and records the sampled monitoring signal TMON as the temperature signal T-phase2 in the register. Similarly, at time t3, the controller 101 needs to acquire the temperature of IC102-1. When the control signal PWM1 becomes logic high, the controller 101 pulls the monitoring signal TMON high. At time t4, the switch control signal Ct-1 controls the switch 12 of IC102-1 to turn on, the switch control signal Ct-2 controls the switch 12 of IC102-2 to turn off, and the switch 12 of IC102-3 remains off. Then, controller 101 pulls the monitoring signal TMON low to reset it. After the pull-high and pull-low operations, the monitoring signal TMON represents the temperature of IC102-1. Controller 101 samples the monitoring signal TMON and records the sampled monitoring signal TMON as the temperature signal T-phase1 in the register. At time t5, control signal PWM2 becomes tri-state. After time Td4, switch control signal Ct-2 controls switch 12 of IC102-2 to turn on at time t6. At time t7, control signal PWM3 becomes tri-state. After time Td4, switch control signal Ct-3 controls switch 12 of IC102-3 to turn on at time t8.

[0042] Figure 4B A waveform diagram of a multiphase voltage converter 100 according to another embodiment of the present invention is shown. Figure 4B The waveforms from top to bottom are: control signal PWM1, single pulse Pul-1 of IC102-1, control signal PWM2, single pulse Pul-2 of IC102-2, control signal PWM3, single pulse Pul-3 of IC102-3, monitoring signal TMON, switch control signal Ct-1 used to control switch 12 in IC102-1, switch control signal Ct-2 used to control switch 12 in IC102-2, and switch control signal Ct-3 used to control switch 12 in IC102-3.

[0043] like Figure 4BAs shown, before time t0, the monitoring signal TMON represents the highest temperature of all IC102s. At time t_A1, the monitoring signal TMON is pulled high by the instruction CMD. At this time, single pulse Pul-1 is logic low, single pulse Pul-2 is logic high, and single pulse Pul-3 is logic low. Therefore, the switch control signal Ct-1 becomes logic low to turn off switch 12 of IC102-1; the switch control signal Ct-2 remains logic high, thus keeping switch 12 of IC102-2 on; the switch control signal Ct-3 becomes logic high to turn off switch 12 of IC102-3. The temperature detection circuit 11 of IC102-2 remains connected to the monitoring pin TMON, while the temperature detection circuits 11 of IC102-1 and IC102-3 are disconnected from the monitoring pin TMON. Therefore, the monitoring signal TMON represents the temperature of IC102-2. At time t_A2, the control signal PWM2 goes high, IC102-2 acknowledges receipt of the instruction CMD, and provides the acknowledgment signal ACK by pulling the monitoring signal TMON low for a period of time. Similarly, at time t_B2, the monitoring signal TMON is pulled high by the instruction CMD. At this time, single pulse Pul-1 is high, single pulse Pul-2 is low, and single pulse Pul-3 is low. Therefore, the switch control signal Ct-2 goes high to turn on switch 12 of IC102-1; the switch control signal Ct-2 goes low to turn off switch 12 of IC102-2; the switch control signal Ct-3 remains low, thus keeping switch 12 of IC102-3 off. The temperature detection circuit 11 of IC102-1 is connected to the monitoring pin TMON, while the temperature detection circuits 11 of IC102-2 and IC102-3 are disconnected from the monitoring pin TMON. Therefore, the monitoring signal TMON represents the temperature of IC102-1. At time t_B2 of the next switching cycle of PWM1, IC102-1 acknowledges receipt of instruction CMD and pulls the monitoring signal TMON low for a period of time to provide the acknowledgment signal ACK.

[0044] Figure 5 A schematic diagram of a multiphase voltage converter 500 according to an embodiment of the present invention is shown. Figure 5 In the embodiment shown, the multiphase voltage converter 500 includes multiple ICs (i.e., 502-1, 502-2, ..., 502-n) and a controller 501, where n is an integer greater than 1.

[0045] exist Figure 5 In the illustrated embodiment, multiple ICs 502 form a multiphase switching circuit, with each IC 502 providing one phase of the multiphase voltage converter 500. For example... Figure 5As shown, each IC502 includes a control pin PWM for receiving the control signal PWM, a monitoring pin TMON, a pin IN, a pin SW, and a pin GND. The IN pins of all IC502s are coupled together to receive the input voltage Vin. The SW pin of each IC502 is coupled to one end of an inductor Lx (i.e., L1, L2, ..., Ln), and the other end of inductor Lx is coupled together with the remaining inductors L1 to Ln to provide the output voltage Vo. The GND pin is coupled to reference ground. Figure 5 In the illustrated embodiment, controller 501 includes multiple control pins PWM1 to PWMn, a monitoring pin TMON, and a feedback pin FB. The control pins PWM1 to PWMn provide control signals PWM1 to PWMn, respectively. The monitoring pin TMON is coupled to the monitoring pin TMON of each IC 502. The feedback pin FB is used to receive a feedback signal Vfb. In one embodiment, multiphase voltage converter 500 includes a feedback circuit 503. The feedback circuit 503 provides a feedback signal Vfb based on the output voltage Vo.

[0046] Figure 6 IC502 in a multiphase voltage converter 500 according to an embodiment of the present invention is shown. Figure 6 An embodiment of IC502 is shown. Those skilled in the art should understand that the specific circuit structure of IC502 is not limited to... Figure 6 As shown.

[0047] Compared to IC102, IC502 further includes a driver 61, a high-side switch 62, and a low-side switch 63. Driver 61 is coupled to the control pin PWM to receive the control signal PWM and provides drive signals Dr1 and Dr2 according to the control signal PWM. High-side switch 62 includes a first terminal coupled to the pin IN to receive the input voltage Vin, a second terminal coupled to the pin SW, and a control terminal coupled to driver 61 to receive the drive signal Dr1. Drive signal Dr1 controls the on and off states of high-side switch 62. Low-side switch 63 includes a first terminal coupled to the second terminal of high-side switch 62, a second terminal coupled to the pin GND, and a control terminal coupled to driver 61 to receive the drive signal Dr2. Drive signal Dr2 controls the on and off states of low-side switch 63. In one embodiment, high-side switch 62 and low-side switch 63 are respectively in an on and off state under the control of the control signal PWM, thereby converting the input voltage Vin into an output voltage Vo. In one embodiment, the high-side switch 62 and the low-side switch 63 can be transistors, such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), JFETs (Junction Field-Effect Transistors), VFETs (Vertical-Channel Field-Effect Transistors), etc.

[0048] Figure 7A schematic diagram of a multiphase voltage converter 700 according to an embodiment of the present invention is shown. Figure 7 In the illustrated embodiment, the multiphase voltage converter 700 includes multiple ICs (i.e., 702-1, 702-2, ..., 702-n) and a controller 501, where n is an integer greater than 1. Figure 7 In the illustrated embodiment, multiple ICs 702 form a multiphase switching circuit, with each IC 702 providing one phase of the multiphase voltage converter 700. For example... Figure 7 As shown, each IC702 includes a control pin PWM for receiving the control signal PWM, a monitoring pin TMON, a pin IN, a pin OUT, and a pin GND. The IN pins of all IC702s are coupled together to receive the input voltage Vin, and the OUT pins of all IC702s are coupled together to provide the output voltage Vo. The GND pin is coupled to reference ground.

[0049] Figure 8 An embodiment of the present invention is shown. Figure 7 The circuit structure diagram of IC702 in the image. Figure 8 An embodiment of IC702 is shown. Those skilled in the art should understand that the specific circuit structure of IC702 is not limited to... Figure 8 As shown.

[0050] Compared to IC502, IC702 further includes an inductor 81. The first terminal of the high-side switch 62 is coupled to pin IN to receive the input voltage Vin, and the second terminal of the high-side switch 62 is coupled to one end of the inductor 81. The control terminal of the high-side switch 62 is coupled to driver 61 to receive the drive signal Dr1. The other end of the inductor 81 is coupled to pin OUT. The first terminal of the low-side switch 63 is coupled to the second terminal of the high-side switch 62, and the second terminal of the low-side switch 63 is coupled to pin GND. The control terminal of the low-side switch 63 is coupled to driver 61 to receive the drive signal Dr2.

[0051] Figure 9 A temperature reporting method 900 for a multiphase voltage converter according to an embodiment of the present invention is shown. The temperature reporting method 900 includes steps S11 to S17.

[0052] In step S11, a control signal is received via a pin PWM of an IC.

[0053] In step S12, the input voltage is received through the IN pin of the IC.

[0054] In step S13, the switch is turned on and off according to the control signal to convert the input voltage into the output voltage.

[0055] In step S14, the temperature of the IC is detected by a temperature detection circuit.

[0056] In step S15, a monitoring signal is provided through the IC's pin TMON according to the IC's temperature.

[0057] In step S16, based on the monitoring signal and the control signal, the temperature detection circuit is connected to or disconnected from the IC's pin TMON. In one embodiment, when the monitoring signal exceeds a threshold, the temperature detection circuit connects to or disconnects from the IC's second pin according to the control signal.

[0058] In step S17, after the temperature detection circuit is connected to the TMON pin, an acknowledgment signal is sent to indicate that the IC has responded to the control signal and the monitoring signal.

[0059] In one embodiment, the temperature reporting method further includes connecting the temperature detection circuit to the TMON pin when the control signal is in a tri-state, regardless of the state of the monitoring signal.

[0060] It should be noted that the functions displayed in the boxes in the flowchart above may appear in a different order than shown in the diagram. For example, two boxes appearing consecutively may actually be executed simultaneously, or sometimes in reverse order, depending on the specific functions involved.

[0061] Although the invention has been described with reference to several exemplary embodiments, it should be understood that the terminology used is descriptive and exemplary, and not restrictive. Since the invention can be embodied in many forms without departing from the spirit or essence of the invention, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be interpreted broadly within the spirit and scope defined by the appended claims. Therefore, all variations and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.

Claims

1. A multiphase voltage converter, comprising: Multiple ICs (integrated circuits), each IC providing one phase of a multiphase voltage converter, each IC including control pins, monitoring pins, and temperature detection circuitry for detecting the temperature of the IC in question; as well as The controller includes multiple control pins and one monitoring pin. Each control pin is coupled to the control pin of the corresponding IC to provide a control signal, and the monitoring pin of the controller is coupled to the monitoring pin of each IC to receive a monitoring signal. in When the controller sends a command to put the monitoring signal in the first state, the temperature detection circuit responds to the control signal and connects or disconnects from the monitoring pin of the IC in which the temperature detection circuit is located.

2. The multiphase voltage converter of claim 1, wherein each IC further comprises: A confirmation circuit, coupled to the monitoring pin of the IC in which the confirmation circuit is located, provides a confirmation signal to indicate that the IC in which the confirmation circuit is located has received the instruction and responded.

3. The multiphase voltage converter as claimed in claim 1, wherein placing the monitoring signal in the first state includes raising the monitoring signal above a threshold and maintaining it for a period of time.

4. The multiphase voltage converter of claim 1, wherein each IC further comprises: The switch, when turned on, connects the temperature detection circuit to the monitoring pin of the IC.

5. The multiphase voltage converter of claim 4, wherein each IC further comprises: A comparison circuit receives the monitoring signal and provides a comparison signal by comparing the monitoring signal with a threshold. as well as The logic circuit receives the comparison signal and the control signal, and provides a switch control signal based on the comparison signal and the control signal to control the state of the switch.

6. The multiphase voltage converter of claim 1, wherein each IC further comprises: A fault indicator that, when a fault occurs, pulls a monitoring signal high to a voltage source.

7. An IC (integrated circuit) for a multiphase voltage converter, comprising: The first pin receives control signals; The second pin is coupled to multiple ICs and together with the multiple ICs, provides a monitoring signal; The third pin receives the input voltage. The fourth pin is coupled to the reference ground; Temperature detection circuit, for detecting the temperature of the IC; The high-side switch includes a first end and a second end, the first end of the high-side switch being coupled to the third pin of the IC to receive the input voltage; as well as The low-side switch includes a first terminal and a second terminal. The first terminal of the low-side switch is coupled to the second terminal of the high-side switch, and the second terminal of the low-side switch is coupled to the fourth pin of the IC. in The high-side switch and the low-side switch are turned on and off respectively under the control of the control signal; as well as When the monitoring signal is in the first state, the temperature detection circuit responds to the control signal and connects or disconnects from the second pin.

8. The IC of claim 7, further comprising: The first switch, when turned on, connects the temperature detection circuit to the second pin of the IC. A comparison circuit receives the monitoring signal and provides a comparison signal by comparing the monitoring signal with a threshold. as well as A logic circuit is configured to receive the comparison signal and the control signal, and provide a switch control signal based on the comparison signal and the control signal to control the first switch.

9. The IC of claim 8, wherein the logic circuitry further comprises: A flip-flop includes a clock input, a data input, and an output. The clock input receives a comparison signal, the data input receives a control signal, and the output provides a first logic signal based on the comparison and control signals.

10. The IC of claim 7, wherein when the control signal is in a tri-state, the temperature detection circuit is connected to the second pin to provide the temperature of the IC.

11. The IC of claim 7, further comprising: A confirmation circuit, coupled to the second pin, provides a confirmation signal to indicate that the IC has responded to a first state of the monitoring signal.

12. The IC of claim 7, wherein the monitoring signal being in the first state includes the monitoring signal being greater than a threshold.

13. A temperature reporting method, comprising: Control signals are received through the first pin of an IC (integrated circuit); The temperature of the IC is detected by a temperature detection circuit. Based on the temperature of the IC, a monitoring signal is sent through the second pin of the IC; The input voltage is received through the third pin of the IC; According to the control signal, the power switch is turned on and off to convert the input voltage into the output voltage; as well as When the monitoring signal is in the first state, the temperature detection circuit is connected or disconnected from the second pin of the IC according to the control signal.

14. A temperature reporting method as described in claim 13, wherein: When the monitored signal is greater than a threshold, the temperature detection circuit is connected to or disconnected from the second pin according to the control signal.

15. The temperature reporting method as described in claim 13, further comprising: When the control signal is in a tri-state, the temperature detection circuit is connected to the second pin.

16. The temperature reporting method as described in claim 13, further comprising: An acknowledgment signal is sent to the second pin to indicate whether the temperature detection circuit has been connected to the second pin.

17. A controller for a multiphase voltage converter, comprising: Multiple control pins provide multiple control signals to multiple ICs (integrated circuits), with each IC providing one phase of a multiphase voltage converter; A monitoring pin is connected to each IC to receive monitoring signals; as well as The control loop provides multiple control signals based on the output voltage of the multiphase voltage converter and monitoring signals. in The controller sends commands to multiple ICs via monitoring pins and controls one of the control signals to change to a first state in order to acquire the temperature of the IC corresponding to the control signal.

18. The controller of claim 17, wherein after a period of time following the transmission of the instruction, or upon receiving an acknowledgment signal via a monitoring pin, the controller samples the monitoring signal and records the sampled signal as the temperature of the IC corresponding to the control signal in a register.

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