A method and device for monitoring DC capacitance and discharge resistance of MMC submodule

Abstract

The present invention discloses a method, device and electronic device for monitoring the DC capacitance and discharge resistance of an MMC submodule. Several current values ​​and voltage values ​​of the MMC submodule are collected at preset time intervals; the operation state of the MMC submodule is determined based on the current value; when the MMC submodule is in a locked operation state, the initial operation time and the end operation time of the locked operation state of the MMC submodule in this cycle are calculated; the discharge resistance corresponding to this cycle is calculated based on the initial operation time, the end operation time, the current value and the voltage value; the DC capacitance corresponding to this cycle is calculated based on the initial operation time, the end operation time, the voltage value and the resistance value of the discharge resistance. The accuracy of subsequent calculations is further improved, so that the status of each MMC submodule in the converter valve can be monitored in real time, and the fault anomalies of the discharge resistance and the DC capacitance can be discovered as soon as possible. The influence of the capacitance effect can be eliminated without disassembling the MMC submodule, simplifying the test steps and improving the accuracy of the test value.

Description

Technical Field

[0001] The present invention relates to the technical field of online monitoring of electric power equipment, and in particular to a method and a device for monitoring direct current capacitance and discharge resistance of an MMC submodule. Background Art

[0002] The MMC converter valve is the core device of the flexible direct current converter station. As the core energy storage component of the MMC converter valve unit, the performance of the DC capacitor will directly affect the operation quality of the converter system. At present, the DC capacitor in the MMC converter valve mainly adopts metallized film capacitor. During long-term operation, the DC capacitor will cause the capacitance to decrease and the equivalent series resistance to increase due to problems such as electrode corrosion and self-healing removal. In addition, the temperature will accelerate the aging of the DC capacitor, causing the capacitance to decrease. At the same time, the discharge resistor connected in parallel with the DC capacitor in the MMC converter valve is used to release the stored charge of the DC capacitor after a power outage. When the discharge resistor is damaged or defective, the DC capacitor will maintain a high voltage after the valve hall is locked because there is no charge release path, which will cause the risk of electric shock during maintenance and testing. Real-time acquisition of the status of the DC capacitor and discharge resistor of the MMC submodule is of great significance for timely detection of defects and faults of the DC capacitors of each series submodule of the converter valve and avoidance of unplanned DC locking events of the converter valve.

[0003] The current technical solution for testing DC capacitors in MMC submodules requires the removal of the busbar and even the secondary board on the MMC submodule power board, which is extremely cumbersome. In addition, since valve towers are generally column-type and have a narrow working platform, there is a risk of high-altitude operations in wiring high-rise submodules. The higher the number of submodule layers, the greater the difficulty and risk of operation.

[0004] At the same time, the current technical solution makes it difficult to obtain the discharge resistance value of the MMC sub-module. The conventional capacitor group discharge resistance test method is to first remove the connection between the discharge resistor and one end of the capacitor, and then use a multimeter or a DC resistance tester to test the discharge resistor to obtain its resistance value. However, since the discharge resistor in parallel with the DC capacitor of the MMC sub-module is built-in and cannot be removed, when the resistance value is tested directly, the resistance value obtained by the test will be affected by the capacitance effect of the DC capacitor, resulting in a large deviation in the resistance test value. Summary of the invention

[0005] The present invention provides a method and device for monitoring the DC capacitance and discharge resistance of an MMC submodule, so as to solve the problem of online monitoring of the DC capacitance and discharge resistance of the MMC submodule, timely discover the DC capacitance defects or faults of each submodule in the MMC converter valve, and avoid unplanned DC locking events of the MMC converter valve.

[0006] According to one aspect of the present invention, a method for monitoring DC capacitance and discharge resistance of an MMC submodule is provided, comprising:

[0007] Collecting several current values ​​and voltage values ​​of the MMC submodule at preset time intervals;

[0008] Calculate the initial operation time and the end operation time of the locking operation state of the MMC submodule in this cycle;

[0009] Calculate the discharge resistance corresponding to the current cycle based on the initial operation time, the end operation time, the current value and the voltage value;

[0010] The DC capacitance corresponding to the current cycle is calculated based on the initial operation time, the end operation time, the voltage value, and the resistance value of the discharge resistor.

[0011] According to another aspect of the present invention, a DC capacitance and discharge resistance monitoring device of an MMC submodule is provided, comprising:

[0012] A data acquisition module, used to collect several current values ​​and voltage values ​​of the MMC submodule at preset time intervals;

[0013] A time calculation module, used for calculating the initial operation time and the end operation time of the locking operation state of the MMC submodule in this cycle;

[0014] a discharge resistance calculation module, configured to calculate the discharge resistance corresponding to the current cycle based on the initial operation time, the end operation time, the current value and the voltage value;

[0015] The DC capacitance calculation module is used to calculate the DC capacitance corresponding to the current cycle based on the initial operation time, the end operation time, the voltage value and the resistance value of the discharge resistor.

[0016] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0017] at least one processor; and

[0018] a memory communicatively connected to the at least one processor; wherein,

[0019] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the DC capacitance and discharge resistance monitoring method of the MMC sub-module described in any embodiment of the present invention.

[0020] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the DC capacitance and discharge resistance monitoring method of the MMC sub-module described in any embodiment of the present invention when executed.

[0021] In the embodiment of the present invention, several current values ​​and voltage values ​​of the MMC submodule are collected at preset time intervals; the initial operation time and the end operation time of the locked operation state of the MMC submodule in this cycle are calculated; the discharge resistance corresponding to this cycle is calculated based on the initial operation time, the end operation time, the current value and the voltage value; the DC capacitance corresponding to this cycle is calculated based on the initial operation time, the end operation time, the voltage value and the resistance value of the discharge resistance. In the embodiment of the present invention, the current and voltage values ​​of the MMC submodule in operation are continuously collected at certain time intervals, and the initial operation time of the cycle in which the MMC submodule truly enters the locked operation state and the end operation time of the cycle in which the MMC submodule truly exits the locked operation state are calculated, so as to avoid the sampling error caused by the state switching in the initial stage and the end stage, thereby further improving the accuracy of the discharge resistance and DC capacitance calculated subsequently, so as to monitor the state of each MMC submodule in the converter valve in real time, and to find the fault abnormality of the discharge resistance and DC capacitance as soon as possible, and according to the current value and voltage value obtained in real time and the conversion calculation of the discharge resistance and DC capacitance value, the MMC submodule does not need to be disassembled and the influence of the capacitance effect can be eliminated, simplifying the test steps and improving the accuracy of the test value.

[0022] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0024] Figure 1A This is a flow chart of a method for monitoring DC capacitance and discharge resistance of an MMC submodule provided in accordance with Embodiment 1 of the present invention;

[0025] Figure 1B A structural diagram of an MMC submodule applicable to Embodiment 1 of the present invention;

[0026] Figure 22 is a schematic diagram of the structure of a DC capacitor and discharge resistance monitoring device for an MMC submodule provided in Embodiment 2 of the present invention;

[0027] Figure 3 The present invention is a schematic diagram of the structure of an electronic device for implementing the method for monitoring the DC capacitance and discharge resistance of an MMC submodule according to an embodiment of the present invention. DETAILED DESCRIPTION

[0028] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0029] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0030] Embodiment 1

[0031] Figure 1A A flow chart of a method for monitoring the DC capacitance and discharge resistance of an MMC submodule is provided for the first embodiment of the present invention. This embodiment can be applied to solve the problem of online monitoring of the DC capacitance and discharge resistance of the MMC submodule, timely discovering the DC capacitance defects or faults of each submodule in the MMC converter valve, and avoiding the occurrence of unplanned DC locking events in the MMC converter valve. The method can be executed by a DC capacitance and discharge resistance monitoring device of the MMC submodule, which can be implemented in the form of hardware and / or software, and can be configured in a personal computer or server. Figure 1A As shown, the method includes:

[0032] S101 . Collecting a plurality of current values ​​and voltage values ​​of the MMC submodule at preset time intervals.

[0033] The MMC (Modular Multilevel Converter) valve is the core device in the flexible DC converter station. The MMC valve is composed of a number of cascaded MMC sub-modules with the same structure. Figure 1B FIG. 1 is a structural diagram of an MMC submodule applicable to an embodiment of the present invention, such as Figure 1B As shown, the MMC submodule includes at least one resistor, one capacitor, two diodes, and two transistors.

[0034] According to the preset time interval, the current value and voltage value at both ends of the DC capacitor in the MMC sub-module are collected once at a certain time interval, so as to judge the current operating status of the MMC sub-module according to the current value at both ends of the DC capacitor, and to calculate the test value of the DC capacitor and the discharge resistor.

[0035] For example, Figure 1B As shown, the current value and voltage value across the capacitor device AB in the MMC submodule are obtained once every 0.02 seconds in the voltage and current sensor built into the MMC submodule. The time interval of 0.02 seconds in the embodiment of the present invention is an exemplary description. In other embodiments of the present invention, other time intervals may also be used. The embodiment of the present invention is only an example and is not limited thereto.

[0036] It should be noted that the structure of the MMC submodule in the embodiment of the present invention is only an example and is not limiting. In other embodiments of the present invention, there are half H-bridge type, full H-bridge type and double clamp type submodule types.

[0037] S102: Determine the operating state of the MMC submodule based on the current value.

[0038] The MMC submodule has two operating states, such as Figure 1B As shown, when the MMC submodule is in the unlocked operating state, transistor S1 is turned on, transistor S2 is turned off, the DC capacitor is connected to the main circuit, and the main circuit charges the DC capacitor; when the MMC submodule is in the locked operating state, transistor S1 is turned off, transistor S2 is turned on, the DC capacitor is cut out of the main circuit, and the DC capacitor is discharged through the discharge resistor.

[0039] In some embodiments of the present invention, S102 includes:

[0040] S1021, continuously determine whether the current value is greater than the preset current threshold; if the current value is greater than the preset current threshold, execute S1022; if the current value is less than or equal to the preset current threshold, execute S1023.

[0041] S1022: Determine whether the MMC submodule is currently in a locked operation state.

[0042] S1023: Determine whether the MMC submodule is currently in an unlocked running state.

[0043] Specifically, when the MMC submodule is in the locked operation state, the current flows from the DC capacitor to the discharge resistor; and when the MMC submodule is in the unlocked operation state, the current flows from the main circuit to the DC capacitor. The current value of the DC capacitor is different in the two states, so the current operation state of the MMC submodule can be determined based on the comparison relationship between the current collected current value and the preset current threshold.

[0044] Continue to judge whether the current value is greater than a preset current threshold value to continuously judge the operating status of the MMC sub-module. When the current value of the DC capacitor in the MMC sub-module is greater than the preset current threshold value, execute S1022 to determine that the current MMC sub-module is in a locked operating state; when the current value of the DC capacitor in the MMC sub-module is less than the preset threshold value, execute 1023 to determine that the current MMC sub-module is in an unlocked operating state.

[0045] Exemplarily, since the current directions of the locked operating state and the unlocked operating state are different, the preset current threshold is set to 0. When the acquired current value is greater than 0, the MMC submodule is in the locked operating state; when the acquired current value is less than or equal to 0, the MMC submodule is in the unlocked operating state.

[0046] It should be noted that the current threshold value preset to 0 in the embodiment of the present invention is for exemplary purposes only. In other embodiments of the present invention, the current threshold value may also be determined according to the actual structure of the MMC submodule. The embodiment of the present invention is only for example and not for limitation.

[0047] S103: When the MMC submodule is in the locked operation state, calculate the initial operation time and the end operation time of the locked operation state of the MMC submodule in this cycle.

[0048] When the MMC submodule experiences a locked operation state and an unlocked operation state, it is regarded as a cycle. The initial operation time when the MMC submodule smoothly enters the locked operation state in this cycle and the end operation time when the MMC submodule smoothly exits the locked operation state in this cycle are calculated, so as to be used for the subsequent calculation of the test values ​​of the discharge resistance and the DC capacitance. Exemplarily, the MMC submodule switches the operation state every 0.02s, that is, after the MMC submodule experiences the locked operation state for 0.02 seconds, it switches to the unlocked operation state, and after the MMC submodule experiences the unlocked operation state for 0.02 seconds, it switches to the locked operation state again.

[0049] It should be noted that the embodiments of the present invention are only examples of the rules for determining the initial operation time and the end operation time, and are not limiting. In the embodiments of the present invention, the moment of smoothly entering the locked operation state is used as the initial operation time, and the moment of smoothly exiting the locked operation state in this cycle is used as the end operation time as an exemplary illustration of the present invention. In other embodiments of the present invention, the moment of state change can also be used as the initial operation time and the end operation time.

[0050] In some embodiments of the present invention, S103 includes:

[0051] S1031, obtaining the first moment of being in the locked running state for the first time in this cycle, and the second moment of entering the unlocked running state for the first time.

[0052] During the operation of the MMC sub-module, the first moment when the MMC sub-module switches from the unlocked operating state to the locked operating state for the first time in this cycle, and the second moment when the MMC sub-module first enters the unlocked operating state in this cycle are obtained, so as to know the total time the MMC sub-module is in the locked operating state in this cycle.

[0053] It should be noted that the embodiment of the present invention does not limit how to determine the operating status of the MMC sub-module.

[0054] S1032. Calculate the difference between the second moment and the first moment as the locking operation duration.

[0055] By calculating the difference between the second moment and the first moment, the total duration of the MMC submodule being in the locked operation state can be known.

[0056] S1033. Multiply the locking operation time by the first weight to obtain a first deduction time.

[0057] Since the current or voltage values ​​collected will have certain errors due to state switching in the initial and final stages of the locked operation state, it is necessary to obtain the current or voltage value corresponding to the moment when the MMC sub-module is in a relatively stable state, and calculate the DC current and discharge resistance to further improve the accuracy of the monitoring data.

[0058] The first weight is a proportional value used to deduct the duration corresponding to the unstable state in the initial stage of the locked operation state. The first deduction duration obtained by multiplying the locked operation duration calculated in S1032 by the first weight is the duration corresponding to the unstable state in the initial stage of the locked operation state.

[0059] Exemplarily, the value of the first weight is 0.2, wherein the value range of the first weight is 0.1 to 0.3.

[0060] It should be noted that the first weight of 0.2 in the embodiment of the present invention is for exemplary purposes only. In other embodiments of the present invention, the first weight may also be other values. The embodiment of the present invention is only for example only and is not intended to be limiting.

[0061] S1034. Calculate the sum of the first moment and the first deduction duration as the initial running moment.

[0062] The first moment is added to the first deduction time to correct the starting time point for calculating the discharge resistance and the DC capacitance in the locked operation state as the initial operation moment.

[0063] In the embodiment of the present invention, the sum of the first moment and the first deduction duration is used as the initial running moment for exemplary description, and the present invention is only used as an example and is not limited thereto.

[0064] S1035. Multiply the locking operation time by the second weight to obtain a second deduction time.

[0065] The second weight is a proportional value used to deduct the duration of instability in the end stage of the locked operation state. The second deduction duration obtained by multiplying the locked operation duration calculated in S1032 by the second weight is the duration that needs to be deducted corresponding to the instability in the end stage of the locked operation state, so as to improve the accuracy of the monitoring data.

[0066] Exemplarily, the value of the second weight is 0.2, wherein the value range of the second weight is 0.1 to 0.3.

[0067] It should be noted that the second weight of 0.2 in the embodiment of the present invention is for exemplary purposes only. In other embodiments of the present invention, the second weight may also be other values. The embodiment of the present invention is only for example only and is not intended to be limiting.

[0068] S1036. The difference between the second moment and the second deduction time is used as the end time of operation.

[0069] The second deduction time is subtracted from the second moment to correct the end time point for calculating the discharge resistance and the DC capacitance in the locked operation state as the end operation moment.

[0070] The difference between the second moment and the second deduction time in the embodiment of the present invention is used as an exemplary end time, and the present invention is only used as an example and is not limited thereto.

[0071] S104, calculating the discharge resistance corresponding to the current cycle based on the initial operation time, the end operation time, the current value and the voltage value.

[0072] In some embodiments of the present invention, S104 includes:

[0073] S1041, obtaining an initial voltage value and an end voltage value corresponding to an initial operation time and an end operation time.

[0074] The initial voltage value and the end voltage value corresponding to the initial operation time and the end operation time are both voltage values ​​corresponding to when the MMC submodule is stably in the locked operation state.

[0075] S1042, obtaining an initial current value and an ending current value corresponding to an initial operation time and an ending operation time.

[0076] The initial current value and the ending current value corresponding to the initial operation time and the ending operation time are both the current values ​​corresponding to when the MMC submodule is stably in the locked operation state.

[0077] Using the current and voltage values ​​in a steady state to calculate the discharge resistance and DC capacitance can eliminate sampling errors caused by unstable state switching.

[0078] S1043. Calculate the discharge resistance using the following formula:

[0079]

[0080] R is the discharge resistor, u(t1) is the initial voltage value, u(t2) is the end voltage value, i(t1) is the initial current value, and i(t2) is the end current value. The voltage and current values ​​corresponding to the initial and end operation times are used to calculate the resistance of the discharge resistor. The resistance of the discharge resistor can be directly obtained without removing the MMC submodule, and it is not affected by the capacitance effect, which simplifies the test process of the discharge resistor and reduces the test error.

[0081] S105, calculating the DC capacitance corresponding to the current cycle based on the initial operation time, the end operation time, the voltage value, and the resistance value of the discharge resistor.

[0082] In some embodiments of the present invention, S105 includes:

[0083] S1051. Calculate the DC capacitance using the following formula:

[0084]

[0085] C is the capacitance value of the DC capacitor, R is the resistance value of the discharge resistor, u(t1) is the initial voltage value, u(t2) is the end voltage value, t1 is the initial operation time, and t2 is the end operation time. The capacitance value of the DC capacitor is calculated using the voltage and current values ​​corresponding to the initial operation time and the end operation time. The MMC submodule does not need to be removed, and the MMC submodule can obtain the discharge capacitance in the process of frequent state switching without stopping operation, which improves the monitoring effect of the DC capacitor of the MMC submodule, makes it easier for the staff to technically discover the fault anomaly of the MMC submodule, and prevents the converter valve from having an unplanned DC locking event, thereby ensuring the operation quality of the converter system.

[0086] For the monitoring of the DC capacitor and discharge resistor of the MMC submodule, in addition to monitoring the discharge resistor and DC capacitor in each cycle to monitor whether the threshold value exceeds the normal range, it is also possible to monitor whether the discharge resistor and DC capacitor of the MMC submodule are stable between cycles, so as to further promptly discover the fault of the DC capacitor and discharge resistor, and avoid unplanned DC locking events of the converter valve. In some embodiments of the present invention, the method for monitoring the DC capacitor and discharge resistor of the MMC submodule includes:

[0087] S106: Obtain the DC capacitance and discharge resistance of the previous cycle.

[0088] The test values ​​of the DC capacitance and the discharge resistance calculated according to S101 to S105 in the previous cycle are obtained to determine the stability of the MMC submodule between cycles.

[0089] It should be noted that the DC capacitance and discharge resistance of the previous cycle are obtained in the embodiment of the present invention for exemplary purposes. In other embodiments of the present invention, the DC capacitance and discharge resistance corresponding to different cycles can be obtained according to actual needs, such as obtaining the DC capacitance and discharge resistance of the first two cycles. The present invention is only an example and is not limited thereto.

[0090] S107 . Determine the stability of the DC capacitance and the discharge resistance based on the DC capacitance and the discharge resistance of the previous cycle and the DC capacitance and the discharge resistance of the current cycle.

[0091] By comparing the test values ​​of the DC capacitance and the discharge resistance in the previous cycle with those in the current cycle, it is possible to determine whether the working state of the MMC submodule is stable.

[0092] It should be noted that the embodiment of the present invention does not limit the test values ​​of the DC capacitance and the discharge resistance in the previous cycle and the current cycle.

[0093] In some embodiments of the present invention, S107 includes:

[0094] S1071. Calculate the difference between the discharge resistance corresponding to the current cycle and the discharge resistance corresponding to the previous cycle as the discharge resistance deviation value.

[0095] The discharge resistance calculated in this cycle is subtracted from the discharge resistance calculated in the previous cycle to obtain the discharge resistance deviation value between the two cycles.

[0096] It should be noted that in other embodiments of the present invention, the discharge resistance calculated in the previous cycle may be subtracted from the discharge resistance calculated in the current cycle to obtain the discharge resistance deviation value between the two cycles, which is not limited in the present invention.

[0097] S1072. Divide the absolute value of the discharge resistance deviation value by the discharge resistance corresponding to the previous cycle to obtain a discharge resistance deviation rate.

[0098] The absolute value corresponding to the calculated deviation value of the discharge resistance is divided by the discharge resistance corresponding to the previous cycle to obtain the discharge resistance deviation rate between cycles.

[0099] It should be noted that in other embodiments of the present invention, the discharge resistance deviation rate may be obtained by dividing the absolute value of the discharge resistance deviation value by the discharge resistance corresponding to the current cycle, and the present invention is not limited thereto.

[0100] S1073, determine whether the discharge resistance deviation rate is less than or equal to the preset discharge resistance standard deviation rate; if the discharge resistance deviation rate is less than or equal to the preset discharge resistance standard deviation rate, execute S1064; if the discharge resistance deviation rate is less than or equal to the preset discharge resistance standard deviation rate, execute S1065.

[0101] S1074. Determine whether the discharge resistance is stable.

[0102] S1075. Determine that the discharge resistance is unstable.

[0103] The preset discharge resistance standard deviation rate is a reference value for measuring whether the discharge resistance is stable between cycles. The discharge resistance deviation rate is compared with the preset discharge resistance standard deviation rate. If the discharge resistance deviation rate is less than or equal to the preset discharge resistance standard deviation rate, it means that the fluctuation of the discharge resistance between cycles is within an acceptable range, and S1074 is executed to determine that the discharge resistance is stable; if the discharge resistance deviation rate is greater than the preset discharge resistance standard deviation rate, it means that the fluctuation of the discharge resistance between cycles has exceeded the acceptable range, and S1075 is executed to determine that the discharge resistance is unstable.

[0104] Exemplarily, the preset standard deviation rate of the discharge resistance is 0.1%.

[0105] It should be noted that the preset discharge resistance standard deviation rate in the present invention is only an example and is not intended to be limiting.

[0106] S1076. Calculate the difference between the DC capacitance corresponding to the current cycle and the DC capacitance corresponding to the previous cycle as the DC capacitance deviation value.

[0107] The DC capacitance calculated in this cycle is subtracted from the DC capacitance calculated in the previous cycle to obtain the DC capacitance deviation value between the two cycles.

[0108] It should be noted that in other embodiments of the present invention, the DC capacitance calculated in the current cycle may be subtracted from the DC capacitance calculated in the previous cycle to obtain the DC capacitance deviation value between the two cycles, which is not limited in the present invention.

[0109] S1077. Divide the absolute value of the DC capacitance deviation value by the DC capacitance corresponding to the previous cycle to obtain a DC capacitance deviation rate.

[0110] The absolute value corresponding to the deviation value of the DC capacitance calculated is divided by the DC capacitance corresponding to the previous cycle to obtain the DC capacitance deviation rate between cycles.

[0111] It should be noted that in other embodiments of the present invention, the DC capacitance deviation rate may be obtained by dividing the absolute value of the DC capacitance deviation value by the DC capacitance corresponding to the current cycle, and the present invention is not limited thereto.

[0112] S1078, determine whether the DC capacitance deviation rate is less than or equal to the preset DC capacitance standard deviation rate; if the DC capacitance deviation rate is less than or equal to the preset DC capacitance standard deviation rate, then S1079; if the DC capacitance deviation rate is less than or equal to the preset DC capacitance standard deviation rate, then execute S10710.

[0113] S1079. Determine whether the DC capacitor is stable.

[0114] S10710. Determine that the DC capacitor is unstable.

[0115] The preset DC capacitance standard deviation rate is a reference value for measuring whether the DC capacitance is stable between cycles. The DC capacitance deviation rate is compared with the preset DC capacitance standard deviation rate. If the DC capacitance deviation rate is less than or equal to the preset DC capacitance standard deviation rate, it means that the fluctuation of the DC capacitance between cycles is within an acceptable range, and S1064 is executed to determine that the DC capacitance is stable; if the DC capacitance deviation rate is greater than the preset DC capacitance standard deviation rate, it means that the fluctuation of the DC capacitance between cycles has exceeded the acceptable range, and S1065 is executed to determine that the DC capacitance is unstable.

[0116] Exemplarily, the preset DC capacitance standard deviation rate is 0.01%.

[0117] It should be noted that the preset DC capacitance standard deviation rate in the present invention is only an example and is not intended to be limiting.

[0118] When faced with different values ​​of discharge resistance and DC capacitance, judging whether the DC capacitance is stable by the deviation rate is more applicable and has higher portability.

[0119] In the embodiment of the present invention, several current values ​​and voltage values ​​of the MMC submodule are collected at preset time intervals; the initial operation time and the end operation time of the locked operation state of the MMC submodule in this cycle are calculated; the discharge resistance corresponding to this cycle is calculated based on the initial operation time, the end operation time, the current value and the voltage value; the DC capacitance corresponding to this cycle is calculated based on the initial operation time, the end operation time, the voltage value and the resistance value of the discharge resistance. In the embodiment of the present invention, the current and voltage values ​​of the MMC submodule in operation are continuously collected at certain time intervals, and the initial operation time of the cycle in which the MMC submodule truly enters the locked operation state and the end operation time of the cycle in which the MMC submodule truly exits the locked operation state are calculated, so as to avoid the sampling error caused by the state switching in the initial stage and the end stage, thereby further improving the accuracy of the discharge resistance and DC capacitance calculated subsequently, so as to monitor the state of each MMC submodule in the converter valve in real time, and to find the fault abnormality of the discharge resistance and DC capacitance as soon as possible, and according to the current value and voltage value obtained in real time and the conversion calculation of the discharge resistance and DC capacitance value, the MMC submodule does not need to be disassembled and the influence of the capacitance effect can be eliminated, simplifying the test steps and improving the accuracy of the test value.

[0120] Embodiment 2

[0121] Figure 2 The structure diagram of a DC capacitor and discharge resistance monitoring device of an MMC submodule provided in the second embodiment of the present invention is shown in FIG. Figure 2 As shown, the device comprises:

[0122] The data acquisition module 201 is used to collect a number of current values ​​and voltage values ​​of the MMC submodule at preset time intervals;

[0123] An operating state determining module 202 determines the operating state of the MMC submodule;

[0124] The time calculation module 203 is used to calculate the initial operation time and the end operation time of the locked operation state of the MMC submodule in this cycle when the MMC submodule is in the locked operation state;

[0125] A discharge resistance calculation module 204, configured to calculate the discharge resistance corresponding to the current cycle based on the initial operation time, the end operation time, the current value and the voltage value;

[0126] The DC capacitance calculation module 205 is used to calculate the DC capacitance corresponding to the current cycle based on the initial operation time, the end operation time, the voltage value and the resistance value of the discharge resistor.

[0127] Optionally, the time calculation module 203 includes:

[0128] A basic time determination submodule, used to determine a first time when the MMC submodule is in a locked operation state for the first time in the current cycle and a second time when the MMC submodule exits the locked operation state for the first time in the current cycle;

[0129] A locking operation duration calculation submodule, used for calculating the difference between the second moment and the first moment as the locking operation duration;

[0130] A first deduction duration calculation submodule, used for multiplying the locking operation duration by a first weight to obtain a first deduction duration;

[0131] An initial running time calculation submodule, used to calculate the sum of the first time and the first deduction time as the initial running time;

[0132] A second deduction duration calculation submodule, used for multiplying the locking operation duration by a second weight to obtain a second deduction duration;

[0133] The end-of-running time calculation submodule is used to take the difference between the second time and the second deduction duration as the end-of-running time.

[0134] Optionally, the basic time determination submodule includes:

[0135] A current value determination unit, used to continuously determine whether the current value is greater than a preset current threshold;

[0136] A first moment determination unit, used to determine that the moment is the first moment of being in the locked operation state for the first time, and to continuously determine whether the current value is less than or equal to a preset current threshold;

[0137] The second time determination unit is used to determine the time as the second time of exiting the locked operation state for the first time.

[0138] Optionally, the discharge resistance calculation module 204 includes:

[0139] A voltage value acquisition submodule is used to acquire an initial voltage value and an end voltage value corresponding to the initial operation time and the end operation time;

[0140] A current value acquisition submodule, used to acquire an initial current value and an end current value corresponding to the initial operation time and the end operation time;

[0141] The discharge resistance calculation submodule is used to calculate the discharge resistance by the following formula:

[0142]

[0143] Wherein, R is the discharge resistance, u(t1) is the initial voltage value, u(t2) is the end voltage value, i(t1) is the initial current value, and i(t2) is the end current value.

[0144] Optionally, the DC capacitance calculation module 205 includes:

[0145] The DC capacitance calculation submodule is used to calculate the DC capacitance using the following formula:

[0146]

[0147] Among them, C is the capacitance value of the DC capacitor, R is the resistance value of the discharge resistor, u(t1) is the initial voltage value, u(t2) is the end voltage value, t1 is the initial operation time, and t2 is the end operation time.

[0148] Optionally, the DC capacitor and discharge resistance monitoring device of the MMC submodule includes:

[0149] A previous cycle data acquisition module, used to acquire the DC capacitance and the discharge resistance of the previous cycle;

[0150] The stability calculation module is used to determine the stability of the DC capacitor and the discharge resistor based on the DC capacitor and the discharge resistor in the previous cycle and the DC capacitor and the discharge resistor in the current cycle.

[0151] Optionally, the stability calculation module includes:

[0152] A discharge resistance deviation value calculation submodule, used to calculate the difference between the discharge resistance corresponding to the current cycle and the discharge resistance corresponding to the previous cycle as the discharge resistance deviation value;

[0153] A discharge resistance deviation rate calculation submodule, used for dividing the absolute value of the discharge resistance deviation value by the discharge resistance corresponding to the previous cycle to obtain a discharge resistance deviation rate;

[0154] A discharge resistance deviation rate judgment submodule, used to judge whether the discharge resistance deviation rate is less than or equal to a preset discharge resistance standard deviation rate;

[0155] A discharge resistance stability determination submodule, used to determine that the discharge resistance is stable;

[0156] A discharge resistance instability determination submodule, used to determine that the discharge resistance is unstable;

[0157] A DC capacitance deviation value calculation submodule, used to calculate the difference between the DC capacitance corresponding to the current cycle and the DC capacitance corresponding to the previous cycle as the DC capacitance deviation value;

[0158] A DC capacitance deviation rate calculation submodule, used for dividing the absolute value of the DC capacitance deviation value by the DC capacitance corresponding to the previous cycle to obtain a DC capacitance deviation rate;

[0159] A DC capacitance deviation rate judgment submodule, used to judge whether the DC capacitance deviation rate is less than or equal to a preset DC capacitance standard deviation rate;

[0160] A DC capacitor stability determination submodule, used to determine the stability of the DC capacitor;

[0161] The DC capacitor instability determination submodule is used to determine that the DC capacitor is unstable.

[0162] The DC capacitance and discharge resistance monitoring device of the MMC submodule provided in the embodiment of the present invention can execute the DC capacitance and discharge resistance monitoring method of the MMC submodule provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0163] Embodiment 3

[0164] Figure 3 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0165] like Figure 3As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0166] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0167] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the DC capacitance and discharge resistance monitoring method of the MMC submodule.

[0168] In some embodiments, the DC capacitance and discharge resistance monitoring method of the MMC submodule can be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the DC capacitance and discharge resistance monitoring method of the MMC submodule described above can be performed. Alternatively, in other embodiments, the processor 11 can be configured to execute the DC capacitance and discharge resistance monitoring method of the MMC submodule by any other appropriate means (for example, by means of firmware).

[0169] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0170] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0171] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0172] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0173] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0174] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0175] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0176] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for monitoring the DC capacitance and discharge resistance of an MMC submodule, characterized in that: include: Collecting several current values ​​and voltage values ​​of the MMC submodule at preset time intervals; Determining an operating state of the MMC submodule based on the current value; When the MMC submodule is in a locked operation state, calculating the initial operation time and the end operation time of the locked operation state of the MMC submodule in this cycle; Calculate the discharge resistance corresponding to the current cycle based on the initial operation time, the end operation time, the current value and the voltage value; Calculating the DC capacitance corresponding to the current cycle based on the initial operation time, the end operation time, the voltage value, and the resistance value of the discharge resistor; The determining the operating state of the MMC submodule based on the current value includes: Continuously determining whether the current value is greater than a preset current threshold; If the current value is greater than a preset current threshold, it is determined that the MMC submodule is currently in a locked operation state; If the current value is less than or equal to the preset current threshold, it is determined that the MMC submodule is currently in an unlocked operating state; The calculating of the initial operation time and the end operation time of the locking operation state of the MMC submodule in the current cycle includes: Obtaining a first moment of being in the locked running state for the first time in this cycle, and a second moment of entering the unlocked running state for the first time; Calculating the difference between the second moment and the first moment as the locking operation duration; The locking operation time is multiplied by a first weight to obtain a first deduction time; Calculate the sum of the first time and the first deduction time as the initial running time; The locking operation time is multiplied by a second weight to obtain a second deduction time; The difference between the second moment and the second deduction time is used as the end time of operation; The calculating the discharge resistance corresponding to the current cycle based on the initial operation time, the end operation time, the current value and the voltage value includes: Obtaining an initial voltage value and an end voltage value corresponding to the initial operation time and the end operation time; Obtaining an initial current value and an ending current value corresponding to the initial operation time and the ending operation time; The discharge resistance is calculated by the following formula: Wherein, R is the discharge resistance, u(t1) is the initial voltage value, u(t2) is the end voltage value, i(t1) is the initial current value, and i(t2) is the end current value; The calculating the DC capacitance corresponding to the current cycle based on the initial operation time, the end operation time, the voltage value, and the resistance value of the discharge resistor includes: The DC capacitance is calculated by the following formula: Among them, C is the capacitance value of the DC capacitor, R is the resistance value of the discharge resistor, u(t1) is the initial voltage value, u(t2) is the end voltage value, t1 is the initial operation time, and t2 is the end operation time.

2. The method according to any one of claim 1, characterized in that: The DC capacitance and discharge resistance monitoring method of the MMC submodule further includes: Obtaining the DC capacitance and the discharge resistance of the previous cycle; The stability of the DC capacitor and the discharge resistor is determined based on the DC capacitor and the discharge resistor in a previous cycle and the DC capacitor and the discharge resistor in this cycle.

3. The method according to claim 2, characterized in that The determining the stability of the DC capacitor and the discharge resistor based on the DC capacitor and the discharge resistor in the previous cycle and the DC capacitor and the discharge resistor in the current cycle includes: Calculating the difference between the discharge resistance corresponding to the current cycle and the discharge resistance corresponding to the previous cycle as the discharge resistance deviation value; The absolute value of the discharge resistance deviation value is divided by the discharge resistance corresponding to the previous cycle to obtain a discharge resistance deviation rate; Determining whether the discharge resistance deviation rate is less than or equal to a preset discharge resistance standard deviation rate; If the discharge resistance deviation rate is less than or equal to a preset discharge resistance standard deviation rate, it is determined that the discharge resistance is stable; If the discharge resistance deviation rate is less than or equal to a preset discharge resistance standard deviation rate, it is determined that the discharge resistance is unstable; Calculating the difference between the DC capacitance corresponding to the current cycle and the DC capacitance corresponding to the previous cycle as the DC capacitance deviation value; The absolute value of the DC capacitance deviation value is divided by the DC capacitance corresponding to the previous cycle to obtain a DC capacitance deviation rate; Determining whether the DC capacitance deviation rate is less than or equal to a preset DC capacitance standard deviation rate; If the DC capacitance deviation rate is less than or equal to a preset DC capacitance standard deviation rate, it is determined that the DC capacitance is stable; If the DC capacitance deviation rate is less than or equal to a preset DC capacitance standard deviation rate, it is determined that the DC capacitance is unstable.

4. A DC capacitance and discharge resistance monitoring device for an MMC submodule, characterized in that: include: A data acquisition module, used to collect several current values ​​and voltage values ​​of the MMC submodule at preset time intervals; An operation status determination module, configured to determine the operation status of the MMC submodule based on the current value; A time calculation module, used for calculating the initial operation time and the end operation time of the locked operation state of the MMC submodule in this cycle when the MMC submodule is in the locked operation state; a discharge resistance calculation module, configured to calculate the discharge resistance corresponding to the current cycle based on the initial operation time, the end operation time, the current value and the voltage value; a DC capacitance calculation module, configured to calculate the DC capacitance corresponding to the current cycle based on the initial operation time, the end operation time, the voltage value, and the resistance value of the discharge resistor; The time calculation module comprises: A basic time determination submodule, used to determine a first time when the MMC submodule is in a locked operation state for the first time in the current cycle and a second time when the MMC submodule exits the locked operation state for the first time in the current cycle; A locking operation duration calculation submodule, used for calculating the difference between the second moment and the first moment as the locking operation duration; A first deduction duration calculation submodule, used for multiplying the locking operation duration by a first weight to obtain a first deduction duration; An initial running time calculation submodule, used to calculate the sum of the first time and the first deduction time as the initial running time; A second deduction duration calculation submodule, used for multiplying the locking operation duration by a second weight to obtain a second deduction duration; An end-of-running time calculation submodule, used for calculating the difference between the second time and the second deduction time as the end-of-running time; The basic time determination submodule includes: A current value determination unit, used to continuously determine whether the current value is greater than a preset current threshold; A first moment determination unit, used to determine that the moment is the first moment of being in the locked operation state for the first time, and to continuously determine whether the current value is less than or equal to a preset current threshold; A second time determination unit, used to determine the time as the second time of exiting the locked operation state for the first time; The discharge resistance calculation module includes: A voltage value acquisition submodule is used to acquire an initial voltage value and an end voltage value corresponding to the initial operation time and the end operation time; A current value acquisition submodule, used to acquire an initial current value and an end current value corresponding to the initial operation time and the end operation time; The discharge resistance calculation submodule is used to calculate the discharge resistance by the following formula: Wherein, R is the discharge resistance, u(t1) is the initial voltage value, u(t2) is the end voltage value, i(t1) is the initial current value, and i(t2) is the end current value; The DC capacitance calculation module comprises: The DC capacitance calculation submodule is used to calculate the DC capacitance using the following formula: Among them, C is the capacitance value of the DC capacitor, R is the resistance value of the discharge resistor, u(t1) is the initial voltage value, u(t2) is the end voltage value, t1 is the initial operation time, and t2 is the end operation time.

5. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the DC capacitance and discharge resistance monitoring method of the MMC sub-module according to any one of claims 1-3.

6. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the DC capacitance and discharge resistance monitoring method of the MMC sub-module according to any one of claims 1 to 3 when executed.

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