A power-on control circuit and control method thereof

Abstract

The present invention relates to the field of circuit technology, and in particular to a power-on control circuit and a control method thereof, comprising: a battery input terminal, a mains input terminal, a low-level pulse generating circuit, a locking circuit and a main control module; the battery input terminal and the mains input terminal are connected to the main control module through an OR gate circuit; the main control module is connected to the low-level pulse generating circuit through a power-on pin, and the low-level pulse generating circuit is respectively connected to the locking circuit and the mains input terminal; the low-level pulse generating circuit is used to output a low-level pulse when the battery input terminal and the mains input terminal are powered on, so as to power on the main control module; the locking circuit is used to shield the connection between the main control module and the low-level pulse generating circuit when the main control module is powered on; the present invention realizes power-on self-starting when the mains input and the battery input are powered on simultaneously through the low-level pulse generating circuit, and shields the connection between the main control module and the low-level pulse generating circuit through the locking circuit to avoid misoperation.

Description

Technical Field

[0001] The present invention relates to the field of circuit technology, and in particular to a power-on control circuit and a control method thereof. Background Art

[0002] At present, more and more electronic products need to have the function of self-starting when plugged in. When only powered by external power, only a simple RC delay circuit is needed; but when encountering products with batteries, due to the presence of batteries, the self-starting solution must consider the combination of external power and battery to achieve self-starting of the circuit when powered on; at the same time, it is also necessary to ensure that when the battery is powered on, the power pin will not be pulled down when connected to the mains, causing other malfunctions.

[0003] Therefore, in view of the above situation, it is necessary to provide a circuit solution that is compatible with automatic power-on and key-press power-on in scenarios where the power is supplied by mains and batteries. Summary of the invention

[0004] To solve the above problems, the present invention provides a power-on control circuit and a control method thereof to solve one or more technical problems existing in the prior art and at least provide a beneficial choice or create conditions.

[0005] In order to achieve the above object, the present invention provides the following technical solutions:

[0006] A power-on control circuit comprises: a battery input terminal, a mains input terminal, a low-level pulse generating circuit, a locking circuit and a main control module;

[0007] The battery input terminal and the mains input terminal are connected to the main control module via an OR gate circuit;

[0008] The main control module is connected to the low-level pulse generating circuit via a power-on pin, and the low-level pulse generating circuit is respectively connected to the locking circuit and the mains input terminal;

[0009] The main control module is also connected to a power button via a power pin, and when the power button is connected to the power supply, the main control module is powered on;

[0010] The low-level pulse generating circuit is used to output a low-level pulse when the mains input terminal is connected to power, so as to power on the main control module;

[0011] The locking circuit is used to shield the connection between the main control module and the low-level pulse generating circuit when the main control module is powered on.

[0012] Further, the low-level pulse generating circuit includes: a first capacitor, a third diode, a first resistor, a second resistor and a first transistor; one end of the first capacitor is connected to the mains input terminal, and the other end is respectively connected to the cathode of the third diode, one end of the first resistor, and one end of the second resistor, the other end of the first resistor is connected to the base of the first transistor, the collector of the first transistor is connected to the power-on pin of the main control module, and the anode of the third diode, the other end of the second resistor and the emitter of the first transistor are grounded together;

[0013] One end of the locking circuit is connected to the power-on pin of the main control module, and the other end is connected to the base of the first transistor.

[0014] Further, the locking circuit includes: a third resistor, a fourth resistor, a third capacitor, and a second transistor; one end of the third resistor is connected to the power-on pin of the main control module, and the other end is respectively connected to one end of the fourth resistor, one end of the third capacitor, and the base of the second transistor; the other end of the fourth resistor, the other end of the third capacitor, and the emitter of the second transistor are grounded together, and the collector of the second transistor is connected to the base of the first transistor.

[0015] Furthermore, the low-level pulse generating circuit also includes a second capacitor, one end of the second capacitor is connected to the other end of the first resistor, and the other end of the second capacitor is grounded.

[0016] Furthermore, the capacitance value of the third capacitor is at least 10 times greater than the capacitance value of the second capacitor.

[0017] Furthermore, the first transistor and the second transistor are NPN transistors.

[0018] Furthermore, the OR gate circuit includes a first diode and a second diode, the battery input terminal is connected to the main control module via the first diode, and the mains input terminal is connected to the main control module via the second diode.

[0019] Furthermore, the first diode, the second diode and the third diode are all Schottky diodes.

[0020] A power-on control method is applied to any of the power-on control circuits described above, and the method comprises the following steps:

[0021] Step S100, the main control module is initialized;

[0022] Step S200, the main control module detects the level pulse output by the low level pulse generating circuit through the power-on pin;

[0023] Step S300, in response to the low-level pulse output by the low-level pulse generating circuit, triggering the main control module to power on; wherein the low-level pulse output by the low-level pulse generating circuit is triggered when the mains power supply is connected through the mains input terminal, or when the power-on button is pressed to turn on the power;

[0024] Step S400: After the main control module is powered on, the connection between the main control module and the low-level pulse generating circuit is shielded by the locking circuit.

[0025] The beneficial effects of the present invention are as follows: the present invention provides a power-on control circuit and a control method thereof, which can realize self-starting of the circuit when the mains input and the battery input are powered simultaneously through a low-level pulse generating circuit; at the same time, by adding a locking circuit, it is ensured that the self-starting low-level pulse generating circuit fails after the circuit is powered on, and in the battery-powered power-on state, connecting the mains power will not pull down the power-on pin to cause other malfunctions. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0027] Figure 1 is a circuit block diagram of a power-on control circuit in an embodiment of the present invention;

[0028] Figure 2 The invention discloses a circuit schematic diagram of a power-on control circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0029] This section will describe in detail the specific embodiments of the present invention. The preferred embodiments of the present invention are shown in the accompanying drawings. The purpose of the accompanying drawings is to supplement the description of the text part of the specification with graphics, so that people can intuitively and vividly understand each technical feature and the overall technical solution of the present invention, but it cannot be understood as a limitation on the scope of protection of the present invention.

[0030] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0031] In the description of the present invention, if there are words such as "several", it means one or more, "more" means more than two, greater than, less than, exceed, etc. are understood as not including the number, and above, below, within, etc. are understood as including the number.

[0032] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0033] refer to Figure 1 , an embodiment of the present invention provides a power-on control circuit, comprising: a battery input terminal 100, a mains input terminal 200, a low-level pulse generating circuit 300, a locking circuit 400 and a main control module 500;

[0034] The battery input terminal 100 and the mains input terminal 200 are connected to the main control module 500 via an OR gate circuit 600;

[0035] The main control module 500 is connected to the low-level pulse generating circuit 300 via the power-on pin 510, and the low-level pulse generating circuit 300 is respectively connected to the locking circuit 400 and the mains input terminal 200;

[0036] The main control module 500 is also connected to a power button S1 via a power pin 510. When the power button S1 is pressed, the main control module 500 is powered on.

[0037] The low-level pulse generating circuit 300 is used to output a low-level pulse when the mains input terminal 200 is powered on, so as to power on the main control module 500;

[0038] The locking circuit 400 is used to shield the connection between the main control module 500 and the low-level pulse generating circuit 300 when the main control module 500 is powered on.

[0039] It should be noted that, in this embodiment, a power supply battery is used as a standby power supply, and the power supply battery is connected to the battery input terminal 100. When the power button S1 is pressed, the main control module 500 is powered on; when the main power input terminal 200 is connected to the power supply, the low-level pulse generating circuit 300 outputs a low-level pulse to power on the main control module 500;

[0040] Compared with the prior art, the present invention can realize the circuit power-on self-starting when the mains input and the battery input are used for power supply at the same time; at the same time, by adding the locking circuit 400, it is ensured that the self-starting circuit fails after the circuit is turned on, so that when the battery is powered on, the mains input will not pull down the power pin 510 to cause other malfunctions. At the same time, it is also compatible with the button switch.

[0041] refer to Figure 2 As a preferred embodiment of the above embodiment, the low-level pulse generating circuit 300 includes: a first capacitor C1, a third diode D3, a first resistor R1, a second resistor R2 and a first transistor Q1; one end of the first capacitor C1 is connected to the mains input terminal 200, and the other end is respectively connected to the cathode of the third diode D3, one end of the first resistor R1, and one end of the second resistor R2, the other end of the first resistor R1 is connected to the base of the first transistor Q1, the collector of the first transistor Q1 is connected to the power-on pin 510 of the main control module 500, and the anode of the third diode D3, the other end of the second resistor R2 and the emitter of the first transistor Q1 are grounded together;

[0042] One end of the locking circuit 400 is connected to the power-on pin 510 of the main control module 500 , and the other end is connected to the base of the first transistor Q1 .

[0043] It should be noted that the low-level pulse generating circuit 300 realizes a 2-second low-level pulse output when powered on through an RC resistor-capacitor circuit formed by a first capacitor C1, a first resistor R1, and a second resistor R2. After the power-on is completed, the locking circuit 400 will shield the low-level pulse generating circuit 300 to prevent the circuit from malfunctioning when plugging in an external power supply when the battery is connected and the power is on. The width of the low pulse generated by the low-level pulse generating circuit 300 is jointly determined by the first capacitor C1, the first resistor R1, and the second resistor R2. Usually, the second resistor R2 remains unchanged. The pulse width is changed by adjusting the values ​​of the first capacitor C1 and the first resistor R1. The larger the RC value of the RC resistor-capacitor circuit, the wider the pulse width.

[0044] As a preferred embodiment of the above embodiment, the locking circuit 400 includes: a third resistor R3, a fourth resistor R4, a third capacitor C3, and a second transistor Q2; one end of the third resistor R3 is connected to the power-on pin 510 of the main control module 500, and the other end is respectively connected to one end of the fourth resistor R4, one end of the third capacitor C3, and the base of the second transistor Q2; the other end of the fourth resistor R4, the other end of the third capacitor C3, and the emitter of the second transistor Q2 are commonly grounded, and the collector of the second transistor Q2 is connected to the base of the first transistor Q1.

[0045] In this embodiment, the locking circuit 400 is used to ensure that the low-level generating circuit is shielded after power-on, to prevent the system from malfunctioning due to re-plugging the mains when the mains and the battery are present at the same time.

[0046] It should be noted that, in some embodiments, the power-on pin 510 of the main control module 500 has a pull-up resistor (the resistance of the pull-up resistor is usually 1K), and the level of the power-on pin 510 is pulled down for a certain period of time through the pull-up resistor to trigger the power-on of the main control module 500. The resistance of the third resistor R3 should be large enough and must be much larger than the resistance of the pull-up resistor of the power-on pin 510 (the resistance of the third resistor R3 ≥ 100 * the resistance of the internal pull-up resistor of the power-on pin 510) to prevent the power-on pin 510 from being pulled down.

[0047] As a preference of the above embodiment, the first transistor Q1 and the second transistor Q2 are NPN transistors.

[0048] As a preference of the above embodiment, the low-level pulse generating circuit 300 further includes a second capacitor C2, one end of the second capacitor C2 is connected to the other end of the first resistor R1, and the other end of the second capacitor C2 is grounded.

[0049] As a preference of the above embodiment, the capacitance value of the third capacitor C3 is at least 10 times greater than the capacitance value of the second capacitor C2.

[0050] In this embodiment, the second capacitor C2 mainly plays a filtering role, and the third capacitor C3 mainly plays a delay role. The capacitance value of the third capacitor C3 needs to be at least one order of magnitude larger than the capacitance value of the second capacitor C2 to ensure that the first transistor Q1 is actuated before the second transistor Q2, thereby preventing the second transistor Q2 from actuating first and locking the first transistor Q1.

[0051] As a preferred embodiment of the above, the OR gate circuit 600 includes a first diode D1 and a second diode D2, the battery input terminal 100 is connected to the main control module 500 through the first diode D1, and the AC input terminal 200 is connected to the main control module 500 through the second diode D2.

[0052] Specifically, the anode of the first diode D1 is connected to the battery input terminal 100, and the cathode is connected to the main control module 500; the anode of the second diode D2 is connected to the battery input terminal 100, and the cathode is connected to the main control module 500;

[0053] As a preference of the above embodiment, the first diode D1 , the second diode D2 and the third diode D3 are all Schottky diodes.

[0054] The working principle of the power-on control circuit provided in the application is explained below:

[0055] When the external mains input terminal 200 is connected, since the voltage across the first capacitor C1 cannot change suddenly, the voltage across the two ends of the first capacitor C1 is simultaneously changed to the mains voltage Vin; since the base of the first transistor Q1 requires a very small conduction current (uA level), the cathode voltage of the third diode D3 (mains voltage Vin) passes through the first resistor R1, so that the first transistor Q1 is turned on. At this time, the voltage between the emitter and the collector of the first transistor Q1 V1ce≈0V, and the power-on pin 510 is pulled low; as the first transistor Q1 is turned on, the voltage difference across the first capacitor C1 gradually increases, causing the cathode voltage of the third diode D3 to gradually decrease. As time goes by, when the third diode D3 When the cathode voltage drops to a level insufficient to maintain the continued conduction of the first transistor Q1, the first transistor Q1 is turned off, and the power-on pin 510 returns to a high level; after the power-on pin 510 returns to a high level, the conduction of the second transistor Q2 is triggered again. At this time, the voltage between the emitter and the collector of the second transistor Q2 V2ce≈0V, and the voltage between the base and the emitter of the first transistor Q1 V2be≈0V. The first transistor Q1 is locked and cannot be turned on. At this time, regardless of whether the AC input terminal 200 is plugged in and connected again, the low pulse generating circuit has no action; when the external battery input terminal 100 is powered, just press the power button S1 to trigger the main control module 500 to power on.

[0056] In addition, an embodiment of the present invention provides a power-on control method, which is applied to the power-on control circuit described in any of the above embodiments, and the method includes the following steps:

[0057] Step S100, the main control module is initialized;

[0058] Step S200, the main control module detects the level pulse output by the low level pulse generating circuit through the power-on pin;

[0059] Step S300, in response to the low-level pulse output by the low-level pulse generating circuit, triggering the main control module to power on; wherein the low-level pulse output by the low-level pulse generating circuit is triggered when the mains power supply is connected through the mains input terminal, or when the power-on button is pressed to turn on the power;

[0060] Step S400: After the main control module is powered on, the connection between the main control module and the low-level pulse generating circuit is shielded by the locking circuit.

[0061] Although the description of the present invention has been described in considerable detail and in particular with respect to several embodiments, it is not intended to be limited to any of these details or embodiments or any particular embodiment, but rather should be considered to be interpreted broadly by reference to the appended claims, taking into account the prior art, to effectively cover the intended scope of the present invention. In addition, the above description of the present invention is based on the embodiments foreseeable by the inventors, and its purpose is to provide a useful description, and those non-substantial changes to the present invention that have not yet been foreseen may still represent equivalent changes to the present invention.

Claims

1. A power-on control circuit, characterized in that: include: Battery input terminal, mains input terminal, low level pulse generating circuit, locking circuit and main control module; The battery input terminal and the mains input terminal are connected to the main control module via an OR gate circuit; The main control module is connected to the low-level pulse generating circuit via a power-on pin, and the low-level pulse generating circuit is respectively connected to the locking circuit and the mains input terminal; The main control module is also connected to a power button via a power pin, and when the power button is connected to the power supply, the main control module is powered on; The low-level pulse generating circuit is used to output a low-level pulse when the mains input terminal is connected to power, so as to power on the main control module; The locking circuit is used to shield the connection between the main control module and the low-level pulse generating circuit when the main control module is powered on; The low-level pulse generating circuit comprises: a first capacitor, a third diode, a first resistor, a second resistor and a first transistor; one end of the first capacitor is connected to the mains input terminal, and the other end is respectively connected to the cathode of the third diode, one end of the first resistor, and one end of the second resistor, the other end of the first resistor is connected to the base of the first transistor, the collector of the first transistor is connected to the power-on pin of the main control module, and the anode of the third diode, the other end of the second resistor and the emitter of the first transistor are grounded together; One end of the locking circuit is connected to the power-on pin of the main control module, and the other end is connected to the base of the first transistor; The locking circuit includes: a third resistor, a fourth resistor, a third capacitor, and a second transistor; one end of the third resistor is connected to the power-on pin of the main control module, and the other end is respectively connected to one end of the fourth resistor, one end of the third capacitor, and the base of the second transistor; the other end of the fourth resistor, the other end of the third capacitor, and the emitter of the second transistor are grounded together, and the collector of the second transistor is connected to the base of the first transistor.

2. A power-on control circuit according to claim 1, characterized in that: The low-level pulse generating circuit further includes a second capacitor, one end of the second capacitor is connected to the other end of the first resistor, and the other end of the second capacitor is grounded.

3. A power-on control circuit according to claim 1, characterized in that: The capacitance value of the third capacitor is at least 10 times greater than the capacitance value of the second capacitor.

4. A power-on control circuit according to claim 1, characterized in that: The first transistor and the second transistor are NPN transistors.

5. A power-on control circuit according to claim 1, characterized in that: The OR gate circuit includes a first diode and a second diode. The battery input end is connected to the main control module through the first diode, and the main power input end is connected to the main control module through the second diode.

6. A power-on control circuit according to claim 5, characterized in that: The first diode, the second diode and the third diode are all Schottky diodes.

7. A startup control method, characterized in that: The power-on control circuit according to any one of claims 1 to 6 is characterized in that the method comprises the following steps: Step S100, the main control module is initialized; Step S200, the main control module detects the level pulse output by the low level pulse generating circuit through the power-on pin; Step S300, in response to the low-level pulse output by the low-level pulse generating circuit, triggering the main control module to power on; wherein the low-level pulse output by the low-level pulse generating circuit is triggered when the mains power supply is connected through the mains input terminal, or when the power-on button is pressed to turn on the power; Step S400: After the main control module is powered on, the connection between the main control module and the low-level pulse generating circuit is shielded by the locking circuit.

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