A method and apparatus for port statistics

By introducing a statistical chip into an ultra-low latency switch, and using hardware counters and software calculations, accurate statistics of port forwarding packets are achieved, solving the problem that ultra-low latency switches cannot count the number and rate of port forwarding packets.

CN115277501BActive Publication Date: 2026-07-03新华三技术有限公司合肥分公司

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
新华三技术有限公司合肥分公司
Filing Date
2022-06-14
Publication Date
2026-07-03

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Abstract

This application provides a method and apparatus for port statistics. The port statistics method, applied to an ultra-low latency switch, includes: copying each Ethernet data packet forwarded by each port to be counted to a mapped statistics chip port; periodically polling and reading the number of received copied Ethernet data packets recorded by the port hardware counter of each statistics chip port, and updating the current received packet software count value of each statistics chip port; calculating the received packet rate of each statistics chip port in each period based on the difference between the previous received packet software count value and the current received packet software count value; calculating the packet forwarding rate of each mapped port to be counted in each period based on the packet receiving rate of each statistics chip port in each period; and updating the current received packet software count value of each statistics chip port to the previous received packet software count value.
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Description

Technical Field

[0001] This application relates to communication technology, and in particular to a method and device for port statistics. Background Technology

[0002] Currently, the financial securities industry has an increasingly strong demand for high-frequency trading, resulting in an explosive growth in demand for ultra-low latency trading systems composed of ultra-low latency switches. It is against this backdrop that ultra-low latency switches have emerged, offering advantages such as extremely low latency and minimal functionality. Ultra-low latency switches have only one layer of forwarding functionality, enabling ultra-low latency forwarding.

[0003] However, ultra-low latency switches cannot perform traffic statistics on packets, resulting in functional defects such as inaccurate counting of forwarded packets and inability to calculate port rates. This limits the use of ultra-low latency switches. Summary of the Invention

[0004] The purpose of this application is to provide a method and device for port statistics, which can accurately count the packets on the ports that perform traffic forwarding on ultra-low latency switches.

[0005] To address the aforementioned objective, this application provides a port statistics method for ultra-low latency switches. The method includes: copying each Ethernet data packet forwarded by each port to be counted to a mapped statistics chip port; periodically polling and reading the number of received copied Ethernet data packets recorded by the port hardware counter of each statistics chip port, and updating the current received packet software count value of each statistics chip port; calculating the received packet rate of each statistics chip port in each period based on the difference between the previous received packet software count value and the current received packet software count value; calculating the packet forwarding rate of each mapped port to be counted in each period based on the packet receiving rate of each statistics chip port in each period; and updating the current received packet software count value of each statistics chip port to the previous received packet software count value.

[0006] To achieve the above objectives, this application also provides a port statistics device for an ultra-low latency switch. The device includes: a switching unit, configured to copy each Ethernet data packet forwarded by each port to be counted in the switching unit to a mapped statistics chip port in the statistics unit; the statistics unit, configured to record the number of copied Ethernet data packets received by each statistics chip port through a port hardware counter; and a rate statistics module, configured to periodically poll and read the number of copied Ethernet data packets received recorded by the port hardware counter of each statistics chip port in the statistics unit, and update the current received packet software count value of each statistics chip port; calculate the received packet rate of each statistics chip port in each period based on the difference between the previous received packet software count value and the current received packet software count value; calculate the packet forwarding rate of each port to be counted in each period based on the packet receiving rate of each statistics chip port in each period; and update the current received packet software count value of each statistics chip port to the previous received packet software count value.

[0007] The beneficial effect of this application is that it diverts the forwarded packets on the switching unit of the ultra-low latency switch to the statistics unit, and the statistics unit performs statistics on the packets forwarded by the forwarding port of the switching unit, which effectively solves the defect that the switching unit of the ultra-low latency switch cannot provide traffic statistics. Attached Figure Description

[0008] Figure 1 A flowchart illustrating an embodiment of the port statistics method for ultra-low latency switches provided in this application;

[0009] Figure 2 A schematic diagram illustrating an embodiment of the statistical port forwarding rate of the ultra-low latency switch provided in this application;

[0010] Figure 3 This is a schematic diagram of an embodiment of the port statistics device for ultra-low latency switches provided in this application. Detailed Implementation

[0011] The following detailed description will be provided with reference to several examples illustrated in the accompanying figures. In this detailed description, numerous specific details are used to provide a comprehensive understanding of the present application. Known methods, steps, components, and circuits are not described in detail in the examples to avoid obscuring their meaning.

[0012] In the terminology used, the term "including" means including but not limited to; the term "containing" means including but not limited to; the terms "above," "within," and "below" include the number itself; the terms "greater than" and "less than" mean not including the number itself. The term "based on" means based on at least a portion of them.

[0013] Figure 1 The port statistics method for ultra-low latency switches provided in this application, as shown in the illustration, includes the following steps;

[0014] Step 101: Copy each Ethernet data packet forwarded by each port to be counted to a mapped statistics chip port.

[0015] Step 102: Periodically poll and read the number of received duplicate Ethernet data packets recorded by the port hardware counter of each statistical chip port, and update the current received packet software count value of each statistical chip port.

[0016] Step 103: Calculate the rate of received messages for each statistical chip port in each cycle based on the difference between the previous received message software count value and the current received message software count value for each statistical chip port.

[0017] Step 104: Calculate the packet forwarding rate of each forwarding port to be counted in each cycle based on the packet receiving rate of each statistical chip port in each cycle.

[0018] Step 105: Update the current received message software count value of each statistical chip port to the previous received message software count value.

[0019] The beneficial effect of this application is that it diverts the forwarded packets on the switching unit of the ultra-low latency switch to the statistics unit, and the statistics unit performs statistics on the packets forwarded by the forwarding port of the switching unit, which effectively solves the defect that the switching unit of the ultra-low latency switch cannot provide traffic statistics.

[0020] Figure 2 This is a schematic diagram of an embodiment of the port forwarding rate statistics of an ultra-low latency switch provided in this application.

[0021] like Figure 2 As shown, this application adds a statistical unit (chip) with a PCIE physical layer interface (Physical Interface for PCI Express, PIPE) to the ultra-low latency switch 2A to realize port statistics, thereby solving the problem of providing traffic statistics for the switch unit (chip) of the ultra-low latency switch.

[0022] In this application, a certain number of forwarding ports of the switching unit of the ultra-low latency switch 2A are configured as internal forwarding ports to send data packets sent by the forwarding ports to be counted by the switching chip to the statistics unit. Figure 2 In the case of the ultra-low time switch 2A, the switching ports 21-40 on the switching unit are configured as internal forwarding ports, which are directly connected to the statistical chip ports (PIPE ports) P1-P20 of the statistical chip, respectively.

[0023] The CPU of the ultra-low latency switch 2A assigns one switching port to be counted to each of its internal forwarding ports 21-40, namely forwarding ports 1-20 of the switching unit. The internal forwarding ports of the ultra-low latency switch are fixed and are used to divert the data packets sent by forwarding ports 1-20 to the PIPE port of the counting unit.

[0024] The CPU software of the ultra-low latency switch 2A records the correspondence between the internal forwarding ports 21-40 and the PIPE ports P1-P20 of the statistics unit.

[0025] When configuring the forwarding ports 1-20 of the ultra-low latency switch 2A, the CPU selects an internal forwarding port and assigns it to each forwarding port 1-20 to be counted.

[0026] For example, Figure 2 The ultra-low latency switch 2A selects internal forwarding port 25 and assigns it to forwarding port 3 to be counted.

[0027] When the switching unit of the ultra-low latency switch 2A receives a data packet 201 of a certain service flow, it looks up the MAC address entry in the MAC table that matches the destination MAC address of the data packet 201. The output port is forwarding port 3. When sending each data packet 201 through forwarding port 3, a copy of data packet 201' is made and sent through the internal forwarding port 25 of forwarding port 3.

[0028] The PIPE port P5 of the statistics unit of the ultra-low latency switch 2A receives each data packet 201' from the directly connected internal forwarding port 25.

[0029] At each arrival of the statistical period (T), the CPU of the ultra-low latency switch 2A reads the port hardware counter of PIPE port P5 on the statistical unit and records the number of hardware forwarded packets of the port hardware counter as the current received packet software count value (NEW_COUNTER). It also reads the recorded previous received packet software count value (LAST_COUNTER) of PIPE port P5 and calculates the received packet rate (S) of PIPE port P5 within the statistical period based on the difference between the current received packet software count value (NEW_COUNTER) and the previous received packet software count value (LAST_COUNTER) of PIPE port P5; that is, S = (NEW_COUNTER - LAST_COUNTER) / T.

[0030] Subsequently, the CPU of the ultra-low latency switch 2A updates the last received message software count (LAST_COUNTER) of PIPE port P5 based on the recorded current received message software count (NEW_COUNTER). In the first statistical period, the statistical unit of the ultra-low latency switch 2A reads a last received message software count (LAST_COUNTER) of PIPE port P5 that is zero.

[0031] The CPU of the ultra-low latency switch 2A calculates the packet transmission rate of the internal forwarding port 25 directly connected to PIPE port P5 based on the packet reception rate of PIPE port P5. The calculation is then used to calculate the packet transmission rate of the forwarding port 3 to be calculated, which is assigned to the internal forwarding port 25.

[0032] Figure 2 Taking PIPE chip port P5 as an example, in this application, the ultra-low latency switch 2A polls and reads the hardware forwarding packet count of the hardware counters of PIPE ports P1-P20 on the statistical unit when the statistical period arrives, updates the current received packet software count value (NEW_COUNTER) of each PIPE port, calculates the packet receiving rate of each PIPE port in each statistical period, and then updates the previous received packet software count value (LAST_COUNTER) of each PIPE port according to the recorded current received packet software count value (NEW_COUNTER).

[0033] When the ultra-low latency switch 2A does not need to perform rate statistics on forwarding port 3 or when the forwarding port is closed, the CPU of the ultra-low latency switch 2A deletes the recorded current received message software count value (NEW_COUNTER) and the last received message software count value (LAST_COUNTER) of the PIPE port P5 directly connected to the internal forwarding port 25, and clears the hardware technical value of the port hardware counter of PIPE port P5.

[0034] Based on the above description of this embodiment, the number of internal forwarding ports of the ultra-low latency switch can be flexibly selected based on the actual application scenario, but the number of internal forwarding ports should not exceed the number of forwarding ports to be counted, so as to avoid occupying too much forwarding port forwarding resources.

[0035] This application Figure 2 The embodiment utilizes an independent statistics unit to track the forwarding traffic of the forwarding port of the ultra-low latency switch's switching unit. The statistics unit is implemented by a PIPE chip, and the switching unit can be an ASIC or FPGA chip with packet forwarding capabilities.

[0036] This application Figure 2 The embodiment implements port traffic statistics for ultra-low latency switches, calculates the port forwarding rate of ultra-low latency switches through software recording and calculation, and achieves port traffic clearing function through hardware clearing and software record clearing of the PIPE chip; based on Figure 2 The implementation can incorporate statistical units (chips) with different statistical functions, enabling functions such as statistical analysis of different message types.

[0037] Figure 3 for Figure 2 This is a schematic diagram of an embodiment of a port statistics device applied to an ultra-low latency switch provided in this application. The device 300 includes a network interface, a switching unit, a statistics unit, a CPU, and a memory. The switching unit can be an FPGA or ASIC chip with switching functionality; the statistics unit is a PIPE chip with statistical functionality; the processor executes processor-executable instructions in the memory to execute the rate statistics module and the setting module.

[0038] The switching unit is used to copy each Ethernet data packet forwarded by each forwarding port to be counted in the switching unit to a mapped statistical chip port in the statistical unit.

[0039] The statistics unit records the number of replicated Ethernet data packets received at each statistics chip port via a port hardware counter.

[0040] The rate statistics module periodically polls and reads the number of received duplicate Ethernet data packets recorded by the port hardware counter of each statistical chip port in the statistics unit, and updates the current received packet software count value of each statistical chip port; it calculates the received packet rate of each statistical chip port in each period based on the difference between the previous received packet software count value and the current received packet software count value; it statistically analyzes the packet forwarding rate of each forwarding port to be counted in each period based on the packet received rate of each statistical chip port in each period; and it updates the current received packet software count value of each statistical chip port to the previous received packet software count value.

[0041] The switching unit copies each Ethernet data packet forwarded by each port to be counted to a mapped statistics chip port, including: the switching unit copies each Ethernet data packet forwarded by each port to be counted and sends it to a corresponding internal forwarding port set in the switching unit; and each copied Ethernet data packet is sent to each directly connected statistics chip port through each internal forwarding port set in the switching unit.

[0042] The switching unit has multiple internal forwarding ports that are directly connected to multiple statistical chip ports in the statistics unit. The setting module is used to set the multiple forwarding ports of the switching unit as multiple internal forwarding ports. The switching unit is also used to associate each forwarding port to be counted with an internal forwarding port. The rate statistics module is also used to record the mapping relationship between each internal forwarding port and the directly connected statistical chip port.

[0043] Before the rate statistics module periodically polls and reads the number of received replicated Ethernet data packets recorded by the port hardware counter of each statistics chip port, it also looks up the statistics chip port corresponding to each internal forwarding port based on the recorded mapping relationship between each internal forwarding port and the directly connected statistics chip port.

[0044] The switching unit is also used to unassociate any internal forwarding port with any port to be counted; the rate statistics module is also used to find the statistical chip port mapped to the unassociated internal forwarding port; delete the count value of the port hardware counter of the found statistical chip port; delete the last received message software count value and the current received message software count value of the found statistical chip port.

[0045] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method of port statistics, applied to an ultra-low latency switch, characterized in that, The method includes: Copy each Ethernet data packet forwarded by each port to be counted to a mapped statistics chip port. The number of received replicated Ethernet data packets recorded by the port hardware counter of each statistical chip port is periodically polled and updated to the current received packet software count value of each statistical chip port. The rate at which each statistical chip port receives messages in each cycle is calculated based on the difference between the previous received message software count value and the current received message software count value of each statistical chip port. The message forwarding rate of each forwarding port to be statistically analyzed is mapped to the message receiving rate of each statistical chip port in each cycle. Update the current received message software count value of each of the statistical chip ports to the previous received message software count value.

2. The method of claim 1, wherein, Each Ethernet data packet forwarded by each port to be counted is copied to a mapped statistics chip port, including: Copy each Ethernet data packet forwarded by each of the aforementioned forwarding ports to be counted and send it to a corresponding internal forwarding port. Each of the aforementioned internal forwarding ports sends each copy of the Ethernet datagram to each directly connected statistics chip port.

3. The method of claim 2, wherein, Before copying each Ethernet data packet forwarded by each port to be statistically analyzed to a mapped statistical chip port, the method includes: Each of the multiple forwarding ports is configured as a separate internal forwarding port. Each of the internal forwarding ports is connected to one of the statistics chip ports; Record the mapping relationship between each of the internal forwarding ports and the directly connected statistical chip ports; Associate each of the forwarding ports to be counted with an internal forwarding port.

4. The method of claim 3, wherein, Before periodically polling and reading the number of received replicated Ethernet data packets recorded by the port hardware counter of each of the statistics chip ports, the method further includes: Based on the recorded mapping relationship between each internal forwarding port and the directly connected statistical chip port, find the statistical chip port corresponding to each internal forwarding port.

5. The method of claim 3, wherein, The method further includes: Remove any of the internal forwarding ports associated with any of the forwarding ports to be counted; Locate the statistics chip port that has been unassociated from the internal forwarding port mapping; Delete the count value of the port hardware counter of the found statistical chip port; Delete the last received message software count value and the current received message software count value of the found statistical chip port.

6. A device for port statistics, applied to an ultra-low latency switch, characterized in that, The device includes: A switching unit is used to copy each Ethernet data packet forwarded by each forwarding port to be counted in the switching unit to a mapped statistical chip port in the statistical unit. The statistics unit is used to record the number of replicated Ethernet data packets received by each statistics chip port through a port hardware counter of each statistics chip port; The rate statistics module periodically polls and reads the number of received replicated Ethernet data packets recorded by the port hardware counter of each statistical chip port of the statistics unit, and updates the current received packet software count value of each statistical chip port; calculates the received packet rate of each statistical chip port in each period based on the difference between the previous received packet software count value and the current received packet software count value; statistically maps the packet forwarding rate of each forwarding port to be counted in each period based on the packet received rate of each statistical chip port in each period; and updates the current received packet software count value of each statistical chip port to the previous received packet software count value.

7. The apparatus of claim 6, wherein, The switching unit copies each Ethernet data packet forwarded by each port to be statistically analyzed to a mapped statistical chip port, including: The switching unit copies each Ethernet data packet forwarded by each of the forwarding ports to be counted and sends it to a corresponding internal forwarding port set in the switching unit. Each copied Ethernet data packet is sent to each directly connected statistics chip port through each of the internal forwarding ports set in the switching unit.

8. The apparatus of claim 7, wherein, The multiple internal forwarding ports located in the switching unit are directly connected to the multiple statistical chip ports located in the statistical unit. The device further includes a setting module for setting the multiple forwarding ports of the switching unit as multiple internal forwarding ports respectively; The switching unit is also configured to associate each of the forwarding ports to be counted with an internal forwarding port; The rate statistics module is also used to record the mapping relationship between each of the internal forwarding ports and the directly connected statistics chip ports.

9. The device according to claim 8, characterized in that, Before the rate statistics module periodically polls and reads the number of received replicated Ethernet data packets recorded by the port hardware counter of each statistics chip port, it also looks up the statistics chip port corresponding to each internal forwarding port according to the recorded mapping relationship between each internal forwarding port and the directly connected statistics chip port.

10. The apparatus of claim 8, wherein, The switching unit is also used to disconnect any internal forwarding port associated with any forwarding port to be counted; The rate statistics module is also used to locate the statistics chip port that has been unassociated from the internal forwarding port mapping; delete the count value of the port hardware counter of the located statistics chip port; and delete the previous received message software count value and the current received message software count value of the located statistics chip port.