A DMA access method and device supporting online data reorganization

By using the online data reassembly method within the DMA engine, the problem of independent DMA transfer and data reassembly is solved, improving data access efficiency and reducing power consumption, while providing programming convenience and flexibility.

CN115328404BActive Publication Date: 2026-04-17JIANGNAN INST OF COMPUTING TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
JIANGNAN INST OF COMPUTING TECH
Filing Date
2022-08-24
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

The DMA transfer mechanism of existing processor chips is independent of the data reassembly process, which causes the data transposition process to consume additional processing time and power consumption, affecting pipeline performance.

Method used

Online data reassembly is implemented in the DMA engine by parsing DMA transfer instructions, splitting access requests, storing data in an internal buffer, and performing format conversion according to reassembly parameters, thus supporting online data reassembly.

Benefits of technology

There is no need to add a data reassembly module to the on-chip local memory, which improves data access efficiency, reduces power consumption, and provides programming convenience and flexibility.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a DMA accessing method and device supporting online data reorganization, and relates to the technical field of data processing, which comprises the following steps: when a DMA engine receives a DMA transmission instruction, it is judged whether there is a data reorganization instruction in the DMA transmission instruction; if yes, the data transmission direction and data reorganization parameter information are obtained; the DMA engine analyzes and splits the received DMA instruction into an access request and sends the access request to an upstream storage in the transmission direction; when the DMA engine receives access response data sent by the upstream storage, the response data is reorganized and stored in a data buffer in the DMA engine; when the data buffer collects all data in the current DMA transmission instruction, the data is forwarded to a downstream storage in a reorganized format according to the data reorganization parameters in the DMA transmission instruction. The application supports online data reorganization, makes the data reorganization process transparent to the operation core, provides convenience and flexibility for programmers, and reduces the implementation cost and power consumption of data format conversion.
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Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a DMA memory access method and apparatus that supports online data reassembly. Background Technology

[0002] With the rapid development of science and technology, specialized processors have emerged to meet the specific needs of different application fields. These applications typically involve a large number of simple data manipulation and recombination operations, such as summation, finding maximum / minimum values, and bit manipulation.

[0003] In recent years, processor designs have moved away from traditional multi-level on-chip cache architectures, opting instead for simpler and more efficient on-chip local memory mechanisms. Direct Memory Access (DMA) directly moves data from external memory to on-chip local memory. The arithmetic unit retrieves data from local memory, performs format conversion to meet the loading requirements of the arithmetic unit, and then performs subsequent operations. For example, Chinese patent CN101127018A discloses an on-chip DMA structure and its implementation method. The on-chip DMA structure includes a DMA register group, a priority arbitration unit, a DMA data buffer register, an interrupt setting and receiving unit, and increment / decrement control logic. The on-chip DMA uses a 32-bit data transfer channel for data transfer between memories. Due to its independent internal address and data bus support, concurrent operations between the CPU and the DMA controller are possible, and the DMA transfer rate matches the CPU. An independent address increment / decrement module controls the automatic increment and decrement of the source and destination address registers and the number of transfers. The DMA has two priority judgment modes. This DMA implementation method can be widely applied in the design of high-performance processors, offering a simple and reliable structure.

[0004] However, the above-mentioned on-chip DMA memory access method still has the following drawbacks: the DMA transfer mechanism and data reconstruction process of existing processor chips are two independent processes and logics. Each on-chip local memory needs to provide a data reconstruction function module. The data transposition process requires reading the original data from the on-chip local memory, which takes up additional processing time, affecting pipeline performance and consuming a certain amount of power.

[0005] Therefore, a reasonable and efficient DMA memory access method for online data reorganization is essential for both memory access efficiency and power consumption reduction. Summary of the Invention

[0006] The purpose of this invention is to provide a DMA memory access method and apparatus that supports online data reorganization. It eliminates the need to add a data reorganization function module to the on-chip local memory, supports online data reorganization, makes the data reorganization process transparent to the computing core, provides convenience and flexibility for programmers, improves data access efficiency, and reduces the implementation cost and power consumption of data format conversion.

[0007] According to a first aspect of the present invention, a DMA memory access method supporting online data reassembly is proposed, comprising:

[0008] When the DMA engine receives a DMA transfer command, it determines whether there is a data reassembly instruction in the DMA transfer command. If so, it obtains the data transfer direction and data reassembly parameter information in the DMA transfer command.

[0009] The DMA engine parses the received DMA instructions and breaks them down into at least one access request, which is then sent to the upstream storage in the transmission direction.

[0010] When the DMA engine receives access response data from the upstream storage, it stores the response data in the data buffer inside the DMA engine.

[0011] When the data buffer has collected all the data in the current DMA transfer instruction, the data in the data buffer is reassembled according to the data reassembly parameters in the DMA transfer instruction, and the reassembled format is forwarded to the downstream storage in the transfer direction.

[0012] Furthermore, the direction of data transmission includes:

[0013] Transfers from on-chip local memory to external memory and from external memory to on-chip local memory;

[0014] When the data transfer direction is from on-chip local memory to external memory, the upstream storage in the transfer direction is on-chip local memory, and the downstream storage in the transfer direction is external memory;

[0015] When the data transfer direction is from external memory to on-chip local memory, the upstream storage in the transfer direction is external memory, and the downstream storage in the transfer direction is on-chip local memory.

[0016] Furthermore, DMA transfer commands are sent from the processor core stored in the on-chip local memory.

[0017] Furthermore, the data reconstruction parameters include:

[0018] The number of data reorganizations, the types of data reorganizations, and the rules for data reorganization.

[0019] Furthermore, when the upstream storage in the transmission direction is external memory:

[0020] The DMA engine parses the received DMA instructions and breaks them down into at least one access request, which is then sent to external memory. The number of access requests is equal to the number of data reassemblies, and each access request retrieves one cache line of data.

[0021] When the DMA engine receives access response data from external memory, it returns a cache line of data for each response and stores the response data in the DMA engine's internal data buffer according to the rules of cache line data.

[0022] Furthermore, when the upstream storage in the transmission direction is external memory:

[0023] When the amount of response data stored in the data buffer equals the number of access requests, the data buffer collects all the data in this DMA transfer instruction.

[0024] Furthermore, when the upstream storage in the transmission direction is external memory, the data in the data buffer is reassembled according to the data reassembly parameters in the DMA transfer instruction, and the reassembled format is forwarded to the downstream storage in the transmission direction, specifically as follows:

[0025] The data in the data buffer is restructured and converted according to the data reassembly quantity and data reassembly rules in the data reassembly parameters of the DMA transfer instruction;

[0026] Generate new formatted data;

[0027] It is sent to at least one on-chip local memory in the form of unicast and / or broadcast.

[0028] According to a second aspect of the present invention, a DMA memory access device supporting online data reassembly is provided, comprising:

[0029] DMA engine;

[0030] Preprocessing module: When the DMA engine receives a DMA transfer command, it determines whether there is a data reassembly instruction in the DMA transfer command, and if there is a data reassembly instruction, it obtains the data transfer direction and data reassembly parameter information in the DMA transfer command;

[0031] Access request sending module: used by the DMA engine to parse and split the received DMA instructions into at least one access request and send it to the upstream storage in the transmission direction;

[0032] Cache module: Used to store the response data in the data buffer inside the DMA engine when the DMA engine receives access response data from the upstream storage;

[0033] Reassembly and conversion module: When the data buffer has collected all the data in the current DMA transfer instruction, it reassembles the data in the data buffer according to the data reassembly parameters in the DMA transfer instruction;

[0034] Forwarding module: Used to forward the reassembled format to downstream storage in the transmission direction.

[0035] According to a third aspect of the present invention, an electronic device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method steps of any of the first aspects described above.

[0036] According to a fourth aspect of the present invention, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the method steps of any one of the first aspects described above.

[0037] The beneficial effects of this invention are as follows:

[0038] This invention provides a DMA memory access method and apparatus that supports online data reorganization. It eliminates the need to add a data reorganization function module to the on-chip local memory, supports online data reorganization, makes the data reorganization process transparent to the computing core, provides convenience and flexibility for programmers, improves data access efficiency, and reduces the implementation cost and power consumption of data format conversion. Attached Figure Description

[0039] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In these drawings, similar reference numerals are used to denote similar elements. The drawings described below are some embodiments of the invention, but not all embodiments. Other drawings will be readily available to those skilled in the art based on these drawings without any inventive effort.

[0040] Figure 1 This is a flowchart of a DMA memory access method supporting online data reassembly according to an embodiment of the present invention;

[0041] Figure 2 This is a schematic diagram of the module connection of a DMA memory access device that supports online data reassembly according to an embodiment of the present invention. Detailed Implementation

[0042] To more clearly illustrate the technical solutions in the embodiments of the present invention and the prior art, the specific implementation methods of the present invention will be described below with reference to the accompanying drawings. Obviously, the accompanying drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings and other implementation methods can be obtained based on these drawings without any creative effort. Furthermore, the design orientation only indicates the relative positional relationship between the components, not the absolute positional relationship.

[0043] Example 1

[0044] like Figure 1 As shown, according to a first aspect of the present invention, a DMA memory access method supporting online data reassembly is proposed, comprising:

[0045] S101: When the DMA engine receives a DMA transfer instruction, it determines whether there is a data reassembly instruction in the DMA transfer instruction. If so, it obtains the data transfer direction and data reassembly parameter information in the DMA transfer instruction.

[0046] In general, in this embodiment of the invention, the DMA transfer instruction is sent by the processor core containing the on-chip local memory. The initiator is the programmer or the transfer program. The DMA transfer instruction reaches the processor core, and the processor core then sends the DMA transfer instruction to the DMA engine.

[0047] When the DMA transfer command arrives at the DMA engine, the DMA engine does not directly perform the DMA transfer. Instead, it first determines whether there is a data reassembly instruction in the DMA transfer command. If there is a data reassembly instruction, it also needs to obtain the data transfer direction and data reassembly parameter information in the DMA transfer command and execute step S102.

[0048] In this embodiment of the invention, the data transmission direction includes: transmission from on-chip local memory to external memory and transmission from external memory to on-chip local memory;

[0049] DMA data transfer occurs from upstream storage to downstream storage.

[0050] Therefore, when the data transfer direction is from on-chip local memory to external memory, the upstream storage in the transfer direction is on-chip local memory, and the downstream storage in the transfer direction is external memory.

[0051] Conversely, when the data transfer direction is from external memory to on-chip local memory, the upstream storage in the transfer direction is external memory, and the downstream storage in the transfer direction is on-chip local memory.

[0052] In this embodiment of the invention, the data recombination parameters include: the number of data recombinations, the type of data recombination, and the data recombination rules.

[0053] S102: The DMA engine parses the received DMA instruction and splits it into at least one access request, which is then sent to the upstream storage in the transmission direction.

[0054] In this embodiment of the invention, the DMA engine parses the received DMA instructions and splits them into at least one access request, which is then sent to the upstream storage in the transmission direction. The number of access requests is the number of data reassemblies, and each access request retrieves one cache line of data.

[0055] When the upstream of the transmission direction is stored in external memory:

[0056] The DMA engine parses and breaks down the received DMA instructions into at least one access request and sends it to external memory. The number of access requests is the number of data reassemblies. Each access request retrieves one cache line of data. The external memory addresses can be non-contiguous.

[0057] S103: When the DMA engine receives access response data from the upstream storage, it stores the response data in the data buffer inside the DMA engine.

[0058] In this embodiment of the invention, when the DMA engine receives access response data sent from the upstream storage in the transmission direction, each response returns a cache line of data, and the response data is stored in the data buffer inside the DMA engine according to the rules of the cache line data.

[0059] When the upstream of the transmission direction is stored in external memory:

[0060] When the DMA engine receives access response data from external memory, it returns a cache line of data for each response. The order in which responses are returned is not necessarily the order in which requests are sent. The response data is stored in the DMA engine's internal data buffer according to the rules of cache line data.

[0061] S104: When the data buffer has collected all the data in the current DMA transfer instruction, the data in the data buffer is reassembled according to the data reassembly parameters in the DMA transfer instruction, and the reassembled format is forwarded to the downstream storage in the transfer direction.

[0062] In this embodiment of the invention, when the number of response data stored in the data buffer is equal to the number of access requests, the data buffer collects all the data in this DMA transfer instruction.

[0063] In this embodiment of the invention, the data in the data buffer is reassembled according to the data reassembly parameters in the DMA transfer instruction, and the reassembled format is forwarded to downstream storage in the transmission direction, specifically as follows:

[0064] The data in the data buffer is restructured and converted according to the data reassembly quantity and data reassembly rules in the data reassembly parameters of the DMA transfer instruction; new format data is generated; and the data is sent to the downstream storage in the transmission direction in the form of unicast and / or broadcast.

[0065] It should be noted that when executing step S101, if there is no data reassembly instruction in the DMA transfer command, then a simple DMA data transfer is performed directly. When executing step S104, when the data buffer has collected all the data in this DMA transfer command, all the data is forwarded directly to the downstream storage in the transfer direction.

[0066] In summary, when the upstream storage in the transmission direction is external memory:

[0067] When executing step S102, the DMA engine parses the received DMA instruction and splits it into at least one access request and sends it to the external memory. The number of access requests is the number of data reassemblies, and each access request takes one cache line of data.

[0068] When executing step S103, when the DMA engine receives access response data from the external memory, each response returns a cache line of data, and the response data is stored in the data buffer inside the DMA engine according to the rules of the cache line data.

[0069] Furthermore, when executing step S104, when the number of response data stored in the data buffer is equal to the number of access requests, the data buffer collects all the data in this DMA transfer instruction. At this time, the data in the data buffer is restructured and converted according to the number of data reassemblies and the data reassembly rules in the data reassembly parameters of the DMA transfer instruction; new format data is generated; and sent to the on-chip local memory in the form of unicast and / or broadcast.

[0070] At this point, downstream storage in the transmission direction is on-chip local memory, and new format data can be sent to one or more on-chip local memories simultaneously.

[0071] Conversely, when the upstream storage in the transmission direction is on-chip local memory:

[0072] When executing step S102, the DMA engine parses the received DMA instruction and splits it into at least one access request and sends it to the on-chip local memory. The number of access requests is the number of data reassemblies, and each access request takes one cache line of data.

[0073] When executing step S103, when the DMA engine receives access response data from the on-chip local memory, each response returns a cache line of data, and the response data is stored in the data buffer inside the DMA engine according to the rules of cache line data.

[0074] Furthermore, when executing step S104, when the number of response data stored in the data buffer is equal to the number of access requests, the data buffer collects all the data in this DMA transfer instruction. At this time, the data in the data buffer is reformatted and converted according to the data reassembly quantity and data reassembly rules in the data reassembly parameters of the DMA transfer instruction; new format data is generated and sent to the external memory.

[0075] This invention provides a DMA memory access method and apparatus that supports online data reorganization. It eliminates the need to add a data reorganization function module to the on-chip local memory, supports online data reorganization, makes the data reorganization process transparent to the computing core, provides convenience and flexibility for programmers, improves data access efficiency, and reduces the implementation cost and power consumption of data format conversion.

[0076] Example 2

[0077] like Figure 2 As shown, according to a second aspect of the present invention, a DMA memory access device supporting online data reassembly is provided, comprising:

[0078] DMA engine;

[0079] Preprocessing module: When the DMA engine receives a DMA transfer command, it determines whether there is a data reassembly instruction in the DMA transfer command, and if there is a data reassembly instruction, it obtains the data transfer direction and data reassembly parameter information in the DMA transfer command;

[0080] Access request sending module: used by the DMA engine to parse and split the received DMA instructions into at least one access request and send it to the upstream storage in the transmission direction;

[0081] Cache module: Used to store the response data in the data buffer inside the DMA engine when the DMA engine receives access response data from the upstream storage;

[0082] Reassembly and conversion module: When the data buffer has collected all the data in the current DMA transfer instruction, it reassembles the data in the data buffer according to the data reassembly parameters in the DMA transfer instruction;

[0083] Forwarding module: Used to forward the reassembled format to downstream storage in the transmission direction.

[0084] It is understood that the apparatus provided in the embodiments of the present invention is applicable to the method described in Embodiment 1, and the specific functions of each module can be referred to the above method flow, which will not be repeated here.

[0085] Example 3

[0086] According to a third aspect of the present invention, an electronic device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method steps described in Embodiment 1 above.

[0087] The electronic device is used to implement the method described in Embodiment 1. The electronic device may include: at least one central processing unit, at least one network interface, a control interface, a memory, and at least one communication bus.

[0088] The communication bus is used to enable communication and information exchange between the various components.

[0089] The network interface may include a standard wired interface or a wireless interface (such as a Wi-Fi interface).

[0090] The control interface is used to output control operations according to instructions.

[0091] The central processing unit (CPU) may include one or more processing cores. The CPU connects to various parts of the terminal via various interfaces and lines, and executes instructions, programs, code sets, or instruction sets stored in memory, as well as calling data stored in memory, to perform various functions of the terminal and process data according to the method described in Embodiment 1.

[0092] The memory may include random access memory (RAM) or read-only memory. Optionally, the memory may include non-transitory computer-readable storage medium. The memory can be used to store instructions, programs, code, code sets, or instruction sets. The memory may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the methods described in Embodiment 1 above, etc.; the data storage area may store data involved in the various method embodiments above, etc.

[0093] A fourth aspect of the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method described in Embodiment 1 above. The computer-readable storage medium may include, but is not limited to, any type of disk, including floppy disks, optical disks, DVDs, CD-ROMs, microdrives, as well as magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic cards or optical cards, nanosystems (including molecular memory ICs), or any type of medium or device suitable for storing instructions and / or data.

[0094] This invention provides a DMA memory access method and apparatus that supports online data reorganization. It eliminates the need to add a data reorganization function module to the on-chip local memory, supports online data reorganization, makes the data reorganization process transparent to the computing core, provides convenience and flexibility for programmers, improves data access efficiency, and reduces the implementation cost and power consumption of data format conversion.

[0095] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0096] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0097] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some service interface; the indirect coupling or communication connection between devices or units may be electrical or other forms.

[0098] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0099] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0100] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0101] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0102] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0103] The foregoing description is merely an exemplary embodiment of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Those skilled in the art will readily conceive of embodiments of this disclosure upon considering the specification and practicing the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not described herein. The specification and embodiments are to be considered exemplary only, and the scope and spirit of this disclosure are defined by the claims.

Claims

1. A DMA access method supporting data online reorganization, characterized in that, include: When the DMA engine receives a DMA transfer command, it determines whether there is a data reassembly instruction in the DMA transfer command. If so, it obtains the data transfer direction and data reassembly parameter information in the DMA transfer command. The data reassembly parameters include the number of data reassemblies, the data reassembly type, and the data reassembly rules. The DMA engine parses the received DMA instructions and splits them into at least one access request, which is then sent to the upstream storage in the transmission direction. The number of access requests is the number of data reassemblies, and each access request retrieves one cache line of data. When the DMA engine receives access response data from the upstream storage, it stores the response data in the data buffer inside the DMA engine. When the amount of response data stored in the data buffer equals the number of access requests, the data buffer collects all the data in this DMA transfer instruction, reassembles the data in the data buffer according to the data reassembly parameters in the DMA transfer instruction, and forwards the reassembled format to the downstream storage in the transmission direction. Data transfer directions include transfer from on-chip local memory to external memory and transfer from external memory to on-chip local memory; When the data transfer direction is from on-chip local memory to external memory, the upstream storage in the transfer direction is on-chip local memory, and the downstream storage in the transfer direction is external memory; When the data transfer direction is from external memory to on-chip local memory, the upstream storage in the transfer direction is external memory, and the downstream storage in the transfer direction is on-chip local memory. When the upstream of the transmission direction is stored in external memory: The data in the data buffer is reformatted and converted according to the data reassembly quantity and data reassembly rules in the data reassembly parameters of the DMA transfer instruction, generating new format data, which is then sent to the on-chip local memory in the form of unicast and / or broadcast.

2. The DMA memory access method supporting online data reassembly according to claim 1, characterized in that, DMA transfer commands are sent by the processor core, which stores on-chip local memory.

3. A DMA access device supporting data online reorganization, characterized in that, include: DMA engine; Preprocessing module: When the DMA engine receives a DMA transfer instruction, it determines whether there is a data reassembly instruction in the DMA transfer instruction, and if there is a data reassembly instruction, it obtains the data transfer direction and data reassembly parameter information in the DMA transfer instruction. The data reassembly parameters include the number of data reassemblies, the data reassembly type, and the data reassembly rules. Access request sending module: used by the DMA engine to parse and split the received DMA instructions into at least one access request and send it to the upstream storage in the transmission direction. The number of access requests is the number of data reassemblies. Each access request takes one cache line of data. Cache module: Used to store the response data in the data buffer inside the DMA engine when the DMA engine receives access response data from the upstream storage; Reassembly and conversion module: When the amount of response data stored in the data buffer equals the number of access requests, the data buffer collects all the data in this DMA transfer instruction and reassembles the data in the data buffer according to the data reassembly parameters in the DMA transfer instruction; Forwarding module: Used to forward the reassembled format to downstream storage in the transmission direction; Among them, the data transmission direction includes transmission from on-chip local memory to external memory and transmission from external memory to on-chip local memory; When the data transfer direction is from on-chip local memory to external memory, the upstream storage in the transfer direction is on-chip local memory, and the downstream storage in the transfer direction is external memory; When the data transfer direction is from external memory to on-chip local memory, the upstream storage in the transfer direction is external memory, and the downstream storage in the transfer direction is on-chip local memory. When the upstream of the transmission direction is stored in external memory: The reassembly and conversion module reassembles and converts the data in the data buffer according to the data reassembly quantity and data reassembly rules in the data reassembly parameters of the DMA transfer instruction, generating new format data; the forwarding module sends it to the on-chip local memory in the form of unicast and / or broadcast.

4. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of a DMA memory access method that supports online data reassembly as described in any one of claims 1 to 2.

5. A computer-readable storage medium having stored thereon a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of a DMA memory access method that supports online data reassembly as described in any one of claims 1 to 2.

Citation Information

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