A system and method for adaptive data communication between master and slave MCUs through two interfaces
Patent Information
- Application Number
- CN202211021499.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-08-24
- Publication Date
- 2026-11-03
- Estimated Expiration
- 2042-08-24
AI Technical Summary
Existing UART extension IC solutions suffer from limited buffering, lack of data verification capabilities, high dependence on MCUs, and lack of recovery mechanisms during data transmission, leading to data loss and device unavailability issues.
A dual-interface adaptive data communication system between master and slave MCUs is adopted. Through the UART transceiver module, data scheduling and verification module of the master and slave MCUs, combined with dual-channel UART backup and heartbeat information mechanism, the system realizes the validity judgment of data and load balancing, and performs reset and recovery in abnormal situations.
It solves the data loss problem, ensures data validity and normal equipment operation, achieves load balancing and high-reliability communication when one UART fails, and has a reset and recovery mechanism.
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Figure CN115328840B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data communication technology, and specifically to a system and method for adaptive data communication between master and slave MCUs with dual interfaces. Background Technology
[0002] Serial communication is frequently used in development. As the name suggests, serial communication refers to the transmission of data bit by bit along a single data line, from low to high bits. Microcontrollers typically use UART or USART for serial communication. UART / USART is used in many DIY electronics projects to connect GPS modules, Bluetooth modules, RFID reader modules, etc., to Raspberry Pi, Arduino, or other microcontrollers.
[0003] In some application scenarios, the MCU may lack sufficient UART interfaces. This necessitates the use of UART expansion functionality. Existing UART expansion typically utilizes expansion ICs that extend multiple UART channels via I2C or SPI high-speed interfaces, such as the undeveloped WK21 series chips (e.g.,...). Figure 1 (As shown).
[0004] However, the IC expansion solution has certain drawbacks, mainly in the following aspects:
[0005] A. The extended IC buffer has limited capacity, which can lead to data loss during large-scale data transmission and reception.
[0006] B. Lack of data validation and analysis capabilities prevents preliminary data processing, leading to the forwarding of invalid data.
[0007] C. The MCU is highly dependent on the digital interface with the WK21. If there is congestion during data transmission or physical damage, all peripherals will become unusable, and there is no recovery mechanism design. Summary of the Invention
[0008] This invention provides a system and method for adaptive data communication between master and slave MCUs with dual interfaces, which effectively solves the problem of certain drawbacks in existing IC expansion schemes.
[0009] To achieve the above objectives, the present invention employs the following technical solution:
[0010] A system for adaptive data communication between a master and slave MCU with dual interfaces includes a master MCU system and a slave MCU system connected via a RESET interface;
[0011] The main MCU system includes a main MCU data scheduling module, a main MCU UART1 transceiver module, a main MCU UART2 transceiver module, and a main reset module. The main MCU UART1 and UART2 transceiver modules are both connected to the main MCU data scheduling module.
[0012] The slave MCU system includes a slave MCU data transceiver module, a slave MCU data verification module, a slave MCU data scheduling module, a slave MCU UART1 transceiver module, and a slave MCU UART2 transceiver module connected in sequence. The slave MCU UART1 and UART2 transceiver modules are connected to the master MCU UART1 and UART2 transceiver modules respectively via UART communication. The slave MCU system also includes a slave reset module, which is connected to the master reset module.
[0013] As a preferred option of the above scheme, the UART transceiver module includes a UART serial port, a receive buffer, and a transmit buffer.
[0014] A method for adaptive data communication between master and slave MCUs using dual interfaces includes:
[0015] S1. The main MCU sends data to external devices.
[0016] S11. The main MCU receives the data request from the service layer, packages the data and adds a header ID, which is the data channel of the peripheral device.
[0017] S12. The main MCU calculates the data bits to obtain the check bit and puts the check bit into the data packet;
[0018] S13. The main MCU first determines which of the UART1 and UART2 transmit buffers is more idle, and selects the more idle one to push the data to the corresponding buffer.
[0019] S14. Receive data from the main MCU from the device's UART1 or UART2;
[0020] S15. The MCU checks the validity of the data using the check bit. If it is an error message, it is discarded.
[0021] S16. The MCU determines which peripheral interface needs to distribute the data to based on the header ID.
[0022] S2, External devices send data to the main MCU
[0023] S21. Obtain data from the peripheral device from the MCU and add a header ID to identify where the data came from;
[0024] S22. Calculate the check bit from the data from the MCU and add it to the data packet;
[0025] S23. The MCU determines the channel that needs to be transmitted based on the current busy status of UART1 and UART2, and pushes the data to the corresponding transmit buffer.
[0026] S24. The main MCU receives data from UART1 or UART2;
[0027] S25. The main MCU checks the validity of the information and discards it if there is an error.
[0028] S26. The business layer determines the information source of the peripheral device based on the header ID and updates the business logic.
[0029] As a preferred option of the above scheme, it also includes:
[0030] S3, System RESET
[0031] S31. Start a timer from the MCU;
[0032] S32. The master and slave MCUs agree on a fixed time interval for heartbeat information;
[0033] S33. The master device sends a heartbeat message at regular intervals.
[0034] S34. When a heartbeat message is received from the MCU, the reset counter is cleared to 0.
[0035] S35. If no heartbeat information is received from the main MCU within the specified time, the UART communication is considered abnormal, and the main MCU is restarted through the RESET interface.
[0036] Due to the above structure, the beneficial effects of the present invention are as follows:
[0037] 1. This application solves the problem of caching large amounts of data by using a slave MCU with large RAM and multiple UARTs;
[0038] 2. This application has a high-speed main frequency, which can preprocess the data to be distributed, ensuring the validity of the data;
[0039] 3. This application uses dual UARTs to communicate with the main MCU. The UARTs back each other up, which can share the line communication load and ensure the normal operation of external devices even if one of them fails.
[0040] 4. This application provides a reserved reset interface, which allows the slave MCU to reset the master MCU and restart it in case the master MCU crashes or malfunctions. Attached Figure Description
[0041] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below.
[0042] Figure 1 This is a schematic diagram of the existing technology that uses an expansion IC to expand the UART interface;
[0043] Figure 2 This is a system hardware core architecture diagram of a dual-interface adaptive data communication system between master and slave MCUs according to the present invention;
[0044] Figure 3 This is a system architecture block diagram of a dual-interface adaptive data communication system between master and slave MCUs according to the present invention;
[0045] Figure 4 This is a flowchart of a method for adaptive data communication between master and slave MCUs using dual interfaces, according to the present invention. Detailed Implementation
[0046] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.
[0047] like Figure 2 , Figure 3 As shown, this embodiment provides a system for adaptive data communication between a master and slave MCU with dual interfaces, including a master MCU system and a slave MCU system, which are connected through a RESET interface;
[0048] The main MCU system includes a main MCU data scheduling module, a main MCU UART1 transceiver module, a main MCU UART2 transceiver module, and a main reset module. The main MCU UART1 and UART2 transceiver modules are both connected to the main MCU data scheduling module.
[0049] The slave MCU system includes a slave MCU data transceiver module, a slave MCU data verification module, a slave MCU data scheduling module, a slave MCU UART1 transceiver module, and a slave MCU UART2 transceiver module connected in sequence. The slave MCU UART1 and UART2 transceiver modules are connected to the master MCU UART1 and UART2 transceiver modules respectively via UART communication. The slave MCU system also includes a slave reset module, which is connected to the master reset module.
[0050] In this embodiment, the UART transceiver modules (the UART1 transceiver module of the main MCU, the UART2 transceiver module of the main MCU, and the UART1 and UART2 transceiver modules of the slave MCU) all include a UART serial port, a receive buffer, and a transmit buffer.
[0051] like Figure 4 As shown, this embodiment also provides a method for adaptive data communication between master and slave MCUs using dual interfaces, including:
[0052] S1. The main MCU sends data to external devices.
[0053] S11. The main MCU receives the data request from the service layer, packages the data and adds a header ID, which is the data channel of the peripheral device.
[0054] S12. The main MCU calculates the data bits to obtain the check bit and puts the check bit into the data packet;
[0055] S13. The main MCU first determines which of the UART1 and UART2 transmit buffers is more idle, and selects the more idle one to push the data to the corresponding buffer.
[0056] S14. Receive data from the main MCU from the device's UART1 or UART2;
[0057] S15. The MCU checks the validity of the data using the check bit. If it is an error message, it is discarded.
[0058] S16. The MCU determines which peripheral interface needs to distribute the data to based on the header ID.
[0059] S2, External devices send data to the main MCU
[0060] S21. Obtain data from the peripheral device from the MCU and add a header ID to identify where the data came from;
[0061] S22. Calculate the check bit from the data from the MCU and add it to the data packet;
[0062] S23. The MCU determines the channel that needs to be transmitted based on the current busy status of UART1 and UART2, and pushes the data to the corresponding transmit buffer.
[0063] S24. The main MCU receives data from UART1 or UART2;
[0064] S25. The main MCU checks the validity of the information and discards it if there is an error.
[0065] S26. The business layer determines the information source of the peripheral device based on the header ID and updates the business logic.
[0066] In this embodiment, it also includes:
[0067] S3, System RESET
[0068] S31. Start a timer reset timer from the MCU;
[0069] S32. The master and slave MCUs agree on a fixed time interval for heartbeat information;
[0070] S33. The master device sends a heartbeat message at regular intervals.
[0071] S34. When a heartbeat message is received from the MCU, the reset counter is cleared to 0.
[0072] S35. If no heartbeat information is received from the main MCU within the specified time, the UART communication is considered abnormal, and the main MCU is restarted through the RESET interface.
[0073] This application achieves load balancing and ensures normal data communication even if one UART fails. By introducing heartbeat information, it ensures that the slave MCU is reset within a short time when both UARTs fail simultaneously, returning to a power-on state, thus guaranteeing high reliability and a recoverable mechanism for the data path. Through a data pre-verification mechanism, the validity of the data is judged in advance, and invalid data can be removed in advance, reducing invalid processing.
[0074] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A system for adaptive data communication between master and slave MCUs using dual interfaces, characterized in that: This includes a master MCU system and a slave MCU system, connected via a RESET interface; The main MCU system includes a main MCU data scheduling module, a main MCU UART1 transceiver module, a main MCU UART2 transceiver module, and a main reset module. The main MCU UART1 and UART2 transceiver modules are both connected to the main MCU data scheduling module. The slave MCU system includes a slave MCU data transceiver module, a slave MCU data verification module, a slave MCU data scheduling module, a slave MCU UART1 transceiver module, and a slave MCU UART2 transceiver module connected in sequence. The slave MCU UART1 and UART2 transceiver modules are connected to the master MCU UART1 and UART2 transceiver modules respectively via UART communication. The slave MCU system also includes a slave reset module, which is connected to the master reset module.
2. The system for adaptive data communication between master and slave MCUs with dual interfaces according to claim 1, characterized in that: UART transceiver modules all include a UART serial port, a receive buffer, and a transmit buffer.
3. A method for adaptive data communication between master and slave MCUs using dual interfaces, based on the system implementation of adaptive data communication between master and slave MCUs according to claim 1 or 2, characterized in that: include: S1. The main MCU sends data to external devices; S11. The main MCU receives the data request from the service layer, packages the data and adds a header ID, which is the data channel of the peripheral device. S12. The main MCU calculates the data bits to obtain the check bit and puts the check bit into the data packet; S13. The main MCU first determines which of the UART1 and UART2 transmit buffers is more idle, and selects the more idle one to push the data to the corresponding buffer. S14. Receive data from the main MCU from the device's UART1 or UART2; S15. The MCU checks the validity of the data using the check bit. If it is an error message, it is discarded. S16. The MCU determines which peripheral interface to distribute the data to based on the header ID. S2. The external device sends data to the main MCU. S21. Obtain data from the peripheral device from the MCU and add a header ID to identify where the data came from; S22. Calculate the check bit from the data from the MCU and add it to the data packet; S23. The MCU determines the channel that needs to be transmitted based on the current busy status of UART1 and UART2, and pushes the data to the corresponding transmit buffer. S24. The main MCU receives data from UART1 or UART2; S25. The main MCU checks the validity of the information and discards it if there is an error. S26. The business layer determines the information source of the peripheral device based on the header ID and updates the business logic.
4. The method for adaptive dual-interface data communication between master and slave MCUs according to claim 3, characterized in that: Also includes: S3, System RESET reset; S31. Start a timer from the MCU; S32. The master and slave MCUs agree on a fixed time interval for heartbeat information; S33. The master device sends a heartbeat message at regular intervals. S34. When a heartbeat message is received from the MCU, the reset counter is cleared to 0. S35. If no heartbeat information is received from the main MCU within the specified time, the UART communication is considered abnormal, and the main MCU is restarted through the RESET interface.
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