Display panel and display device

Abstract

A display panel and a display device are provided. The display panel includes: a substrate; a plurality of light-emitting elements, and a plurality of pixel circuits. The plurality of pixel circuits include a plurality of groups of pixel circuits, at least one of the plurality of groups of pixel circuits includes a plurality of first-type pixel circuits and a plurality of second-type pixel circuits, the plurality of second-type pixel circuits are spaced and distributed between the plurality of first-type pixel circuits, at least one of the plurality of second-type pixel circuits is connected to at least one of the plurality of second-region light-emitting elements through at least one of the plurality of conductive lines; the plurality of conductive lines include a plurality of first conductive lines and a plurality of second conductive lines, and in at least one group of light-emitting elements and at least one group of pixel circuits, the plurality of first pixel circuits connected to the plurality of first light-emitting elements are closer to the second display area than each of the plurality of second pixel circuits connected to the plurality of second light-emitting elements.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to PCT patent application No. PCT / CN2021 / 080494 filed on March 12, 2021. The contents disclosed in the above PCT patent application are hereby cited in their entirety as part of this application. Technical Field

[0003] At least one embodiment of the present disclosure relates to a display panel and a display device. Background Art

[0004] With the continuous development of display technology, active-matrix organic light-emitting diode (AMOLED) display technology has been increasingly used in display devices such as mobile phones, tablet computers, digital cameras, etc. due to its advantages such as self-luminescence, wide viewing angle, high contrast, low power consumption, and high response speed.

[0005] The under-screen camera technology is a new technology proposed to increase the screen-to-body ratio of display devices. Summary of the invention

[0006] At least one embodiment of the present disclosure relates to a display panel and a display device.

[0007] At least one embodiment of the present disclosure provides a display panel, comprising: a substrate, a plurality of light-emitting elements, a plurality of pixel circuits, and a plurality of conductive lines, wherein the substrate has a first display area and a second display area, wherein the first display area is located at least on one side of the second display area; the plurality of light-emitting elements are located in the first display area and the second display area, the plurality of light-emitting elements include a plurality of groups of light-emitting elements, the light-emitting elements in each group of the plurality of groups of light-emitting elements are arranged along a first direction, the plurality of groups of light-emitting elements are arranged along a second direction, at least one group of the plurality of groups of light-emitting elements includes a plurality of first-area light-emitting elements and a plurality of second-area light-emitting elements, the plurality of first-area light-emitting elements are located in the first display area, the plurality of second-area light-emitting elements are arranged along a second direction, The device is located in the second display area; the plurality of pixel circuits are located in the first display area, the plurality of pixel circuits include a plurality of groups of pixel circuits, the pixel circuits in each group of the plurality of groups of pixel circuits are arranged along the first direction, the plurality of groups of pixel circuits are arranged along the second direction, at least one group of the plurality of groups of pixel circuits includes a plurality of first-type pixel circuits and a plurality of second-type pixel circuits, the plurality of second-type pixel circuits are distributed between the plurality of first-type pixel circuits at intervals, at least one first-type pixel circuit of the plurality of first-type pixel circuits is connected to at least one first-region light-emitting element of the plurality of first-region light-emitting elements, and the at least one first-type pixel circuit is on the substrate The orthographic projection of the at least one first-region light-emitting element at least partially overlaps with the orthographic projection of the at least one first-region light-emitting element on the substrate; at least one second-type pixel circuit among the plurality of second-type pixel circuits is connected to at least one second-region light-emitting element among the plurality of second-region light-emitting elements through at least one conductive line among a plurality of conductive lines; the plurality of second-region light-emitting elements include a plurality of first light-emitting elements and a plurality of second light-emitting elements, the first light-emitting elements are configured to emit a first color light, the second light-emitting elements are configured to emit a second color light, the plurality of second-type pixel circuits include a plurality of first pixel circuits and a plurality of second pixel circuits, the plurality of conductive lines include a plurality of first conductive lines and a plurality of second conductive lines, the plurality of first light-emitting elements The device is connected to the multiple first pixel circuits through the multiple first conductive lines, and the multiple second light-emitting elements are connected to the multiple second pixel circuits through the multiple second conductive lines. In the at least one group of light-emitting elements and the at least one group of pixel circuits, the multiple first pixel circuits connected to the multiple first light-emitting elements are closer to the second display area than each of the multiple second pixel circuits connected to the multiple second light-emitting elements. The display panel includes a first transparent conductive pattern layer and a second transparent conductive pattern layer. At least one first conductive line among the multiple first conductive lines is located in the second transparent conductive pattern layer, and at least one second conductive line among the multiple second conductive lines is located in the first transparent conductive pattern layer.

[0008] According to an embodiment of the present disclosure, there is provided a display panel, wherein the plurality of conductive lines are located between the plurality of light emitting elements and the plurality of pixel circuits in a direction perpendicular to a main surface of the base substrate.

[0009] According to an embodiment of the present disclosure, a display panel is provided, wherein at least one second conductive line close to the center of the second display area crosses over at least two groups of light emitting elements in the second direction.

[0010] According to an embodiment of the present disclosure, a display panel is provided, wherein at least one second conductive line close to a center of the second display area extends from the second display area to the first display area in the second direction.

[0011] According to an embodiment of the present disclosure, a display panel is provided, wherein the first conductive wires are conductive wires of an integrated structure, and the second conductive wires are conductive wires of an integrated structure.

[0012] According to an embodiment of the present disclosure, a display panel is provided, wherein the plurality of second-area light-emitting elements further include a plurality of third light-emitting elements, the third light-emitting elements being configured to emit a third color light, the plurality of second-type pixel circuits further include a plurality of third pixel circuits, the plurality of conductive lines further include a plurality of third conductive lines, the plurality of third light-emitting elements are connected to the plurality of third pixel circuits through the plurality of third conductive lines, and in the at least one group of light-emitting elements and the at least one group of pixel circuits, the plurality of first pixel circuits connected to the plurality of first conductive lines are closer to the second display area than each of the plurality of third pixel circuits connected to the plurality of third conductive lines, a portion of the plurality of third conductive lines are located in the first transparent conductive pattern layer, and another portion of the plurality of third conductive lines are located in the second transparent conductive pattern layer.

[0013] According to an embodiment of the present disclosure, a display panel is provided, wherein at least one third conductive line close to the center of the second display area crosses over at least two groups of light emitting elements in the second direction.

[0014] According to an embodiment of the present disclosure, a display panel is provided, wherein at least one third conductive line close to the center of the second display area extends from the second display area to the first display area in the second direction.

[0015] According to an embodiment of the present disclosure, a display panel is provided, in which, in the at least one group of light-emitting elements and the at least one group of pixel circuits, a first conductive line connected to the group of light-emitting elements is located on a first side of the group of light-emitting elements, and a second conductive line and a third conductive line connected to the group of light-emitting elements are located on a second side of the group of light-emitting elements, and the first side and the second side are opposite sides of the group of light-emitting elements.

[0016] According to an embodiment of the present disclosure, a display panel is provided, wherein at least one of the multiple groups of pixel circuits includes a dummy pixel circuit, wherein the dummy pixel circuit is located between two second-type pixel circuits in the first direction, and the orthographic projection of at least one of a second conductive line near the center of the second display area and a third conductive line near the center of the second display area on the substrate overlaps with the orthographic projection of the dummy pixel circuit on the substrate.

[0017] According to an embodiment of the present disclosure, a display panel is provided, wherein the third conductive wire is a conductive wire of an integrated structure.

[0018] According to an embodiment of the present disclosure, a display panel is provided, which also includes a planarization layer, the light-emitting element includes a first electrode, a second electrode and a light-emitting functional layer located between the first electrode and the second electrode, the first electrode is closer to the base substrate than the second electrode, the planarization layer is located between the first electrode of the light-emitting element and the pixel circuit, and the orthographic projection of the via in the planarization layer on the base substrate does not overlap with the orthographic projection of the dummy pixel circuit on the base substrate.

[0019] According to an embodiment of the present disclosure, a display panel is provided, wherein a second conductive line near the center of the second display area and a third conductive line near the center of the second display area include a first part, a second part, a third part, and a fourth part connected in sequence, the second part and the fourth part extend along the first direction, and the first part and the third part extend along the second direction.

[0020] According to an embodiment of the present disclosure, a display panel is provided, wherein an orthographic projection of the third portion on the base substrate overlaps with an orthographic projection of the dummy pixel circuit on the base substrate.

[0021] According to an embodiment of the present disclosure, a display panel is provided, wherein the fourth portion and the second portion are located on the same side of the third portion.

[0022] According to an embodiment of the present disclosure, a display panel is provided, wherein the fourth portion and the second portion are located on both sides of the third portion.

[0023] According to an embodiment of the present disclosure, a display panel is provided, wherein the plurality of second-area light-emitting elements further include a plurality of fourth light-emitting elements, the fourth light-emitting elements are configured to emit a fourth color light, the plurality of second-type pixel circuits further include a plurality of fourth pixel circuits, the plurality of conductive lines further include a plurality of fourth conductive lines, the plurality of fourth light-emitting elements are connected to the plurality of fourth pixel circuits through the plurality of fourth conductive lines, and among the at least one group of light-emitting elements and the at least one group of pixel circuits, the plurality of fourth pixel circuits connected to the plurality of fourth conductive lines are closer to the second display area than each of the plurality of second pixel circuits connected to the plurality of second conductive lines.

[0024] According to an embodiment of the present disclosure, a display panel is provided, wherein at least one group of light-emitting elements includes a first subgroup of light-emitting elements and a second subgroup of light-emitting elements, wherein the first subgroup of light-emitting elements is closer to an edge of the second display area than the second subgroup of light-emitting elements, or the second subgroup of light-emitting elements is closer to a center of the second display area than the first subgroup of light-emitting elements; the at least one group of light-emitting elements includes a first group of light-emitting elements, wherein in the first group of light-emitting elements, conductive lines connected to the second light-emitting elements and the third light-emitting elements in the first subgroup of light-emitting elements are all located in the first transparent conductive pattern layer, and conductive lines connected to the first light-emitting elements and the fourth light-emitting elements in the first subgroup of light-emitting elements are all located in the second transparent conductive pattern layer; conductive lines connected to the second light-emitting elements and the third light-emitting elements in the second subgroup of light-emitting elements are all located in the first transparent conductive pattern layer, and conductive lines connected to the first light-emitting elements and the fourth light-emitting elements in the second subgroup of light-emitting elements are all located in the second transparent conductive pattern layer.

[0025] According to an embodiment of the present disclosure, a display panel is provided, wherein the at least one group of light-emitting elements includes a second group of light-emitting elements, the first group of light-emitting elements is closer to the center of the second display area than the second group of light-emitting elements, and in the second group of light-emitting elements, the conductive lines connected to the light-emitting elements in the first subgroup of light-emitting elements are all located in the first transparent conductive pattern layer, and the conductive lines connected to the light-emitting elements in the second subgroup of light-emitting elements are all located in the second transparent conductive pattern layer.

[0026] According to an embodiment of the present disclosure, a display panel is provided, wherein the fourth conductive line is a conductive line with an integrated structure.

[0027] According to an embodiment of the present disclosure, a display panel is provided, wherein the first transparent conductive pattern layer is closer to the base substrate than the second transparent conductive pattern layer.

[0028] According to an embodiment of the present disclosure, a display panel is provided, and the second transparent conductive pattern layer is closer to the base substrate than the first transparent conductive pattern layer.

[0029] According to an embodiment of the present disclosure, a display panel is provided, wherein the second display area has a first symmetry axis extending along the first direction and a second symmetry axis extending along the second direction, and the plurality of conductive lines are axisymmetric with respect to the first symmetry axis and the second symmetry axis.

[0030] According to an embodiment of the present disclosure, a display panel is provided, in which two first-type pixel circuits are arranged between two adjacent second-type pixel circuits in the first direction.

[0031] According to an embodiment of the present disclosure, a display panel is provided, wherein an orthographic projection of a portion of the first conductive line extending along the first direction on the base substrate and an orthographic projection of a portion of the second conductive line extending along the first direction on the base substrate do not overlap.

[0032] According to an embodiment of the present disclosure, a display panel is provided, wherein the fourth light-emitting element and the first light-emitting element are configured to emit green light, one of the second light-emitting element and the third light-emitting element is configured to emit red light, and the other of the second light-emitting element and the third light-emitting element is configured to emit blue light.

[0033] According to an embodiment of the present disclosure, a display panel is provided, wherein a portion of the plurality of first conductive lines is located in the second transparent conductive pattern layer, and another portion of the plurality of first conductive lines is located in the first transparent conductive pattern layer.

[0034] At least one embodiment of the present disclosure further provides a display device, comprising any one of the above-mentioned display panels.

[0035] For example, the display device further includes a photosensor, and the photosensor is located on one side of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0037] Figure 1A It is a structural schematic diagram of a display panel provided by an embodiment of the present disclosure.

[0038] Figure 1B It is a structural schematic diagram of a display panel provided by an embodiment of the present disclosure.

[0039] Figure 2 is a schematic diagram of a pixel unit of a display panel provided in one embodiment of the present disclosure.

[0040] Figure 3is a schematic diagram of a display panel provided by an embodiment of the present disclosure.

[0041] Figure 4 A schematic diagram of a first display area and a second display area in a display panel provided in an embodiment of the present disclosure.

[0042] FIG. 5A to FIG. 5C A partial plan view of a display panel provided according to an embodiment of the present disclosure.

[0043] FIG. 5D to FIG. 5F It is a schematic diagram of the structure of a display panel provided in some embodiments of the present disclosure.

[0044] Figure 6 A schematic diagram of a light emitting element located in a second display area of ​​a display panel provided in an embodiment of the present disclosure.

[0045] Figure 7 A schematic diagram of a row of light-emitting elements located in a second display area of ​​a display panel and a second type of pixel circuit connected thereto is provided according to an embodiment of the present disclosure.

[0046] Figure 8 A schematic diagram of a row of light-emitting elements located in a second display area of ​​a display panel and a second type of pixel circuit connected thereto is provided according to an embodiment of the present disclosure.

[0047] Fig. 9 A schematic diagram of two rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure.

[0048] Fig.10 A schematic diagram of a plurality of rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure.

[0049] Fig.11 A schematic diagram of a plurality of rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure.

[0050] Fig.12 A schematic diagram of a first transparent conductive pattern layer, a light-emitting element, and a pixel circuit in a display panel provided in an embodiment of the present disclosure.

[0051] Fig.13 A schematic diagram of a second transparent conductive pattern layer, a light-emitting element and a pixel circuit in a display panel provided in an embodiment of the present disclosure.

[0052] Fig.14A schematic diagram of a plurality of rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure.

[0053] Fig.15 A schematic diagram of conductive lines located in a first transparent conductive pattern layer connected to multiple rows of light-emitting elements located in a second display area in a display panel provided in an embodiment of the present disclosure.

[0054] Fig.16 A schematic diagram of conductive lines located in a second conductive pattern layer connected to multiple rows of light emitting elements located in a second display area in a display panel provided in an embodiment of the present disclosure.

[0055] Fig.17 A schematic diagram of a plurality of rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure.

[0056] Fig.18 A schematic diagram of a first transparent conductive pattern layer in a display panel provided in an embodiment of the present disclosure.

[0057] Fig.19 A schematic diagram of a second transparent conductive pattern layer in a display panel provided in an embodiment of the present disclosure.

[0058] Fig. 20 A schematic diagram of a second transparent conductive pattern layer in a display panel provided in an embodiment of the present disclosure.

[0059] Fig.21 A schematic diagram of a first transparent conductive pattern layer in a display panel provided in an embodiment of the present disclosure.

[0060] Fig. 22 A schematic diagram of the layer structure of a display panel provided in one embodiment of the present disclosure.

[0061] Fig.23 A schematic diagram of the layer structure of a display panel provided in one embodiment of the present disclosure.

[0062] Fig.24 A schematic diagram of a first pixel unit in a display panel provided according to an embodiment of the present disclosure.

[0063] Fig.25 A schematic diagram of a second pixel unit in a display panel provided according to an embodiment of the present disclosure.

[0064] Fig.26 A cross-sectional view of a display panel.

[0065] Fig. 27 A schematic diagram of forming a photoresist pattern.

[0066] Fig.28 Schematic diagram of forming a conductive line.

[0067] Fig.29 A schematic diagram of a first type of pixel circuit in a first display area of ​​a display panel provided in an embodiment of the present disclosure.

[0068] Fig.30 for Fig.29 Schematic diagram of some membrane layers in .

[0069] Fig.31 A schematic diagram of a portion of film layers in a first type of pixel circuit in a first display area of ​​a display panel provided in an embodiment of the present disclosure.

[0070] Fig.32 A schematic diagram of a second type of pixel circuit in a first display area of ​​a display panel provided in an embodiment of the present disclosure.

[0071] Fig.33 for Fig.32 Schematic diagram of some membrane layers in .

[0072] Fig.34 A schematic diagram of a portion of film layers in a second type of pixel circuit in a first display area of ​​a display panel provided in an embodiment of the present disclosure.

[0073] Fig.35 A schematic diagram of a pixel circuit in a region with longitudinal conductive lines in a first display area of ​​a display panel provided in an embodiment of the present disclosure.

[0074] Fig.36 for Fig.35 Schematic diagram of some membrane layers in .

[0075] Fig.37 A schematic diagram of a portion of a film layer in a region having longitudinal conductive lines in a first display area of ​​a display panel provided in an embodiment of the present disclosure.

[0076] Fig.38 and Fig.39 A schematic diagram of a display device provided in accordance with an embodiment of the present disclosure.

[0077] Fig.40 The structural layout of the pixel circuit before and after compression is shown.

[0078] Fig.41 is a schematic diagram of a pixel unit in a display panel. DETAILED DESCRIPTION

[0079] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0080] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, "include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0081] With the development of display technology, the existing notch screen or water drop screen design is gradually unable to meet the user's demand for a high screen-to-body ratio of display panels, and a series of display panels with a light-transmitting display area have emerged. In this type of display panel, hardware such as light sensors (such as cameras) can be set in the light-transmitting display area. Since there is no need to punch holes, a true full screen becomes possible while ensuring the practicality of the display panel.

[0082] In the related art, a display panel with an under-screen camera generally includes a first display area for normal display and a second display area for setting the camera. The second display area generally includes: a plurality of light-emitting elements and a plurality of pixel circuits, each pixel circuit is connected to a light-emitting element and is used to drive the light-emitting element to emit light, and the interconnected pixel circuits and light-emitting elements overlap in a direction perpendicular to the display panel.

[0083] Since a pixel circuit is also disposed in the second display area in the related art, the light transmittance of the second display area is poor, and accordingly, the display effect of the display panel is poor.

[0084] Figure 1A It is a structural schematic diagram of a display panel provided by an embodiment of the present disclosure. Figure 1B is a schematic diagram of the structure of a display panel provided by an embodiment of the present disclosure. Figure 1A and Figure 1BAs shown, the display panel may include: a substrate BS. The display panel includes a first display area R1 and a second display area R2, and the first display area R1 may be located on at least one side of the second display area R2. For example, in some embodiments, the first display area R1 surrounds the second display area R2. That is, the second display area R2 may be surrounded by the first display area R1. The second display area R2 may also be set at other positions, and the setting position of the second display area R2 may be determined as required. For example, the second display area R2 may be located at the top center of the substrate BS, or at the upper left corner or upper right corner of the substrate BS. For example, hardware such as a photosensitive sensor (such as a camera) is set in the second display area R2 of the display panel. For example, the second display area R2 is a light-transmitting display area, and the first display area R1 is a display area. For example, the first display area R1 is opaque and is only used for display. Figure 1B It is shown that the first display area R1 includes the auxiliary area Ra.

[0085] Figure 2 FIG. 1 is a schematic diagram of a pixel unit of a display panel provided by an embodiment of the present disclosure. The display panel includes a pixel unit 100, and the pixel unit 100 is located on a substrate. Figure 2 As shown, the pixel unit 100 includes a pixel circuit 100a and a light emitting element 100b, and the pixel circuit 100a is configured to drive the light emitting element 100b. For example, the pixel circuit 100a is configured to provide a driving current to drive the light emitting element 100b to emit light. For example, the light emitting element 100b is an organic light emitting diode (OLED), and the light emitting element 100b emits red light, green light, blue light, or white light under the drive of its corresponding pixel circuit 100a. The color of the light emitted by the light emitting element 100b can be determined as required.

[0086] In order to improve the light transmittance of the second display area R2, only a light emitting element may be provided in the second display area R2, and a pixel circuit driving the light emitting element of the second display area R2 may be provided in the first display area R1. That is, the light transmittance of the second display area R2 is improved by separately providing the light emitting element and the pixel circuit. That is, the pixel circuit 100a is not provided in the second display area R2.

[0087] Figure 3 is a schematic diagram of a display panel provided by an embodiment of the present disclosure. Figure 3 As shown, the display panel includes: a plurality of first-type pixel circuits 10, a plurality of second-type pixel circuits 20 and a plurality of first-region light-emitting elements 30 located in the first display area R1, and a plurality of second-region light-emitting elements 40 located in the second display area R2. For example, the plurality of second-type pixel circuits 20 may be distributed between the plurality of first-type pixel circuits 10 at intervals.

[0088] For example, Figure 3As shown, at least one first-type pixel circuit 10 among the plurality of first-type pixel circuits 10 may be connected to at least one first-region light-emitting element 30 among the plurality of first-region light-emitting elements 30, and the orthographic projection of at least one first-type pixel circuit 10 on the substrate BS may at least partially overlap with the orthographic projection of at least one first-region light-emitting element 30 on the substrate BS. The at least one first-type pixel circuit 10 may be used to provide a driving signal to the connected first-region light-emitting element 30 to drive the first-region light-emitting element 30 to emit light.

[0089] For example, Figure 3 As shown, at least one second type of pixel circuit 20 among the plurality of second type pixel circuits 20 can be connected to at least one second area light emitting element 40 among the plurality of second area light emitting elements 40 through a conductive line L1, and the at least one second type of pixel circuit 20 can be used to provide a driving signal to the connected second area light emitting element 40 to drive the second area light emitting element 40 to emit light. Figure 3 As shown, since the second-region light-emitting element 40 and the second-type pixel circuit 20 are located in different regions, the orthographic projection of at least one second-type pixel circuit 20 on the substrate BS does not overlap with the orthographic projection of at least one second-region light-emitting element 40 on the substrate BS. That is, the orthographic projection of the second-type pixel circuit 20 on the substrate BS does not overlap with the orthographic projection of the second-region light-emitting element 40 on the substrate BS.

[0090] For example, in the embodiment of the present disclosure, the first display area R1 can be set as a non-light-transmitting display area, and the second display area R2 can be set as a light-transmitting display area. For example, the first display area R1 is not light-transmitting, and the second display area R2 is light-transmitting. In this way, the display panel provided by the embodiment of the present disclosure does not need to be processed by digging holes on the display panel, and the required hardware structures such as the photosensitive sensor can be directly set at the position corresponding to the second display area R2 on one side of the display panel, laying a solid foundation for the realization of a true full screen. In addition, since the second display area R2 only includes light-emitting elements but not pixel circuits, it is beneficial to improve the transmittance of the second display area R2, so that the display panel has a better display effect.

[0091] like Figure 3As shown, the pixel unit 100 includes a first pixel unit 101 and a second pixel unit 102, the pixel circuit 100a and the light-emitting element 100b of the first pixel unit 101 are both located in the first display area R1, the pixel circuit 100a of the second pixel unit 101 is located in the first display area R1, and the light-emitting element 100b of the second pixel unit 102 is located in the second display area R2. In the embodiment of the present disclosure, the pixel circuit 100a of the first pixel unit 101 is a first-type pixel circuit 10, the light-emitting element 100b of the first pixel unit 101 is a first-region light-emitting element 30, the pixel circuit 100a of the second pixel unit 101 is a second-type pixel circuit 20, and the light-emitting element 100b of the second pixel unit 102 is a second-region light-emitting element 40. For example, the first-region light-emitting element 30 can be referred to as an in-situ light-emitting element. For example, the first-type pixel circuit 10 can be referred to as an in-situ pixel circuit, and the second-type pixel circuit 20 can be referred to as a non-in-situ pixel circuit.

[0092] For example, Figure 3 As shown, the second region light emitting element 40 and the second type of pixel circuit 20 connected to the second region light emitting element 40 are located in the same row. That is, the light emitting signal of the second region light emitting element 40 comes from the second type of pixel circuit in the same row. For example, the pixel circuits of the pixel units in the same row are connected to the same gate line.

[0093] like Figure 3 As shown, the pixel circuit of the second pixel unit 102 (the second type of pixel circuit 20) is connected to the light-emitting element (the second region light-emitting element 40) of the second pixel unit 102 through the conductive line L1. For example, the conductive line L1 is made of a transparent conductive material. For example, the conductive line L1 is made of a conductive oxide material. For example, the conductive oxide material includes indium tin oxide (ITO), but is not limited thereto.

[0094] like Figure 3 As shown, one end of the conductive line L1 is connected to the second type pixel circuit 20, and the other end of the conductive line L1 is connected to the second area light emitting element 40. Figure 3 As shown, the conductive line L1 extends from the first display region R1 to the second display region R2.

[0095] like Figure 1B and Figure 3As shown, in some embodiments, the first display area R1 may include an auxiliary area Ra, and the auxiliary area Ra may be provided for a second type of pixel circuit 20 connected to the second area light-emitting element 40. For example, a plurality of dummy pixel circuits may be provided in the auxiliary area Ra of the first display area R1 or in an area other than the auxiliary area Ra. The dummy pixel circuit is not connected to any light-emitting element. The provision of a dummy pixel circuit is beneficial to improving the uniformity of the components of each film layer in the etching process. For example, the dummy pixel circuit has the same structure as the second type of pixel circuit 20 in its row or column, except that it is not connected to any light-emitting element. For example, in the first display area R1, the auxiliary area Ra and the area (non-auxiliary area) of the first display area R1 other than the auxiliary area Ra have the same pixel density or the same resolution, but are not limited thereto.

[0096] Figure 3 Three rows of light emitting elements 100b are shown. Figure 3 The light emitting elements 100 b in the first row shown pass through the first display area R1 and the second display area R2 , that is, a row of light emitting elements 100 b passes through two areas. Figure 3 The light emitting elements 100 b in the second row shown pass through the first display area R1 and the second display area R2 , that is, the light emitting elements 100 b in one row pass through two areas. Figure 3 The third row of light emitting elements 100b shown only passes through the first display area R1, but not the second display area R2, and is a row of light emitting elements 100b passing through one area. For example, in some embodiments, the light emitting elements 100b are divided into two types of rows of light emitting elements, that is, a row of light emitting elements passing through two areas and a row of light emitting elements passing through one area.

[0097] Figure 4 Schematic diagram of a first display area and a second display area in a display panel provided in an embodiment of the present disclosure. Figure 4 As shown, in the second display area R2, a light-transmitting area R0 is provided between adjacent second-region light-emitting elements 40. Figure 4 As shown, a plurality of light-transmitting regions R0 are connected to each other to form a continuous light-transmitting region separated by a plurality of second-region light-emitting elements 40. The conductive line L1 is made of a transparent conductive material to increase the light transmittance of the light-transmitting region R0 as much as possible. Figure 4 As shown, the second display region R2 except for the second region light emitting element 40 can be a light-transmitting region.

[0098] FIG. 5A to FIG. 5C This is a partial plan view of a display panel provided by an embodiment of the present disclosure. FIG. 5A to FIG. 5C Give a description.

[0099] Figure 5ASchematic diagram of a first display area and a second display area of ​​a display panel provided in one embodiment of the present disclosure. Figure 5A As shown, the second display area R2 is a light-transmitting display area, and the first display area R1 is a display area.

[0100] Figure 5B A schematic diagram of a first-region light-emitting element in a first display region and a second-region light-emitting element in a second display region of a display panel provided in one embodiment of the present disclosure. Figure 5B A first area light emitting element 30 and a second area light emitting element 40 are shown.

[0101] refer to Figure 5A , Figure 5B and Figure 3 In order to improve the display effect, the density of the second region light emitting elements 40 may be equal to the density of the first region light emitting elements 30. That is, the resolution of the second display region R2 is the same as the resolution of the first display region R1. Of course, in other embodiments, the density of the second region light emitting elements 40 may be greater than or less than the density of the first region light emitting elements 30. That is, the resolution of the second display region R2 may be greater than or less than the resolution of the first display region R1. For example, Figure 5B and Figure 4 As shown, the light emitting area of ​​the second region light emitting element 40 is smaller than the light emitting area of ​​the first region light emitting element 30. That is, the light emitting area of ​​the first region light emitting element 30 is larger than the light emitting area of ​​the second region light emitting element 40. Figure 4 The dotted lines show the light emitting area of ​​the second region light emitting element 40 and the light emitting area of ​​the first region light emitting element 30. For example, the light emitting area of ​​the light emitting element may correspond to the area of ​​the opening of the pixel definition layer.

[0102] Figure 5C The first region light emitting element 30, the second region light emitting element 40, the first type of pixel circuit 10, the second type of pixel circuit 20, the connecting element CE0, and the conductive line L1 are shown. Each pixel circuit is connected to the light emitting element through the connecting element CE0. That is, each pixel unit has a connecting element CE0. That is, the first type of pixel circuit 10 is connected to the first region light emitting element 30 through the connecting element CE0, and the second type of pixel circuit 20 is connected to the second region light emitting element 40 through the connecting element CE0.

[0103] For example, Figure 5CAs shown, one end of the conductive line L1 is connected to the second region light emitting element 40, and the other end of the conductive line L1 is connected to the second type of pixel circuit 20 through the connecting element CE0. For example, the connecting element CE0 is connected to the pixel circuit 100a and the light emitting element 100b respectively. For example, the connecting element CE0 is connected to the light emitting control transistor in the pixel circuit 100a and the first electrode of the light emitting element 100b respectively. For example, the connecting element CE0 can be formed by a single conductive component, or it can be formed by two different conductive components located in different layers. For example, the connecting element CE0 can include a conductive component located in one conductive layer and another conductive component located in another conductive layer.

[0104] like Figure 5C As shown, a conductive line L1 passes through the area where the pixel circuit of the pixel unit is located to respectively connect the second type of pixel circuit 20 and the second area light emitting element 40 on both sides of the pixel unit. For example, the area where the pixel circuit of the pixel unit is located overlaps with a plurality of conductive lines L1 passing through the area. The area where the second type of pixel circuit 20 is arranged in the first display area R1 can be called an auxiliary area Ra (such as Figure 1B and Figure 3 As shown), the auxiliary area Ra can also be called a transition area. Figure 5C Taking the example that a first type pixel circuit 10 overlaps with at most two conductive lines L1, in other embodiments, a first type pixel circuit 10 may also overlap with more conductive lines L1. For example, in some embodiments, a first type pixel circuit 10 may overlap with 5-15 conductive lines L1. The number of conductive lines L1 overlapped by a first type pixel circuit 10 may be determined as needed. Figure 5C As shown, the second type pixel circuit 20 may also overlap with the conductive line L1 that is not connected thereto.

[0105] In some embodiments, the size of the first type of pixel circuit 10 can be compressed in the first direction X to obtain an area for arranging the second type of pixel circuit 20. Figure 5C As shown, in the auxiliary area, a column of second type pixel circuits 20 is provided for every set column of first type pixel circuits 10. For example, the number of columns of first type pixel circuits 10 between two adjacent columns of second type pixel circuits 20 can be determined as required.

[0106] For example, in some embodiments, the area for setting the second type of pixel circuit 20 can be obtained by reducing the size of the first type of pixel circuit 10 in the first direction X. For example, the size of the first type of pixel circuit 10 in the first direction X is smaller than the size of the first area light emitting element 30 in the first direction X. The first direction X is, for example, a row direction, but is not limited thereto. In other embodiments, the first direction X may also be a column direction. The embodiments of the present disclosure are described by taking the first direction X as a row direction as an example.

[0107] Some drawings show a third direction Z, which is a direction perpendicular to the main surface of the substrate substrate. The main surface of the substrate substrate is a surface used to make various components. The upper surface of the substrate substrate in the cross-sectional view is the main surface of the substrate substrate. The first direction X and the second direction Y are both directions parallel to the main surface of the substrate substrate. For example, the first direction X and the second direction Y intersect. For further example, the first direction X and the second direction Y are perpendicular.

[0108] FIG. 5D to FIG. 5F is a schematic diagram of the structure of a display panel provided by some embodiments of the present disclosure. In order to further reflect that after compressing the pixel circuit, there are more columns of pixel circuits, Figure 5D A schematic diagram of the structure of a first-region light-emitting element in the first display region R1 is shown. Figure 5E Shows Figure 5A Schematic diagram of part of the structure (including only the pixel circuit), Fig. 5F Shows Figure 5A Schematic diagram of part of the structure (including only the light-emitting element).

[0109] refer to FIG. 5D to FIG. 5F It can be seen that the width of the pixel circuit is smaller than the width of the light-emitting element. Thus, the pixel circuits in the second and ninth columns from the right to the left are not connected to any first-region light-emitting element 30, and belong to extra-column pixel circuits, which can be used as the second type of pixel circuit 20 to connect to the second-region light-emitting element 40 in the second display area R2. Fig. 5F As shown, the first region light emitting element 30 may include first electrodes E1 of four types of light emitting elements, RG1, B, and G2, and the first electrodes E1 of the light emitting elements are connected to the first type of pixel circuit 10 via a connecting element CE0. R represents a light emitting element that emits red light, G1 represents a light emitting element that emits green light, B represents a light emitting element that emits blue light, and G2 represents a light emitting element that emits green light. For example, the connecting element CE0 includes two connecting electrodes, which may be the connecting electrodes CE01 (such as the connecting electrodes CE02 and the connecting electrodes CE03) mentioned later. Figure 5E as shown) and connecting electrode CE02 (as Fig. 5F For example, in order to have sufficient space for arranging the conductive line L1, the axes of the connection electrodes CE01 in the same row of pixel units may be located on a straight line.

[0110] Fig. 5F Four rows of connection elements CE0 / connection electrodes CE02 are shown, namely, Fig. 5F Four rows of light emitting elements are shown. For example, the light emitting elements in each row are arranged in sequence along the first direction X in the manner of RGBG or BGRG. Of course, the light emitting colors of the light emitting elements are not limited to RGB, and the arrangement of the light emitting elements is not limited to Fig. 5F As shown, the embodiments of the present disclosure are described by taking the light emitting elements including RGBG as an example. Fig. 5F As shown, G includes G1 or G2. For example, Fig. 5F In the pixel arrangement shown, a repeating unit RP includes two Gs arranged in the second direction Y and R and B arranged on both sides of the two Gs in the first direction X, wherein R and G constitute a pixel, and use B in another adjacent repeating unit to constitute a virtual pixel for display, and B and G constitute a pixel, and use R in another adjacent repeating unit to constitute a virtual pixel for display, but not limited to this.

[0111] refer to Figure 3 , Figure 4 , FIG. 5A to FIG. 5C The display panel provided by some embodiments of the present disclosure includes: a base substrate BS, a plurality of light emitting elements 100b, and a plurality of pixel circuits 100a. The base substrate BS has a first display area R1 and a second display area R2, and the first display area R1 is located at least on one side of the second display area R2. The plurality of light emitting elements 100b are arranged in a plurality of rows and a plurality of columns.

[0112] refer to Figure 3 , Figure 4 , Figure 5C and Fig. 5F The plurality of light emitting elements 100b include a plurality of groups of light emitting elements, the light emitting elements in each of the plurality of groups of light emitting elements are arranged along a first direction X, and the plurality of groups of light emitting elements are arranged along a second direction Y. Figure 3 and Figure 5C Three groups of light emitting elements GP are shown, which are respectively a group of light emitting elements GPx, a group of light emitting elements GPy and a group of light emitting elements GPz; one group of light emitting elements GPx and a group of light emitting elements GPy pass through the first display area R1 and the second display area R2, and a group of light emitting elements GPz only passes through the first display area R1. Figure 4 At least four groups of light emitting elements GP arranged in the second direction Y are shown. Fig. 5F At least four groups of light emitting elements GP are shown arranged in the second direction Y. In the display panel, the number of groups of light emitting elements passing through the first display area R1 and the second display area R2 and the number of groups of light emitting elements passing through only the first display area R1 can be determined as required.

[0113] For example, in some embodiments, a group of light emitting elements may be a row of light emitting elements. Of course, a group of light emitting elements may not completely correspond to a column of light emitting elements. In other embodiments, a group of light emitting elements may be a column of light emitting elements. Of course, a group of light emitting elements may not completely correspond to a column of light emitting elements. The embodiments of the present disclosure are described by taking a group of light emitting elements as a row of light emitting elements as an example.

[0114] For example, refer to Figure 3 and Figure 5C At least one of the plurality of groups of light emitting elements includes a plurality of first-region light emitting elements 30 and a plurality of second-region light emitting elements 40. That is, at least one of the plurality of groups of light emitting elements passes through the first display area R1 and the second display area R2.

[0115] For example, refer to Figure 3 , Figure 4 ,as well as Figure 5C The multiple light-emitting elements 100b include at least one row of light-emitting elements 100b passing through the first display area R1 and the second display area R2, and any one of the at least one row of light-emitting elements 100b passing through the two areas includes multiple first area light-emitting elements 30 and multiple second area light-emitting elements 40.

[0116] For example, refer to Figure 3 , Figure 4 ,as well as Figure 5C , a plurality of first-region light-emitting elements 30 are located in the first display region R1 , and a plurality of second-region light-emitting elements 40 are located in the second display region R2 .

[0117] For example, refer to Figure 3 , Figure 5C and Figure 5E The plurality of pixel circuits include a plurality of groups of pixel circuits GR, the pixel circuits in each group of the plurality of groups of pixel circuits are arranged along a first direction X, and the plurality of groups of pixel circuits are arranged along a second direction Y. For example, at least one group of the plurality of groups of pixel circuits 100a includes a plurality of first-type pixel circuits 10 and a plurality of second-type pixel circuits 20. Figure 3 and Figure 5C Three groups of pixel circuits GR are shown respectively. Figure 5E Four groups of pixel circuits GR are shown. Figure 3 and Figure 5C As shown, the pixel circuit is only located in the first display area R1, and no pixel circuit is arranged in the second display area R2.

[0118] For example, refer to Figure 3 and Figure 5C, a plurality of pixel circuits 100a are arranged in a plurality of rows and a plurality of columns, and the plurality of pixel circuits 100a include a plurality of first-type pixel circuits 10 and a plurality of second-type pixel circuits 20 located in the same row. In other words, at least one of the plurality of groups of pixel circuits includes a plurality of first-type pixel circuits 10 and a plurality of second-type pixel circuits 20.

[0119] For example, refer to Figure 3 and Figure 5C , a plurality of first-type pixel circuits 10 and a plurality of second-type pixel circuits 20 are all located in the first display area R1, and a plurality of second-type pixel circuits 20 are spaced and distributed between the plurality of first-type pixel circuits 10. At least one first-type pixel circuit 10 among the plurality of first-type pixel circuits 10 is connected to at least one first-region light-emitting element 30 among the plurality of first-region light-emitting elements 30, and the orthographic projection of at least one first-type pixel circuit 10 on the substrate BS at least partially overlaps with the orthographic projection of at least one first-region light-emitting element 30 on the substrate BS; at least one second-type pixel circuit 20 among the plurality of second-type pixel circuits 20 is connected to at least one second-region light-emitting element 40 among the plurality of second-region light-emitting elements 40 through at least one conductive line among the plurality of conductive lines.

[0120] Figure 6 A schematic diagram of a light emitting element located in a second display area of ​​a display panel provided in an embodiment of the present disclosure. Figure 7 A schematic diagram of a row of light-emitting elements located in a second display area of ​​a display panel and a second type of pixel circuit connected thereto is provided according to an embodiment of the present disclosure. Figure 8 A schematic diagram of a row of light-emitting elements located in a second display area of ​​a display panel and a second type of pixel circuit connected thereto is provided according to an embodiment of the present disclosure. Fig. 9 A schematic diagram of two rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure. Fig.10 A schematic diagram of a plurality of rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure. Fig.11 A schematic diagram of a plurality of rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure. Fig.12 A schematic diagram of a first transparent conductive pattern layer, a light-emitting element, and a pixel circuit in a display panel provided in an embodiment of the present disclosure. Fig.13 A schematic diagram of a second transparent conductive pattern layer, a light-emitting element and a pixel circuit in a display panel provided in an embodiment of the present disclosure. Fig.14A schematic diagram of a plurality of rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure. Fig.15 A schematic diagram of conductive lines located in a first transparent conductive pattern layer connected to multiple rows of light-emitting elements located in a second display area in a display panel provided in an embodiment of the present disclosure. Fig.16 A schematic diagram of conductive lines located in a second conductive pattern layer connected to multiple rows of light emitting elements located in a second display area in a display panel provided in an embodiment of the present disclosure.

[0121] For example, in an embodiment of the present disclosure, a row of light-emitting elements may refer to that the pixel circuits connected to the row of light-emitting elements are all connected to the same gate line, but is not limited thereto. For example, in an embodiment of the present disclosure, a row of pixel circuits may refer to that the pixel circuits connected to the row are all connected to the same gate line, but is not limited thereto. For example, in an embodiment of the present disclosure, a row of pixel units may refer to that the pixel circuits connected to the row of pixel units are all connected to the same gate line, but is not limited thereto.

[0122] For example, Figures 6 to 16 As shown, in at least one group of light-emitting elements 100b, the plurality of second-region light-emitting elements 40 include a plurality of first light-emitting elements 41 and a plurality of second light-emitting elements 42, the first light-emitting elements 41 are configured to emit a first color light, and the second light-emitting elements 42 are configured to emit a second color light. The plurality of second-type pixel circuits 20 include a plurality of first pixel circuits 21 and a plurality of second pixel circuits 22, the plurality of conductive lines L1 include a plurality of first conductive lines La and a plurality of second conductive lines Lb, the plurality of first light-emitting elements 41 are connected to the plurality of first pixel circuits 21 through the plurality of first conductive lines La, and the plurality of second light-emitting elements 42 are connected to the plurality of second pixel circuits 22 through the plurality of second conductive lines Lb. For example, one first light-emitting element 41 is connected to one first pixel circuit 21 through one first conductive line La, and one second light-emitting element 42 is connected to one second pixel circuit 22 through one second conductive line Lb.

[0123] For example, Figures 6 to 16 As shown, the plurality of second-region light-emitting elements 40 further include a plurality of third light-emitting elements 43, the third light-emitting elements 43 are configured to emit a third color light, the plurality of second-type pixel circuits 20 further include a plurality of third pixel circuits 23, the plurality of conductive lines L1 further include a plurality of third conductive lines Lc, and the plurality of third light-emitting elements 43 are connected to the plurality of third pixel circuits 23 through the plurality of third conductive lines Lc. For example, one third light-emitting element 43 is connected to one third pixel circuit 23 through one third conductive line Lc.

[0124] For example, Figures 6 to 16As shown, the plurality of second-region light-emitting elements 40 further include a plurality of fourth light-emitting elements 44, the fourth light-emitting elements 44 are configured to emit fourth color light, the plurality of second-type pixel circuits 20 further include a plurality of fourth pixel circuits 24, the plurality of conductive lines L1 further include a plurality of fourth conductive lines Ld, and the plurality of fourth light-emitting elements 44 are connected to the plurality of fourth pixel circuits 24 through the plurality of fourth conductive lines Ld. For example, one fourth light-emitting element 44 is connected to one fourth pixel circuit 24 through one fourth conductive line Ld.

[0125] For example, the first color light and the fourth color light are both green light, one of the second color light and the third color light is red light, and the other of the second color light and the third color light is blue light.

[0126] For example, the fourth light-emitting element 44 and the first light-emitting element 41 are configured to emit light of the same color. For example, the fourth light-emitting element 44 and the first light-emitting element 41 are configured to emit green light, one of the second light-emitting element 42 and the third light-emitting element 43 is configured to emit red light, and the other of the second light-emitting element 42 and the third light-emitting element 43 is configured to emit blue light. The embodiment of the present disclosure is described by taking the fourth light-emitting element 44 and the first light-emitting element 41 emitting green light, the second light-emitting element 42 emitting red light, and the third light-emitting element 43 emitting blue light as an example. In other embodiments, the first light-emitting element 41, the second light-emitting element 42, the third light-emitting element 43 and the fourth light-emitting element 44 may also emit light of other colors, not limited to the three colors of red, green and blue. The colors of the light emitted by the first light-emitting element 41, the second light-emitting element 42, the third light-emitting element 43 and the fourth light-emitting element 44 may be determined as needed.

[0127] In the display panel, the capacitance difference of the conductive wires is large. Because the lengths of the conductive wires connecting the light-emitting elements located in the second display area are different, the capacitance difference of the light-emitting elements emitting different colors of light varies differently. Compared with the capacitance difference of the conductive wires connected to the light-emitting elements emitting red light and the capacitance difference of the conductive wires connected to the light-emitting elements emitting blue light, the capacitance difference of the conductive wires connected to the light-emitting elements emitting green light is larger. Because the capacitance difference of the conductive wires connected to the light-emitting elements emitting green light is large, the emission time of the light-emitting elements emitting green light is reduced, so that the display panel has a brightness difference, resulting in poor display. Stripes appear when the display panel displays. For example, purple stripes appear when the display panel displays. For example, purple vertical stripes appear when the display panel displays. For example, at low grayscale, the poor degree of the light-emitting elements emitting green light is greater than the poor degree of the light-emitting elements emitting red light, and the poor degree of the light-emitting elements emitting red light is greater than the poor degree of the light-emitting elements emitting blue light. For example, at the same grayscale, the driving current for driving a light-emitting element emitting blue light is greater than the driving current for driving a light-emitting element emitting red light, and the driving current for driving a light-emitting element emitting red light is greater than the driving current for driving a light-emitting element emitting green light.

[0128] The display panel provided by the embodiment of the present disclosure adjusts the setting order of the second type of pixel circuits connected to the light-emitting elements emitting different colors of light in order to improve display defects, so as to reduce or eliminate the poor display caused by the large difference in the length of the conductive wire. That is, when designing the second type of pixel circuit connected to the first light-emitting element, the length of the conductive wire and the difference in the length of the conductive wire are considered, for example, the order of G priority is adopted. For example, G priority means that the second type of pixel circuit connected to the light-emitting element emitting green light is preferentially arranged close to the second display area. In order to optimize the resistance difference between adjacent pixel units and enhance product competitiveness.

[0129] like Figures 6 to 16 As shown in the drawings provided by the embodiments of the present disclosure, in the second display area R2, in at least one group of light emitting elements 100b, the second light emitting element 42, the first light emitting element 41, the third light emitting element 43 and the fourth light emitting element 44 are arranged in sequence in the first direction X (row direction). Figures 6 to 16 As shown, the light emitting element 100b includes two types of light emitting element columns. The first type of light emitting element column includes a first light emitting element 41 and a fourth light emitting element 44, and in the column direction, the first light emitting element 41 and the fourth light emitting element 44 are arranged alternately. The second type of light emitting element column includes a second light emitting element 42 and a third light emitting element 43, and in the column direction, the second light emitting element 42 and the third light emitting element 43 are arranged alternately. The arrangement of the light emitting elements in the first display area R1 can be the same as the arrangement of the light emitting elements in the second display area R2, but is not limited thereto. Of course, the arrangement of the light emitting elements provided in the embodiments of the present disclosure is not limited to Figure 6 As shown, other suitable arrangements may also be adopted as required.

[0130] like Figures 6 to 16 As shown, in at least one group of light-emitting elements and at least one group of pixel circuits, the plurality of first pixel circuits 21 connected to the plurality of first light-emitting elements 41 are closer to the second display area R2 than each of the plurality of second pixel circuits 22 connected to the plurality of second light-emitting elements 42. That is, the setting position of the first pixel circuit 21 connected to the first light-emitting element 41 is adjusted so that the first pixel circuit 21 connected to the first light-emitting element 41 is closer to the second display area R2 than other second-type pixel circuits, so that the length difference of the first conductive line La connected to the first light-emitting element 41 is reduced, thereby alleviating or avoiding poor display.

[0131] For example, in the embodiment of the present disclosure, at least one group of light emitting elements and at least one group of pixel circuits may refer to a row of light emitting elements 100b passing through two regions, or may refer to a row of pixel units passing through two regions, but is not limited thereto.

[0132] For example, Figures 6 to 16 As shown, in at least one group of light-emitting elements and at least one group of pixel circuits, no other second-type pixel circuit 20 is arranged between two first pixel circuits 21 connected to two adjacent first conductive lines La. This arrangement is conducive to reducing the length of the first conductive lines La, and also conducive to reducing the length difference between the first conductive lines La.

[0133] It should be noted that, in the display panel provided in the embodiments of the present disclosure, element A and element B are adjacent, or adjacent elements A and element B means that there are no other elements A and other elements B between element A and element B, but there may be other elements besides element A and element B. Element A and element B may be the same element or different elements.

[0134] For example, Figures 6 to 16 As shown, in at least one group of light-emitting elements and at least one group of pixel circuits, at least one of a plurality of first-type pixel circuits 10 is disposed between two adjacent second-type pixel circuits 20. For example, in the display panel provided by the embodiment of the present disclosure, in the first direction X, two first-type pixel circuits 10 are disposed between two adjacent second-type pixel circuits 20.

[0135] For example, Figures 6 to 16 As shown, in at least one group of light-emitting elements and at least one group of pixel circuits, a plurality of first pixel circuits 21 connected to a plurality of first conductive lines La are arranged at intervals in a plurality of first-type pixel circuits 10, and a plurality of second pixel circuits 22 connected to a plurality of second conductive lines Lb are arranged at intervals in a plurality of first-type pixel circuits 10.

[0136] For example, Figures 6 to 16 As shown, in at least one group of light emitting elements and at least one group of pixel circuits, a plurality of first pixel circuits 21 connected to a plurality of first conductive lines La are closer to the second display area R2 than each of a plurality of third pixel circuits 23 connected to a plurality of third conductive lines Lc.

[0137] For example, Figures 6 to 16 As shown, in order to make the second conductive line Lb have a smaller capacitance difference and in order to make the third conductive line Lc have a smaller capacitance difference, in at least one group of light-emitting elements and at least one group of pixel circuits, a plurality of second pixel circuits 22 connected to a plurality of second conductive lines Lb and a plurality of third pixel circuits 23 connected to a plurality of third conductive lines Lc are alternately arranged.

[0138] For example, Figures 6 to 16As shown, in at least one group of light-emitting elements and at least one group of pixel circuits, the plurality of fourth pixel circuits 24 connected to the plurality of fourth conductive lines Ld are closer to the second display area R2 than each of the plurality of second pixel circuits 22 connected to the plurality of second conductive lines Lb. In the embodiment of the present disclosure, the fourth light-emitting element 44 and the first light-emitting element 41 emit light of the same color, so that the plurality of fourth pixel circuits 24 are also preferentially arranged, that is, the plurality of fourth pixel circuits 24 are arranged closer to the second display area. Of course, in other embodiments, the fourth light-emitting element 44 may not be arranged, so that the fourth pixel circuit 24 does not need to be arranged. For example, in this case, the pixel may be in the form of real RGB, but is not limited thereto.

[0139] For example, Figures 6 to 16 As shown, in order to make the first conductive line La have a smaller capacitance difference and to make the fourth conductive line Ld have a smaller capacitance difference, in at least one group of light-emitting elements and at least one group of pixel circuits, a plurality of fourth pixel circuits 24 connected to a plurality of fourth conductive lines Ld and a plurality of first pixel circuits 21 connected to a plurality of first conductive lines La are alternately arranged.

[0140] For example, at least one of the first conductive line La, the second conductive line Lb, the third conductive line Lc, and the fourth conductive line Ld is made of a transparent conductive material.

[0141] like Figures 6 to 16 As shown, the second display area R2 of the display panel is axially symmetrical, having a first symmetric axis X1 extending along the first direction X and a second symmetric axis X2 extending along the second direction Y. Figures 14 to 16 As shown, the plurality of conductive lines L1 are axisymmetric with respect to the first symmetry axis X1 and are axisymmetric with respect to the second symmetry axis X2. Figure 6 It is shown that the second display area R2 includes a first sub-area R21, a second sub-area R22, a third sub-area R23, and a fourth sub-area R24. The first sub-area R21 and the second sub-area R22 are axially symmetrical with respect to the second symmetry axis X2, the third sub-area R23 and the fourth sub-area R24 are axially symmetrical with respect to the second symmetry axis X2, the first sub-area R21 and the third sub-area R23 are axially symmetrical with respect to the first symmetry axis X1, and the second sub-area R22 and the fourth sub-area R24 are axially symmetrical with respect to the first symmetry axis X1. For example, the plurality of second-region light-emitting elements 40 are axially symmetrical with respect to the first symmetry axis X1 and axially symmetrical with respect to the second symmetry axis X2. Figure 6 The center CT of the second display area R2 is shown.

[0142] like Fig.15 and Fig.16As shown, the display panel includes a first transparent conductive pattern layer LY1 and a second transparent conductive pattern layer LY2, at least one first conductive line La among the plurality of first conductive lines La is located in the second transparent conductive pattern layer LY2, and at least one second conductive line Lb among the plurality of second conductive lines Lb is located in the first transparent conductive pattern layer LY1.

[0143] The display panel provided by the embodiment of the present disclosure includes only two transparent conductive pattern layers for forming conductive lines. Compared with a display panel including three transparent conductive pattern layers for forming conductive lines, the number of masks is reduced, which is beneficial to the production of the display panel, the reduction of the thickness of the display panel, and the improvement of the reliability of the display panel.

[0144] Fig.15 and Fig.16 An example is given for description in which a plurality of first conductive lines La are all located in the second transparent conductive pattern layer LY2 and a plurality of second conductive lines Lb are all located in the first transparent conductive pattern layer LY1 .

[0145] For example, Figures 7 to 16 As shown, in the display panel provided by the embodiment of the present disclosure, a plurality of first conductive lines La are located between two adjacent groups of light-emitting elements, so as to facilitate the arrangement of the first conductive lines La connected to the light-emitting elements of each row. The conductive lines located between two adjacent groups of light-emitting elements may be referred to as transverse conductive lines. The transverse conductive lines extend from the second display area R2 to the first display area in the first direction X. For example, a plurality of first conductive lines La located between two adjacent groups of light-emitting elements may refer to a plurality of first conductive lines La located between the center lines of the two adjacent groups of light-emitting elements. For example, the center line of each group of light-emitting elements extends along the first direction X. The center lines of the two adjacent groups of light-emitting elements are arranged along the second direction Y.

[0146] For example, Figures 7 to 16 As shown, the first conductive line La and the fourth conductive line Ld are transverse conductive lines.

[0147] For example, Figures 9 to 12 , Figure 14 to Figure 15 As shown, in the display panel provided by the embodiment of the present disclosure, at least one second conductive line Lb close to the center of the second display area R2 crosses over at least two groups of light emitting elements in the second direction Y.

[0148] For example, Figures 9 to 12 , Figure 14 to Figure 15 As shown, in the display panel provided by the embodiment of the present disclosure, at least one second conductive line Lb close to the center of the second display area R2 extends in the second direction Y from the second display area R2 to the first display area R1.

[0149] For example, Figures 9 to 12 , Figure 14 to Figure 15As shown, at least one third conductive line Lc close to the center of the second display region R2 and at least one second conductive line Lb close to the center of the second display region R2 are longitudinal conductive lines.

[0150] For example, in the display panel provided by the embodiment of the present disclosure, the first conductive line La is a conductive line of an integral structure, and the second conductive line Lb is a conductive line of an integral structure.

[0151] For example, a portion of the plurality of third conductive lines Lc are located in the first transparent conductive pattern layer LY1 , ​​and another portion of the plurality of third conductive lines Lc are located in the second transparent conductive pattern layer LY2 .

[0152] For example, Figures 9 to 12 , Figure 14 to Figure 15 As shown, in the display panel provided by the embodiment of the present disclosure, at least one third conductive line Lc close to the center of the second display area R2 crosses over at least two groups of light emitting elements in the second direction Y.

[0153] For example, Figures 9 to 12 , Figure 14 to Figure 15 As shown, in the display panel provided by the embodiment of the present disclosure, at least one third conductive line Lc near the center of the second display area R2 extends from the second display area R2 to the first display area R1 in the second direction Y. This type of conductive line can be referred to as a longitudinal conductive line. The longitudinal conductive line extends from the second display area R2 to the first display area R1 in the second direction Y.

[0154] For example, Figures 7 to 16 As shown, in the display panel provided by the embodiment of the present disclosure, in at least one group of light-emitting elements and at least one group of pixel circuits, the first conductive line La connected to the group of light-emitting elements is located on the first side of the group of light-emitting elements, and the second conductive line Lb and the third conductive line Lc connected to the group of light-emitting elements are located on the second side of the group of light-emitting elements, and the first side and the second side are opposite sides of the group of light-emitting elements.

[0155] For example, Figures 7 to 16 As shown, in the display panel provided by the embodiments of the present disclosure, in at least one group of light-emitting elements and at least one group of pixel circuits, for example, for several groups of light-emitting elements close to the upper edge of the second display area R2, the first conductive line La and the fourth conductive line Ld connected to the group of light-emitting elements are located on the first side of the group of light-emitting elements, and the second conductive line Lb and the third conductive line Lc connected to the group of light-emitting elements are located on the second side of the group of light-emitting elements, and the first side and the second side are opposite sides of the group of light-emitting elements.

[0156] For example, Figures 7 to 16 As shown, the first side and the second side of a group of light emitting elements are respectively the upper side and the lower side of the group of light emitting elements.

[0157] For example, in the display panel provided by the embodiment of the present disclosure, the third conductive line Lc is a conductive line with an integrated structure.

[0158] For example, in the display panel provided by the embodiment of the present disclosure, the fourth conductive line Ld is a conductive line with an integrated structure.

[0159] For example, in the embodiment of the present disclosure, the first conductive line La, the second conductive line Lb, the third conductive line Lc, and the fourth conductive line Ld are conductive lines of an integral structure. That is, each conductive line L1 is a conductive line of an integral structure, formed by a layer of conductive film, and does not need to be formed in sections.

[0160] For example, Figures 9 to 12 As shown, in the display panel provided by the embodiment of the present disclosure, at least one group of the multiple groups of pixel circuits includes a dummy pixel circuit 200, the dummy pixel circuit 200 is located between two second-type pixel circuits 20 in the first direction X, and the orthographic projection of at least one of the second conductive line Lb near the center of the second display area R2 and the third conductive line Lc near the center of the second display area R2 on the substrate overlaps with the orthographic projection of the dummy pixel circuit on the substrate.

[0161] For example, the dummy pixel circuit 200 is not connected to any light emitting element. For example, the dummy pixel circuit 200 is not connected to the conductive line L1. For example, the dummy pixel circuit 200 can be a second type of pixel circuit, but is not connected to the conductive line L1. That is, a portion, for example, several columns, can be selected from the second type of pixel circuit as a dummy pixel circuit column.

[0162] Figures 9 to 12 The longitudinal conductive lines are shown, and the longitudinal conductive lines include a second conductive line Lb0 near the center of the second display area and a third conductive line Lc0 near the center of the second display area. For example, the second conductive line Lb0 and the third conductive line Lc0 are located in the first transparent conductive pattern layer LY1.

[0163] For example, Figures 9 to 12 As shown, in the display panel provided by the embodiment of the present disclosure, the second conductive line Lb near the center of the second display area R2 and the third conductive line Lc near the center of the second display area include a first part P1, a second part P2, a third part P3, and a fourth part P4 connected in sequence, the second part P2 and the fourth part P4 extend along the first direction X, and the first part P1 and the third part P3 extend along the second direction Y.

[0164] For example, Figures 9 to 12 As shown, in the display panel provided by the embodiment of the present disclosure, the orthographic projection of the third portion P3 on the base substrate overlaps with the orthographic projection of the dummy pixel circuit 200 on the base substrate.

[0165] For example, Figures 9 to 12 As shown, in the display panel provided by the embodiment of the present disclosure, the fourth portion P4 and the second portion P2 are located on both sides of the third portion P3.

[0166] For example, Figures 7 to 16 As shown, in the display panel provided by the embodiment of the present disclosure, the orthographic projection of the portion of the first conductive line La extending along the first direction X on the base substrate and the orthographic projection of the portion of the second conductive line Lb extending along the first direction X on the base substrate do not overlap, but are not limited thereto. Of course, in other embodiments, the orthographic projection of the portion of the conductive line L1 extending along the first direction X on the base substrate may also overlap.

[0167] For example, in the embodiment of the present disclosure, the orthographic projections of the portions of the conductive lines L1 extending along the first direction X on the base substrate do not overlap.

[0168] like Figures 9 to 12 As shown, the second conductive line Lb0 and the third conductive line Lc0 are located in the same layer, both located in the first transparent conductive pattern layer LY1, and the orthographic projection of the portion (first portion P1) of the second conductive line Lb0 located in the second display area R2 on the substrate overlaps with the orthographic projection of the conductive line (lateral conductive line) located in the second transparent conductive pattern layer LY2 on the substrate. For example, the orthographic projection of the portion (first portion P1) of the second conductive line Lb0 located in the second display area R2 on the substrate overlaps with the orthographic projection of the portion of the conductive line located in the second transparent conductive pattern layer LY2 extending along the direction X on the substrate. The orthographic projection of the portion (first portion P1) of the second conductive line Lb0 located in the second display area R2 on the substrate overlaps with the orthographic projection of the lateral conductive line (the conductive line located in the second transparent conductive pattern layer LY2) on the substrate.

[0169] For example, Figures 9 to 12 As shown, the orthographic projection of the portion (first portion P1) of the third conductive line Lc0 located in the second display area R2 on the substrate overlaps with the orthographic projection of the conductive line (lateral conductive line) located in the second transparent conductive pattern layer LY2 on the substrate. For further example, the orthographic projection of the portion (first portion P1) of the third conductive line Lc0 located in the second display area R2 on the substrate overlaps with the orthographic projection of the portion of the conductive line located in the second transparent conductive pattern layer LY2 extending along the direction X on the substrate.

[0170] For example, in the display panel provided in the embodiment of the present disclosure, the fourth light-emitting element 44 and the first light-emitting element 41 are configured to emit green light, one of the second light-emitting element 42 and the third light-emitting element 43 is configured to emit red light, and the other of the second light-emitting element 42 and the third light-emitting element 43 is configured to emit blue light.

[0171] like Figures 6 to 16 As shown, in the upper left quarter of the second display area R2 (first sub-area R21), a group of light-emitting elements closest to the first symmetry axis X1 is called the first row of light-emitting elements, and from bottom to top are the second row to the Nth row of light-emitting elements.

[0172] refer to Figure 7 , in at least one set of light emitting elements (such as Figure 7 In the second row of light-emitting elements shown, (the row of light-emitting elements r2), the light-emitting elements near the center CT of the second display area R2 are connected to the conductive wires located in the second transparent conductive pattern layer LY2, while the light-emitting elements near the edge of the second display area R2 are connected to the conductive wires located in the first transparent conductive pattern layer LY1. In at least one group of light-emitting elements, the group of light-emitting elements can be connected by using a transverse conductive wire. The light-emitting elements near the center of the second display area R2 include the first light-emitting element 41, the second light-emitting element 42, the third light-emitting element 43 and the fourth light-emitting element 44, that is, regardless of the light-emitting color of the light-emitting element, as long as the light-emitting element is close to the center of the second display area R2, it is connected to the conductive wires located in the second transparent conductive pattern layer LY2. Similarly, the light-emitting elements near the edge of the second display area R2 include the first light-emitting element 41, the second light-emitting element 42, the third light-emitting element 43 and the fourth light-emitting element 44, that is, regardless of the light-emitting color of the light-emitting element, as long as the light-emitting element is close to the edge of the second display area R2, it is connected to the conductive wires located in the first transparent conductive pattern layer LY1. The light emitting elements close to the center CT of the second display region R2 can also be regarded as light emitting elements close to the second symmetry axis X2 of the second display region R2. Fig. 9 The first row of light-emitting elements shown, r1 row of light-emitting elements) may need to be connected to the longitudinal conductive lines (conductive lines Lb0 and conductive lines Lc0). In order to provide a setting position for the longitudinal conductive lines located in the first transparent conductive pattern layer LY1, the light-emitting elements close to the center CT of the second display area R2 are connected to the conductive lines located in the second transparent conductive pattern layer LY2. Fig. 9 The light emitting elements in rows r1 to r5 in the first sub-region R21 are shown.

[0173] like Fig. 9 As shown, at least one group of light-emitting elements includes two sub-groups of light-emitting elements, that is, a first sub-group of light-emitting elements G01 and a second sub-group of light-emitting elements G02, the first sub-group of light-emitting elements G01 is closer to the edge of the second display area R2 than the second sub-group of light-emitting elements G02, or the second sub-group of light-emitting elements G02 is closer to the center of the second display area R2 than the first sub-group of light-emitting elements G01.

[0174] like Fig. 9As shown, in at least one group of light-emitting elements, for example, the light-emitting elements in row r1 can be referred to as the first group of light-emitting elements G1, the conductive lines L1 connected to the light-emitting elements in the first subgroup of light-emitting elements G01 (including the second light-emitting element 42 and the third light-emitting element 43) are all located in the first transparent conductive pattern layer LY1, and the conductive lines L1 connected to the light-emitting elements in the first subgroup of light-emitting elements G01 (including the first light-emitting element 41 and the fourth light-emitting element 44) are all located in the second transparent conductive pattern layer LY2; the conductive lines L1 connected to the light-emitting elements in the second subgroup of light-emitting elements G02 (including the second light-emitting element 42 and the third light-emitting element 43) are all located in the first transparent conductive pattern layer LY1, and the conductive lines L1 connected to the light-emitting elements in the second subgroup of light-emitting elements G02 (including the first light-emitting element 41 and the fourth light-emitting element 44) are all located in the second transparent conductive pattern layer LY2.

[0175] like Fig. 9 As shown, in at least one group of light-emitting elements, for example, the light-emitting elements in the row r2, which may also be referred to as the second group of light-emitting elements G2, the first group of light-emitting elements G1 is closer to the center CT of the second display area than the second group of light-emitting elements G2, or the first group of light-emitting elements G1 is closer to the first symmetry axis X1 than the second group of light-emitting elements G2. The conductive lines L1 connected to the light-emitting elements in the first subgroup of light-emitting elements G01 (including the first light-emitting element 41, the second light-emitting element 42, the third light-emitting element 43, and the fourth light-emitting element 44) are all located in the first transparent conductive pattern layer LY1, and the conductive lines L1 connected to the light-emitting elements in the second subgroup of light-emitting elements G02 (including the first light-emitting element 41, the second light-emitting element 42, the third light-emitting element 43, and the fourth light-emitting element 44) are all located in the second transparent conductive pattern layer LY2.

[0176] Fig. 9 for Figure 8 Conductive wire in Figure 7 There are more light-emitting elements near the center of the second display area, involving longitudinal conductive lines.

[0177] like Figure 8 and Fig. 9As shown, in at least one group of light-emitting elements, for the conductive lines L1 connected to the first light-emitting element 41 and the fourth light-emitting element 44 (G pixel unit), starting from the center of the second display area R2, the conductive lines located in the second transparent conductive pattern layer LY2 are used, and the rest are conductive lines located in the first transparent conductive pattern layer LY1. For the conductive lines located in the second transparent conductive pattern layer LY2, they are distributed on both sides of the group of light-emitting elements; for the conductive lines L1 connected to the second light-emitting element 42 and the third light-emitting element 43 (B pixel unit and R pixel unit), they are connected starting from the edge of the second display area R2, and connected with the conductive lines ITO1 located in the first transparent conductive pattern layer LY1 until the lateral conductive lines are used up.

[0178] like Figure 8 and Fig. 9 As shown, the second type of pixel circuit connected to the first light-emitting element 41 and the fourth light-emitting element 44 (G pixel unit) is closer to the second display area R2 than the second type of pixel circuit connected to the second light-emitting element 42 and the third light-emitting element 43. Only the second light-emitting element 42 and the third light-emitting element 43 remain in the center of the second display area R2, and the second light-emitting element 42 and the third light-emitting element 43 near the center of the second display area are connected to the second type of pixel circuit at the farthest end using longitudinal conductive lines, which conforms to the gradient rule.

[0179] Fig.17 A schematic diagram of a plurality of rows of light-emitting elements located in a second display area of ​​a display panel and second-type pixel circuits connected thereto is provided according to an embodiment of the present disclosure. Fig.18 A schematic diagram of a first transparent conductive pattern layer in a display panel provided in an embodiment of the present disclosure. Fig.19 A schematic diagram of a second transparent conductive pattern layer in a display panel provided in an embodiment of the present disclosure. Fig. 20 A schematic diagram of a second transparent conductive pattern layer in a display panel provided in an embodiment of the present disclosure. Fig.21 A schematic diagram of a first transparent conductive pattern layer in a display panel provided in an embodiment of the present disclosure.

[0180] For example, Figures 17 to 19 As shown, in the display panel provided by the embodiment of the present disclosure, a portion of the plurality of first conductive lines La is located in the second transparent conductive pattern layer LY2 , and another portion of the plurality of first conductive lines La is located in the first transparent conductive pattern layer LY1 .

[0181] For example, Figures 17 to 19As shown, in the display panel provided by the embodiment of the present disclosure, a portion of the plurality of second conductive lines Lb are located in the second transparent conductive pattern layer LY2 , and another portion of the plurality of second conductive lines Lb are located in the first transparent conductive pattern layer LY1 .

[0182] For example, Figures 17 to 19 As shown, in the display panel provided by the embodiment of the present disclosure, a portion of the plurality of fourth conductive lines Ld is located in the second transparent conductive pattern layer LY2, and another portion of the plurality of fourth conductive lines Ld is located in the first transparent conductive pattern layer LY1.

[0183] like Fig.17 As shown, in at least one group of light-emitting elements and at least one group of pixel circuits, some first conductive lines La and fourth conductive lines Ld close to the second symmetry axis X2 are located in the second transparent conductive pattern layer LY2, while some first conductive lines La and fourth conductive lines Ld away from the second symmetry axis X2 are located in the first transparent conductive pattern layer LY1.

[0184] For example, Fig.18 As shown, in the display panel provided by the embodiment of the present disclosure, the fourth portion P4 and the second portion P2 are located on the same side of the third portion P3.

[0185] Fig.19 and Fig. 20 , the conductive line L1 located in the first transparent conductive pattern layer LY1 and the conductive line L2 located in the second transparent conductive pattern layer LY2 are shown. The second light-emitting element and the third light-emitting element near the center of the second display area are connected to the second type of pixel circuit through the conductive line crossing at least two groups of light-emitting elements in the second direction Y. The conductive line crossing at least two groups of light-emitting elements in the second direction Y is located in the first transparent conductive pattern layer LY1.

[0186] For example, Figures 17 to 19 As shown, the pixel circuit adopts a vertical 2-in-1 design, that is, two first-type pixel circuits are arranged between adjacent second-type pixel circuits, and the extra pixel circuits in one column are second-type pixel circuits.

[0187] For example, the first light emitting element and the fourth light emitting element emit green light, the second light emitting element emits red light, and the third light emitting element emits blue light.

[0188] For example, taking the upper left corner of the second display area including 40 columns of pixel units as an example, at the uppermost end of the second display area, the pixel units in the 28th to 40th columns all preferentially use the second transparent conductive pattern layer LY2, that is, the 19th and 20th rows of light-emitting elements preferentially use the conductive wires located in the second transparent conductive pattern layer LY2, and after the space for the conductive wires in the second transparent conductive pattern layer LY2 is insufficient for the 18th row and below, the conductive wires located in the first transparent conductive pattern layer LY1 are used to connect the pixel units in the 1st to 27th columns; among the light-emitting elements in the 1st to 8th rows, affected by the line width and line spacing of the conductive wires of the first transparent conductive pattern layer LY1 and the second transparent conductive pattern layer LY2, the connection method of the horizontal conductive wires no longer satisfies the connection of the pixel units, and at this time, the conductive wires located in the second transparent conductive pattern layer LY2 are preferentially used to connect the G pixel units in the 28th to 40th columns, and the remaining 6 columns of R / G pixel units, the light-emitting elements in the 1st to 27th columns are connected in sequence using the conductive wires located in the first transparent conductive pattern layer LY1 and the second transparent conductive pattern layer LY2. There are 6 columns and 8 rows of R / B pixel units remaining, and the R / B pixel units are connected longitudinally using the conductive wires located in the first transparent conductive pattern layer LY1. For example, when the 6 columns and 8 rows of R / B pixel units are connected using conductive wires and pixel circuits, a column of dummy pixel circuits is provided in between, and the dummy pixel circuits are not provided with vias VH penetrating the planarization layer. The conductive wires used for the 6 columns and 8 rows of R / B pixel units are arranged in the following manner: Fig.21 shown.

[0189] From the simulation data, taking the first row of pixels as an example, the closest wiring capacitance of the G pixel unit is 49.24fF, the farthest wiring capacitance is 320.87fF, and the ratio of the maximum value to the minimum value is 6.51. The closest wiring capacitance of the R pixel unit is 186.56fF, the farthest wiring capacitance is 730.65fF, and the closest wiring capacitance of the B pixel unit is 201.56fF, and the farthest wiring capacitance is 759.08fF. Due to the use of the G priority setting method, the conductive line length of the R / B pixel unit is greater than the conductive line length of the G pixel unit, so the difference between the maximum and minimum values ​​of the capacitance of the R pixel unit and the B pixel unit can be reduced. At the same time, the ratio of the maximum value to the minimum value of the R and B pixel units is 3.9 and 3.7 respectively. If the conductive lines of the R / G / B pixel units are connected in sequence without adopting the G priority setting, the ratios of the maximum and minimum values ​​of the conductive lines are 14.2, 12, and 10, respectively. Compared with the design in which the conductive lines of the RGB pixel units are connected in sequence, the display panel provided by the embodiment of the present disclosure adopts the G priority setting, which can reduce the difference between the maximum and minimum values ​​of the capacitance of the R / G / B pixel units, and is more conducive to algorithm compensation and improves the display effect. At the same time, the display panel provided by the embodiment of the present disclosure only uses two transparent conductive pattern layers to form the conductive lines, which can better reduce the production cost compared with the original method of forming the conductive lines with three transparent conductive pattern layers.

[0190] In the drawings provided by the embodiments of the present disclosure, the conductive lines with relatively lighter colors are conductive lines located in the second transparent conductive pattern layer LY2 , and the conductive lines with relatively darker colors are conductive lines located in the first transparent conductive pattern layer LY1 .

[0191] Fig. 22 FIG. 1 is a schematic diagram of a layer structure of a display panel provided by an embodiment of the present disclosure. Fig. 22 As shown, the pixel circuit 100a is located on the base substrate BS, the insulating layer 700 is located on the pixel circuit 100a, the first transparent conductive pattern layer LY1 is located on the insulating layer 700, the insulating layer 701 is located on the first transparent conductive pattern layer LY1, the second transparent conductive pattern layer LY2 is located on the insulating layer 701, the insulating layer 702 is located on the second transparent conductive pattern layer LY2, and the light emitting element 100b is located on the insulating layer 702. The light emitting element 100b includes a first electrode E1, a second electrode E2, and a light emitting functional layer FL located between the first electrode E1 and the second electrode E2. The first electrode E1 is closer to the base substrate BS than the second electrode E2.

[0192] In the embodiments of the present disclosure, the number of light emitting elements is not limited to that shown in the figure and can be set as needed.

[0193] Fig.23 A schematic diagram of a layer structure of a display panel provided by an embodiment of the present disclosure. Fig. 22 Compared with the display panel shown in FIG. 1 , the positions of the second transparent conductive pattern layer LY2 and the first transparent conductive pattern layer LY1 are swapped.

[0194] For example, Fig. 22 As shown, in the display panel provided by the embodiment of the present disclosure, the first transparent conductive pattern layer LY1 is closer to the base substrate BS than the second transparent conductive pattern layer LY2.

[0195] For example, Fig.23 As shown, in the display panel provided by the embodiment of the present disclosure, the second transparent conductive pattern layer LY2 is closer to the base substrate BS than the first transparent conductive pattern layer LY1.

[0196] Fig. 22 and Fig.23 The stacking of the film layers is shown, but the connection relationship between the components of each layer structure is not shown.

[0197] Fig.24 A schematic diagram of a first pixel unit in a display panel provided according to an embodiment of the present disclosure. Fig.24 A first pixel unit 101 is shown. Fig.25 A schematic diagram of a second pixel unit in a display panel provided according to an embodiment of the present disclosure. Fig.24A first pixel unit 102 is shown.

[0198] like Fig.24 As shown, a buffer layer BL is disposed on the substrate BS, an isolation layer BR is disposed on the buffer layer BL, an active layer LY0 is disposed on the isolation layer BR, an insulating layer ISL1 is disposed on the active layer LY0, a conductive layer LYa is disposed on the insulating layer ISL1, an insulating layer ISL2 is disposed on the conductive layer LYa, a conductive layer LYb is disposed on the insulating layer ISL2, an insulating layer ISL3 is disposed on the conductive layer LYb, and a conductive layer LYc is disposed on the insulating layer ISL3. The conductive layer LYc includes a connecting electrode CE01, and the connecting electrode CE01 is connected to the light emitting control transistor T through a via hole V8 penetrating the insulating layer ISL1, the insulating layer ISL2 and the insulating layer ISL3. 5 is connected to the second electrode T52, insulating layers ISL4 and ISL5 are arranged on the conductive layer LYc, and conductive layer LYd is arranged on the insulating layers ISL4 and ISL5, the conductive layer LYd includes a connecting electrode CE02, and the connecting electrode CE02 is connected to the connecting electrode CE01 through a via hole V32 penetrating the fourth insulating layer ISL4, and a fifth insulating layer ISL5 is arranged on the fourth conductive layer LYd, and the light-emitting element 100b (the first region light-emitting element 30) is connected to the connecting electrode CE02 through a via hole Vf penetrating the insulating layer ISL5, and the connecting electrode CE02 is connected to the connecting electrode CE01 through a via hole VH penetrating the insulating layer ISL4. The light-emitting element 100b includes a first electrode E1, a second electrode E2, and a light-emitting functional layer FL located between the first electrode E1 and the second electrode E2. For example, the connecting element CE0 includes a connecting electrode CE01 and a connecting electrode CE02.

[0199] Fig.24 Also shown are the second electrode T52 of the light emitting control transistor T5, the light emitting control line EML, the first electrode T51 of the light emitting control transistor T5, the first electrode Ca of the storage capacitor, the second electrode Cb of the storage capacitor, the second electrode T42 of the light emitting control transistor T4, the gate line GT, the data line DT, the reset control signal line RST, and the initialization signal line INT.

[0200] Fig.24 Also shown are a pixel definition layer PDL and a spacer PS, the pixel definition layer PDL having an opening OPN2 configured to define a light emitting area (light emitting region, effective light emitting area) of a pixel unit, and the spacer PS configured to support a fine metal mask when forming the light emitting function layer FL.

[0201] For example, Fig.24 As shown, the opening OPN2 is the light emitting area of ​​the pixel unit. The light emitting function layer FL is located on the first electrode E1 of the light emitting element 100b, and the second electrode E2 of the light emitting element 100b is located on the light emitting function layer FL. Fig.24 As shown, a packaging layer CPS is disposed on the light emitting element 100b. The packaging layer CPS includes a first packaging layer CPS1, a second packaging layer CPS2, and a third packaging layer CPS3. For example, the first packaging layer CPS1 and the third packaging layer CPS3 are inorganic material layers, and the second packaging layer CPS2 is an organic material layer. For example, the first electrode E1 is an anode of the light emitting element 100b, and the second electrode E2 is a cathode of the light emitting element 100b, but is not limited thereto.

[0202] Fig.25 A conductive line L1 is shown, one end of which is connected to the second-region light-emitting element 40 in the second display region R2, and the other end of the conductive line L1 is connected to the pixel circuit.

[0203] For example, Fig.25 , Figures 7 to 21 As shown, the plurality of conductive lines L1 are located between the plurality of light emitting elements 100b and the plurality of pixel circuits 100a in a direction perpendicular to the main surface of the base substrate BS. Fig.24 and Fig.25 The entire structure of the pixel circuit 100 a is not shown.

[0204] Fig.24 and Fig.25 The insulation layer ISL4 includes an insulation sublayer ISL41 and an insulation sublayer ISL42 as an example for description.

[0205] Fig.26 A cross-sectional view of a display panel. Fig.26 FIG. 1 is a schematic diagram of an exposure process for patterning a transparent conductive film in the process of forming a conductive line L1 . Fig. 27 A schematic diagram of forming a photoresist pattern. Fig.28 is a schematic diagram of forming a conductive line. Fig.26 As shown, the first conductive element 111 is located on the substrate BS; the first planarization layer 121 is located on the first conductive element 111; the second conductive element 112 is located on the first planarization layer 121 and is connected to the first conductive element 111 through a via V0 penetrating the first planarization layer 121; and the second planarization layer 122 is located on the second conductive element 112. Fig.26 As shown, forming the conductive line L1 includes forming a transparent conductive film F1 on the second planarization layer 122, forming a photoresist film 201 on the transparent conductive film F1, and exposing the photoresist film 201 using a mask plate 202 as a mask, so that the photoresist film 201 forms a photoresist reserved portion 2011 and a photoresist to be removed portion 2012. Fig. 27 As shown, after the exposure process, a development process is performed, in which the photoresist portion to be removed 2012 is removed to form a photoresist pattern 201a. Fig.28As shown, the transparent conductive film F1 is etched using the photoresist pattern 201a as a mask to form a conductive line L1. For example, the conductive line L1 includes a plurality of lines. An insulating layer is disposed between adjacent transparent conductive layers.

[0206] After the exposure process, the photoresist of the transparent conductive film is exposed to breakage and thinning, resulting in the breakage or thinning of the conductive line after development and etching, which causes dark spots to appear on the display. The optical microscope confirms that the position where the conductive line is broken or thinned is the position where the conductive line crosses the via hole V0 of the first planarization layer 121. Further, by performing focused ion beam (FIB) analysis on the cross section at the via hole V0 of the first planarization layer 121, it is found that the conductive line crossing the via hole V0 has a bowl-shaped portion of the second conductive element 112 below the position where the conductive line is broken or thinned. Therefore, if Fig.26 As shown in FIG. 1 , the reason for determining that the conductive line is broken and thinned is that: during the exposure process, the second conductive element 112 reflects light and focuses it on the photoresist reserved portion 2011 located above the bowl-shaped portion of the second conductive element 112 (corresponding to the position of the via hole V0), so that this part of the photoresist is exposed or partially exposed, and is washed away after development, so that the conductive line formed after etching the transparent conductive film using the photoresist pattern 201a as a mask is broken and thinned. Figure 26 to Figure 28 As shown, the photoresist remaining portion 2011 located in the middle is irradiated by part of the reflected light, so that the conductive line thereunder becomes thinner.

[0207] Figure 26 to Figure 28 The first conductive element 111 in the embodiment may be Fig.24 and Fig.25 The connecting electrode CE01 in the embodiment of the present invention, the second conductive element 112 may be Fig.24 and Fig.25 The connecting electrode CE02 in.

[0208] Fig.29 A schematic diagram of a first type of pixel circuit in a first display area of ​​a display panel provided in an embodiment of the present disclosure. Fig.30 for Fig.29 Schematic diagram of some membrane layers in . Fig.31 A schematic diagram of a portion of film layers in a first type of pixel circuit in a first display area of ​​a display panel provided in an embodiment of the present disclosure.

[0209] Fig.32 A schematic diagram of a second type of pixel circuit in a first display area of ​​a display panel provided in an embodiment of the present disclosure. Fig.33 for Fig.32 Schematic diagram of some membrane layers in . Fig.34 A schematic diagram of a portion of film layers in a second type of pixel circuit in a first display area of ​​a display panel provided in an embodiment of the present disclosure.

[0210] Fig.35 A schematic diagram of a pixel circuit in a region with longitudinal conductive lines in a first display area of ​​a display panel provided in an embodiment of the present disclosure. Fig.36 for Fig.35 Schematic diagram of some membrane layers in . Fig.37 A schematic diagram of a portion of a film layer in a region having longitudinal conductive lines in a first display area of ​​a display panel provided in an embodiment of the present disclosure.

[0211] In order to reduce the disconnection or thinning of the conductive line L1, in the dummy pixel circuit 200, the connection electrode CE02 is not provided, and further, the dummy pixel circuit 200 does not have a via hole VH penetrating the insulating layer ISL4. In some embodiments, the dummy pixel circuit 200 does not have a connection electrode CE02, but is not limited thereto. In other embodiments, the dummy pixel circuit 200 has a connection electrode CE02, and the connection electrode CE02 is not connected to the connection electrode CE01 through a via hole. That is, in the dummy pixel circuit 200, the connection electrode CE02 is insulated from the connection electrode CE01, and no via hole is provided between the connection electrode CE02 and the connection electrode CE01.

[0212] For example, Fig.24 and Fig.25 As shown, in the display panel provided in the embodiment of the present disclosure, the display panel further includes a planarization layer PLN, Fig.24 and Fig.25 The insulating layer ISL4 may be a planarization layer PLN, and the planarization layer PLN is located between the first electrode E1 of the light emitting element and the pixel circuit 100 a.

[0213] like Figure 29 to Figure 31 , Figure 25 to Figure 27 As shown, the orthographic projection of the via hole VH in the planarization layer PLN on the base substrate does not overlap with the orthographic projection of the dummy pixel circuit 200 on the base substrate. Thus, the part of the conductive line L1 located in the dummy pixel circuit 200 can be prevented from being thinned or broken.

[0214] like Fig.30 As shown, no via hole VH is provided at the position of the dotted frame R3, and no connecting electrode CE02 is provided.

[0215] like Fig.30 As shown, the data line DTm of the dummy pixel circuit 200 is disconnected. The data line DTm is disconnected at the position of the dotted line frame R4 to form a plurality of disconnected parts. The data line DTm is not connected to the pixel circuit.

[0216] like Fig.37 As shown, no via hole VH is provided at the position of the dotted frame R5, and no connecting electrode CE02 is provided.

[0217] The display panel provided by some embodiments of the present disclosure includes a fourth light-emitting element, and in other embodiments, the display panel may not include the fourth light-emitting element. In the case where the display panel does not include the fourth light-emitting element, the fourth light-emitting element and the pixel circuit connected to the fourth light-emitting element in the figure can be removed, and the positions of other components can be adjusted accordingly.

[0218] For example, the transistors in the pixel circuit of the embodiment of the present disclosure are all thin film transistors. For example, the conductive layer LYa, the conductive layer LYb, the conductive layer LYc, and the conductive layer LYd are all made of metal materials. For example, the conductive layer LYa and the conductive layer LYb are formed of metal materials such as nickel and aluminum, but are not limited thereto. For example, the conductive layer LYc and the conductive layer LYd are formed of materials such as titanium and aluminum, but are not limited thereto. For example, the conductive layer LYc and the conductive layer LYd are respectively structures formed of three sublayers of Ti / AL / Ti, but are not limited thereto. For example, the substrate substrate can be a glass substrate or a polyimide substrate, but is not limited thereto, and can be selected as needed. For example, the buffer layer BL, the isolation layer BR, the insulating layer ISL1, the insulating layer ISL2, the insulating layer ISL3, the insulating layer ISL4, and the insulating layer ISL5 are all made of insulating materials. For example, the materials of the insulating layer ISL4 and the insulating layer ISL5 include organic insulating materials, and the organic insulating materials include resins, but are not limited thereto. The materials of the first electrode E1 and the second electrode E2 of the light-emitting element can be selected as needed. In some embodiments, the first electrode E1 may be made of at least one of a transparent conductive metal oxide and silver, but is not limited thereto. For example, the first electrode E1 may be made of a structure in which three sub-layers of ITO-Ag-ITO are stacked. In some embodiments, the second electrode E2 may be a metal with a low work function, and may be made of at least one of magnesium and silver, but is not limited thereto.

[0219] For example, the first transparent conductive pattern layer LY1 and the second transparent conductive pattern layer LY2 are both made of transparent conductive metal oxide, and the transparent conductive metal oxide includes indium tin oxide (ITO), but is not limited thereto.

[0220] At least one embodiment of the present disclosure provides a display device, comprising any one of the above-mentioned display panels.

[0221] Fig.38 and Fig.39 Schematic diagram of a display device provided by an embodiment of the present disclosure. Fig.38 and Fig.39 As shown, the sensor SS is located on one side of the display panel DS and in the second display area R2. Ambient light can pass through the second display area R2 and be sensed by the sensor SS. Fig.39 As shown, the side of the display panel where no sensor SS is provided is the display side, which can display images. For example, the sensor includes a photosensitive sensor, and the photosensitive sensor is located on one side of the display panel.

[0222] For example, the second display area R2 may be a rectangle, and the area of ​​the orthographic projection of the sensor SS on the base substrate BS may be less than or equal to the area of ​​the inscribed circle of the second display area R2. That is, the size of the area where the sensor SS is located may be less than or equal to the size of the inscribed circle of the second display area R2. For example, the size of the area where the sensor SS is located is equal to the size of the inscribed circle of the second display area R2, that is, the shape of the area where the sensor SS is located may be a circle, and accordingly, the area where the sensor SS is located may also be called a light-transmitting hole. Of course, in some embodiments, the second display area R2 may also be other shapes besides a rectangle, such as a circle or an ellipse.

[0223] For example, the display device is a full-screen display device with an under-screen camera. For example, the display device includes OLED or a product including OLED. For example, the display device includes any product or component with a display function, such as a TV, a digital camera, a mobile phone, a watch, a tablet computer, a laptop computer, a navigator, etc., containing the above display panel.

[0224] In the related art, the pixel circuit (including the first type of pixel circuit 10 and the second type of pixel circuit 20) and the first area light emitting element 30 have the same size (pitch). For example, the general width is about 30 micrometers (μm) to 32μm, and the length is about 60μm to 65μm. In the embodiment of the present disclosure, in order to provide sufficient space for the arrangement of the second type of pixel circuit 20 without reducing the number of pixels in the first display area R1, each pixel circuit can be compressed along the first direction X (such as the gate line extension direction, which can also be called the horizontal direction) so that the width of the pixel circuit in the first direction is smaller than the width of the first area light emitting element 30; or, the first area light emitting element 30 can be extended along the first direction X so that the width of the first area light emitting element 30 in the first direction X is larger than the width of the first area light emitting element 30. In this way, under the premise that the size of the substrate BS is the same, more areas can be provided in the first display area R1, and accordingly, the second type of pixel circuit 20 for driving the second light emitting element 40 located in the second display area R2 can be provided in the more areas.

[0225] For example, the width of each pixel circuit may differ from the width of the first region light emitting element 30 by about 4 μm. Taking the compressed pixel circuit and the width difference of 4 μm as an example, Fig.40 The structure of the pixel circuit before and after compression is shown. Fig.40It can be seen that the pixel circuit may include a driving structure and a connecting element CE0 for connecting to the first pole (anode) of the light-emitting element, and the size of the connecting element CE0 may represent the size of the pixel circuit. The sizes of the pixel circuit and the light-emitting element before compression are both 1-100 μm in width and 2-100 μm in height. The size of the light-emitting element after compression may remain unchanged compared to that before compression. For example, the size of the second-region light-emitting element 40 may be equal to or less than the size of the first-region light-emitting element 20. The height of the compressed pixel circuit remains unchanged, but the width is narrowed by 1-20 μm. In this way, one or more columns of compressed pixel circuits will be added every few columns of compressed pixel circuits, and this design is adopted for the entire screen to achieve full-screen compression. Among them, these extra columns can be selected to connect the second-region light-emitting element 40 in the second display area R2 to control the second-region light-emitting element 40 to emit light. In some embodiments, the extra column pixel circuits near the periphery of the second display area R2 are selected as the second type of pixel circuit 20 connected to the second-region light-emitting element 40. In this way, normal display can be achieved without changing the resolution of the display panel. That is, the existing space of the display panel is fully utilized to achieve normal display. The effect achieved by compressing the size of the pixel circuit is that the number of light-emitting elements (including the first region light-emitting elements 30 and the second light-emitting elements 40) remains unchanged, and thus, there is no obvious difference in display effect compared with before compression, and the display effect of the display panel is better.

[0226] Fig.41 is a schematic diagram of a pixel unit in a display panel. Fig.40 FIG. 4 shows a pixel circuit of a pixel unit of a display panel, such as Fig.40 As shown, the pixel unit 100 includes a pixel circuit 100a and a light-emitting element 100b. The pixel circuit 100a includes six switch transistors (T2-T7), a drive transistor T1 and a storage capacitor Cst. The six switch transistors are respectively a data write transistor T2, a threshold compensation transistor T3, a first light-emitting control transistor T4, a second light-emitting control transistor T5, a first reset transistor T6, and a second reset transistor T7. The light-emitting element 100b includes a first electrode E1 and a second electrode E2 and a light-emitting functional layer located between the first electrode E1 and the second electrode E2. For example, the first electrode E1 is an anode and the second electrode E2 is a cathode. Typically, the threshold compensation transistor T3 and the first reset transistor T6 use a dual-gate thin film transistor (TFT) to reduce leakage.

[0227] like Fig.40As shown, the display panel includes a gate line GT, a data line DT, a first power line PL1, a second power line PL2, a light-emitting control signal line EML, an initialization signal line INT, a reset control signal line RST, etc. For example, the reset control signal line RST includes a first reset control signal line RST1 and a second reset control signal line RST2. The first power line PL1 is configured to provide a constant first voltage signal VDD to the pixel unit 100, the second power line PL2 is configured to provide a constant second voltage signal VSS to the pixel unit 100, and the first voltage signal VDD is greater than the second voltage signal VSS. The gate line GT is configured to provide a scan signal SCAN to the pixel unit 100, the data line DT is configured to provide a data signal DATA (data voltage VDATA) to the pixel unit 100, the light-emitting control signal line EML is configured to provide a light-emitting control signal EM to the pixel unit 100, the first reset control signal line RST1 is configured to provide a first reset control signal RESET1 to the pixel unit 100, and the second reset control signal line RST2 is configured to provide a scan signal SCAN to the pixel unit 100. For example, in a row of pixel units, the second reset control signal line RST2 can be connected to the gate line GT to be input with the scan signal SCAN. Of course, the second reset control signal line RST2 can also be input with the second reset control signal RESET2. The first initialization signal line INT1 is configured to provide the first initialization signal Vinit1 to the pixel unit 100. The second initialization signal line INT2 is configured to provide the second initialization signal Vinit2 to the pixel unit 100. For example, the first initialization signal Vinit1 and the second initialization signal Vinit2 are constant voltage signals, and their magnitudes can be, for example, between the first voltage signal VDD and the second voltage signal VSS, but are not limited thereto, for example, the first initialization signal Vinit1 and the second initialization signal Vinit2 can both be less than or equal to the second voltage signal VSS. For example, in some embodiments, the first initialization signal line INT1 and the second initialization signal line INT1 are connected, and are both configured to provide the initialization signal Vinit to the pixel unit 100, that is, the first initialization signal line INT1 and the second initialization signal line INT2 are both called initialization signal lines INT, and the first initialization signal Vinit1 and the second initialization signal Vinit2 are equal, both Vinit.

[0228] like Fig.40 As shown, the driving transistor T1 is electrically connected to the light emitting element 100b, and outputs a driving current to drive the light emitting element 100b to emit light under the control of the scan signal SCAN, the data signal DATA, the first voltage signal VDD, the second voltage signal VSS and other signals.

[0229] For example, the light emitting element 100b includes an organic light emitting diode (OLED), and the light emitting element 100b emits red light, green light, blue light, or white light, etc. when driven by its corresponding pixel circuit 100a. For example, a pixel includes a plurality of pixel units. A pixel may include a plurality of pixel units that emit light of different colors. For example, a pixel includes a pixel unit that emits red light, a pixel unit that emits green light, and a pixel unit that emits blue light, but is not limited thereto. The number of pixel units included in a pixel and the light emitting condition of each pixel unit may be determined as required.

[0230] For example, Fig.40 As shown, the gate T20 of the data writing transistor T2 is connected to the gate line GT, the first electrode T21 of the data writing transistor T2 is connected to the data line DT, and the second electrode T22 of the data writing transistor T2 is connected to the first electrode T11 of the driving transistor T1.

[0231] For example, Fig.40 As shown, the pixel circuit 100a further includes a threshold compensation transistor T3, a gate T30 of the threshold compensation transistor T3 is connected to the gate line GT, a first electrode T31 of the threshold compensation transistor T3 is connected to the second electrode T12 of the driving transistor T1, and a second electrode T32 of the threshold compensation transistor T3 is connected to the gate T10 of the driving transistor T1.

[0232] For example, Fig.40 As shown, the display panel also includes a light emitting control signal line EML, and the pixel circuit 100a also includes a first light emitting control transistor T4 and a second light emitting control transistor T5, a gate T40 of the first light emitting control transistor T4 is connected to the light emitting control signal line EML, a first electrode T41 of the first light emitting control transistor T4 is connected to the first power line PL1, and a second electrode T42 of the first light emitting control transistor T4 is connected to a first electrode T11 of the driving transistor T1; a gate T50 of the second light emitting control transistor T5 is connected to the light emitting control signal line EML, a first electrode T51 of the second light emitting control transistor T5 is connected to a second electrode T12 of the driving transistor T1, and a second electrode T52 of the second light emitting control transistor T5 is connected to a first electrode E1 of the light emitting element 100b.

[0233] like Fig.40As shown, the first reset transistor T6 is connected to the gate T10 of the driving transistor T1 and is configured to reset the gate of the driving transistor T1, and the second reset transistor T7 is connected to the first electrode E1 of the light-emitting element 100b and is configured to reset the first electrode E1 of the light-emitting element 100b. The first initialization signal line INT1 is connected to the gate of the driving transistor T1 through the first reset transistor T6. The second initialization signal line INT2 is connected to the first electrode E1 of the light-emitting element 100b through the second reset transistor T7. For example, the first initialization signal line INT1 and the second initialization signal line INT2 are connected to be input with the same initialization signal, but not limited to this. In some embodiments, the first initialization signal line INT1 and the second initialization signal line INT2 can also be insulated from each other and configured to input signals separately.

[0234] For example, Fig.40 As shown, the first electrode T61 of the first reset transistor T6 is connected to the first initialization signal line INT1, the second electrode T62 of the first reset transistor T6 is connected to the gate T10 of the driving transistor T1, the first electrode T71 of the second reset transistor T7 is connected to the second initialization signal line INT2, and the second electrode T72 of the second reset transistor T7 is connected to the first electrode E1 of the light emitting element 100b. Fig.40 As shown, the gate T60 of the first reset transistor T6 is connected to the first reset control signal line RST1, and the gate T70 of the second reset transistor T7 is connected to the second reset control signal line RST2.

[0235] like Fig.40 As shown, the first power line PL1 is configured to provide a first voltage signal VDD to the pixel circuit 100a; the pixel circuit also includes a storage capacitor Cst, a first plate Ca of the storage capacitor Cst is connected to the gate T10 of the driving transistor T1, and a second plate Cb of the storage capacitor Cst is connected to the first power line PL1.

[0236] For example, Fig.40 As shown, the display panel further includes a second power line PL2, and the second power line PL2 is connected to the second electrode E2 of the light emitting element 100b.

[0237] Fig.40 A first node N1 , a second node N2 , a third node N3 , and a fourth node N4 are shown.

[0238] The above description is made using a 7T1C pixel circuit as an example, and the embodiments of the present disclosure include but are not limited to this. It should be noted that the embodiments of the present disclosure do not limit the number of thin-film transistors and the number of capacitors included in the pixel circuit. For example, in some other embodiments, the pixel circuit of the display panel may also be a structure including other numbers of transistors, such as a 7T2C structure, a 6T1C structure, a 6T2C structure or a 9T2C structure, and the embodiments of the present disclosure do not limit this. Of course, the display panel may also include a pixel circuit with less than 7 transistors.

[0239] In the embodiments of the present disclosure, the components located in the same layer may be formed by the same film layer through the same patterning process. For example, the components located in the same layer may be located on a surface of the same component away from the base substrate.

[0240] It should be noted that, for the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of the layer or region is exaggerated. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element, or there may be an intermediate element.

[0241] In the embodiments of the present disclosure, the patterning or patterning process may include only the photolithography process, or include the photolithography process and the etching step, or may include other processes such as printing and inkjetting for forming a predetermined pattern. The photolithography process refers to a process including film formation, exposure, and development, and a pattern is formed using a photoresist, a mask, an exposure machine, etc. The corresponding patterning process can be selected according to the structure formed in the embodiments of the present disclosure.

[0242] In the absence of conflict, features in the same embodiment and different embodiments of the present disclosure may be combined with each other.

[0243] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A display panel, comprising: A substrate, a plurality of light emitting elements, a plurality of pixel circuits, and a plurality of conductive lines, wherein: The base substrate has a first display area and a second display area, and the first display area is located on at least one side of the second display area; The plurality of light-emitting elements are located in the first display area and the second display area, the plurality of light-emitting elements include a plurality of groups of light-emitting elements, the light-emitting elements in each group of the plurality of groups of light-emitting elements are arranged along a first direction, the plurality of groups of light-emitting elements are arranged along a second direction, at least one group of the plurality of groups of light-emitting elements includes a plurality of first-region light-emitting elements and a plurality of second-region light-emitting elements, the plurality of first-region light-emitting elements are located in the first display area, and the plurality of second-region light-emitting elements are located in the second display area; The plurality of pixel circuits are located in the first display area, the plurality of pixel circuits include a plurality of groups of pixel circuits, the pixel circuits in each group of the plurality of groups of pixel circuits are arranged along the first direction, the plurality of groups of pixel circuits are arranged along the second direction, at least one group of the plurality of groups of pixel circuits includes a plurality of first-type pixel circuits and a plurality of second-type pixel circuits, the plurality of second-type pixel circuits are spaced and distributed between the plurality of first-type pixel circuits, At least one first-type pixel circuit among the plurality of first-type pixel circuits is connected to at least one first-region light-emitting element among the plurality of first-region light-emitting elements, and an orthographic projection of the at least one first-type pixel circuit on the substrate substrate at least partially overlaps with an orthographic projection of the at least one first-region light-emitting element on the substrate substrate; at least one second-type pixel circuit among the plurality of second-type pixel circuits is connected to at least one second-region light-emitting element among the plurality of second-region light-emitting elements through at least one conductive line among a plurality of conductive lines; The plurality of second-region light-emitting elements include a plurality of first light-emitting elements and a plurality of second light-emitting elements, wherein the first light-emitting elements are configured to emit light of a first color, and the second light-emitting elements are configured to emit light of a second color, The plurality of second-type pixel circuits include a plurality of first pixel circuits and a plurality of second pixel circuits, The plurality of conductive lines include a plurality of first conductive lines and a plurality of second conductive lines, the plurality of first light-emitting elements are connected to the plurality of first pixel circuits through the plurality of first conductive lines, the plurality of second light-emitting elements are connected to the plurality of second pixel circuits through the plurality of second conductive lines, In the at least one group of light-emitting elements and the at least one group of pixel circuits, the plurality of first pixel circuits connected to the plurality of first light-emitting elements are closer to the second display area than each of the plurality of second pixel circuits connected to the plurality of second light-emitting elements. The display panel includes a first transparent conductive pattern layer and a second transparent conductive pattern layer. At least one first conductive line among the plurality of first conductive lines is located in the second transparent conductive pattern layer, and at least one second conductive line among the plurality of second conductive lines is located in the first transparent conductive pattern layer.

2. The display panel according to claim 1, wherein: The plurality of conductive lines are located between the plurality of light emitting elements and the plurality of pixel circuits in a direction perpendicular to a main surface of the base substrate.

3. The display panel according to claim 1, wherein: At least one second conductive line close to the center of the second display area crosses over at least two groups of light emitting elements in the second direction.

4. The display panel according to claim 3, wherein: At least one second conductive line close to the center of the second display area extends from the second display area to the first display area in the second direction.

5. The display panel according to claim 1, wherein: The first conductive wire is a conductive wire of an integral structure, and the second conductive wire is a conductive wire of an integral structure.

6. The display panel according to any one of claims 1 to 5, wherein: The plurality of second region light emitting elements further include a plurality of third light emitting elements, wherein the third light emitting elements are configured to emit light of a third color. The plurality of second-type pixel circuits further include a plurality of third pixel circuits, The plurality of conductive lines further include a plurality of third conductive lines, and the plurality of third light emitting elements are connected to the plurality of third pixel circuits through the plurality of third conductive lines. In the at least one group of light-emitting elements and the at least one group of pixel circuits, the plurality of first pixel circuits connected to the plurality of first conductive lines are closer to the second display area than each of the plurality of third pixel circuits connected to the plurality of third conductive lines. A portion of the plurality of third conductive lines is located in the first transparent conductive pattern layer, and another portion of the plurality of third conductive lines is located in the second transparent conductive pattern layer.

7. The display panel according to claim 6, wherein: At least one third conductive line close to the center of the second display area crosses over at least two groups of light emitting elements in the second direction.

8. The display panel according to claim 7, wherein: At least one third conductive line close to the center of the second display area extends from the second display area to the first display area in the second direction.

9. The display panel according to claim 6, wherein: In the at least one group of light-emitting elements and the at least one group of pixel circuits, a first conductive line connected to the group of light-emitting elements is located on a first side of the group of light-emitting elements, and a second conductive line and a third conductive line connected to the group of light-emitting elements are located on a second side of the group of light-emitting elements, and the first side and the second side are opposite sides of the group of light-emitting elements.

10. The display panel according to claim 6, wherein: At least one of the multiple groups of pixel circuits includes a dummy pixel circuit, which is located between two second-type pixel circuits in the first direction, and the orthographic projection of at least one of a second conductive line near the center of the second display area and a third conductive line near the center of the second display area on the substrate overlaps with the orthographic projection of the dummy pixel circuit on the substrate.

11. The display panel according to claim 6, wherein: The third conductive wire is a conductive wire with an integrated structure.

12. The display panel according to claim 10, further comprising a planarization layer, wherein: The light-emitting element includes a first electrode, a second electrode and a light-emitting functional layer located between the first electrode and the second electrode, the first electrode is closer to the base substrate than the second electrode, the planarization layer is located between the first electrode of the light-emitting element and the pixel circuit, and the orthographic projection of the via in the planarization layer on the base substrate does not overlap with the orthographic projection of the dummy pixel circuit on the base substrate.

13. The display panel according to claim 10, wherein: A second conductive line near the center of the second display area and a third conductive line near the center of the second display area include a first part, a second part, a third part, and a fourth part connected in sequence, the second part and the fourth part extend along the first direction, and the first part and the third part extend along the second direction.

14. The display panel according to claim 13, wherein: An orthographic projection of the third portion on the base substrate overlaps with an orthographic projection of the dummy pixel circuit on the base substrate.

15. The display panel according to claim 13 or 14, wherein: The fourth portion and the second portion are located on the same side of the third portion.

16. The display panel according to claim 13 or 14, wherein: The fourth portion and the second portion are located on both sides of the third portion.

17. The display panel according to claim 6, wherein: The plurality of second region light emitting elements further include a plurality of fourth light emitting elements, wherein the fourth light emitting elements are configured to emit fourth color light. The plurality of second-type pixel circuits further include a plurality of fourth pixel circuits, The plurality of conductive lines further include a plurality of fourth conductive lines, and the plurality of fourth light emitting elements are connected to the plurality of fourth pixel circuits through the plurality of fourth conductive lines. In the at least one group of light-emitting elements and the at least one group of pixel circuits, the plurality of fourth pixel circuits connected to the plurality of fourth conductive lines are closer to the second display area than each of the plurality of second pixel circuits connected to the plurality of second conductive lines.

18. The display panel according to claim 17, wherein: At least one group of light-emitting elements includes a first subgroup of light-emitting elements and a second subgroup of light-emitting elements, wherein the first subgroup of light-emitting elements is closer to an edge of the second display area than the second subgroup of light-emitting elements, or the second subgroup of light-emitting elements is closer to a center of the second display area than the first subgroup of light-emitting elements; The at least one group of light-emitting elements includes a first group of light-emitting elements, in which the conductive lines connected to the second light-emitting element and the third light-emitting element in the first subset of light-emitting elements are all located in the first transparent conductive pattern layer, and the conductive lines connected to the first light-emitting element and the fourth light-emitting element in the first subset of light-emitting elements are all located in the second transparent conductive pattern layer; the conductive lines connected to the second light-emitting element and the third light-emitting element in the second subset of light-emitting elements are all located in the first transparent conductive pattern layer, and the conductive lines connected to the first light-emitting element and the fourth light-emitting element in the second subset of light-emitting elements are all located in the second transparent conductive pattern layer.

19. The display panel according to claim 18, wherein: The at least one group of light-emitting elements includes a second group of light-emitting elements, and the second group of light-emitting elements is closer to the center of the second display area than the first group of light-emitting elements. In the second group of light-emitting elements, the conductive lines connected to the light-emitting elements in the first subgroup of light-emitting elements are all located in the first transparent conductive pattern layer, and the conductive lines connected to the light-emitting elements in the second subgroup of light-emitting elements are all located in the second transparent conductive pattern layer.

20. The display panel according to any one of claims 17 to 19, wherein: The fourth conductive wire is a conductive wire with an integrated structure.

21. The display panel according to any one of claims 1 to 20, wherein: The first transparent conductive pattern layer is closer to the base substrate than the second transparent conductive pattern layer.

22. The display panel according to any one of claims 1 to 5, wherein: The second transparent conductive pattern layer is closer to the base substrate than the first transparent conductive pattern layer.

23. The display panel according to any one of claims 1 to 5, wherein: The second display area has a first symmetry axis extending along the first direction and a second symmetry axis extending along the second direction, and the plurality of conductive lines are axisymmetric with respect to the first symmetry axis and the second symmetry axis.

24. The display panel according to any one of claims 1 to 5, wherein: In the first direction, two first-type pixel circuits are arranged between two adjacent second-type pixel circuits.

25. The display panel according to any one of claims 1 to 5, wherein: An orthographic projection of a portion of the first conductive line extending along the first direction on the base substrate and an orthographic projection of a portion of the second conductive line extending along the first direction on the base substrate do not overlap.

26. The display panel according to claim 17, wherein: The fourth light-emitting element and the first light-emitting element are configured to emit green light, one of the second light-emitting element and the third light-emitting element is configured to emit red light, and the other of the second light-emitting element and the third light-emitting element is configured to emit blue light.

27. The display panel according to any one of claims 1 to 5, wherein: A portion of the plurality of first conductive lines is located in the second transparent conductive pattern layer, and another portion of the plurality of first conductive lines is located in the first transparent conductive pattern layer; A portion of the plurality of second conductive lines is located in the second transparent conductive pattern layer, and another portion of the plurality of second conductive lines is located in the first transparent conductive pattern layer.

28. The display panel according to any one of claims 1 to 5, wherein: The display panel includes only the first transparent conductive pattern layer and the second transparent conductive pattern layer for forming the plurality of conductive lines.

29. A display device comprising the display panel according to any one of claims 1-28.

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