Display device

Abstract

A display device according to an exemplary embodiment of the present disclosure includes a substrate in which an emission area and a non-emission area are divided and a plurality of sub-pixels are defined, a first electrode disposed in each of the plurality of sub-pixels, a bank disposed on an insulating layer above the substrate and exposing the first electrode through an opening, a trench formed by removing a partial area of the bank between the plurality of sub-pixels to expose the insulating layer, an organic layer disposed above the substrate on which the bank is provided, a charge blocking layer interposed in the organic layer in the trench, and a second electrode disposed on the organic layer.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2021-0063499, filed on May 17, 2021, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to a display device, and more specifically, to a display device that minimizes light emission from light-emitting diodes due to leakage current. Background Technology

[0004] Currently, with the advent of the information age, the field of display devices that visually represent electrical information signals has developed rapidly, and research continues to improve the performance of various display devices, such as thinner, lighter, and lower power consumption.

[0005] Among various display devices, organic light-emitting diode (OLED) displays are self-emissive, thus requiring no separate light source, unlike liquid crystal displays (LCDs). Therefore, OLED displays can be manufactured to be lightweight and thin. Furthermore, because OLED displays are driven by low voltage, they offer advantages not only in terms of power consumption but also in terms of color reproduction, response speed, viewing angle, and contrast ratio (CR), making them a promising next-generation display technology under research. Summary of the Invention

[0006] One objective of this disclosure is to provide a display device that utilizes a multi-layer (stacked) structure of multiple stacked light-emitting units to achieve improved efficiency and lifespan characteristics.

[0007] Another objective of this disclosure is to provide a display device that utilizes a leakage current suppression structure to minimize lateral leakage current in a multi-layered structure.

[0008] Another objective of this disclosure is to provide a display device that suppresses electron tunneling in a leakage current suppression structure.

[0009] The purpose of this disclosure is not limited to the above-described purposes, and other purposes not mentioned above will be clearly understood by those skilled in the art from the following description.

[0010] According to one aspect of this disclosure, a display device may include: a substrate having an emitting region and a non-emitting region divided therein and defining a plurality of sub-pixels; a first electrode disposed in each of the plurality of sub-pixels; a dam disposed on an insulating layer above the substrate and exposing the first electrode through an opening; a trench formed by removing a portion of the dam between the plurality of sub-pixels to expose the insulating layer; an organic layer disposed above the substrate on which the dam is disposed; a charge blocking layer inserted in the organic layer in the trench; and a second electrode disposed on the organic layer.

[0011] According to another aspect of this disclosure, a display device may include: a substrate having an emitting region and a non-emitting region divided therein and defining a plurality of sub-pixels; a first electrode disposed in each of the plurality of sub-pixels; a dam disposed on an insulating layer above the substrate and exposing the first electrode through an opening; a spacer disposed on the dam between the plurality of sub-pixels and having an inverted taper (inverted cone shape); an organic layer disposed above the substrate on which the dam and the spacer are disposed; a charge blocking layer inserted into the organic layer at the lower end of the spacer; and a second electrode disposed on the organic layer.

[0012] Further details of the exemplary embodiments are included in the following detailed description and accompanying drawings.

[0013] According to this disclosure, organic light-emitting diodes with multi-layered structures are used to exhibit high efficiency, and the organic light-emitting diodes are driven with low current, thereby improving the lifetime of the organic light-emitting diodes.

[0014] According to this disclosure, a leakage current suppression structure is applied to improve the leakage of current through the side surface of an organic light-emitting diode having a multi-layered structure, thereby improving the color gamut.

[0015] According to this disclosure, a charge blocking layer is applied between the cathode and the charge generation layer in the leakage current suppression structure to improve the bluish color in low grayscale areas, thereby improving product reliability.

[0016] The effects of this disclosure are not limited to those illustrated above, and many more different effects are included in this specification. Attached Figure Description

[0017] The above and other aspects, features and other advantages of this disclosure will be more clearly understood from the following detailed description given in conjunction with the accompanying drawings, wherein:

[0018] Figure 1This is a schematic diagram of a display device according to a first exemplary embodiment of the present disclosure;

[0019] Figure 2 This is a circuit diagram of a sub-pixel of a display device according to a first exemplary embodiment of the present disclosure;

[0020] Figure 3 It is an enlarged planar view of a sub-pixel according to a first exemplary embodiment of the present disclosure;

[0021] Figure 4 It is along Figure 3 A cross-sectional view taken from line III-III′;

[0022] Figure 5A yes Figure 4 An enlarged cross-sectional view of part P1 in the image;

[0023] Figure 5B yes Figure 4 Enlarged cross-sectional view of part P2;

[0024] Figure 5C yes Figure 4 Enlarged cross-sectional view of part P3 in the image;

[0025] Figure 6 This is an enlarged cross-sectional view of a sub-pixel according to a comparative embodiment;

[0026] Figure 7 It is a graph showing an example of the degree of organic material deposition according to the cone angle of the trench;

[0027] Figures 8A to 8C It is a graph showing an example of current density based on the voltage in the red, green, and blue sub-pixels;

[0028] Figure 9A and Figure 9B It is a photograph showing the reliability results of the display panel;

[0029] Figure 10 This is an enlarged cross-sectional view of a sub-pixel according to a second exemplary embodiment of the present disclosure;

[0030] Figure 11 This is an enlarged cross-sectional view of a sub-pixel according to a third exemplary embodiment of the present disclosure;

[0031] Figure 12 This is a cross-sectional view of a sub-pixel according to a fourth exemplary embodiment of the present disclosure;

[0032] Figure 13 yes Figure 12 Enlarged cross-sectional view of part P4 in the image;

[0033] Figure 14It is a cross-sectional view of a sub-pixel according to a fifth exemplary embodiment of the present disclosure; and

[0034] Figure 15 This is a cross-sectional view of a sub-pixel according to a sixth exemplary embodiment of the present disclosure. Detailed Implementation

[0035] The advantages and features of this disclosure, as well as the methods for achieving these advantages and features, will become apparent from the exemplary embodiments described in detail below with reference to the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. These exemplary embodiments are provided by way of example only to enable those skilled in the art to fully understand the disclosure and scope of this disclosure. Therefore, this disclosure will be limited only by the scope of the appended claims.

[0036] The shapes, dimensions, scales, angles, quantities, etc., shown in the accompanying drawings to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, similar reference numerals generally denote similar elements. Furthermore, in the following description of this disclosure, detailed explanations of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of other components, unless these terms are used in conjunction with the term “only.” Unless otherwise expressly stated, any reference to the singular may include the plural.

[0037] Even if not explicitly stated, components are interpreted as including normal (or general) tolerance ranges.

[0038] When terms such as “up,” “above,” “below,” and “next” are used to describe the positional relationship between two parts, one or more parts may be positioned between the two parts, unless these terms are used with the terms “immediately following” or “directly.”

[0039] When one element or layer is placed "on" another element or layer, yet another element or layer can be directly inserted onto or between the other element or layer.

[0040] Although the terms "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from others. Therefore, the first component mentioned below can be the second component in the technical concept of this disclosure.

[0041] Throughout the specification, similar reference numerals generally denote similar elements.

[0042] The dimensions and thicknesses of the components shown in the accompanying drawings are illustrated for ease of description, and this disclosure is not limited to the dimensions and thicknesses of the components shown.

[0043] The features of the various embodiments of this disclosure may be partially or wholly attached to or combined with each other, and may be technically interlocked and operated in a variety of ways, and the embodiments may be implemented independently or in association with each other.

[0044] In the following, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0045] Figure 1 This is a schematic diagram of a display device according to a first exemplary embodiment of the present disclosure.

[0046] exist Figure 1 For ease of description, only the display panel PN, gate driver GD, data driver DD, and timing controller TC are shown among the various components of the display device 100, but this disclosure is not limited thereto.

[0047] refer to Figure 1 The display device 100 may include: a display panel PN including a plurality of sub-pixels SP, a gate driver GD and a data driver DD that provide various signals to the display panel PN, and a timing controller TC that controls the gate driver GD and the data driver DD.

[0048] The gate driver GD can provide multiple scan signals to multiple scan lines SL based on multiple gate control signals GCS provided from the timing controller TC. These multiple scan signals may include a first scan signal SCAN1 and a second scan signal SCAN2. Although in Figure 1 The diagram shows a gate driver GD spaced apart from one side of the display panel PN, but is not limited thereto.

[0049] The gate driver GD can be configured as a gate in panel (GIP), and this disclosure is not limited to the number and arrangement of the gate drivers GD.

[0050] The data driver DD can convert the image data (RGB) input from the timing controller TC into a data signal using a reference gamma voltage based on multiple data control signals (DCS) provided by the timing controller TC. The data driver DD can then provide the converted data signal to the multiple data lines DL.

[0051] The timing controller TC can arrange (align) the RGB image data input from the outside to provide the image data to the data driver DD.

[0052] The timing controller TC can use an externally input synchronization signal SYNC (such as a dot clock signal, data enable signal, and horizontal / vertical synchronization signal) to generate a gate control signal GCS and a data control signal DCS. The timing controller TC can then provide the generated gate control signal GCS and data control signal DCS to the gate driver GD and the data driver DD, respectively, to control the gate driver GD and the data driver DD.

[0053] The display panel PN is configured (or structured) to display an image to the user and may include multiple sub-pixels SP. In the display panel PN, the multiple scan lines SL and the multiple data lines DL intersect each other, and the multiple sub-pixels SP can be connected to the scan lines SL and the data lines DL respectively. Furthermore, although not shown in the figures, the multiple sub-pixels SP can also be connected to high-potential power lines, low-potential power lines, initialization signal lines, light emission control signal lines, etc.

[0054] A subpixel (SP) is the smallest unit for configuring (or constructing) a screen, and each of the plurality of subpixels (SPs) may include a light-emitting diode (LED) and pixel circuitry for driving the LED. The plurality of LEDs may be defined in different ways depending on the type of the display panel (PN). For example, when the display panel (PN) is an organic light-emitting display panel, the LED may be an organic light-emitting diode comprising an anode, a light-emitting unit, and a cathode. In the following description, although it will be assumed that the LEDs are organic light-emitting diodes, the type of LED is not limited thereto.

[0055] A pixel circuit is a circuit used to control the driving of an organic light-emitting diode (OLED). For example, a pixel circuit can be configured to include multiple transistors and capacitors, but is not limited to this.

[0056] In the following text, reference will be made to Figure 2 The pixel circuitry of the sub-pixel SP is described in more detail.

[0057] Figure 2 This is a circuit diagram of a sub-pixel of a display device according to a first exemplary embodiment of the present disclosure.

[0058] Reference Figure 2 The pixel circuit of each of the plurality of sub-pixels SP may include first to sixth transistors T1, T2, T3, T4, T5 and T6 and capacitor Cst.

[0059] A first transistor T1 is connected to a second scan line and controlled by a second scan signal SCAN2 provided through the second scan line. The first transistor T1 can be electrically connected between a data line providing the data signal Vdata and a capacitor Cst. When the second scan signal SCAN2, having an on-state, is applied to the first transistor T1 through the second scan line, the first transistor T1 can transmit the data signal Vdata from the data line to the capacitor Cst. The first transistor T1 can be referred to as a switching transistor, which controls the timing of applying the data signal Vdata to the capacitor Cst.

[0060] The second transistor T2 can be electrically connected between the high-potential power line supplied with the high-potential power signal EVDD and the fifth transistor T5. The gate electrode of the second transistor T2 can be electrically connected to the capacitor Cst. The second transistor T2 can be referred to as the driving transistor, which controls the current flowing through the organic light-emitting diode EL according to the voltage applied to the gate electrode, thereby controlling the brightness of the organic light-emitting diode EL.

[0061] Furthermore, the third transistor T3 can be controlled by the first scan signal SCAN1 provided through the first scan line. Depending on the type of the third transistor T3, the third transistor T3 can be electrically connected between the gate electrode and the drain electrode of the second transistor T2 or between the gate electrode and the source electrode of the second transistor T2.

[0062] Meanwhile, the second transistor T2, acting as the driving transistor, needs to control the current flowing through the organic light-emitting diode EL based on the data signal Vdata applied to the sub-pixel SP. However, the brightness deviation of the organic light-emitting diode EL in each sub-pixel SP may be caused by the threshold voltage deviation of the second transistor T2 in each sub-pixel SP.

[0063] In this configuration, the third transistor T3 is configured to compensate for the threshold voltage of the second transistor T2, thus enabling it to be referred to as a compensation transistor. For example, when a first scan signal SCAN1 is applied to turn on the third transistor T3, a voltage obtained by subtracting the threshold voltage of the second transistor T2 from the high-potential power supply signal EVDD can be applied to the gate electrode of the second transistor T2. With the high-potential power supply signal EVDD, from which the threshold voltage is subtracted, applied to the gate electrode of the second transistor T2, a data signal Vdata is applied to the capacitor Cst to compensate for the threshold voltage of the second transistor T2.

[0064] Meanwhile, it is shown that the third transistor T3 and the first transistor T1 are subjected to different scan signals SCAN1 and SCAN2 from different scan lines. However, the third transistor T3 and the first transistor T1 can be connected to the same scan line and can be subjected to the same scan signals SCAN1 and SCAN2, and they are not limited to this.

[0065] The fourth transistor T4 can be electrically connected to the capacitor Cst and the initialization signal line provided with the initialization signal Vini. Furthermore, the fourth transistor T4 can be controlled by the emitter control signal EM provided via the emitter control signal line. When the emitter control signal EM, which has a conduction level, is applied via the emitter control signal line, the fourth transistor T4 can either initialize the voltage of the capacitor Cst or slowly release (discharge) the data signal Vdata applied to the capacitor Cst to allow current to flow through the organic light-emitting diode EL according to the data signal Vdata.

[0066] The fifth transistor T5 is electrically connected between the second transistor T2 and the organic light-emitting diode EL. Furthermore, the fifth transistor T5 can be controlled by an emission control signal EM provided via an emission control signal line. When the emission control signal EM, having a conduction level, is applied while the data signal Vdata is applied to the capacitor Cst and a high-potential power supply signal EVDD, in which the threshold voltage is compensated, is applied to the gate electrode of the second transistor T2, the fifth transistor T5 is turned on. Therefore, current can flow through the organic light-emitting diode EL.

[0067] The sixth transistor T6 is electrically connected between the initialization signal line through which the initialization signal Vini is provided and the anode of the organic light-emitting diode EL, and can be controlled by the first scan signal SCAN1 provided through the first scan line.

[0068] When a first scan signal SCAN1 with a conduction level is applied through the first scan line, the sixth transistor T6 can initialize the anode of the organic light-emitting diode EL or the node located between the second transistor T2 and the fifth transistor T5 using the initialization signal Vini.

[0069] The capacitor Cst can be a storage capacitor that stores the voltage applied to the gate electrode of the second transistor T2, which serves as the driving transistor. The capacitor Cst can be electrically connected between the gate electrode of the second transistor T2 and the anode of the organic light-emitting diode EL. Therefore, the capacitor Cst can store the voltage difference between the voltage at the gate electrode of the second transistor T2 and the voltage applied to the anode of the organic light-emitting diode EL.

[0070] As an example, the pixel circuit of each of the plurality of sub-pixels SP has been described above as being configured to include first to sixth transistors T1, T2, T3, T4, T5 and T6 and capacitor Cst, but this disclosure is not limited to the contents described above.

[0071] In the following text, reference will be made to Figure 3 and Figure 4 The sub-pixels SP of the display device 100 according to the first exemplary embodiment of the present disclosure will be described in more detail.

[0072] Figure 3 It is an enlarged planar view of a sub-pixel according to a first exemplary embodiment of the present disclosure.

[0073] Figure 4 It is along Figure 3 The cross-sectional view taken from line III-III′.

[0074] although Figure 3 This disclosure illustrates that each of the plurality of sub-pixels SP (e.g., first, second, and third sub-pixels R, G, B) has a rectangular shape, but this disclosure is not limited to the shape of the sub-pixels. Figure 4 In this, an arbitrary transistor 120 is included Figure 3 In the cross-sectional structure. That is, in Figure 4 For ease of description, only one transistor 120 of the multiple transistors and capacitors of the pixel circuit for a single sub-pixel (e.g., first sub-pixel R, second sub-pixel G, or third sub-pixel B) is shown. As an example, Figure 4 A cross-section is shown that passes between two arbitrary sub-pixels (e.g., first and third sub-pixels R and B). However, this disclosure is not limited to... Figure 4 The lower structure.

[0075] This disclosure is not limited to Figure 3 This applies not only to real-type pixel structures but also to visual-type pixel structures. The leakage current suppression structure and the degree of organic material deposition in this disclosure can be the same, regardless of the type of pixel structure.

[0076] The display device may include: a display panel PN, which includes a plurality of sub-pixels SP; a gate driver and a data driver that provide various signals to the display panel PN; and a timing controller that controls the gate driver and the data driver.

[0077] Reference Figure 3 and Figure 4 The display panel PN according to the first exemplary embodiment of the present disclosure may include a substrate 110, a transistor 120, an organic light-emitting diode EL, a dam 114, and a packaging unit (not shown). The display device 100 may be implemented as a top-emitting display device, but is not limited thereto.

[0078] The display panel PN is configured (or structured) to display an image to the user and may include multiple sub-pixels SP. In the display panel PN, multiple scan lines and multiple data lines intersect each other, and each of the multiple sub-pixels SP can be connected to the scan lines and data lines. Furthermore, each of the multiple sub-pixels SP can be connected to a high-potential power line, a low-potential power line, an initialization signal line, a transmit control signal line, etc.

[0079] A subpixel is the smallest unit of a screen that configures (or constructs) a display panel PN, and each of the plurality of subpixels SP may include an organic light-emitting diode EL and pixel circuitry for driving the organic light-emitting diode.

[0080] A pixel circuit is a circuit used to control the driving of an organic light-emitting diode (EL). For example, a pixel circuit can be configured to include multiple transistors 120 and capacitors, but is not limited to this.

[0081] The plurality of sub-pixels SP are individual light-emitting units, and an organic light-emitting diode EL can be disposed in each of the plurality of sub-pixels SP. The plurality of sub-pixels SP may include a first sub-pixel R, a second sub-pixel G, and a third sub-pixel B that emit light of different colors, but this disclosure is not limited thereto. For example, the first sub-pixel R is a red sub-pixel, the second sub-pixel G is a green sub-pixel, and the third sub-pixel B is a blue sub-pixel, but this disclosure is not limited thereto.

[0082] The regions of the plurality of sub-pixels SP can be defined by the embankment 114. That is, the embankment 114 can be configured to cover part of the first electrode 131 of the organic light-emitting diode EL and the planarization layer 113 in the plurality of sub-pixels SP.

[0083] The substrate 110 can be divided into an emitting (light-emitting) region EA and a non-emitting (non-light-emitting) region NEA. For example, in the non-emitting region NEA, a dam 114 is disposed on the first electrode 131 to prevent light generation in the non-emitting region NEA. In contrast, the dam 114 is not disposed in the emitting region EA, and the organic layer 140 is directly located on the first electrode 131 to allow the organic layer 140 to generate light.

[0084] The embankment 114 may include an opening OP that exposes a portion of the first electrode 131.

[0085] Meanwhile, according to a first exemplary embodiment of this disclosure, a leakage current suppression structure, such as a trench T, is disposed between the plurality of sub-pixels SP. However, the leakage current suppression structure is not limited to the trench T, but may include spacers with an inverted taper and other structures.

[0086] The groove T can be patterned together with the opening OP.

[0087] In the trench T, the embankment 114 is removed to a predetermined thickness, so that the side surfaces of the embankment 114 can be exposed. Although in Figure 4 In this process, the entire thickness of the embankment 114 is removed to expose the surface of the planarization layer 113, but this disclosure is not limited thereto. Furthermore, although in Figure 4 The diagram illustrates a single trench T as an example, but this disclosure is not limited thereto. Multiple trenches T can be provided between the plurality of sub-pixels SP.

[0088] In the trench T according to a first exemplary embodiment of the present disclosure, the side surface of the trench T has a taper with a steeper slope than the opening OP of the embankment 114. For example, in the emission zone EA, the side surface of the opening OP has a taper angle of about 5° to 10°, but the side surface of the trench T has a taper angle of about 80°. Here, the taper angle refers to the angle formed by the side surface and the horizontal axis.

[0089] That is, the path of leakage current is increased (or lengthened) through the trench T to reduce lateral leakage current. When the organic layer 140 has a multi-layer structure (the multi-layer structure has two or more layers), lateral leakage current is generated due to the high mobility of the common layer, such as the hole injection layer (HIL) and the charge generation layer (CGL). Therefore, to reduce lateral leakage current, leakage current suppression structures such as spacers with inverted tapers or trenches T are applied. However, when a leakage current suppression structure is applied, for example, due to the steep taper at the inclined interface of the trench T, the organic layer 140 is deposited with a thin thickness, which reduces the spacing between the charge generation layer and the second electrode 132. Therefore, premature turn-on (ETO) may occur due to electron tunneling.

[0090] Therefore, according to a first exemplary embodiment of the present disclosure, a charge blocking layer is inserted in the leakage current suppression structure, i.e., in the organic layer 140 of the trench T, so that the bluish tint in the low grayscale region can be improved.

[0091] Reference Figure 3 For example, multiple third sub-pixels B are set in the same column, and multiple first sub-pixels R and multiple second sub-pixels G can be alternately set in the same column.

[0092] More specifically, the plurality of third sub-pixels B are disposed in the second and fourth columns, and the plurality of first sub-pixels R and the plurality of second sub-pixels G may be disposed alternately in the first and third columns, but this disclosure is not limited thereto.

[0093] For example, the first sub-pixel R and the second sub-pixel G can be set to the left and right (left and right sides) of the third sub-pixel B, but this disclosure is not limited thereto.

[0094] Therefore, in the horizontal direction, a plurality of third sub-pixels B are alternately arranged with a plurality of first and second sub-pixels R and G. In the vertical direction, the plurality of third sub-pixels B are repeatedly arranged or the plurality of first sub-pixels R and the plurality of second sub-pixels G are alternately arranged. In this case, a groove T can be arranged between a plurality of first, second, and third sub-pixels R, G, and B. For example, a groove T can be arranged vertically (along the vertical direction) between a plurality of third sub-pixels B and a plurality of first and second sub-pixels R and G, and a groove T can be arranged horizontally (along the horizontal direction) between a plurality of first sub-pixels R and a plurality of second sub-pixels G, but this disclosure is not limited thereto. Here, the horizontal groove T can extend horizontally from the vertical groove T, but is not limited thereto. Some of the plurality of grooves T can be configured as a single type, while others of the plurality of grooves T can be configured as a double type.

[0095] In the trench T according to the first exemplary embodiment of the present disclosure, as described above, the lateral leakage current generated in the multi-layer structure can be reduced. However, the present disclosure is not limited to multi-layer structures, but can also be applied to situations in which lateral leakage current is generated in conventional organic light-emitting display devices.

[0096] Furthermore, this disclosure can effectively reduce leakage current attributable to the use of a common layer due to the process characteristics of the organic light-emitting display device, and more specifically, leakage current attributable to strong current paths formed in low grayscale regions.

[0097] Furthermore, this disclosure not only reduces leakage current but also addresses the blue tint issue by suppressing electron tunneling. Specifically, when the leakage current suppression structure is applied, due to structural reasons, the organic layer 140 is deposited with a thinner thickness at the steeper cone angle of the inclined interface of the trench T, resulting in a reduced distance between the charge generation layer and the second electrode 132 at the cone interface. Therefore, premature turn-on (ETO) may occur due to electron tunneling. In this case, after reliability testing, an ETO shift occurs due to increased resistance of the charge generation layer, leading to a blue tint due to reduced brightness in the 3-grayscale region. Specifically, in the case of relatively high-efficiency red and green sub-pixels (i.e., first and second sub-pixels R and G), if they are compensated before reliability testing, low grayscale compensation is achieved through the emission of the first emitting layer due to the ETO phenomenon. After reliability testing, the resistance of the charge generation layer increases due to degradation, preventing the ETO phenomenon from occurring. Therefore, the compensated red and green sub-pixels (i.e., first and second sub-pixels R and G) do not emit light, resulting in a blue tint. This ETO phenomenon occurs as the distance between the charge generation layer and the second electrode 132 decreases, resulting in ETO at the tapered interface in the trench T, and primarily at the lower interface of the spacer with an inverted taper in the spacer. Specifically, the tapered interface of the trench T and the lower end of the spacer with the inverted taper have a relatively thin deposition thickness of the organic layer 140 compared to another region, significantly reducing the distance between the charge generation layer and the second electrode 132.

[0098] Therefore, according to a first exemplary embodiment of this disclosure, for example, a charge blocking layer is inserted into the organic layer 140 of the trench T to partially interrupt the charge movement path of the charge generating layer, thereby suppressing electron tunneling. Reference will now be made to... Figures 5A to 5C and Figure 6 Detailed description is provided up to 9.

[0099] Reference Figure 4 The substrate 110 is a support member for supporting other components of the display device and may be constructed of insulating material.

[0100] For example, substrate 110 may be formed of glass or resin. Furthermore, substrate 110 may be configured to include a plastic such as a polymer or polyimide (PI), or may be formed of a flexible material.

[0101] A buffer layer 111 may be disposed on the substrate 110. The buffer layer 111 can reduce the penetration of moisture or impurities through the substrate 110. The buffer layer 111 may be constructed of a single layer or a double layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto. However, depending on the type of substrate 110 or the type of transistor, the buffer layer 111 may be omitted, but is not limited thereto.

[0102] Transistor 120 may be disposed on buffer layer 111. Transistor 120 may include gate electrode 121, active layer 122, source electrode 123 and drain electrode 124.

[0103] Figure 4 The transistor 120 shown is a bottom-gate transistor, wherein an active layer 122 is disposed on the gate electrode 121, and a source electrode 123 and a drain electrode 124 are disposed on the active layer 122, but this disclosure is not limited thereto.

[0104] The gate electrode 121 can be disposed on the buffer layer 111.

[0105] The gate electrode 121 may be constructed of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof, but is not limited thereto.

[0106] The gate insulating layer 112 can be disposed on the gate electrode 121.

[0107] The gate insulating layer 112 is an insulating layer that insulates the active layer 122 from the gate electrode 121, and can be constructed of a single layer or a double layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

[0108] The active layer 122 can be disposed on the gate insulating layer 112.

[0109] The active layer 122 may be formed of a semiconductor material such as oxide semiconductor, amorphous silicon or polycrystalline silicon, but is not limited thereto. For example, when the active layer 122 is formed of oxide semiconductor, the active layer 122 is constructed of a channel region, a source region and a drain region, and the source region and drain region may be conductive regions, but are not limited thereto.

[0110] An etch stop 117 is disposed on the active layer 122. The etch stop 117 may be additionally formed to suppress damage to the surface of the active layer 122 due to plasma when the source electrode 123 and drain electrode 124 are patterned using an etching method. One end of the etch stop 117 may overlap (or intersect) with the source electrode 123, and the other end may overlap (or intersect) with the drain electrode 124. However, the etch stop 117 may be omitted.

[0111] Source electrode 123 and drain electrode 124 can be disposed on active layer 122 and etch stop 117. Source electrode 123 and drain electrode 124, which are spaced apart from each other, can be electrically connected to active layer 122. Source electrode 123 and drain electrode 124 can be constructed of conductive materials such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof, but are not limited thereto.

[0112] A planarization layer 113 may be disposed above the transistor 120. The planarization layer 113 is an insulating layer that planarizes the upper part of the substrate 110. The planarization layer 113 may be formed of an organic material, and may be constructed, for example, of a single or double layer of polyimide or photoacrylic acid, but is not limited thereto.

[0113] An organic light-emitting diode (OLED) can be disposed in each of a plurality of sub-pixels SP (more specifically, first, second, and third sub-pixels R, G, and B) on the planarization layer 113. The OLED may include a first electrode 131, an organic layer 140, and a second electrode 132. Here, the first electrode 131 may be an anode, and the second electrode 132 may be a cathode, but this disclosure is not limited thereto.

[0114] The first electrode 131 can be disposed on the planarization layer 113.

[0115] The first electrode 131 is electrically connected to the transistor 120 to provide drive current for the pixel circuitry. The first electrode 131 provides holes to the light-emitting layer, allowing it to be formed of a conductive material with a high work function. For example, the first electrode 131 can be formed of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO), but is not limited thereto.

[0116] Meanwhile, the display device can be implemented as either a top-emitting display device or a bottom-emitting display device. When the display device is a top-emitting display device, a reflective layer formed of a metallic material with excellent reflectivity, such as aluminum (Al) or silver (Ag), can be added below the first electrode 131. Therefore, light emitted from the light-emitting layer is reflected from the first electrode 131 and guided in an upward direction (i.e., towards the second electrode 132). In contrast, when the display device is a bottom-emitting display device, the first electrode 131 can be formed solely of a transparent conductive material. In the following, the display device of this disclosure is assumed to be a top-emitting display device.

[0117] For example, the first electrode 131 may have a stacked structure having two or more layers, including a reflective layer.

[0118] The embankment 114 can be disposed on the first electrode 131 and the planarization layer 113.

[0119] Dike 114 is an insulating layer disposed between the first, second, and third sub-pixels R, G, and B to divide the first, second, and third sub-pixels R, G, and B.

[0120] The dam 114 may include an opening OP that exposes a portion of the first electrode 131. The dam 114 may be constructed of an organic insulating material configured to cover the edge or boundary of the first electrode 131. For example, the dam 114 may be formed of a polyimide resin, an acrylic resin, or a benzocyclobutene (BCB) resin, but is not limited thereto.

[0121] Multiple spacers (not shown) can be provided on the embankment 114 of the non-emitting area (NEA). That is, the spacers can be provided on the embankment 114 of the NEA to maintain a constant distance from the deposition mask during the formation of the organic light-emitting diode (EL). The spacers can maintain a predetermined distance between the deposition mask and the embankment 114 and the first electrode 131 located below the spacers, and can suppress damage caused by contact between the deposition mask and the embankment 114 and the first electrode 131. The multiple spacers can be formed with a shape that is narrower towards their upper portion, such as a tapered shape, to minimize the area in contact with the deposition mask, but this disclosure is not limited thereto.

[0122] An organic layer 140 may be disposed on the first electrode 131. The organic layer 140 is a region that emits light through the coupling of electrons and holes supplied from the first electrode 131 and the second electrode 132. The organic layer 140 may include, but is not limited to, an emissive layer disposed in each of the first, second, and third sub-pixels R, G, and B, and a common layer disposed for the first, second, and third sub-pixels R, G, and B. An emissive layer is an organic layer that emits light of a specific color, and different emissive layers may be disposed in the first sub-pixel R, the second sub-pixel G, and the third sub-pixel B. However, this disclosure is not limited to this, such that multiple emissive layers may be disposed in all the first, second, and third sub-pixels R, G, and B to emit white light.

[0123] The common layer is an organic layer provided to improve the luminous efficiency of the light-emitting layer. The common layer can be formed as a layer above the first, second, and third sub-pixels R, G, and B. That is, the common layers of the first, second, and third sub-pixels R, G, and B can be connected to each other and formed integrally. The common layer may include, but is not limited to, hole injection layers, hole transport layers, electron transport layers, electron injection layers, charge generation layers, etc.

[0124] The second electrode 132 can be disposed on the organic layer 140.

[0125] The second electrode 132 is an electrode that supplies electrons to the organic light-emitting diode (OLED) EL according to a first exemplary embodiment of the present disclosure. The second electrode 132 may be formed of a material having a low work function. The second electrode 132 may include a transparent conductive material. For example, the second electrode 132 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), etc. Alternatively, the second electrode 132 may include any one of the group consisting of metallic materials such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), magnesium (Mg), palladium (Pd), copper (Cu), and alloys thereof. For example, the second electrode 132 may be formed of an alloy of magnesium (Mg) and silver (Ag). Alternatively, the second electrode 132 may be constructed by laminating a layer formed of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO) and a layer formed of a metallic material such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), magnesium (Mg), palladium (Pd), copper (Cu), or alloys thereof, but is not limited thereto.

[0126] The second electrode 132 can be electrically connected to a low-potential power line to be provided with a low-potential power signal.

[0127] A packaging unit (not shown) may be disposed on the second electrode 132.

[0128] The packaging unit can be positioned above the embankment 114 and the organic light-emitting diode EL.

[0129] Encapsulation units prevent oxygen and moisture from seeping into the display device from the outside. For example, when a display device is exposed to moisture or oxygen, pixel shrinkage (reflective area reduction) or dead pixels may occur in the reflective area. Therefore, encapsulation units block oxygen and moisture to protect the display device.

[0130] The packaging unit may include a first packaging layer, a second packaging layer, and a third packaging layer.

[0131] The first encapsulation layer can be disposed on the second electrode 132 to inhibit the penetration of moisture or oxygen.

[0132] For example, the first encapsulation layer may be formed of an inorganic material such as silicon nitride (SiNx), silicon oxynitride (SiNxOy), or aluminum oxide (AlyOz), but is not limited thereto.

[0133] The second encapsulation layer can be disposed on the first encapsulation layer to planarize its surface. Furthermore, the second encapsulation layer can cover foreign matter or particles that may be generated during the manufacturing process of the display device. The second encapsulation layer can be formed of organic materials such as silicon oxide carbon (SiOxCz), acrylic acid, or epoxy resin, but is not limited to these.

[0134] A third encapsulation layer can be disposed on the second encapsulation layer to inhibit the penetration of moisture or oxygen. For example, the third encapsulation layer can be formed of inorganic materials such as silicon nitride (SiNx), silicon oxynitride (SiNxOy), silicon oxide (SiOx), or aluminum oxide (AlyOz), but is not limited thereto.

[0135] Meanwhile, various organic light-emitting diode (OLED) structures have been proposed to improve the efficiency and lifespan of OLEDs and reduce power consumption, thereby improving the quality and productivity of organic light-emitting display devices.

[0136] Therefore, in addition to organic light-emitting diodes employing a single stack (i.e., a single electroluminescent unit), an organic light-emitting diode with a tandem structure has been proposed, wherein the tandem structure uses multiple stacks (i.e., multiple stacked electroluminescent units) to achieve improved efficiency and lifetime characteristics. For convenience, a double-stacked tandem structure will be described below as an example.

[0137] In an organic light-emitting diode (EL) having a series structure (i.e., a double-layered structure using stacked first and second electroluminescent units), an emitting region that emits light through the recombination of electrons and holes is disposed in each of the first and second electroluminescent units. Therefore, compared to an EL having a single-layered structure, light emitted from the first emitting layer of the first electroluminescent unit and the second emitting layer of the second electroluminescent unit causes constructive interference, providing higher brightness.

[0138] In the following text, we will refer to the common references. Figures 5A to 5C A detailed description of the stacked structure according to a first exemplary embodiment of the present disclosure is provided.

[0139] Figure 5A yes Figure 4 An enlarged cross-sectional view of part P1 in the diagram.

[0140] Figure 5B yes Figure 4 A magnified cross-sectional view of part P2 in the diagram.

[0141] Figure 5C yes Figure 4 A magnified cross-sectional view of part P3 in the image.

[0142] Figure 6 This is an enlarged cross-sectional view of a sub-pixel according to a comparative embodiment.

[0143] Figure 7 This is a graph showing an example of the degree of organic material deposition based on the cone angle of the trench.

[0144] Figures 8A to 8CThis is a graph showing an example of current density based on the voltage in the red, green, and blue sub-pixels.

[0145] Figure 9A and Figure 9B This is a photograph showing the reliability results of the display panel.

[0146] Figure 5A This is an enlarged cross-sectional view of the organic light-emitting diode EL in the flat portion P1 of the emission region EA. Figure 5B This is an enlarged cross-sectional view of the organic light-emitting diode EL in the conical portion P2 of the emission region EA. Figure 5C This is an enlarged cross-sectional view of the organic light-emitting diode EL in the tapered portion P3 of trench T.

[0147] For example, in the flat portion P1 (or opening OP) of the emitter region EA, the cone angle is approximately 0°; in the conical portion P2 of the emitter region EA, the cone angle is approximately 5° to 10°; and in the conical portion P3 of the trench T, the cone angle is approximately 80°. In this case, the deposition thickness of the organic layer 140 in the conical portion P3 of the trench T and the conical portion P2 of the emitter region EA is thinner than the deposition thickness in the flat portion P1 of the emitter region EA. Furthermore, the deposition thickness of the organic layer 140 in the conical portion P3 of the trench T is thinner than the deposition thickness in the conical portion P2 of the emitter region EA. For example, assuming the deposition thickness of the organic layer 140 in the flat portion P1 of the emitter region EA is 100% (see...). Figure 5A When the cone-shaped portion P2 of the emission region EA has an organic layer 140 thickness of approximately 90% to 95% (see...), the thickness of the organic layer 140 is approximately 90% to 95% (see...). Figure 5B Furthermore, the thickness of the organic layer 140 in the conical portion P3 of the trench T can be approximately 28% (see [reference]). Figure 5C ).

[0148] exist Figure 6 In the middle, except for the absence of a charge blocking layer, it is shown to be similar to Figure 5C The subpixels have the same configuration. Therefore, redundant descriptions for the same configuration will be omitted.

[0149] Reference Figure 4 , Figures 5A to 5CThe organic layer 140 with a stacked structure may include charge-generating layers 144a and 144b, a first stack, and a second stack disposed between the first electrode 131 and the second electrode 132. The first stack is disposed between the charge-generating layers 144a and 144b and the first electrode 131, and the second stack is disposed between the second electrode 132 and the charge-generating layers 144a and 144b. The charge-generating layers 144a and 144b are disposed between the first stack and the second stack to generate charge. The charge-generating layers 144a and 144b may be formed in a structure in which a p-type charge-generating layer 144b and an n-type charge-generating layer 144a are stacked. That is, the charge-generating layers 144a and 144b may be constructed from a p-type charge-generating layer 144b and an n-type charge-generating layer 144a that generate positive and negative charges in two directions, and can essentially be used as electrodes.

[0150] Each of the first and second stacks may include at least one or more light-emitting layers 142 and 146 and includes common layers located above and below each light-emitting layer 142 and 146, wherein the light-emitting layers 142 and 146 are located between these common layers. For example, in particular, the first stack may include a first hole transport layer 141, a first light-emitting layer 142, and a first electron transport layer 143. Furthermore, the second stack may include a second hole transport layer 145, a second light-emitting layer 146, and a second electron transport layer 147. Additionally, the first and second stacks may also include first and second hole injection layers and first and second electron injection layers.

[0151] In the case of the organic light-emitting diode (OLED) as described above, when a voltage is applied between the first electrode 131 and the second electrode 132, a lateral leakage current is generated in the side surface direction of the OLED through the common layer (e.g., charge generation layers 144a and 144b) formed in the OLED. This results in a color mixing problem where not only do the sub-pixels that require light emission emit light, but also adjacent sub-pixels that do not require light emission also emit light.

[0152] Color mixing issues may be more pronounced in organic light-emitting diodes (OLEDs) with a dual-layer structure than in those with a single-layer structure, wherein the dual-layer structure uses stacked first and second electroluminescent units (which utilize constructive interference of light).

[0153] Therefore, according to a first exemplary embodiment of the present disclosure, trenches T are formed between a plurality of sub-pixels to increase current paths, thereby minimizing leakage current during driving of a display device having a multi-layered structure.

[0154] Furthermore, according to a first exemplary embodiment of this disclosure, the first and second charge blocking layers 150a and 150b are inserted into the organic layer 140 of the leakage current suppression structure, i.e., the trench T, thereby improving the bluish tint in the low grayscale region. For example, the first charge blocking layer 150a may be inserted between the charge generating layers 144a and 144b and the second electrode 132, and the second charge blocking layer 150b may be inserted between the charge generating layers 144a and 144b and the first electrode 131, but this disclosure is not limited thereto.

[0155] According to this disclosure, the cross-sectional shape of the trench T can be the same regardless of whether it is a single structure or a dual structure. Furthermore, the cross-sectional shape of the trench T can be the same regardless of whether it is horizontally or vertically positioned. Therefore, the trench T can be formed simultaneously using a single mask and the same process, and the first and second charge blocking layers 150a and 150b can also be formed simultaneously.

[0156] refer to Figure 4 and Figure 5A In the flat portion P1 of the emission region EA, the cone angle can be approximately 0°. In this case, the deposition rate of organic material can be considered 100%.

[0157] In contrast, see reference Figure 4 and Figure 5B In the conical portion P2 of the emission region EA, the cone angle can be approximately 5° to 10°. In this case, the deposition rate of organic material can be approximately 90% to 95%, and when the thickness of the organic layer 140 in the flat portion P1 of the emission region EA can be assumed to be 100%, the thickness of the organic layer 140 in the conical portion P2 of the emission region EA can be approximately 90% to 95%.

[0158] refer to Figure 4 , Figure 5C and Figure 7 The cone angle in the conical portion P3 of the trench T can be approximately 80°. It is understood that the deposition rate of organic material on the inclined surface decreases proportionally with the cone angle, and in this case, the deposition rate of organic material is 20% to 30% of the deposition rate of organic material in the flat portion P1, for example, it can be 28%. In this case, when the thickness of the organic layer 140 in the flat portion P1 of the emission region EA is assumed to be 100%, the thickness of the organic layer 140 in the conical portion P3 of the trench T can be approximately 28%.

[0159] refer to Figure 6In the tapered portion of the trench in the comparative embodiment, the deposition rate of the organic material is reduced due to the steep tapered angle, resulting in a thin organic layer 140. Therefore, the spacing between the charge-generating layers 144a and 144b and the second electrode 132 may be reduced at the tapered interface of the trench. This is because the organic material is formed through a fine metal mask (FMM), causing electron tunneling along the arrow direction, which may lead to premature turn-on (ETO) phenomenon.

[0160] Reference Figure 4 and Figure 5C According to a first exemplary embodiment of this disclosure, first and second charge-blocking layers 150a and 150b are inserted into the organic layer 140 of the trench T. For example, the first charge-blocking layer 150a may be inserted between the charge-generating layers 144a and 144b and the second electrode 132, and the second charge-blocking layer 150b may be inserted between the charge-generating layers 144a and 144b and the first electrode 131. Figure 5C An example has been shown where a first charge-blocking layer 150a is inserted between a second hole transport layer 145 and a second light-emitting layer 146, and a second charge-blocking layer 150b is inserted between a first light-emitting layer 142 and a first electron transport layer 143. However, this disclosure is not limited thereto. The first and second charge-blocking layers 150a and 150b may extend at a predetermined distance toward (towards) the emission region EA at the inclined interface of the trench T. Therefore, the thickness of the organic layer 140 including the extended first and second charge-blocking layers 150a and 150b is greater than the thickness of the organic layer 140 in other portions, such that a step can be formed on the surface of the organic light-emitting diode EL.

[0161] ETO is generated due to the reduced thickness between the p-type charge generation layer 144b and the second electrode 132. Therefore, the first charge blocking layer 150a can be inserted between the p-type charge generation layer 144b and the second electrode 132 in the organic layer 140 of the trench T. In this case, the first charge blocking layer 150a is inserted between the second electrode 132 and the charge generation layers 144a and 144b at the inclined interface of the trench T to suppress the aforementioned electron tunneling. Furthermore, in order to prevent the first light-emitting layer 142 from emitting light, the second charge blocking layer 150b can be further inserted between the first light-emitting layer 142 and the p-type charge generation layer 144b in the organic layer 140 of the trench T. In this case, the charge movement path of the charge generation layers 144a and 144b can be partially cut off by means of the thickness of the second charge blocking layer 150b.

[0162] As another example, in order to suppress electron injection, a first charge barrier layer 150a is formed before depositing the second electrode 132, and in order to prevent the first light-emitting layer 142 from emitting light, a second charge barrier layer 150b can be further formed after depositing the first light-emitting layer 142.

[0163] As described above, the first and second charge blocking layers 150a and 150b are inserted into the organic layer 140 of the trench T to partially interrupt the charge movement path of the charge generating layers 144a and 144b by means of the thickness of the first and second charge blocking layers 150a and 150b. In this way, electron tunneling can be prevented.

[0164] The first and second charge blocking layers 150a and 150b can be constructed from high-resistivity non-conductive organic materials that suppress electron tunneling between charge generation layers 144a and 144b and the second electrode 132, or from conductive organic materials with low LUMO (lowest unoccupied molecular orbital) values.

[0165] High-resistivity non-conductive organic materials have non-conductive properties and, similar to other deposited conductive organic materials, can include polycarbonate (PC) and polymethyl methacrylate (PMMA) with glass transition temperatures of 110°C or higher.

[0166] Conductive organic materials with low LUMO values ​​are materials with LUMO values ​​of -2.5 eV or lower, and can include hole injection layers and light-emitting layers with work function levels of 5.6 eV, such as TCTA [4,4',4”-tris(n-carbazolyl)-triphenylamine], NPD [N,N'-di(1-naphthyl)-N,N'-diphenyl-(1,1'-biphenyl)-4,4'-diamine] and TPD [N,N'-bis(3-methylphenyl)-N,N'-diphenylbenzidine].

[0167] As the deposition thickness increases, the resistance of the first and second charge-blocking layers 150a and 150b according to the first exemplary embodiment of this disclosure increases, which is beneficial for suppressing electron tunneling. Furthermore, the first and second charge-blocking layers 150a and 150b may have… Or a minimum thickness greater, to cut off the path of lateral leakage current in charge-generating layers 144a and 144b.

[0168] Figure 8A An example of current density based on the voltage in the red sub-pixel is shown. Figure 8B An example of current density based on voltage in the green sub-pixel is shown, and Figure 8C An example of current density based on voltage in the blue sub-pixel is shown.

[0169] exist Figures 8A to 8CIn the diagram, the dashed line diagram shows the results of a comparative embodiment (as an example) in which no charge blocking layer is inserted, and the solid line diagram shows the results of an exemplary embodiment (as an example) in which a charge blocking layer is inserted.

[0170] Reference Figures 8A to 8C It can be understood that in the exemplary embodiment in which the charge blocking layer is inserted in the organic layer of the trench, the JV curve shifts to the right and the driving voltage is increased, so that ETO is suppressed compared to the comparative embodiment.

[0171] Figure 9A The reliability results of a display panel from a comparative embodiment in which a charge blocking layer is not inserted are shown, and Figure 9B The reliability results of a display panel in which a charge blocking layer is inserted are shown.

[0172] refer to Figure 9A and Figure 9B Based on the UV reliability results of the display panel, it can be understood that in the exemplary embodiment in which the charge blocking layer is inserted, the brightness is reduced in low grayscale 3-gray compared to the comparative embodiment to improve the blue tint.

[0173] Figure 10 This is an enlarged cross-sectional view of a sub-pixel according to a second exemplary embodiment of the present disclosure.

[0174] Except for the first charge blocking layer 250a being located between the second electron transport layer 147 and the second electrode 132. Figure 10 The second exemplary embodiment of this disclosure shown is configured with substantially the same configuration as the first exemplary embodiment of this disclosure. Therefore, redundant descriptions regarding the same configuration will be omitted.

[0175] Figure 10 This is an enlarged cross-sectional view of an organic light-emitting diode with a stacked structure in the tapered portion of the trench.

[0176] Reference Figure 10 As described above, the organic layer 140 with a stacked structure may include charge generating layers 144a and 144b disposed between the first electrode 131 and the second electrode 132, a first stack, and a second stack. The first stack is disposed between the charge generating layers 144a and 144b and the first electrode 131, and the second stack is disposed between the second electrode 132 and the charge generating layers 144a and 144b. The charge generating layers 144a and 144b may be formed in a structure in which a p-type charge generating layer 144b and an n-type charge generating layer 144a are stacked.

[0177] Each of the first and second stacks may include at least one or more light-emitting layers 142 and 146 and includes common layers located above and below each light-emitting layer 142 and 146, wherein the light-emitting layers 142 and 146 are located between these common layers. For example, in particular, the first stack may include a first hole transport layer 141, a first light-emitting layer 142, and a first electron transport layer 143. Furthermore, the second stack may include a second hole transport layer 145, a second light-emitting layer 146, and a second electron transport layer 147. Additionally, the first and second stacks may also include first and second hole injection layers and first and second electron injection layers.

[0178] Meanwhile, according to a second exemplary embodiment of the present disclosure, trenches are formed between a plurality of sub-pixels to increase current paths, thereby minimizing leakage current during driving, particularly in display devices with multi-layer structures.

[0179] Furthermore, according to a second exemplary embodiment of the present disclosure, charge blocking layers 250a and 250b are inserted into the organic layer 140 of the trench. Specifically, according to a second exemplary embodiment of the present disclosure, in order to suppress electron injection, the first charge blocking layer 250a may be formed before depositing the second electrode 132, and in order to prevent the first light-emitting layer 142 from emitting light, the second charge blocking layer 250b may be formed after depositing the first light-emitting layer 142. That is, the first charge blocking layer 250a according to the second exemplary embodiment of the present disclosure may be located between the second electron transport layer 147 and the second electrode 132. Furthermore, the second charge blocking layer 250b may be located between the first light-emitting layer 142 and the first electron transport layer 143, but the present disclosure is not limited thereto.

[0180] Meanwhile, the first and second charge blocking layers 250a and 250b can extend toward the emission region at a predetermined distance at the inclined interface of the trench. Therefore, the thickness of the organic layer 140 including the extended first and second charge blocking layers 250a and 250b is greater than the thickness of the organic layer 140 in other portions, so that a step can be formed on the surface of the organic light-emitting diode.

[0181] Meanwhile, according to this disclosure, only the first charge blocking layer may be provided, which will be described in more detail in conjunction with the third exemplary embodiment of this disclosure.

[0182] Figure 11 This is an enlarged cross-sectional view of a sub-pixel according to a third exemplary embodiment of the present disclosure.

[0183] In addition to providing a single charge blocking layer 350 between the charge generation layers 144a and 144b and the second electrode 132, Figure 11The third exemplary embodiment of this disclosure shown is configured with substantially the same configuration as the first exemplary embodiment of this disclosure. Therefore, redundant descriptions regarding the same configuration will be omitted.

[0184] Figure 11 This is an enlarged cross-sectional view of an organic light-emitting diode with a stacked structure in the tapered portion of the trench.

[0185] refer to Figure 11 According to a third exemplary embodiment of the present disclosure, trenches are formed between a plurality of sub-pixels to increase current paths, thereby minimizing leakage current during driving, particularly in display devices with multi-layer structures.

[0186] According to a third exemplary embodiment of the present disclosure, a single charge blocking layer 350 is inserted between the charge generating layers 144a and 144b in the organic layer 140 of the trench and the second electrode 132. In particular, the charge blocking layer 350 according to the third exemplary embodiment of the present disclosure may be located between the hole transport layer 145 and the second light-emitting layer 146, but the present disclosure is not limited thereto. As another example, the charge blocking layer 350 according to the third exemplary embodiment of the present disclosure may be located between the second electron transport layer 147 and the second electrode 132.

[0187] Meanwhile, the charge blocking layer 350 can extend toward the emission region at a predetermined distance at the inclined interface of the trench. Therefore, the thickness of the organic layer 140 including the extended charge blocking layer 350 is greater than the thickness of the organic layer 140 in other portions, so that a step can be formed on the surface of the organic light-emitting diode.

[0188] Meanwhile, according to this disclosure, in addition to the aforementioned trenches, spacers with an inverted taper can also be used as leakage current suppression structures, as will be described in detail in conjunction with the fourth exemplary embodiment of this disclosure.

[0189] Figure 12 This is a cross-sectional view of a sub-pixel according to a fourth exemplary embodiment of the present disclosure.

[0190] Figure 13 yes Figure 12 A magnified cross-sectional view of part P4 in the diagram.

[0191] exist Figure 12 This includes an arbitrary transistor 120. That is, in Figure 12 For ease of description, only one transistor 120 of the pixel circuit of a sub-pixel is shown. However, this disclosure is not limited to... Figure 12 The lower structure.

[0192] Figure 13This is an enlarged cross-sectional view of an organic light-emitting diode (EL) including an inclined interface at the lower end of a spacer 460 with an inverted taper.

[0193] Reference Figure 12 and Figure 13 The display panel according to the fourth exemplary embodiment of the present disclosure may include a substrate 110, a transistor 120, an organic light-emitting diode EL, a dam 114, and a packaging unit (not shown).

[0194] Meanwhile, according to the fourth exemplary embodiment of this disclosure, a leakage current suppression structure, such as a spacer (or separator) 460 with an inverted taper, is provided between a plurality of sub-pixels.

[0195] The spacer 460 with an inverted taper can be formed from a predetermined organic material on the embankment 114 of the non-emission zone NEA. Although in Figure 12 The image shows a single spacer 460 with a single inverted taper as an example, but this disclosure is not limited thereto. Multiple spacers 460 with inverted tapers can be provided between multiple subpixels.

[0196] According to a fourth exemplary embodiment of this disclosure, due to the inverted taper of the spacer 460, the organic layer 440 and the second electrode 132 deposited on the inverted taper spacer 460 can be disconnected from the organic layer 440 and the second electrode 132 deposited in the emitter region EA. In this way, lateral leakage current can be prevented.

[0197] Reference Figure 12 and Figure 13 As described above, the organic layer 440 with a stacked structure may include charge generating layers 444a and 444b, a first stack, and a second stack disposed between the first electrode 131 and the second electrode 132. The first stack may be disposed between the charge generating layers 444a and 444b and the first electrode 131, and the second stack may be disposed between the second electrode 132 and the charge generating layers 444a and 444b. The charge generating layers 444a and 444b may be formed in a structure in which a p-type charge generating layer 444b and an n-type charge generating layer 444a are stacked.

[0198] Each of the first and second stacks may include at least one or more light-emitting layers 442 and 446 and includes common layers located above and below each light-emitting layer 442 and 446, wherein the light-emitting layers 442 and 446 are located between these common layers. For example, in particular, the first stack may include a first hole transport layer 441, a first light-emitting layer 442, and a first electron transport layer 443. Furthermore, the second stack may include a second hole transport layer 445, a second light-emitting layer 446, and a second electron transport layer 447. Additionally, the first and second stacks may also include first and second hole injection layers and first and second electron injection layers.

[0199] Meanwhile, according to a fourth exemplary embodiment of this disclosure, spacers 460 with an inverted taper are formed between a plurality of sub-pixels to partially disconnect the organic layer 440 from adjacent sub-pixels. In this way, leakage current is minimized when a display device with a multi-layered structure is driven.

[0200] According to a fourth exemplary embodiment of this disclosure, an organic layer 440 is deposited on the embankment 114 at the lower end of the spacer 460 having an inverted taper, such that its side surface is inclined and the inclined interface has a steep inclination angle. Furthermore, the deposition thickness of the organic layer 440 is relatively thinner than the deposition thickness in other areas, thereby significantly reducing the distance between the charge-generating layers 444a and 444b and the second electrode 132.

[0201] Therefore, according to a fourth exemplary embodiment of this disclosure, the first and second charge-blocking layers 450a and 450b are inserted into the inclined interface of the organic layer 440 at the lower end of the spacer 460 having an inverted taper. That is, for example, the first charge-blocking layer 450a may be inserted between the charge-generating layers 444a and 444b and the second electrode 132, and the second charge-blocking layer 450b may be inserted between the charge-generating layers 444a and 444b and the first electrode 131. Figure 13 An example has been shown in which a first charge-blocking layer 450a is inserted between a second hole transport layer 445 and a second light-emitting layer 446, and a second charge-blocking layer 450b is inserted between a first light-emitting layer 442 and a first electron transport layer 443. However, this disclosure is not limited thereto. Meanwhile, the first and second charge-blocking layers 450a and 450b can extend at a predetermined distance toward the emission region EA at the inclined interface. Therefore, the thickness of the organic layer 440 including the extended first and second charge-blocking layers 450a and 450b is greater than the thickness of the organic layer 440 in other portions, such that a step can be formed on the surface of the organic light-emitting diode EL.

[0202] Figure 14 This is a cross-sectional view of a sub-pixel according to a fifth exemplary embodiment of the present disclosure.

[0203] In addition to having multiple grooves T, Figure 14 The fifth exemplary embodiment of this disclosure shown is configured with substantially the same configuration as the first exemplary embodiment of this disclosure. Therefore, redundant descriptions regarding the same configuration will be omitted.

[0204] Reference Figure 14 According to a fifth exemplary embodiment of the present disclosure, a plurality of trenches T are formed between a plurality of sub-pixels to further increase the current path, thereby further minimizing leakage current during driving, particularly in display devices having a multi-layered structure.

[0205] Furthermore, according to a fifth exemplary embodiment of the present disclosure, a charge blocking layer is inserted into the organic layer 540 in the trench T. For example, the first charge blocking layer according to the fifth exemplary embodiment of the present disclosure may be located between the second electron transport layer and the second electrode, and the second charge blocking layer may be located between the first light-emitting layer and the first electron transport layer, but the present disclosure is not limited thereto. Meanwhile, the first and second charge blocking layers may extend at a predetermined distance toward the emission region EA or the adjacent trench T at the inclined interface. Therefore, the thickness of the organic layer 540 including the extended first and second charge blocking layers is greater than the thickness of the organic layer 540 in other portions, allowing a step to be formed on the surface of the organic light-emitting diode EL.

[0206] Meanwhile, considering the function of the multiple transistors that construct the pixel circuit, the active layer can be constructed from different materials, as will be described in detail in conjunction with the sixth exemplary embodiment of this disclosure.

[0207] Figure 15 This is a cross-sectional view of a sub-pixel according to a sixth exemplary embodiment of the present disclosure.

[0208] In addition to the first and second transistors 620a and 620b Figure 15 The sixth exemplary embodiment of this disclosure shown has a configuration substantially the same as that of the display device in the first exemplary embodiment of this disclosure. Therefore, redundant descriptions regarding the same configuration will be omitted.

[0209] Figure 15 The lower structure is shown as an example, but is not limited to this.

[0210] Furthermore, for ease of description, in Figure 15 In the image, only arbitrary first and second transistors 620a and 620b of the multiple transistors of the pixel circuit of the sub-pixel are shown.

[0211] Reference Figure 15The display device according to the sixth exemplary embodiment of the present disclosure may include first and second substrates 610a and 610b, first and second transistors 620a and 620b, planarization layer 113, organic light-emitting diode EL, dam 114 and packaging unit (not shown).

[0212] That is, the display device according to the sixth exemplary embodiment of the present disclosure may include a first substrate 610a and a second substrate 610b, and further includes a buffer layer 611b between the first substrate 610a and the second substrate 610b.

[0213] The first substrate 610a and the second substrate 610b are support members for supporting other components of the display device and can be constructed of an insulating material. For example, the first substrate 610a and the second substrate 610b can be configured to include plastics such as polymers or polyimide PI, or can be formed of a flexible material. Furthermore, the buffer layer 611b can be constructed of a single layer or a double layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

[0214] Another buffer layer 611a can be disposed on the first substrate 610a.

[0215] The other buffer layer 611a can reduce the penetration of moisture or impurities through the first substrate 610a. The other buffer layer 611a can be constructed, for example, from a single or double layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

[0216] Although not shown, another buffer layer may be further disposed on the other buffer layer 611a.

[0217] The additional buffer layer can suppress the penetration of ions or impurities generated during the crystallization process of the first transistor 620a.

[0218] The first and second transistors 620a and 620b can be disposed on the other buffer layer 611a.

[0219] The first transistor 620a may include a first active layer 622a, a first gate electrode 621a, a first source electrode 623a, and a first drain electrode 624a.

[0220] The second transistor 620b may include a second active layer 622b, a second gate electrode 621b, a second source electrode 623b, and a second drain electrode 624b.

[0221] The first active layer 622a can be set on another buffer layer 611a.

[0222] For example, the first active layer 622a can be formed of low-temperature polycrystalline silicon (LTPS). The polycrystalline silicon has high mobility, resulting in low power consumption and high reliability. Therefore, the polycrystalline silicon can be used in applications such as driving transistors.

[0223] The gate insulating layer 612 can be disposed on the first active layer 622a.

[0224] The first gate electrode 621a can be disposed on the gate insulating layer 612.

[0225] The first storage electrode ST1 and the light-shielding layer 625b can be disposed on the gate insulating layer 612.

[0226] A light-shielding layer 625b is configured to overlap with the second active layer 622b of the second transistor 620b to protect the second transistor 620b from externally introduced light or moisture, thereby minimizing variations in the device characteristics of the second transistor 620b. Although in Figure 15 The light-shielding layer 625b shown is floating and can be electrically connected to other configurations (e.g., multiple wirings), but is not limited thereto.

[0227] The interlayer insulating layer 613 can be disposed on the first gate electrode 621a, the first storage electrode ST1 and the light-shielding layer 625b.

[0228] The second storage electrode ST2 can be disposed on the interlayer insulating layer 613 to partially overlap with the first storage electrode ST1.

[0229] First and second passivation layers 614a and 614b can be disposed on the second storage electrode ST2. Contact holes can be formed in the first and second passivation layers 614a and 614b, through which the first source electrode 623a and the first drain electrode 624a are respectively connected to the first active layer 622a. Furthermore, contact holes can be formed in the second passivation layer 614b, through which the second source electrode 623b and the second drain electrode 624b are respectively connected to the second active layer 622b.

[0230] The second active layer 622b can be disposed on the first passivation layer 614a.

[0231] The second active layer 622b can be formed of an oxide semiconductor material. The band gap of an oxide semiconductor material is larger than that of silicon, preventing electrons from crossing this band gap in the off-state. Therefore, oxide semiconductor materials have low cutoff current. Consequently, transistors formed of oxide semiconductor materials can be used in switching transistors with short on-time and long off-time.

[0232] The gate insulating layer can be disposed on the second active layer 622b, and the second gate electrode 621b can be disposed on the gate insulating layer.

[0233] The gate insulating layer can be patterned in the same manner as the second gate electrode 621b.

[0234] A first source electrode 623a and a first drain electrode 624a can be disposed on a second passivation layer 614b. The first source electrode 623a and the first drain electrode 624a, spaced apart from each other, can be electrically connected to a first active layer 622a. Furthermore, a second source electrode 623b and a second drain electrode 624b can be disposed on the second passivation layer 614b. The second source electrode 623b and the second drain electrode 624b, spaced apart from each other, can be electrically connected to the second active layer 622b.

[0235] The planarization layer 113 can be disposed on the second passivation layer 614b.

[0236] exist Figure 15 In the first transistor 620a, the first active layer 622a is constructed of low-temperature polysilicon, and the second active layer 622b of the second transistor 620b is constructed of oxide semiconductor material. However, the first active layer 622a may be constructed of oxide semiconductor material, or the second active layer 622b may be constructed of low-temperature polysilicon, but is not limited thereto.

[0237] In a display device according to a sixth exemplary embodiment of the present disclosure, a plurality of transistors 620a and 620b of the pixel circuit are constructed of different types to improve the performance of the pixel circuit. The pixel circuit may include a plurality of transistors 620a and 620b and a capacitor, and the plurality of transistors 620a and 620b may be constructed of different types of transistors. For example, the first transistor 620a of the plurality of transistors 620a and 620b has a first active layer 622a constructed of cryogenic polycrystalline silicon, and the second transistor 620b has a second active layer 622b constructed of oxide semiconductor material. The first transistor 620a, comprising cryogenic polycrystalline silicon, has high mobility and low power consumption, making it suitable for use as a driving transistor. The second transistor 620b, comprising oxide semiconductor material, has a short on-time and maintains a long off-time, making it suitable for use as a switching transistor. Therefore, in the display device according to the sixth exemplary embodiment of the present disclosure, considering the function of the plurality of transistors 620a and 620b that constitute the pixel circuit, the first and second active layers 622a and 622b can be constructed of different materials, and the performance of the pixel circuit can be improved.

[0238] Reference Figure 15According to a sixth exemplary embodiment of the present disclosure, trenches T are formed between a plurality of sub-pixels to increase current paths, thereby minimizing leakage current during driving, particularly in display devices with multi-layer structures.

[0239] Furthermore, according to a sixth exemplary embodiment of this disclosure, a charge blocking layer is inserted into the organic layer 640 in the trench T. Simultaneously, the charge blocking layer can extend at a predetermined distance toward the emission region EA at the inclined interface of the trench T. Therefore, the thickness of the organic layer 640 including the extended charge blocking layer can be greater than the thickness of the organic layer 640 in other portions, allowing a step to be formed on the surface of the organic light-emitting diode.

[0240] Exemplary embodiments of this disclosure can also be described as follows:

[0241] According to one aspect of this disclosure, a display device is provided. The display device includes: a substrate in which an emitting region and a non-emitting region can be divided and a plurality of sub-pixels can be defined; a first electrode disposed in each of the plurality of sub-pixels; a dam disposed on an insulating layer above the substrate and exposing the first electrode through an opening; a trench formed by removing a portion of the dam between the plurality of sub-pixels to expose the insulating layer; an organic layer disposed above the substrate on which the dam is disposed; a charge blocking layer inserted into the organic layer in the trench; and a second electrode disposed on the organic layer.

[0242] The trench can expose the side surface of the embankment.

[0243] The organic layer can contact the exposed side surface of the embankment and the exposed upper surface of the insulating layer.

[0244] Multiple grooves can be set between the multiple sub-pixels.

[0245] The side surface of the trench may have a steeper taper than the side surface of the opening, and the organic layer in the trench may be thinner than the organic layer in the opening.

[0246] The charge blocking layer may extend at a predetermined distance toward the emission region at the inclined interface of the trench, and the organic layer including the extended charge blocking layer may be thicker than the organic layers in other portions.

[0247] The plurality of sub-pixels may include a first sub-pixel that emits light of a first color, a second sub-pixel that can emit light of a second color, and a third sub-pixel that can emit light of a third color.

[0248] Multiple third sub-pixels can be set in the same column, and multiple first sub-pixels and multiple second sub-pixels can be alternately set in the same column. The first sub-pixels and the second sub-pixels can be set to the left and right of the third sub-pixels.

[0249] In the horizontal direction, the plurality of third sub-pixels can be alternately set with the plurality of first and second sub-pixels, and in the vertical direction, the plurality of third sub-pixels can be repeatedly set or the plurality of first sub-pixels can be alternately set with the plurality of second sub-pixels.

[0250] The groove can be vertically disposed between the plurality of third sub-pixels and the plurality of first and second sub-pixels, and can be horizontally disposed between the plurality of first sub-pixels and the plurality of second sub-pixels.

[0251] Some of the multiple trenches can be configured as single trenches, while the other multiple trenches can be configured as double trenches.

[0252] According to another aspect of this disclosure, a display device is provided. The display device includes: a substrate in which an emitting region and a non-emitting region are divided and a plurality of sub-pixels are defined; a first electrode disposed in each of the plurality of sub-pixels; a dam disposed on an insulating layer above the substrate and exposing the first electrode through an opening; a spacer disposed on the dam between the plurality of sub-pixels and having an inverted taper; an organic layer disposed above the substrate on which the dam and the spacer are disposed; a charge blocking layer inserted into the organic layer at a lower end of the spacer; and a second electrode disposed on the organic layer.

[0253] The organic layer at the lower end of the spacer may have an inclined side surface located on the embankment.

[0254] The inclined side surface of the organic layer at the lower end of the spacer may have a steeper inclination angle than the inclination angle of the side surface of the opening, and the organic layer at the lower end of the spacer may be thinner than the organic layer in the opening.

[0255] The organic layer may include a charge generation layer disposed between the first electrode and the second electrode, a first stacked layer disposed between the charge generation layer and the first electrode, and a second stacked layer disposed between the second electrode and the charge generation layer.

[0256] The charge blocking layer may include a first charge blocking layer disposed between the charge generating layer and the second electrode, and a second charge blocking layer disposed between the charge generating layer and the first electrode.

[0257] The charge blocking layer may include a first charge blocking layer disposed between a second hole transport layer and a second light-emitting layer in a second stack, and a second charge blocking layer disposed between a first light-emitting layer and a first electron transport layer in a first stack.

[0258] The charge blocking layer may include a first charge blocking layer disposed between the second electron transport layer and the second electrode in the second stack, and a second charge blocking layer disposed between the first light-emitting layer and the first electron transport layer in the first stack.

[0259] The charge blocking layer may include polycarbonate (PC) and polymethyl methacrylate (PMMA).

[0260] The charge blocking layer may include materials such as TCTA [4,4',4”-tris(n-carbazolyl)-triphenylamine], NPD [N,N'-di(1-naphthyl)-N,N'-diphenyl-(1,1'-biphenyl)-4,4'-diamine] and TPD [N,N'-bis(3-methylphenyl)-N,N'-diphenylbenzidine] having a LUMO value of -2.5 eV or lower.

[0261] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be embodied or implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all respects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the appended claims, and all technical concepts within their equivalent scope should be interpreted as falling within the scope of the present disclosure.

Claims

1. A display device, comprising: A substrate, wherein an emitting region and a non-emitting region are divided and a plurality of sub-pixels are defined; A first electrode is disposed in each of the plurality of sub-pixels; A dam portion is disposed on an insulating layer above the substrate and exposes the first electrode through an opening; The trench is formed by removing a portion of the embankment between the plurality of sub-pixels to expose the insulating layer; An organic layer is disposed above the substrate on which the embankment is provided; A charge-blocking layer, which is inserted into the organic layer in the trench; as well as A second electrode is disposed on the organic layer; The charge blocking layer extends toward the emission region at a predetermined distance at the inclined interface of the trench, and the organic layer including the extended charge blocking layer is thicker than the organic layer in other portions.

2. The display device according to claim 1, wherein, The trench exposes the side surface of the embankment.

3. The display device according to claim 2, wherein, The organic layer is in contact with the exposed side surface of the embankment and the exposed upper surface of the insulating layer.

4. The display device according to claim 1, wherein, Multiple trenches are disposed between the multiple sub-pixels.

5. The display device according to claim 1, wherein, The side surface of the trench has a steeper taper than the side surface of the opening, and the organic layer in the trench is thinner than the organic layer in the opening.

6. The display device according to claim 1, wherein, The plurality of sub-pixels includes: The first sub-pixel emits light of the first color; The second sub-pixel emits light of the second color; and The third sub-pixel emits light of a third color.

7. The display device according to claim 6, wherein, Multiple third sub-pixels are arranged in the same column, and multiple first sub-pixels and multiple second sub-pixels are alternately arranged in the same column, with the first sub-pixels and second sub-pixels arranged to the left and right of the third sub-pixels.

8. The display device according to claim 6, wherein, In the horizontal direction, multiple third sub-pixels are alternately set with multiple first and second sub-pixels, and in the vertical direction, multiple third sub-pixels are repeatedly set or multiple first sub-pixels are alternately set with multiple second sub-pixels.

9. The display device according to claim 8, wherein, The groove is vertically disposed between the plurality of third sub-pixels and the plurality of first and second sub-pixels, and horizontally disposed between the plurality of first sub-pixels and the plurality of second sub-pixels.

10. The display device according to claim 9, wherein, Some of the multiple trenches are configured as single trenches, while the other multiple trenches are configured as double trenches.

11. A display device, comprising: A substrate, wherein an emitting region and a non-emitting region are divided and a plurality of sub-pixels are defined; A first electrode is disposed in each of the plurality of sub-pixels; A dam portion is disposed on an insulating layer above the substrate and exposes the first electrode through an opening; A spacer, disposed on the embankment between the plurality of sub-pixels and having an inverted taper; An organic layer is disposed above the substrate on which the embankment and the spacer are disposed; A charge-blocking layer is inserted into the organic layer at the lower end of the spacer; as well as A second electrode is disposed on the organic layer; The charge blocking layer extends toward the emission region at a predetermined distance at the inclined interface at the lower part of the spacer, and the organic layer including the extended charge blocking layer is thicker than the organic layer in other parts.

12. The display device according to claim 11, wherein, The organic layer at the lower end of the spacer has an inclined side surface located above the embankment.

13. The display device according to claim 12, wherein, The inclined side surface of the organic layer at the lower end of the spacer has a steeper inclination angle than the inclination angle of the side surface of the opening, and the organic layer at the lower end of the spacer is thinner than the organic layer in the opening.

14. The display device according to any one of claims 1 and 11, wherein, The organic layer includes: A charge generation layer disposed between the first electrode and the second electrode; A first stacked layer disposed between the charge generation layer and the first electrode; and The second stack is disposed between the second electrode and the charge generation layer.

15. The display device according to claim 14, wherein, The charge blocking layer includes: A first charge blocking layer disposed between the charge generating layer and the second electrode; and A second charge blocking layer is disposed between the charge generating layer and the first electrode.

16. The display device according to claim 14, wherein, The charge blocking layer includes: A first charge blocking layer disposed between the second hole transport layer and the second light-emitting layer of the second stack; and A second charge blocking layer is disposed between the first light-emitting layer and the first electron transport layer of the first stack.

17. The display device according to claim 14, wherein, The charge blocking layer includes: A first charge blocking layer disposed between the second electron transport layer and the second electrode in the second stack; and A second charge blocking layer is disposed between the first light-emitting layer and the first electron transport layer of the first stack.

18. The display device according to claim 14, wherein, The charge-blocking layer comprises polycarbonate (PC) and polymethyl methacrylate (PMMA).

19. The display device according to claim 14, wherein, The charge blocking layer comprises a material having a LUMO value of -2.5 eV or lower.

20. The display device according to claim 19, wherein, The material is TCTA [4, 4', 4''-tris(n-carbazolyl)-triphenylamine], NPD [N, N'-di(1-naphthyl)-N, N'-diphenyl-(1, 1'-biphenyl)-4, 4'-diamine] or TPD [N, N'-bis(3-methylphenyl)-N, N'-diphenylbenzidine].

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