Display panel and manufacturing method thereof, and display device
By introducing the voltage-regulating capacitor of the active layer into the pixel circuit of the display panel, the problem of flickering on the display panel is solved, and a more stable display effect is achieved.
Patent Information
- Application Number
- CN202210447461.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-04-26
- Publication Date
- 2025-08-29
- Estimated Expiration
- 2042-04-26
AI Technical Summary
The existing display panels are prone to flickering when displayed, especially when driven at low frequency, which affects the display effect.
The voltage-regulating capacitor is introduced into the pixel circuit of the display panel. The first plate of the voltage-regulating capacitor is located in the active layer. The stability of the double-gate node potential of the double-gate transistor is maintained through the voltage-regulating capacitor, and the first plate is set on the active layer to reduce the plate spacing and increase the capacitance value, thereby improving the flickering phenomenon.
It effectively suppresses potential fluctuations in the double gate node, reduces leakage, improves flickering of the display panel, and improves display stability.
Smart Images

Figure CN115376462B_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to display technology, and more particularly to a display panel and a manufacturing method thereof, and a display device. Background Art
[0002] With the development of display technology, the application of display panels is becoming more and more extensive, and accordingly the requirements for display panels are becoming higher and higher.
[0003] However, existing display panels are prone to flickering during display, which severely limits further applications of the display panels. Summary of the Invention
[0004] The present invention provides a display panel and a manufacturing method thereof, and a display device, so as to improve the flickering phenomenon of the display panel during display.
[0005] In a first aspect, an embodiment of the present invention provides a display panel, wherein the display panel includes a plurality of pixel circuits arranged in an array, wherein the pixel circuits include:
[0006] Data writing module, driving module, storage capacitor, light emitting module, threshold compensation module and voltage stabilizing capacitor;
[0007] The data writing module is used to write the data voltage into the control terminal of the driving module; the driving module is used to generate a driving current according to the data voltage; the light emitting module is used to emit light in response to the driving current; the storage capacitor is used to maintain the potential of the control terminal of the driving module; the threshold compensation module is used to compensate for the threshold voltage of the driving module;
[0008] The threshold compensation module is a dual-gate transistor, and the voltage-stabilizing capacitor is used to stabilize the potential of the dual-gate node of the dual-gate transistor;
[0009] The display panel includes an active layer, and the first electrode plate of the voltage-stabilizing capacitor is located on the active layer.
[0010] Optionally, the first plate of the voltage-stabilizing capacitor is electrically connected to the dual-gate node of the dual-gate transistor, and the second plate of the voltage-stabilizing capacitor is connected to a fixed potential.
[0011] Optionally, the active layer includes a protruding portion connected to a dual-gate node of the dual-gate transistor.
[0012] Optionally, the protruding portion includes a semiconductor structure and a conductive structure, the semiconductor structure is arranged corresponding to the second electrode plate and forms a first electrode plate, and the first electrode plate is connected to the dual-gate node of the dual-gate transistor through the conductive structure.
[0013] Optionally, the dual-gate transistor includes a first channel and a second channel located in the active layer, the first channel and the second channel are connected via a conductive connection portion located in the active layer; and the protruding portion is connected to the conductive connection portion.
[0014] The conductive connecting portion is an L-shaped structure or a C-shaped structure.
[0015] Optionally, the second plate of the voltage-stabilizing capacitor is arranged in the same layer as the gate of the dual-gate transistor.
[0016] Optionally, the pixel circuit further includes an initialization module, which connects an initialization signal to the control terminal of the driving module and the light-emitting module;
[0017] The second plate of the voltage-stabilizing capacitor is connected to the initialization signal.
[0018] In a second aspect, an embodiment of the present invention further provides a display device, comprising the display panel described in the first aspect.
[0019] In a third aspect, an embodiment of the present invention further provides a method for manufacturing the display panel according to the first aspect, comprising:
[0020] An active layer is prepared, wherein the active layer is formed with a first electrode plate of the voltage-stabilizing capacitor.
[0021] Optionally, the preparation method also includes: forming a first metal layer and patterning it to form the second plate of the voltage-stabilizing capacitor and the gate of the dual-gate transistor; using the first metal layer as a mask, conducting the active layer to form a semiconductor structure and a conductor structure, the semiconductor structure and the second plate are arranged correspondingly to form a first plate, and the first plate is connected to the dual gate node of the dual-gate transistor through the conductor structure.
[0022] The technical solution of the embodiment of the present invention adopts a display panel including a plurality of pixel circuits arranged in an array, wherein the pixel circuit includes: a data writing module, a driving module, a storage capacitor, a light-emitting module, a threshold compensation module and a voltage-stabilizing capacitor; the data writing module is used to write a data voltage into the control terminal of the driving module; the driving module is used to generate a driving current according to the data voltage; the light-emitting module is used to emit light in response to the driving current; the storage capacitor is used to maintain the potential of the control terminal of the driving module; the threshold compensation module is used to compensate for the threshold voltage of the driving module; the threshold compensation module is a dual-gate transistor, and the voltage-stabilizing capacitor is used to stabilize the potential of the dual-gate node of the dual-gate transistor; the display panel includes an active layer, and the first plate of the voltage-stabilizing capacitor is located in the active layer. The voltage-stabilizing capacitor can maintain the stability of the dual-gate node potential of the dual-gate transistor. At the same time, the first plate of the voltage-stabilizing capacitor is set in the active layer. Since the gate insulating layer covering the active layer is relatively thin, the first plate is set in the active layer, and the distance between the two plates of the voltage-stabilizing capacitor can be set closer, thereby making the capacitance of the voltage-stabilizing capacitor larger, that is, the voltage-stabilizing effect is better. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 A schematic diagram of the circuit structure of a pixel circuit provided by an embodiment of the present invention;
[0024] Figure 2 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention;
[0025] Figure 3 A schematic diagram of the layout structure of a display panel provided by an embodiment of the present invention;
[0026] Figure 4 A schematic diagram of the layout structure of another display panel provided by an embodiment of the present invention;
[0027] Figure 5 for Figure 3 Cross-sectional view along direction A1A2;
[0028] Figure 6 A schematic structural diagram of a display device provided by an embodiment of the present invention;
[0029] Figure 7 The present invention provides a flow chart of a method for manufacturing a display panel. DETAILED DESCRIPTION
[0030] The present invention will be further described in detail below with reference to the accompanying drawings and examples. It will be understood that the specific embodiments described herein are intended only to illustrate the present invention and are not intended to limit the present invention. It should also be noted that, for ease of description, the accompanying drawings only illustrate portions relevant to the present invention, not all structures.
[0031] As mentioned in the background technology, the existing display panel has a flickering phenomenon during display. After careful research, the inventors found that the reason for this technical problem is that: the display panel usually includes multiple pixel circuits inside, and the pixel circuits are used to emit light to achieve display; the pixel circuit generally includes a threshold compensation transistor, and in order to reduce leakage current, the threshold compensation transistor is usually a dual-gate transistor; in the process of the threshold compensation transistor being turned on and off, its gate potential is pulled up from a low level to a high level, so that the potential of the dual-gate node of the dual-gate transistor is pulled up, and then during the display process, the dual-gate node leaks electricity to the light-emitting module of the pixel circuit, which eventually causes the display panel to flicker, and the flickering phenomenon is more obvious when driven at a low frequency.
[0032] Based on the above technical problems, the present invention proposes the following solutions:
[0033] An embodiment of the present invention provides a display panel, which may be an organic light emitting diode display panel, a micro light emitting diode display panel, or a quantum dot light emitting diode display panel; the display panel includes a plurality of pixel circuits arranged in an array; Figure 1 As shown, Figure 1 A circuit structure diagram of a pixel circuit provided in an embodiment of the present invention, each pixel circuit includes: a data writing module 101, a driving module 102, a storage capacitor C1, a light-emitting module 106, a threshold compensation module 103 and a voltage-stabilizing capacitor C2; the data writing module 101 is used to write the data voltage Data into the control end of the driving module 102; the driving module 102 is used to generate a driving current according to the data voltage Data; the light-emitting module 106 is used to emit light in response to the driving current; the storage capacitor C1 is used to maintain the potential of the control end of the driving module 102; the threshold compensation module 103 is used to compensate for the threshold voltage of the driving module 102; the threshold compensation module 103 is a dual-gate transistor, and the voltage-stabilizing capacitor C2 is used to stabilize the potential of the dual-gate node N1 of the dual-gate transistor; the display panel includes an active layer, and the first plate of the voltage-stabilizing capacitor C2 is located in the active layer.
[0034] Specifically, the light emitting module 106 may be, for example, an OLED (Organic Light Emitting Diode), or a Micro-LED, etc. The light emitting module 106 is a current-type device that needs to respond to a driving current to emit light. The data voltage Data is written to the control terminal of the display module 106. When the light-emitting module 106 is required to display different grayscales, it can be controlled by writing different data voltages Data. Since the display panel includes multiple pixel circuits, due to limitations such as manufacturing processes, the threshold voltages of the driver modules 102 in different pixel circuits may be different. If the driving current formula includes the threshold voltage information of the driver module 102, when the same data voltage is provided to different pixel circuits, the light-emitting module may emit light of different grayscales, which will cause a mura phenomenon. Therefore, the threshold voltage of the driver module 102 is compensated by the threshold compensation module 103, so that the formula for generating the driving current of the pixel circuit does not include the threshold voltage information of the driver module, thereby improving the mura phenomenon. Furthermore, within a frame display time, the light-emitting module 106 emits light for most of the time, and the storage capacitor C1 is required to maintain the stability of the potential of the control terminal of the driver module 102, thereby ensuring the stability of the potential of the control terminal of the driver module 102 during the light-emitting stage, thereby ensuring that the light-emitting module 106 can emit light stably. When the threshold compensation module 103 changes from the on state to the off state, the dual-gate node N1 of the dual-gate transistor The potential is pulled high, causing the dual-gate node to leak current to the light-emitting module 106 during the light-emitting phase, ultimately causing flickering in the light-emitting module. The dual-gate node N1 of the dual-gate transistor is the node where the source and drain electrodes of the two sub-transistors are connected. In this embodiment, by connecting a voltage-stabilizing capacitor C2 to the dual-gate node N1, the potential of the dual-gate node N1 can be maintained when the threshold compensation module changes from the on state (from the on state to the off state), such as maintaining the potential written during the data writing phase (this potential is a lower potential), without being pulled high. This prevents current from leaking to the light-emitting module 106 during the light-emitting phase, thereby improving the flickering phenomenon. In addition, the display panel usually includes an active layer, which is composed of semiconductor materials and mainly functions to constitute the channel region, source doping region and drain doping region of each transistor in the pixel circuit; in this embodiment, the first plate of the voltage-stabilizing capacitor C2 can be set in the active layer, that is, the material of the first plate of the voltage-stabilizing capacitor C2 is semiconductor material. In this embodiment, the first plate can be a plate connected to the dual-gate node N1, or it can be another plate; since the gate insulating layer covering the active layer is relatively thin, the first plate is set in the active layer, and the distance between the two plates of the voltage-stabilizing capacitor C2 can be set closer, thereby making the capacitance of the voltage-stabilizing capacitor C2 larger, that is, the voltage-stabilizing effect is better.
[0035] The technical solution of this embodiment adopts a display panel including a plurality of pixel circuits arranged in an array, wherein the pixel circuit includes: a data writing module, a driving module, a storage capacitor, a light-emitting module, a threshold compensation module, and a voltage-stabilizing capacitor; the data writing module is used to write a data voltage into the control terminal of the driving module; the driving module is used to generate a driving current according to the data voltage; the light-emitting module is used to emit light in response to the driving current; the storage capacitor is used to maintain the potential of the control terminal of the driving module; the threshold compensation module is used to compensate for the threshold voltage of the driving module; the threshold compensation module is a dual-gate transistor, and the voltage-stabilizing capacitor is used to stabilize the potential of the dual-gate node of the threshold compensation module; the display panel includes an active layer, and the first plate of the voltage-stabilizing capacitor is located in the active layer. The voltage-stabilizing capacitor can maintain the stability of the dual-gate node potential of the threshold compensation module. At the same time, the first plate of the voltage-stabilizing capacitor is set in the active layer. Since the gate insulating layer covering the active layer is relatively thin, the first plate is set in the active layer, and the distance between the two plates of the voltage-stabilizing capacitor can be set closer, thereby making the capacitance of the voltage-stabilizing capacitor larger, that is, the voltage-stabilizing effect is better.
[0036] For example, continue to refer to Figure 1The pixel circuit may further include an initialization module, which may specifically include a first initialization module 104 and a second initialization module 105. The first initialization module 104 is used to initialize the control end of the driving module 102 during the initialization phase; the second initialization module 105 is used to initialize the light-emitting module 106 during the initialization phase; the pixel circuit may further include a first light-emitting control module 107 and a second light-emitting control module 108; a first end of the data writing module 101 is connected to the data voltage Data, a second end of the data writing module 101 is electrically connected to the first end of the driving module 102, and a control end of the data writing module 101 is connected to the second scanning signal S2; a first end of the driving module 102 is electrically connected to a second end of the first light-emitting control module 107, a second end of the driving module 102 is electrically connected to a first end of the threshold compensation module 103; a second end of the threshold compensation module 103 is electrically connected to the control end of the driving module 102, and the threshold compensation module 103 The control end of the first initialization module 104 is connected to the second scan signal S2; the first end of the first initialization module 104 is connected to the initialization signal Vref, the second end of the first initialization module 104 is electrically connected to the control end of the driving module 102, and the control end of the first initialization module 104 is connected to the first scan signal S1; the first end of the second initialization module 105 is connected to the initialization signal Vref, the second end of the second initialization module 105 is electrically connected to the anode of the light-emitting module 106, and the control end of the second initialization module 105 is connected to the first scan signal S1; the second end of the first light-emitting control module 107 is connected to the first power signal LEVDD, and the control end of the first light-emitting control module 107 is connected to the enable signal EM; the first end of the second light-emitting control module 108 is electrically connected to the second end of the driving module 102, the second end of the second light-emitting control module 108 is electrically connected to the anode of the light-emitting module 106, and the control end of the second light-emitting control module 108 is connected to the enable signal EM; the cathode of the light-emitting module 106 is connected to the second power signal ELVSS. The first end of the storage capacitor C1 is connected to the first power supply signal ELVDD, and the second end of the storage capacitor C1 is electrically connected to the control end of the driving module 102; the first end of the voltage-stabilizing capacitor C2 is electrically connected to the dual-gate node N1 of the threshold compensation module, and the second end of the voltage-stabilizing capacitor C2 is connected to a fixed potential.
[0037] Exemplarily, the data writing module 101 includes a first transistor T1, the first end of the first transistor T1 serves as the first end of the data writing module 101, the second end of the first transistor T1 serves as the second end of the data writing module 101, and the control end of the first transistor T1 serves as the control end of the data writing module 101; the driving module 102 includes a second transistor T2, the first end of the second transistor T2 serves as the first end of the driving module 102, the second end of the second transistor T2 serves as the second end of the driving module 102, and the control end of the second transistor T2 serves as the control end of the driving module 102; the dual-gate transistor of the threshold compensation module 103 is a third transistor T3, the first end of the third transistor T3 serves as the first end of the threshold compensation module 103, the second end of the third transistor T3 serves as the second end of the threshold compensation module 103, and the control end of the third transistor T3 serves as the control end of the threshold compensation module 103, wherein the first end and the second end of the third transistor are respectively the unconnected poles of the source and drain of the two sub-transistors in the dual-gate transistor; the first initialization module 104 includes a fourth transistor T4, the first end of the fourth transistor T4 serves as the first initialization module The first end of the fourth transistor T4 serves as the second end of the first initialization module 104, and the second end of the fourth transistor T4 serves as the control end of the first initialization module 104; the second initialization module 105 includes a fifth transistor T5, the first end of the fifth transistor T5 serves as the first end of the second initialization module 105, the second end of the fifth transistor T5 serves as the second end of the second initialization module 105, and the control end of the fifth transistor T5 serves as the control end of the second initialization module 105; the first light-emitting control module 107 includes a sixth transistor T6, the first end of the sixth transistor T6 serves as the first end of the first light-emitting control module 107, the second end of the sixth transistor T6 serves as the second end of the first light-emitting control module 107, and the control end of the sixth transistor T6 serves as the control end of the first light-emitting control module 107; the second light-emitting control module 108 includes a seventh transistor T7, the first end of the seventh transistor T7 serves as the first end of the second light-emitting control module 108, the second end of the seventh transistor T7 serves as the second end of the second light-emitting control module 108, and the control end of the seventh transistor T7 serves as the control end of the second light-emitting control module 108. The first to seventh transistors can all be N-type transistors or P-type transistors, and the fourth transistor T4 can also be a dual-gate transistor; taking each transistor as a P-type transistor as an example; of course, it should be noted that when the third transistor T3 is an N-type transistor, its gate potential jumps from a high level to a low level during the shutdown process of the third transistor T3, and the potential of the dual-gate node will be pulled down, which ultimately makes the potential of the dual-gate node unstable. Figure 2 A driving timing diagram of a pixel circuit provided by an embodiment of the present invention, combined with Figure 1 and Figure 2 , the driving process of the pixel circuit may include:
[0038] Initialization phase t1: During this phase, the first scanning signal S1 is at a low level, the second scanning signal S2 and the enable signal EM are at a high level, that is, the fourth transistor T4 and the fifth transistor T5 are turned on, and the other transistors are turned off. The initialization signal Vref initializes the anode of the light-emitting module 106 and the control terminal of the driving module 102, avoiding the influence of the residual signal of the previous frame and facilitating the turning on of the driving module 102 in the next phase.
[0039] In the data writing phase t2, the first scanning signal S1 is at a high level, the second scanning signal S2 is at a low level, the enable signal EM is at a high level, the first transistor T1, the second transistor T2, and the third transistor T3 are turned on, and the remaining transistors are turned off. The data signal Data is written to the control terminal of the second transistor T2 after passing through the first transistor T1, the second transistor T2, and the third transistor T3. When the difference between the potential of the control terminal of the second transistor T2 and the potential of the first terminal of the second transistor T2 is equal to the threshold voltage of the second transistor T2, the second transistor T2 is turned off, thereby completing the data writing process. At this time, the potential of the control terminal of the second transistor T2 includes the threshold voltage information of the second transistor T2.
[0040] In stage t3, the first scanning signal S1 and the second scanning signal S2 are at a high level, and the enable signal EM is at a low level. During the process of the second scanning signal S2 switching from a low level to a high level, the potential of the dual-gate node N1 of the threshold compensation module is maintained at a relatively low potential due to the maintaining effect of the voltage-stabilizing capacitor C2. In this stage, the sixth transistor T6, the second transistor T2, and the seventh transistor T7 are turned on, and the second transistor T2 generates a corresponding current according to the potential of its control terminal, thereby driving the light-emitting module 106 to emit light of a corresponding grayscale.
[0041] Optionally, Figure 3 FIG4 is a schematic diagram of a layout structure of a display panel provided in an embodiment of the present invention, FIG5 is a schematic diagram of a layout structure of another display panel provided in an embodiment of the present invention, Figure 5 for Figure 3 The cross-sectional view along the A1A2 direction should be noted that: Figure 3 and Figure 4 Only the relationship between the threshold compensation module and the voltage stabilizing capacitor is shown in the figure. The remaining transistors and capacitors in the pixel circuit are the same as the existing design. Figures 1 to 5 The first plate of the voltage-stabilizing capacitor C2 is electrically connected to the dual-gate node N1 of the threshold compensation module 103 , and the second plate of the voltage-stabilizing capacitor C2 is connected to a fixed potential.
[0042] Specifically, since the voltage-stabilizing capacitor C2 needs to be electrically connected to the dual-gate node of the threshold compensation module, and the dual-gate node of the threshold compensation module is disposed in the active layer, the first plate of the voltage-stabilizing capacitor C2 can be electrically connected to the dual-gate node of the threshold compensation module, thereby simplifying the wiring between the voltage-stabilizing capacitor and the threshold compensation module and reducing wiring difficulty. The second plate of the voltage-stabilizing capacitor C2 is connected to a fixed potential, such as the initialization signal Vref. The initialization signal Vref is a constant negative voltage, that is, the initialization signal Vref does not jump, thereby allowing the first and second plates to form a stable capacitor.
[0043] Optionally, continue combining Figures 1 to 5 , the active layer includes a protruding portion 21b connected to the dual-gate node of the dual-gate transistor, and the first electrode is located at the protruding portion 21b. Figure 3 and Figure 4 As shown, the portion of the traditional threshold compensation module located in the active layer includes a first channel, a second channel, and a conductive connection portion 21a connecting the first channel and the second channel; the conductive connection portion 21a is equivalent to the double gate node N1, and the conductive connection portion 21a is Figure 3 The L-shaped structure shown or Figure 4 The C-type structure shown; in this embodiment, the active layer 21 is provided with a protruding portion 21b relative to the conductive connecting portion 21a. When the active layer is manufactured, the conductive connecting portion 21a and the protruding portion 21b are patterned once to form an integrated structure, which has a simple manufacturing process and does not increase the overall space required for the layout of the pixel circuit.
[0044] Optionally, the protruding portion 21b includes a semiconductor structure and a conductive structure, the semiconductor structure is arranged corresponding to the second electrode plate 22b and forms a first electrode plate, and the first electrode plate is connected to the dual gate node of the dual-gate transistor through the conductive structure.
[0045] Specifically, after the active layer is made, the metal layer where the gate is located, that is, the metal layer where the second electrode is located, is then made; since the second electrode is usually made of metal material, after the metal material is made, the active layer is conductorized using the metal material as a mask, that is, the active layer is conductorized by heavy doping.
[0046] It should be noted that Figure 3 and Figure 4 Only two structures of the threshold compensation module are shown. Of course, the threshold compensation module can also have other structures, and the protruding portion 21b is not limited to Figure 2 and Figure 3 The structure in FIG. 1 may also be other active layer parts connected to the conductive connection part 21 a.
[0047] Optionally, continue to refer to Figures 1 to 5The second plate 22b of the voltage-stabilizing capacitor is arranged on the same layer as the gate 22a of the dual-gate transistor.
[0048] Specifically, if Figure 5 As shown, the display panel may include a substrate 30, a buffer layer 31, an active layer, a gate insulating layer 32 and a first metal layer stacked in sequence; the substrate 30 may be, for example, a silicon substrate, a sapphire substrate or a diamond substrate, etc., and the substrate 30 may be flexible or rigid, which is not limited in this embodiment; the buffer layer may be, for example, a stacked structure of silicon nitride and silicon oxide; along the thickness direction of the display panel, the portion of the active layer that overlaps with the projection of the second electrode 22b constitutes the first electrode 211 of the voltage-stabilizing capacitor C2, and the portion that overlaps with the gate 22a of the threshold compensation module constitutes the channel 212 of the threshold compensation module; in order to increase the threshold The switching performance of the compensation module, the gate of the threshold compensation module is usually set in the metal layer closest to the active layer 212, that is, the first metal layer. Those skilled in the art can understand that the second metal layer of the display panel can be used to set the source metal and drain metal of the transistor; in this embodiment, the second plate and the gate of the threshold compensation module are set on the same layer. On the one hand, it can simplify the manufacturing process, that is, the second plate and the gate of the transistor can be manufactured at the same time without increasing the process flow; on the other hand, it can also make the distance between the second plate and the first plate closer, thereby making the capacitance value of the voltage-stabilizing capacitor C2 larger and the voltage-stabilizing effect better.
[0049] Optionally, along the thickness direction of the display panel, the projected area of the second electrode plate 22 b is smaller than the projected area of the protruding portion 21 b .
[0050] Specifically, in the voltage-stabilizing capacitor C2, the better the conductivity of the overlapping portion of the two plates, the better the performance of the capacitor; since the second plate needs to be used as a mask to conduct the active layer, this embodiment can set the area of the second plate to be smaller than the area of the protruding portion. Then, during the conductorization, ions will be laterally injected into the area of the first plate that overlaps with the second plate, thereby improving the conductivity of the first plate, which is beneficial to increase the capacitance value of the voltage-stabilizing capacitor and further improve the voltage-stabilizing performance.
[0051] The embodiment of the present invention further provides a display device, such as Figure 6 As shown, Figure 6 This is a structural schematic diagram of a display device provided in an embodiment of the present invention. The display device can be, for example, a mobile phone, a tablet computer, an MP3, an MP4, a smart watch, a smart helmet or other wearable devices. Since it includes the display panel provided in any embodiment of the present invention, it also has the same beneficial effects and will not be repeated here.
[0052] The embodiment of the present invention also provides a method for manufacturing a display panel, such as Figure 7 As shown, Figure 7A flow chart of a method for manufacturing a display panel provided in an embodiment of the present invention, the method for manufacturing a display panel comprising:
[0053] Step S301: preparing an active layer, wherein the active layer forms a first electrode plate of a voltage-stabilizing capacitor.
[0054] Specifically, the active layer can be formed by growth, for example, and then patterned using a mask, thereby simultaneously forming the channel of the threshold compensation module and the first plate of the voltage-stabilizing capacitor.
[0055] In this embodiment, by setting the first plate of the voltage-stabilizing capacitor in the active layer and having a semiconductor structure, no additional electrode layer is required when the first plate is formed; and since the gate insulating layer covering the active layer is thin, the first plate is set in the active layer, and the distance between the two plates of the voltage-stabilizing capacitor can be set closer, thereby making the capacitance of the voltage-stabilizing capacitor larger, that is, the voltage-stabilizing effect is better.
[0056] Optionally, the method for preparing the display panel also includes: forming a first metal layer and patterning it to form a second plate of the voltage-stabilizing capacitor and a gate of the dual-gate transistor; using the first metal layer as a mask, conducting the active layer to form a semiconductor structure and a conductor structure, the semiconductor structure and the second plate are arranged correspondingly to form a first plate, and the first plate is connected to the dual gate node of the dual-gate transistor through the conductor structure.
[0057] Specifically, in this embodiment, the second plate and the gate of the threshold compensation module are arranged on the same layer, which can simplify the manufacturing process on the one hand, that is, the second plate and the gate of the transistor can be manufactured at the same time without increasing the process flow; on the other hand, it can also make the distance between the second plate and the first plate closer, thereby making the capacitance value of the voltage-stabilizing capacitor larger and the voltage-stabilizing effect better; in addition, by using the first metal layer as a mask, there is no need to add additional masking process, which is conducive to reducing manufacturing costs.
[0058] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.
Claims
1. A display panel, characterized in that: The display panel includes a plurality of pixel circuits arranged in an array, and the pixel circuits include: Data writing module, driving module, storage capacitor, light emitting module, threshold compensation module and voltage stabilizing capacitor; The data writing module is used to write the data voltage into the control terminal of the driving module; the driving module is used to generate a driving current according to the data voltage; the light emitting module is used to emit light in response to the driving current; the storage capacitor is used to maintain the potential of the control terminal of the driving module; the threshold compensation module is used to compensate for the threshold voltage of the driving module; The threshold compensation module includes a dual-gate transistor, and the voltage-stabilizing capacitor is used to stabilize the potential of the dual-gate node of the dual-gate transistor; The display panel includes an active layer, and the first electrode plate of the voltage-stabilizing capacitor is located in the active layer; the active layer includes a protruding portion connected to the dual-gate node of the dual-gate transistor, and the first electrode plate is located in the protruding portion; the protruding portion includes a semiconductor structure and a conductive structure, the semiconductor structure is arranged corresponding to the second electrode plate of the voltage-stabilizing capacitor and forms a first electrode plate, and the first electrode plate is connected to the dual-gate node of the dual-gate transistor through the conductive structure.
2. The display panel according to claim 1, wherein: The second plate of the voltage-stabilizing capacitor is connected to a fixed potential.
3. The display panel according to claim 1, wherein: The dual-gate transistor includes a first channel and a second channel located in the active layer, the first channel and the second channel are connected via a conductive connection portion located in the active layer; the protruding portion is connected to the conductive connection portion; The conductive connecting portion is an L-shaped structure or a C-shaped structure.
4. The display panel according to claim 2, wherein: The second plate of the voltage-stabilizing capacitor is arranged in the same layer as the gate of the dual-gate transistor.
5. The display panel according to claim 2, wherein: The pixel circuit further includes an initialization module, which connects an initialization signal to the control terminal of the driving module and the light-emitting module; The second plate of the voltage-stabilizing capacitor is connected to the initialization signal.
6. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 5.
7. A method for preparing a display panel according to any one of claims 1 to 5, characterized in that: include: An active layer is prepared, wherein the active layer is formed with a first electrode plate of the voltage-stabilizing capacitor.
8. The method for manufacturing a display panel according to claim 7, wherein: Also includes: forming a first metal layer and patterning it to form a second plate of the voltage-stabilizing capacitor and a gate of the dual-gate transistor; Using the first metal layer as a mask, the active layer is conductively formed to form a semiconductor structure and a conductive structure. The semiconductor structure is arranged corresponding to the second electrode plate to form a first electrode plate. The first electrode plate is connected to the dual gate node of the dual-gate transistor through the conductive structure.
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