A method and system for detecting layout and principle consistency of a display panel
By generating a schematic netlist of equivalent resistances between IC pins and FPC pins, the problem of time-consuming and inaccurate manual schematic lookup in the consistency testing of display panel layout and schematic is solved, and automated and efficient consistency testing is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- TRULY (RENSHOU) HIGH-END DISPLAY TECH LTD
- Filing Date
- 2022-08-04
- Publication Date
- 2026-06-16
AI Technical Summary
In the current display panel layout and principle consistency testing, the connection relationship between FPC and IC cannot be automatically detected, resulting in long manual layout inspection time and low accuracy.
By generating a schematic netlist of equivalent resistances between IC pins and FPC pins and performing a consistency check between it and the design layout, a comparative analysis report is automatically generated to remind designers to modify or update the schematic to improve accuracy.
It improves the efficiency and accuracy of layout and principle consistency detection, and reduces the time and error rate of manual intervention.
Smart Images

Figure CN115408982B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display panel technology, and in particular to a method and system for detecting the consistency between the layout and principle of a display panel. Background Technology
[0002] Most display panels undergo layout-to-schematic consistency verification (LVS) during the design process to ensure consistency between the layout design and the schematic design. However, current LVS systems cannot detect the connection relationships between the panel's FPC and IC, requiring manual verification. This results in time-consuming manual diagram checks with reduced accuracy, thus diminishing the motivation of relevant reviewers.
[0003] Currently, there is an urgent need for an LVS solution that can automatically detect the connection relationship between the FPC and IC of the panel, so as to improve the efficiency and accuracy of drawing lookup and thus make the product design more perfect. Summary of the Invention
[0004] In the current process of testing the consistency between the layout and principle of display panels, manual inspection of the layout is time-consuming and has low accuracy.
[0005] To address the aforementioned issues, a method and system for detecting the consistency between the layout and schematic of a display panel are proposed. This method generates a schematic netlist by using the connection relationship between IC pins and FPC pins as an equivalent resistance. The schematic netlist is then compared with the corresponding design layout for consistency detection, and a comparison analysis report is automatically generated. When the design layout and schematic netlist are inconsistent, a consistency error report is generated in the comparison analysis report, reminding designers to review the layout, modify it, or update the schematic, thus improving work efficiency and accuracy.
[0006] Firstly, a method for detecting the consistency between the layout and principle of a display panel, comprising:
[0007] Step 100: Generate a schematic netlist based on the connection relationship between the IC pins and FPC pins of the display panel;
[0008] Step 200: Perform consistency checks between the schematic netlist and the corresponding design layout, and generate a comparison analysis report;
[0009] Step 300: The designer processes the principle netlist based on the comparative analysis report;
[0010] Step 100 includes:
[0011] Step 110: Obtain the matching rules between the IC pins and the FPC pins.
[0012] In conjunction with the layout and principle consistency detection method for the display panel described in the first aspect of the present invention, in a first possible embodiment, step 200 includes:
[0013] Step 210: If the design layout is inconsistent with the schematic netlist, output a consistency error report;
[0014] Step 220: Based on the consistency error report, remind the designer to modify or update the schematic netlist.
[0015] In conjunction with the first possible embodiment of the first aspect of the present invention, in the second possible embodiment, step 100 further includes:
[0016] Step 120: Obtain the number of pins for the display panel IC and FPC;
[0017] Step 130: Determine the connection mapping relationship between the IC pins and the FPC pins;
[0018] Step 140: Generate a principle netlist based on the connection mapping relationship.
[0019] In conjunction with the second possible implementation of the first aspect of the present invention, in the third possible implementation, step 110 includes:
[0020] Step 111: Set the connection between the IC pin and the FPC pin to an equivalent resistance connection;
[0021] Step 112: The IC pins and FPC pins are connected and matched through an equivalent resistance connection.
[0022] In conjunction with the third possible implementation of the first aspect of the present invention, in the fourth possible implementation, step 210 includes:
[0023] Step 211: Detect the equivalent resistance between the IC pin and the FPC pin to obtain the equivalent resistance status;
[0024] Step 212: Compare the equivalent resistance state with the connection state of the schematic netlist;
[0025] Step 213: If the equivalent resistance state is different from the connection state of the schematic netlist, then it is determined that the design layout is inconsistent with the schematic netlist, and a consistency error report is output.
[0026] In conjunction with the fourth possible implementation of the first aspect of the present invention, in the fifth possible implementation, step 140 includes:
[0027] Step 141: Obtain the correspondence between the IC pins and the FPC pins according to the connection mapping relationship;
[0028] Step 142: Connect the IC pins and FPC pins according to the correspondence to generate the schematic netlist.
[0029] Secondly, a layout and principle consistency testing system for a display panel, employing the testing method described in the first aspect, includes:
[0030] Control unit;
[0031] Read unit;
[0032] Generating unit;
[0033] Comparative analysis unit;
[0034] The reading unit, the generating unit, and the comparison and analysis unit are respectively connected to the control unit;
[0035] The reading unit is used to read the layout information between the IC and FPC of the display panel;
[0036] The generation unit is used to generate a schematic netlist based on the connection relationship between IC pins and FPC pins;
[0037] The comparison analysis unit is used to compare and analyze the schematic netlist with the layout information, and generate a comparison analysis report for the designers;
[0038] The connection relationship includes the matching rules between the IC pins and the FPC pins.
[0039] In conjunction with the consistency detection system described in the second aspect, in a first possible implementation, the generation unit includes:
[0040] Detection module;
[0041] Comparison and judgment module;
[0042] The detection module is used to detect the equivalent resistance state between the IC pin and the FPC pin.
[0043] The comparison and judgment module is used to compare the equivalent resistance state with the connection state in the schematic netlist to determine the consistency between the design layout and the schematic.
[0044] In conjunction with the first possible implementation of the second aspect, in the second possible implementation, the generation unit further includes:
[0045] Output module;
[0046] The output module is used to output a consistency error report when the equivalent resistance state is different from the connection state in the schematic netlist.
[0047] In conjunction with the second possible implementation of the second aspect, in the third possible implementation, the detection system further includes:
[0048] Reminder unit;
[0049] The reminder unit is connected to the control unit and is used to remind designers to return to review the layout to modify or update the principles.
[0050] The present invention provides a method and system for detecting the consistency between the layout and schematic of a display panel. By using the connection relationship between IC pins and FPC pins as an equivalent resistance to generate a schematic netlist, the schematic netlist is compared with the corresponding design layout for consistency detection, and a comparison analysis report is automatically generated. When the design layout and the schematic netlist are inconsistent, a consistency error report is generated in the comparison analysis report, reminding the designer to review the layout, modify it, or update the schematic, thereby improving work efficiency and accuracy. Attached Figure Description
[0051] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0052] Figure 1 This is a schematic diagram of the first embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention;
[0053] Figure 2 This is a schematic diagram of the second embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention;
[0054] Figure 3 This is a schematic diagram of the third embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention;
[0055] Figure 4 This is a schematic diagram of the fourth embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention;
[0056] Figure 5 This is a schematic diagram of the fifth embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention;
[0057] Figure 6 This is a schematic diagram of the sixth embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention;
[0058] Figure 7 This is a schematic diagram of the circuit connection principle in this invention;
[0059] Figure 8 This is a schematic representation of the circuit network generated based on the circuit connection principle in this invention;
[0060] Figure 9 This is a schematic diagram of the first embodiment of a display panel layout and principle consistency detection system according to the present invention;
[0061] Figure 10 This is a schematic diagram of a second embodiment of a display panel layout and principle consistency detection system according to the present invention;
[0062] The numbers in the attached diagram represent the following parts: 10 – Control unit, 20 – Reading unit, 30 – Generation unit, 40 – Comparison and analysis unit, 50 – Alert unit, 31 – Detection module, 32 – Comparison and judgment module, 33 – Output module. Detailed Implementation
[0063] The technical solutions of this invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are all within the scope of protection of this invention.
[0064] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0065] In the current process of testing the consistency between the layout and principle of display panels, manual inspection of the layout is time-consuming and has low accuracy.
[0066] To address the aforementioned issues, a method and system for detecting the consistency between the layout and principle of a display panel are proposed.
[0067] Firstly, such as Figure 1 , Figure 1 This is a schematic diagram of the first embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention.
[0068] A method for detecting the consistency between the layout and principle of a display panel, comprising:
[0069] Step 100: Generate a schematic netlist based on the connection relationships between the IC pins and FPC pins of the display panel; Step 200: Perform a consistency check between the schematic netlist and the corresponding design layout, and generate a comparison analysis report; Step 300: The designer processes the schematic netlist based on the comparison analysis report; The connection relationships include Step 110: Obtaining the matching rules between the IC pins and FPC pins. By using the connection relationships between the IC pins and FPC pins as equivalent resistance to generate the schematic netlist, performing a consistency check between the schematic netlist and the corresponding design layout, and automatically generating a comparison analysis report, when the design layout and schematic netlist are inconsistent, a consistency error report is generated in the comparison analysis report, reminding the designer to review the layout, modify, or update the schematic, thus improving work efficiency and accuracy.
[0070] like Figure 7 , Figure 7 This is a schematic diagram of the circuit connection principle in this invention; the connection relationship between the IC pin and the FPC pin is the connection relationship between the mutual pins in its schematic circuit diagram. The connection relationship in the schematic circuit diagram is set as an equivalent resistance, and the IC pin and the FPC pin are connected through the equivalent resistance to form a schematic netlist.
[0071] The schematic netlist reproduces the connection relationship between IC pins and FPC pins.
[0072] The design layout is designed by designers based on the circuit schematic, but in the display panel manufacturing process, it is necessary to confirm the consistency between the design layout and the circuit schematic.
[0073] In a preferred embodiment, such as Figure 2 , Figure 2 This is a schematic diagram of the second embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention.
[0074] Step 100 also includes step 120, obtaining the number of pins of the display panel IC and FPC; step 130, determining the connection mapping relationship between IC pins and FPC pins; and step 140, generating a schematic netlist based on the connection mapping relationship.
[0075] The connection mapping relationship is the corresponding connection between all IC pins and all FPC pins. The corresponding connections between IC pins and all FPC pins are set as equivalent resistances, generating the schematic netlist, such as... Figure 8 , Figure 8 This is a schematic representation of the circuit network generated based on the circuit connection principle in this invention.
[0076] In a preferred embodiment, such as Figure 3 , Figure 3 This is a schematic diagram of the third embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention.
[0077] Specifically, step 110 includes:
[0078] Step 111: Set the connection between the IC pin and the FPC pin to an equivalent resistance connection; Step 112: Identify and match the IC pin and the FPC pin through the equivalent resistance connection.
[0079] In this embodiment, such as Figure 7 and Figure 8 One IC pin can be connected to multiple FPC pins, that is, one IC pin is connected to multiple FPC pins through multiple equivalent resistors, and one FPC pin can also be connected to multiple IC pins, that is, one FPC pin is connected to multiple equivalent resistors.
[0080] The equivalent resistance in this application has two states: on-state and open-circuit state.
[0081] When one IC pin is connected to multiple FPC pins, both the IC pin and the multiple FPC pins are in a conducting state. Similarly, one FPC pin can also be connected to multiple IC pins, in which case both the FPC pin and the multiple IC pins are in a conducting state.
[0082] In a preferred embodiment, such as Figure 4 , Figure 4 This is a schematic diagram of the fourth embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention.
[0083] Specifically, step 140 includes:
[0084] Step 141: Obtain the correspondence between IC pins and FPC pins based on the connection mapping relationship;
[0085] Step 142: Connect the IC pins and FPC pins according to the corresponding relationship to generate the schematic netlist.
[0086] In a preferred embodiment, such as Figure 5 , Figure 5 This is a schematic diagram of the fifth embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention; step 200 includes:
[0087] Step 210: If the design layout is inconsistent with the schematic netlist, output a consistency error report; Step 220: Based on the consistency error report, remind the designer to modify or update the schematic netlist.
[0088] In a preferred embodiment, such as Figure 6 , Figure 6This is a schematic diagram of the sixth embodiment of a method for detecting the consistency between the layout and principle of a display panel in this invention; step 210 includes:
[0089] Step 211: Detect the equivalent resistance between the IC pin and the FPC pin to obtain the equivalent resistance status; Step 212: Compare the equivalent resistance status with the connection status of the schematic netlist; Step 213: If the equivalent resistance status is different from the connection status of the schematic netlist, it is determined that the design layout is inconsistent with the schematic netlist, and a consistency error report is output.
[0090] When an IC pin is connected to a FPC pin, the IC pins are in a conducting state. When multiple IC pins are connected to the same FPC pin, the multiple IC pins are also in a conducting state. However, the IC pins are in an open circuit state with unconnected FPC pins or IC pins that are not connected to the same FPC pin.
[0091] Similarly, when an FPC pin is connected to an ICC pin, the FPC pin is in a conducting state. When multiple FPC pins are connected to the same IC pin, the multiple FPC pins are also in a conducting state. However, the FPC pin is in an open circuit state with an IC pin that is not connected, or with an FPC pin that is not connected to the same IC pin.
[0092] Secondly, such as Figure 9 , Figure 9 This is a schematic diagram of the first embodiment of a display panel layout and principle consistency detection system according to the present invention.
[0093] A layout and principle consistency detection system for a display panel, employing a first aspect of the detection method, includes a control unit 10, a reading unit 20, a generation unit 30, and a comparison and analysis unit 40.
[0094] The reading unit 20, the generation unit 30, and the comparison analysis unit 40 are respectively connected to the control unit 10; the reading unit 20 is used to read the layout information between the IC and FPC of the display panel; the generation unit 30 is used to generate a schematic netlist based on the connection relationship between the IC pins and the FPC pins; the comparison analysis unit 40 is used to compare and analyze the schematic netlist and the layout information, and generate a comparison analysis report for the designer; wherein, the connection relationship includes the matching rules between the IC pins and the FPC pins.
[0095] In a preferred embodiment, such as Figure 10 , Figure 10 This is a schematic diagram of a second embodiment of a display panel layout and principle consistency detection system according to the present invention; the generation unit 30 includes a detection module 31 and a comparison and judgment module 32.
[0096] The detection module 31 is used to detect the equivalent resistance state between the IC pin and the FPC pin; the comparison and judgment module 32 is used to compare the equivalent resistance state with the connection state in the schematic netlist to determine the consistency between the design layout and the schematic.
[0097] In a preferred embodiment, the generation unit 30 further includes an output module 33.
[0098] Output module 33 is used to output a consistency error report when the equivalent resistance state is inconsistent with the connection state of the schematic netlist.
[0099] In a preferred embodiment, the detection system further includes an alert unit 50.
[0100] The reminder unit 50 is connected to the control unit 10 and is used to remind the designer to return to review the layout to modify or update the principle.
[0101] By generating warning colors such as yellow and red in the report font, designers can be reminded and alerted.
[0102] You can also use blinking fonts to alert designers.
[0103] Designers can also be reminded through sound or other means.
[0104] The present invention provides a method and system for detecting the consistency between the layout and schematic of a display panel. By using the connection relationship between IC pins and FPC pins as an equivalent resistance to generate a schematic netlist, the schematic netlist is compared with the corresponding design layout for consistency detection, and a comparison analysis report is automatically generated. When the design layout and the schematic netlist are inconsistent, a consistency error report is generated in the comparison analysis report, reminding the designer to review the layout, modify it, or update the schematic, thereby improving work efficiency and accuracy.
[0105] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A method for detecting the consistency between the layout and principle of a display panel, characterized in that, include: Step 100: Generate a schematic netlist based on the connection relationship between the IC pins and FPC pins of the display panel; Step 200: Perform consistency checks between the schematic netlist and the corresponding design layout, and generate a comparison analysis report; Step 300: The designer processes the principle netlist based on the comparative analysis report; Step 100 includes: Step 110: Obtain the matching rules between the IC pins and the FPC pins; Step 120: Obtain the number of pins for the display panel IC and FPC; Step 130: Determine the connection mapping relationship between the IC pins and the FPC pins; Step 140: Generate a principle netlist based on the connection mapping relationship; Step 110 includes: Step 111: Set the connection between the IC pin and the FPC pin to an equivalent resistance connection; Step 112: The IC pins and FPC pins are connected and matched through an equivalent resistance connection.
2. The method for detecting the consistency between the layout and principle of a display panel according to claim 1, characterized in that, Step 200 includes: Step 210: If the design layout is inconsistent with the schematic netlist, output a consistency error report; Step 220: Based on the consistency error report, remind the designer to modify or update the schematic netlist.
3. The method for detecting the consistency between the layout and principle of a display panel according to claim 2, characterized in that, Step 210 includes: Step 211: Detect the equivalent resistance between the IC pin and the FPC pin to obtain the equivalent resistance status; Step 212: Compare the equivalent resistance state with the connection state in the schematic netlist; Step 213: If the equivalent resistance state is different from the connection state in the schematic netlist, then it is determined that the design layout is inconsistent with the schematic netlist, and a consistency error report is output.
4. The method for detecting the consistency between the layout and principle of a display panel according to claim 3, characterized in that, Step 140 includes: Step 141: Obtain the correspondence between the IC pins and the FPC pins according to the connection mapping relationship; Step 142: Connect the IC pins and FPC pins according to the correspondence to generate the schematic netlist.
5. A layout and principle consistency testing system for a display panel, employing the testing method described in any one of claims 1-4, characterized in that, include: Control unit; Read unit; Generating unit; Comparative analysis unit; The reading unit, the generating unit, and the comparison and analysis unit are respectively connected to the control unit; The reading unit is used to read the layout information between the IC and FPC of the display panel; The generation unit is used to generate a schematic netlist based on the connection relationship between IC pins and FPC pins; The comparison analysis unit is used to compare and analyze the schematic netlist with the layout information, and generate a comparison analysis report for the designers; The connection relationship includes the matching rules between the IC pins and the FPC pins.
6. The display panel layout and principle consistency detection system according to claim 5, characterized in that, The generation unit includes: Detection module; Comparison and judgment module; The detection module is used to detect the equivalent resistance state between the IC pin and the FPC pin. The comparison and judgment module is used to compare the equivalent resistance state with the connection state in the schematic netlist to determine the consistency between the design layout and the schematic.
7. The display panel layout and principle consistency detection system according to claim 6, characterized in that, The generation unit further includes: Output module; The output module is used to output a consistency error report when the equivalent resistance state is different from the connection state in the schematic netlist.
8. The display panel layout and principle consistency detection system according to claim 7, characterized in that, The detection system also includes: Reminder unit; The reminder unit is connected to the control unit and is used to remind designers to return to review the layout to modify or update the principles.