Display panel and display device

By introducing a first opening perpendicular to the substrate in the encapsulation layer of the display panel and filling it with an inorganic layer, the impact force is dispersed, the problem of damage to transistors by the inorganic layer is solved, and the impact resistance and reliability of the display panel are improved.

CN115411213BActive Publication Date: 2025-11-07HUBEI YANGTZE IND INNOVAION CENT OF ADVANCED DISPLAY CO LTD
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
CN202211208637.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-10-28
Publication Date
2025-11-07
Estimated Expiration
2040-10-28

AI Technical Summary

Technical Problem

During the folding process, the inorganic layer of existing display panels, which has high rigidity, is easily damaged by impact, resulting in insufficient impact resistance.

Method used

Multiple first openings extending perpendicular to the substrate are introduced into the encapsulation layer of the display panel, and a first inorganic layer is filled into these openings to form multiple stress points, thereby dispersing the impact force and avoiding concentration in a certain position.

Benefits of technology

It effectively improves the impact resistance of the display panel, reduces the risk of transistor failure, and enhances the reliability and durability of the display panel.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN115411213B_ABST
    Figure CN115411213B_ABST
Patent Text Reader

Abstract

The application discloses a display panel and a display device, and relates to the technical field of display, which comprises a substrate substrate, an array layer located on the substrate substrate, the array layer comprising a plurality of transistors, a light-emitting layer located on the side of the array layer away from the substrate substrate, the light-emitting layer comprising an anode, a pixel definition layer, a light-emitting material layer and a cathode, the pixel definition layer comprising a plurality of pixel openings, the light-emitting material layer being located in the pixel openings, an encapsulation layer located on the side of the light-emitting layer away from the substrate substrate, the encapsulation layer comprising a first inorganic layer, the pixel definition layer comprising a plurality of first openings, the first openings extending along the direction perpendicular to the substrate substrate, and the first inorganic layer comprising a part filled in the first openings. Thus, the impact resistance of the display panel and the display device is improved.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] This application is a divisional application of application number 202011169956.6, filed on October 28, 2020, entitled "Display Panel and Display Device". Technical Field

[0002] This invention relates to the field of display technology, and more specifically, to a display panel and a display device. Background Technology

[0003] From the CRT (Cathode Ray Tube) era to the LCD era, and now to the OLED (Organic Light-Emitting Diode) era, the display industry has undergone decades of rapid development. The display industry is now inextricably linked to our lives; from traditional mobile phones, tablets, televisions, and PCs to today's smart wearable devices and VR devices, all rely on display technology.

[0004] With the development of display technology, foldable displays have gained popularity due to their foldable design. In foldable displays, the display panel typically consists of a rigid inorganic layer and a flexible organic layer; for example, the encapsulation layer of the display panel may contain both inorganic and organic layers. During folding, the impact force on the rigid inorganic layer is transmitted downwards, potentially damaging the transistor structure within the display panel. Therefore, improving the impact resistance of display panels has become one of the most pressing technical challenges. Summary of the Invention

[0005] In view of this, the present invention provides a display panel and display device that are beneficial to improving shock resistance and reducing the risk of transistor failure.

[0006] In a first aspect, this application provides a display panel, comprising:

[0007] Substrate;

[0008] An array layer located on a substrate, the array layer comprising multiple transistors;

[0009] A light-emitting layer located on the side of the array layer away from the substrate, the light-emitting layer includes an anode, a pixel definition layer, a light-emitting material layer, and a cathode; the pixel definition layer defines a plurality of pixel openings, the light-emitting material layer is located in the pixel openings along a direction perpendicular to the substrate, the anode is located on the side of the light-emitting material layer closer to the array layer, and the cathode is located on the side of the light-emitting material layer away from the array layer;

[0010] An encapsulation layer is located on the side of the cathode away from the substrate, and the encapsulation layer includes a first inorganic layer;

[0011] The pixel definition layer includes a plurality of first openings, the first openings extending in a direction perpendicular to the substrate, and the first inorganic layer includes a portion filling the first openings.

[0012] Secondly, this application provides a display device, including the display panel provided in this application.

[0013] Compared with the prior art, the display panel and display device provided by the present invention achieve at least the following beneficial effects:

[0014] In the display panel and display device provided by this invention, a light-emitting layer is disposed on the side of the array layer away from the substrate. Typically, the array layer drives the light-emitting material layer in the light-emitting layer to emit light. The light-emitting layer includes a pixel definition layer, which defines multiple pixel openings, and the light-emitting material layer is located within these pixel openings. An encapsulation layer is disposed on the side of the light-emitting layer away from the substrate. The encapsulation layer includes a first inorganic layer. Considering that the inorganic layer has excellent water and oxygen barrier properties, encapsulating the light-emitting layer with the encapsulation layer can effectively prevent external moisture and oxygen from affecting the light-emitting layer. When the first inorganic layer is used to encapsulate the light-emitting material layer, the first inorganic layer covers each pixel opening, thereby achieving reliable encapsulation of the light-emitting material layer. In particular, in addition to the pixel openings, this invention introduces multiple first openings on the pixel definition layer. The first openings extend in a direction perpendicular to the substrate, and the first inorganic layer includes portions filling the first openings. When subjected to external impact, the first inorganic layer forms multiple stress points not only in the pixel openings but also in the multiple first openings. This increases the number of stress points formed by the inorganic layer when the display panel is subjected to external impact, preventing the impact force from converging at a certain location and allowing the impact force to be released from multiple points, thus effectively improving the impact resistance of the display panel.

[0015] Of course, any product implementing this invention does not necessarily need to achieve all of the technical effects described above at the same time.

[0016] Other features and advantages of the invention will become clear from the following detailed description of exemplary embodiments of the invention with reference to the accompanying drawings. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of the invention and, together with their description, serve to explain the principles of the invention.

[0018] Figure 1 The image shown is a cross-sectional structural diagram of a display panel in related technologies;

[0019] Figure 2 The diagram shown is a structural schematic of a display panel provided by the present invention;

[0020] Figure 3 As shown Figure 2 An AA cross-sectional view of a display panel;

[0021] Figure 4 As shown Figure 3 A force diagram of the display panel in the image;

[0022] Figure 5 The diagram shown illustrates the relative positional relationship between the first aperture and the channel region of the transistor provided by this invention.

[0023] Figure 6 As shown Figure 2 Another AA cross-sectional view of the display panel;

[0024] Figure 7 As shown Figure 2 Another AA cross-sectional view of the display panel;

[0025] Figure 8 As shown Figure 2 Another AA cross-sectional view of the display panel;

[0026] Figure 9 As shown Figure 2 Another AA cross-sectional view of the display panel;

[0027] Figure 10 The figure shown is a schematic diagram of the planar structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0028] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention.

[0029] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0030] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0031] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0032] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0033] Figure 1 The diagram shows a cross-sectional structure of a display panel in the related art. The display panel 100' includes a substrate 10', an array layer 20', a light-emitting layer 30', and an encapsulation layer 40'. The pixel openings in the light-emitting layer 30' are filled with light-emitting material. The inorganic layer 41' in the encapsulation layer 40' covers the side of the light-emitting layer 30' away from the substrate 10' and fills the pixel openings. When subjected to external impact, the inorganic layer forms multiple stress points S' near the pixel openings and support pillars PS, causing stress to concentrate at these stress points S' and be transmitted downwards. This stress can easily be transmitted to the inorganic layer corresponding to the array layer 20', leading to breakage of the inorganic layer in the array layer 20' and increasing the risk of transistor failure due to breakage of the inorganic layer in the array layer 20'. Therefore, it is urgent to improve the impact resistance of display panels.

[0034] In view of this, the present invention provides a display panel and display device that are beneficial to improving shock resistance and reducing the risk of transistor failure.

[0035] The following will provide a detailed description in conjunction with the accompanying drawings and specific embodiments.

[0036] Figure 2 The diagram shown is a structural schematic of a display panel provided by the present invention. Figure 3 As shown Figure 2 A cross-sectional view of a display panel. Figure 4 As shown Figure 3 For a force diagram of the display panel, please refer to [link / reference]. Figures 1 to 4 The present invention provides a display panel 100, comprising:

[0037] Substrate 10;

[0038] An array layer 20 is located on the substrate 10, and the array layer 20 includes a plurality of transistors T;

[0039] The light-emitting layer 30 is located on the side of the array layer 20 away from the substrate 10. The light-emitting layer 30 includes an anode 31, a pixel definition layer 32, a light-emitting material layer 33, and a cathode 34. The pixel definition layer 32 defines a plurality of pixel openings K0, and the light-emitting material layer 33 is located in the pixel openings K0.

[0040] The encapsulation layer 40 is located on the side of the cathode 34 away from the substrate 10, and the encapsulation layer 40 includes a first inorganic layer 41;

[0041] The pixel definition layer 32 includes a plurality of first openings K1, which extend along a direction F perpendicular to the substrate 10, and the first inorganic layer 41 includes a portion filled in the first openings K1.

[0042] It should be noted that, Figure 2 The display panel 100 provided by this invention is illustrated using only a rectangular shape as an example and does not represent the actual shape of the display panel 100. In some other embodiments of this invention, the display panel 100 may also be a rounded rectangle, a circle, or an irregular shape, and this application does not specifically limit it in this regard. Furthermore, Figure 3 This illustration only shows the film layer structure on the display panel 100 and does not represent the actual number and size of the film layers. Optionally, to improve the encapsulation reliability of the encapsulation layer 40, the encapsulation layer 40 in the display panel 100 provided by the present invention may include an organic layer and a second inorganic layer 42 in addition to the first inorganic layer 41, wherein the organic layer 43 is disposed between the first inorganic layer 41 and the second inorganic layer 42, and the first inorganic layer 41 is located on the side of the organic layer 43 closer to the substrate 10.

[0043] For details, please continue to see Figures 2 to 4 The display panel 100 provided by the present invention includes a substrate 10 and an array layer 20 disposed on one side of the substrate 10. A light-emitting layer 30 is disposed on the side of the array layer 20 away from the substrate 10. Typically, the array layer 20 is used to drive the light-emitting material layer 33 in the light-emitting layer 30 to emit light. The light-emitting layer 30 includes a pixel definition layer 32, which defines a plurality of pixel openings K0, and the light-emitting material layer 33 is located in the pixel openings K0. The light-emitting layer 30 includes an anode 31, a light-emitting material layer 33, and a cathode 34. The anode 31 is used to electrically connect to the transistor T in the driving layer. Optionally, the anode 31 is located on the side of the light-emitting material layer 33 closer to the substrate 10, and the cathode 34 is located on the side of the light-emitting material layer 33 away from the substrate 10. An encapsulation layer 40 is provided on the side of the light-emitting layer 30 away from the substrate 10. Specifically, the encapsulation layer 40 can be provided on the side of the cathode 34 in the light-emitting layer 30 away from the substrate 10. The encapsulation layer 40 includes a first inorganic layer 41. Considering that the inorganic layer has a good effect of blocking water and oxygen, the encapsulation layer 40 is used to encapsulate the light-emitting layer 30, which can effectively prevent external moisture and oxygen from affecting the light-emitting layer 30.

[0044] When the first inorganic layer 41 is used to encapsulate the light-emitting material layer 33, the first inorganic layer 41 will cover each pixel opening K0. Optionally, the first inorganic layer 41 will fill the pixel opening K0 to achieve reliable encapsulation of the light-emitting material layer 33. In particular, in addition to the pixel opening K0, the present invention introduces a plurality of first openings K1 on the pixel definition layer 32. The first openings K1 extend along a direction perpendicular to the substrate 10, and the first inorganic layer 41 also includes a portion filling the first openings K1. When subjected to an external impact, the first inorganic layer 41 will form a plurality of stress points S in the pixel opening K0 and also in the plurality of first openings K1, thereby increasing the number of stress points formed by the inorganic layer when the display panel 100 is subjected to an external impact. For example, please refer to [link to relevant documentation]. Figure 4 This avoids the impact force from converging at a certain location, allowing the impact force to be released from multiple points. Therefore, it avoids the phenomenon that the inorganic layer in the array layer 20 will break due to the impact force in the first inorganic layer 41. This helps to avoid the phenomenon that the transistor T will fail due to the breakage of the inorganic layer in the array layer 20, thus effectively improving the impact resistance of the display panel 100.

[0045] Optionally, the orthographic projection of the first opening K1 onto the plane of the substrate 10 should not overlap with the orthographic projections of the pixel opening K0 and the channel region G of the transistor T onto the plane of the substrate 10. This effectively reduces the possibility that the impact force is transmitted downward to the transistor T and the corresponding inorganic layer when the inorganic layer forms a force point S in the first opening K1. On the one hand, this helps to reduce the possibility of the impact force damaging or even causing failure of the transistor T. On the other hand, it also helps to reduce the possibility of the inorganic layer in the array layer 20 breaking under the impact force transmitted by the first inorganic layer 41, avoiding the phenomenon that the inorganic layer breaks and causes damage or failure of the transistor T. Therefore, it helps to improve the display reliability of the display panel 100 under impact force, and thus further improves the impact resistance of the display panel 100. It should be noted that the pixel opening K0 and the first opening K1 on the pixel definition layer 32 in this invention can be fabricated in the same process to simplify the manufacturing process of the display panel 100.

[0046] Furthermore, in this invention, the orthographic projection of the first opening K1 onto the plane of the substrate 10 does not overlap with the orthographic projection of the gate of the transistor T onto the plane of the substrate 10. This effectively reduces the possibility that when the display panel 100 is subjected to an external impact, the impact force is transmitted downward to the gate of the transistor T when a force point S is formed in the first opening K1. This helps to reduce the possibility of the impact force damaging the gate of the transistor T, thereby reducing the possibility of the impact force damaging or even causing failure of the transistor T, and thus improving the impact resistance of the display panel 100.

[0047] Optionally, the orthographic projection of the anode 31 onto the plane of the substrate 10 does not overlap with the orthographic projection of the first opening K1 onto the plane of the substrate 10. It is understood that the anode 31 is used for electrical connection with the transistor T in the driving layer. If the first opening K1 overlaps with the anode 31 along a direction perpendicular to the plane of the substrate 10, when the display panel 100 is subjected to an external impact, a force point S is formed in the first opening K1, and the impact force is transmitted downwards to the anode 31, causing damage to the anode 31 and thus affecting the display of the display panel 100. In this invention, by setting the first opening K1 and the anode 31 to not overlap along a direction perpendicular to the plane of the substrate 10, the possibility of impact force damaging the anode 31 can be reduced, thereby improving the impact resistance of the display panel 100.

[0048] Figure 5 The diagram shown illustrates the relative positional relationship between the first opening K1 and the channel region G of the transistor provided by this invention. Please refer to the diagram for further details. Figure 3 When multiple first openings K1 are formed on the pixel definition layer 32, the positions of the first openings K1 avoid the pixel openings K0. That is, the orthographic projection of the first opening K1 onto the substrate 10 does not overlap with the orthographic projection of the pixel opening K0 onto the substrate 10. The number and size of the first openings K1 can be flexibly set according to the size of the non-opening area in the display panel 100. Optionally, the multiple first openings K1 are arranged around the channel region G of the transistor T. Since the channel region G of the transistor T is the core component for the transistor T to function, it is the area where the gate of the transistor overlaps with the active layer. Optionally, in this invention, the arrangement of the first openings K1 also avoids the channel region G of the transistor T. That is, the orthographic projection of the first opening K1 onto the substrate 10 is set so that it does not overlap with the channel region G of the transistor T, thereby avoiding the impact of impact forces on the transistor T. When the first opening K1 is set to avoid the pixel opening K0 and the channel region G of the transistor T, the first opening K1 can be arranged as evenly as possible in the display panel 100. Alternatively, the setting of the first opening K1 can make the sharp structure formed by the first inorganic layer 41 at the first opening K1, the pixel opening K0 and other positions as evenly distributed on the display panel 100 as possible. Therefore, when the display panel 100 is subjected to external impact, the sharp structure formed by the first inorganic layer 41 can release the impact force evenly, which is more conducive to avoiding the problem of excessive force at a single point in the display panel 100.

[0049] In one optional embodiment of the present invention, please continue to refer to Figure 3 Along the direction F perpendicular to the substrate 10, the height h1 of each first opening K1 is the same.

[0050] It is understood that when the first opening K1 is formed on the pixel definition layer 32, along the direction F perpendicular to the substrate 10, the first opening K1 includes a first end face K11 and a second end face K12. The height h1 of the first opening K1 mentioned in this invention refers to the distance between the first end face K11 and the second end face K12 of the first opening K1 along the direction perpendicular to the substrate 10, which is also the groove depth of the first opening K1.

[0051] When forming a plurality of first openings K1 on the pixel definition layer 32, the present invention sets the height of the first openings K1 to be the same along the direction perpendicular to the substrate 10. In this way, the first openings K1 can be formed using the same process dimensions. Therefore, the setting of the first openings K1 with the same height is beneficial to simplifying the manufacturing process of forming the first openings K1 on the pixel definition layer 32 and improving the production efficiency of the display panel 100.

[0052] In one optional embodiment of the present invention, please continue to refer to Figure 3 Along the direction perpendicular to the substrate 10, the height h1 of the first opening K1 is less than the height h2 of the pixel definition layer 32.

[0053] Specifically, since the first opening K1 is formed by slotting in the pixel definition layer 32, when the height h1 of the first opening K1 is less than the height h2 of the pixel definition layer 32 in the direction perpendicular to the substrate 10, it means that the first opening K1 does not penetrate the pixel definition layer 32 in the direction perpendicular to the substrate 10. When the first inorganic layer 41 in the encapsulation layer 40 fills each of the first openings K1, it can also form multiple sharp structures in the first openings K1. When the display panel 100 is subjected to external impact, the sharp structures in the first inorganic layer 41 can form multiple stress points S, which is equivalent to increasing the number of stress points S on the first inorganic layer 41 in the display panel 100, so that the impact force can be released from multiple points, thus also helping to improve the impact resistance of the display panel 100.

[0054] In one optional embodiment of the present invention Figure 6 As shown Figure 2 For another AA cross-sectional view of the display panel 100, please refer to Figure 6 Along the direction perpendicular to the substrate 10, the height h1 of the first opening K1 is equal to the height h2 of the pixel definition layer 32.

[0055] Specifically, Figure 6 This illustrates another form of the first opening K1 in this invention. Figure 6 The structure of the display panel 100 in the middle and Figure 3 They are the same, the only difference being the height of the first opening K1. Figure 6In the illustrated embodiment, along the direction perpendicular to the substrate 10, the height h1 of the first opening K1 is equal to the height h2 of the pixel definition layer 32. That is, in this embodiment, the first opening K1 is disposed through the pixel definition layer 32 along the direction perpendicular to the substrate 10. When the height of the first opening K1 increases, the first inorganic layer 41 filled in the first opening K1 will more easily form a sharp structure. When the display panel 100 is subjected to external impact force, the first inorganic layer 41 filled in the first opening K1 is more likely to form multiple stress points S, which is more conducive to realizing multi-point release of impact force, and thus more conducive to improving the impact resistance of the display panel 100, avoiding the phenomenon that the inorganic layer in the array layer 20 will break due to excessive single-point impact force, resulting in transistor T failure.

[0056] In one optional embodiment of the present invention Figure 7 As shown Figure 2 Another AA cross-sectional view of the display panel 100 shows that the display panel 100 also includes an auxiliary layer 50, which is located on the side of the pixel definition layer 32 near the substrate 10. A first opening K1 exposes the auxiliary layer 50. In the first opening K1, the cathode 34 is in direct contact with the auxiliary layer 50.

[0057] Specifically, Figure 7 This illustrates another form of the first opening K1 in this invention. Figure 7 The structure of the display panel 100 in the middle and Figure 6 They are the same, the difference lies in Figure 7The illustrated embodiment introduces an auxiliary layer 50 in the display panel 100. This auxiliary layer 50 is located on the side of the pixel definition layer 32 closest to the substrate 10. When the first opening K1 is formed on the pixel definition layer 32, the height h1 of the first opening K1 is the same as the height h2 of the pixel definition layer 32. That is, the first opening K1 penetrates the pixel definition layer 32 in a direction perpendicular to the substrate 10, exposing the auxiliary layer 50. Since the cathode 34 in the light-emitting layer 30 covers the entire side of the light-emitting material layer 33 away from the substrate 10, when the first opening K1 is formed on the pixel definition layer 32, the cathode 34 will also be formed in the first opening K1. Because the first opening K1 exposes the auxiliary layer 50, the cathode 34 in the first opening K1 will directly contact the auxiliary layer 50 to form an electrical connection. Optionally, the auxiliary layer 50 in this invention is made of a conductive material, and the auxiliary layer 50 corresponds one-to-one with the first opening K1. When the cathode 34 is electrically connected to the auxiliary layer 50 in the first opening K1, it is equivalent to connecting a resistor structure in parallel with the cathode 34, which helps to reduce the overall resistance of the cathode 34. Since the cathode 34 covers the side of the light-emitting material 33 away from the substrate 10, when the resistance of the cathode 34 is large, a large impedance will be formed during the signal transmission process of the cathode 34, resulting in a large voltage drop at different positions and a large difference in the electrical signal transmitted by the cathode 34. This application effectively reduces the resistance of the cathode 34 by connecting the auxiliary layer 50 to the cathode 34, which helps to reduce the voltage drop of the cathode 34 during signal transmission, thereby improving the uniformity of the signal transmitted by the cathode 34, thus improving the display uniformity of the display panel 100, and further improving the display effect of the display panel 100.

[0058] In one optional embodiment of the present invention, please continue to refer to Figure 7 Along a direction F perpendicular to the substrate 10, the anode 31 is located on the side of the light-emitting material layer 33 closer to the array layer 20, and the cathode 34 is located on the side of the light-emitting material layer 33 away from the array layer 20; the auxiliary layer 50 is disposed in the same layer as the anode 31. When the auxiliary layer 50 and the anode 31 are disposed in the same layer, the auxiliary layer 50 and the anode 31 can be fabricated in the same process. The auxiliary layer 50 can be formed at the same time as the anode 31, thus eliminating the need for a separate fabrication process for the auxiliary layer 50. This simplifies the fabrication process of the display panel 100 when the auxiliary layer 50 is introduced, improving the production efficiency of the display panel 100. It is understood that since the anode 31 and the cathode 34 in the light-emitting layer 30 transmit different electrical signals, when the auxiliary layer 50 and the anode 31 are disposed in the same layer, the auxiliary layer 50 and the anode 31 are insulated from each other, which may lead to signal interference, thus improving the display reliability of the display panel 100.

[0059] In one optional embodiment of the present invention Figure 8 As shown Figure 2For another AA cross-sectional view of the display panel 100, please refer to Figure 8 The display panel 100 also includes a first organic layer 60, which is located between the array layer 20 and the light-emitting layer 30 along a direction perpendicular to the substrate 10. The display panel 100 also includes a plurality of second openings K2, which penetrate at least part of the first organic layer 60 along a direction perpendicular to the substrate 10. The second openings K2 are provided in a one-to-one correspondence with the first openings K1, and the first openings K1 and the second openings K2 are connected.

[0060] Understandably, the first organic layer 60 disposed between the array layer 20 and the light-emitting layer 30 in this invention can be, for example, a planarization layer. Figure 8 In the illustrated embodiment, in addition to the first opening K1 on the pixel definition layer 32, a second opening K2 is also provided on the first organic layer 60. It should be noted that the pixel definition layer 32 and the first organic layer 60 are two different film layer structures, with an anode 31 disposed between them. Therefore, the process of forming vias on the pixel definition layer 32 and the first organic layer 60 is usually separate. For example, firstly, the second opening K2 is formed on the first organic layer 60, then the anode 31 is formed on the first side of the first organic layer 60 away from the substrate 10, then the pixel definition layer 32 is formed on the side of the anode 31 away from the substrate 10, and finally the first opening K1 is formed on the pixel definition layer 32.

[0061] Specifically, please see Figure 8 In this invention, a plurality of second openings K2 are formed on the first organic layer 60. The second openings K2 are configured in a one-to-one correspondence with the first openings K1. Here, the one-to-one correspondence means that in the direction perpendicular to the substrate 10, one first opening K1 corresponds to one second opening K2, and one first opening K1 is connected to one second opening K2. When a second opening K2 corresponding to the first opening K1 is provided on the first organic layer 60, the first inorganic layer 41 will be able to extend downward from the first opening K1, so that the first inorganic layer 41 forms a sharp structure. Moreover, the height of the sharp structure along the direction perpendicular to the substrate 10 is relatively large. When the height of the sharp structure increases, it is more conducive to forming a stress point S. That is to say, when the display panel 100 is subjected to an external impact force, the sharp structure formed by the first inorganic layer 41 will form multiple stress points S in the display panel 100, so that the impact force of the display panel 100 after being impacted is released from multiple points, effectively preventing the problem that the inorganic layer in the array layer 20 will break due to excessive single-point impact force, thereby causing damage to the transistor T. Therefore, it is more conducive to improving the impact resistance of the display panel 100.

[0062] In one optional embodiment of the present invention, please continue to refer to Figure 8Along the direction perpendicular to the substrate 10, the height of the second opening K2 is less than the height of the first organic layer 60.

[0063] Specifically, in the display panel 100 provided by the present invention, when the second opening K2 is formed on the first organic layer 60, the height h3 of the second opening K2 in the direction perpendicular to the substrate 10 is less than the height h4 of the first organic layer 60. In other words, the second opening K2 will not penetrate the first organic layer 60. Thus, the sharp structure formed by the first inorganic layer 41 will not contact other inorganic layers on the side of the first organic layer 60 near the substrate 10. In this invention, when the first inorganic layer 41 forms a sharp structure in the first opening K1, and the side of the sharp structure facing the substrate 10 is an organic layer structure, since the organic layer has lower hardness than the inorganic layer, when the display panel 100 is subjected to external impact force and multiple stress points S are formed in the first inorganic layer 41 with higher hardness, the impact force is transmitted to the first organic layer 60 with lower hardness on the side facing the substrate 10. The first organic layer 60 can buffer and release the impact force to a certain extent, thereby preventing the impact force on the sharp structure formed by the first inorganic layer 41 from directly acting on the inorganic layer in the array layer 20. Therefore, the height of the second opening K2 in the direction perpendicular to the substrate 10 is less than that of the first organic layer 60. The first organic layer 60 can be used to buffer the impact force, reducing the impact force on the inorganic layer in the array layer 20. This avoids the phenomenon of the inorganic layer in the array layer 20 breaking under large impact force, and further avoids the phenomenon of the inorganic layer breaking and causing damage to the transistor T, greatly improving the impact resistance of the display panel 100.

[0064] Optionally, the first organic layer 60 includes a first via, through which the anode 31 is electrically connected to the transistor T. The projected area of ​​the first opening K1 on the plane of the substrate 10 is larger than the projected area of ​​the first via on the plane of the substrate 10. It is understood that setting the first opening K1 to be larger than the first via helps to avoid stress accumulation at the first via, thereby ensuring the connection between the anode 31 and the transistor T, and thus ensuring the normal display of the display panel 100.

[0065] Optional, please continue to refer to Figure 6 and Figure 8The first inorganic layer 41 includes a first part and a second part. Along a direction perpendicular to the plane of the substrate 10, the first part overlaps with the first opening K1, and the second part overlaps with the pixel opening K0. Along a direction perpendicular to the plane of the substrate 10, the distance between the surface of the first part near the substrate 10 and the surface of the first organic layer 60 away from the substrate 10 is smaller than the distance between the surface of the second part near the substrate 10 and the surface of the first organic layer 60 away from the substrate 10. It is understood that the light-emitting material layer 33 is located in the pixel opening K0, and at least part of the anode 31 is located in the pixel opening K0; therefore, the distance between the surface of the second part near the substrate 10 and the surface of the first organic layer 60 away from the substrate 10 is greater.

[0066] Optionally, along a direction perpendicular to the plane where the substrate 10 is located, the minimum distance between the surface of the first part away from the substrate 10 and the surface of the first organic layer 60 away from the substrate 10, and the minimum distance between the surface of the second part away from the substrate 10 and the surface of the first organic layer 60 away from the substrate 10 are not equal.

[0067] Optionally, along a direction perpendicular to the plane of the substrate 10, the minimum distance between the surface of the first part away from the substrate 10 and the surface of the first organic layer 60 away from the substrate 10 is greater than the minimum distance between the surface of the second part away from the substrate 10 and the surface of the first organic layer 60 away from the substrate 10.

[0068] In one optional embodiment of the present invention, please continue to refer to Figure 3 The first opening K1 includes a first end face K11 and a second end face K12 disposed opposite to each other. The first end face K11 is located on the side of the second end face K12 closer to the substrate 10. The area of ​​the first end face K11 projected onto the substrate 10 is smaller than the area of ​​the pixel opening K0 projected onto the substrate 10.

[0069] It is understandable that when the first opening K1 is formed on the pixel electrode layer, due to the limitations of the manufacturing process, the aperture of the first opening K1 tends to decrease from the side away from the substrate 10 to the side closer to the substrate 10. In other words, the area of ​​the first end face K11 in the first opening K1 that is close to the substrate 10 will be smaller than the area of ​​the second end face K12 that is away from the substrate 10. Figure 5The top view of the first opening K1 and pixel opening K0 in the illustrated embodiment shows the positional relationship between the second end face K12 of the first opening K1 and the pixel opening K0. This embodiment is illustrated by taking the example that the area of ​​the second end face K12 of the first opening K1 is smaller than the area of ​​the pixel opening K0 projected onto the substrate 10. In this case, the area of ​​the first end face K11 of the first opening K1 must also be smaller than the area of ​​the pixel opening K0 projected onto the substrate 10. In this invention, when the area of ​​the first end face K11 with a smaller area of ​​the first opening K1 is set to be smaller than the area of ​​the pixel opening K0 projected onto the substrate 10, more first openings K1 can be formed in the non-opening area of ​​the display panel 100. When the area of ​​the first opening K1 is smaller, it is more conducive to the formation of sharp structures in the first inorganic layer 41 in the first opening K1. On the one hand, it is beneficial to improve the sharpness of the sharp structure to form a better stress point S. On the other hand, it is also beneficial to increase the number of sharp structures. When there are more sharp structures formed by the first inorganic layer 41 on the display panel 100, when the display panel 100 is subjected to external impact force, there will be more stress points S to release the impact force, thereby further improving the impact resistance of the display panel 100.

[0070] Further reference Figure 3 and Figure 8 Optionally, the orthographic projection area of ​​the first end face K11 onto the plane of the substrate 10 is larger than the orthographic projection area of ​​the first via onto the plane of the substrate 10. It is understood that setting the area of ​​the first end face K11 to be larger than the orthographic projection area of ​​the first via onto the plane of the substrate 10 helps to avoid stress accumulation at the first via, thereby ensuring the connection between the anode 31 and the transistor T, and thus ensuring the normal display of the display panel 100.

[0071] In one optional embodiment of the present invention, please continue to refer to Figure 3 In each of the first openings K1, the area of ​​each first end face K11 projected onto the substrate 10 is equal.

[0072] Specifically, when the area of ​​the first end face K11 of each first opening K1 projected onto the substrate 10 is set to be equal, it is beneficial to ensure that the sharpness of each sharp structure formed by the first inorganic layer 41 in the first opening K1 is the same. This makes the impact force on each sharp structure formed by the first inorganic layer 41 in the first opening K1 the same or similar, thus improving the uniformity of the force on each sharp structure formed by the first inorganic layer 41 when subjected to impact force. This makes the overall force on the display panel 100 more uniform, avoiding the phenomenon of excessive force on a single point in the display panel 100. Therefore, it is also beneficial to improve the impact resistance of the display panel 100.

[0073] In an optional embodiment of the present invention, in the first cross section of the same first opening K1, the sidewall of the first opening K1 is a straight line or an arc structure, and the first cross section is perpendicular to the substrate 10.

[0074] Specifically, Figure 3 , Figure 6 The illustrated embodiment shows a first cross-section of the first opening K1 where the sidewall of the first opening K1 is a straight line. Considering different manufacturing processes, the sidewall of the first opening K1 can also be an arc structure. When the sidewall of the first opening K1 is a straight line or an arc structure, the first opening K1 can be manufactured in a single process. For example, the first opening K1 structure can be formed on the pixel definition layer 32 through a single mask process. This manufacturing method simplifies the production process of the first opening K1, thus improving the impact resistance of the display panel 100 while also simplifying the manufacturing process of the display panel 100 and improving the manufacturing efficiency of the display panel 100.

[0075] In one optional embodiment of the present invention Figure 9 As shown Figure 2 Another AA cross-sectional view of the display panel 100 shows that in the first cross-section of the same first opening K1, the sidewall of the first opening K1 has a stepped structure; along the direction from the encapsulation layer 40 to the substrate 10, the cross-sectional area of ​​the first opening K1 along the second cross-section decreases; wherein, the first cross-section is perpendicular to the substrate 10, and the second cross-section is parallel to the substrate 10.

[0076] For details, please continue to see Figure 9 , Figure 9 The structure of the display panel 100 shown is similar to Figure 6 They are the same, the only difference being the structure of the first opening K1. Figure 9 In the illustrated embodiment, the sidewall of the first opening K1 has a stepped structure, and along the direction from the encapsulation layer 40 to the substrate 10, the cross-sectional area of ​​the first opening K1 decreases along the second section. When the first inorganic layer 41 fills the first opening K1, in addition to forming a stress point S at the bottom of the first opening K1, the first inorganic layer 41 also forms stress points S at the stepped corners. That is, when the sidewall of the first opening K1 is set to a stepped structure, the first inorganic layer can form multiple stress points S in the same first opening K1, which is equivalent to increasing the number of stress points S in the display panel 100 when subjected to external impact. This allows the impact force to be released through multiple stress points S, effectively preventing excessive single-point impact force in the display panel 100, thus further improving the impact resistance of the display panel 100. It should be noted that when the sidewall of the first opening K1 is formed into a stepped structure, a 2-mask or multi-mask process can be used for fabrication, and this application does not specifically limit this.

[0077] Based on the same inventive concept, the present invention also provides a display device, including any of the display panels described in the above embodiments. Figure 10 The diagram shown is a planar structural schematic of a display device 200 provided in an embodiment of the present invention. The display device 200 provided in this embodiment includes the display panel 100 provided in the above embodiment of the present invention.

[0078] Figure 10 The illustrated embodiment uses a mobile phone as an example to describe the display device 200. It is understood that the display device provided in this embodiment can be other display devices with display functions, such as computers, televisions, and in-vehicle display devices; this invention does not impose specific limitations on these. The display device provided in this embodiment has the beneficial effects of the display panel provided in this embodiment. For details, please refer to the specific descriptions of the display panel in the above embodiments; these will not be repeated here.

[0079] It should be noted that the display device provided by the present invention is particularly suitable for flexible display devices or foldable display devices.

[0080] In summary, the display panel and display device provided by the present invention achieve at least the following beneficial effects:

[0081] In the display panel and display device provided by this invention, a light-emitting layer is disposed on the side of the array layer away from the substrate. Typically, the array layer drives the light-emitting material layer in the light-emitting layer to emit light. The light-emitting layer includes a pixel definition layer, which defines multiple pixel openings, and the light-emitting material layer is located within these pixel openings. An encapsulation layer is disposed on the side of the cathode in the light-emitting layer away from the substrate. The encapsulation layer includes a first inorganic layer. Considering that the inorganic layer has excellent water and oxygen barrier properties, encapsulating the light-emitting layer with the encapsulation layer can effectively prevent external moisture and oxygen from affecting the light-emitting layer. When the first inorganic layer is used to encapsulate the light-emitting material layer, the first inorganic layer covers each pixel opening and fills the pixel openings, thereby achieving reliable encapsulation of the light-emitting material layer. In particular, in addition to the pixel openings, this invention introduces multiple first openings on the pixel definition layer. The first openings extend in a direction perpendicular to the substrate, and the first inorganic layer also fills the first openings. When subjected to external impact, the first inorganic layer forms multiple stress points not only in the pixel openings but also in the multiple first openings. This increases the number of stress points formed by the inorganic layer when the display panel is subjected to external impact, preventing the impact force from converging at a certain location and allowing the impact force to be released from multiple points, thus effectively improving the impact resistance of the display panel.

[0082] Furthermore, since the orthographic projection of the first opening on the plane of the substrate does not overlap with the orthographic projection of the pixel opening and the channel region of the transistor on the plane of the substrate, the possibility of the impact force being transmitted downward to the transistor when the inorganic layer forms a stress point in the first opening is effectively reduced. This also helps to reduce the possibility of the impact force causing damage or even failure to the transistor, thus improving the display reliability of the display panel when subjected to impact force, and further improving the impact resistance of the display panel.

[0083] While specific embodiments of the invention have been described in detail by way of examples, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display panel, characterized by, The display panel comprises: a substrate substrate; an array layer on the substrate substrate, the array layer comprising a plurality of transistors; a light-emitting layer on a side of the array layer away from the substrate substrate, the light-emitting layer comprising an anode, a pixel definition layer, a light-emitting material layer and a cathode; the pixel definition layer comprising a plurality of pixel openings, and the light-emitting material layer being located in the pixel openings; an encapsulation layer on a side of the light-emitting layer away from the substrate substrate, the encapsulation layer comprising a first inorganic layer; the pixel definition layer comprises a plurality of first openings extending in a direction perpendicular to the substrate substrate, and the first inorganic layer comprises a portion filled in the first openings; the plurality of first openings are arranged around channel regions of the transistors.

2. The display panel of claim 1, wherein, In a direction perpendicular to the substrate substrate, the first openings have the same height.

3. The display panel of claim 1, wherein, In a direction perpendicular to the substrate substrate, the first openings have a height smaller than that of the pixel definition layer.

4. The display panel of claim 3, wherein, The first inorganic layer comprises a first portion and a second portion, the first portion overlaps the first openings in a direction perpendicular to a plane in which the substrate substrate is located, and the second portion overlaps the pixel openings. The display panel further comprises a first organic layer between the array layer and the light-emitting layer in a direction perpendicular to the substrate substrate. In the direction perpendicular to the plane in which the substrate substrate is located, a distance between a surface of the first portion close to the substrate substrate and a surface of the first organic layer away from the substrate substrate is smaller than a distance between a surface of the second portion close to the substrate substrate and a surface of the first organic layer away from the substrate substrate.

5. The display panel of claim 1, wherein, In the direction perpendicular to the substrate substrate, the first openings have the same height as the pixel definition layer.

6. The display panel of claim 5, wherein, The display panel further comprises an auxiliary layer on a side of the pixel definition layer close to the substrate substrate, and the first openings expose the auxiliary layer; in the first openings, the cathode directly contacts the auxiliary layer.

7. The display panel of claim 6, wherein, In a direction perpendicular to the substrate substrate, the anode is located on a side of the light-emitting material layer close to the array layer, and the cathode is located on a side of the light-emitting material layer away from the array layer. The auxiliary layer is arranged in the same layer as the anode.

8. The display panel of claim 5, wherein, The display panel further comprises a first organic layer between the array layer and the light-emitting layer in a direction perpendicular to the substrate substrate. The display panel further comprises a plurality of second openings penetrating at least part of the first organic layer in a direction perpendicular to the substrate substrate; the second openings are arranged in one-to-one correspondence with the first openings, and the first openings communicate with the second openings.

9. The display panel of claim 8, wherein, In the direction perpendicular to the substrate substrate, the second openings have a height smaller than that of the first organic layer.

10. The display panel of claim 1, wherein, The first openings comprise oppositely arranged first end faces and second end faces, and the first end faces are located on a side of the second end faces close to the substrate substrate. An area of a projection of the first end faces on the substrate substrate is smaller than an area of a projection of the pixel openings on the substrate substrate.

11. The display panel of claim 10, wherein, In the first openings, the areas of the projections of the first end faces on the substrate substrate are equal.

12. The display panel of claim 1, wherein, A side wall of the first opening is in a straight line or an arc line structure.

13. The display panel of claim 1, wherein, A normal projection of the anode on a plane where the substrate is located does not overlap with a normal projection of the first opening on the plane where the substrate is located.

14. The display panel of claim 1, wherein, At least part of the cathode is located in the first opening.

15. The display panel of claim 1, wherein, A normal projection of the first opening on a plane where the substrate is located does not overlap with a normal projection of the gate of the transistor on the plane where the substrate is located.

16. The display panel of claim 1, wherein, The display panel further comprises a first organic layer, which is located between the array layer and the light-emitting layer along a direction perpendicular to the plane where the substrate is located. The first organic layer comprises a first via hole, and the anode is electrically connected to the transistor through the first via hole. A normal projection area of the first opening on the plane where the substrate is located is greater than a normal projection area of the first via hole on the plane where the substrate is located.

17. The display panel of claim 1, wherein, The normal projection of the first opening on the plane where the substrate is located does not overlap with normal projections of the pixel opening and the channel region of the transistor on the plane where the substrate is located.

18. The display panel of claim 1, wherein, The first inorganic layer comprises a first portion and a second portion, the first portion overlaps with the first opening along a direction perpendicular to the plane where the substrate is located, and the second portion overlaps with the pixel opening along the direction perpendicular to the plane where the substrate is located. The display panel further comprises a first organic layer, which is located between the array layer and the light-emitting layer along a direction perpendicular to the substrate. A minimum distance between a surface of the first portion away from the substrate and a surface of the first organic layer away from the substrate is not equal to a minimum distance between a surface of the second portion away from the substrate and the surface of the first organic layer away from the substrate along a direction perpendicular to the plane where the substrate is located.

19. A display device comprising: The display panel comprises any one of claims 1 to 18.

Citation Information

Patent Citations

  • Organic light emitting display panel and manufacturing method

    CN106449702A

  • Flexible display substrate, preparation method thereof, flexible display panel and display device

    CN107978612A

  • Production method of OLED display device

    CN108538892A

  • Organic light emitting display panel and display device

    CN109300956A