Clock synchronization device, method, electronic device and storage medium for cloud base station

By using signal reception and synchronization units in cloud base stations, the problem of clock signals not synchronizing during cloud base station clock synchronization is solved, ensuring clock synchronization between cloud base stations, avoiding interference, and achieving stable operation of cloud base station functions .

CN115426065BActive Publication Date: 2024-12-10CHENGDU TANDA FEIXIN TECH CO LTD
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Patent Information

Application Number
CN202210949041.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-08-09
Publication Date
2024-12-10
Estimated Expiration
2042-08-09

AI Technical Summary

Technical Problem

In the prior art, multiple transparent transmissions during the clock synchronization of cloud base stations lead to out-of-synchronization of clock signals, which leads to interference in the function of cloud base stations.

Method used

It provides a clock synchronization device and method for a cloud base station, including a signal receiving unit and a synchronization unit, for receiving a clock synchronization signal sent by the FPGA of the main cloud base station and sending it to the MAC layer of the main cloud base station and the slave cloud base station, To achieve upward and downward synchronization of the protocol stack, ensure that the main cloud base station and the slave cloud base station maintain clock synchronization.

Benefits of technology

By periodically sending clock synchronization signals and ready status notifications, clock synchronization between cloud base stations is ensured, interference is avoided, and the stable operation of cloud base station functions is achieved.

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Abstract

The present invention is applicable to the field of wireless communication technology, and provides a clock synchronization device, method, electronic device and storage medium of a cloud base station. The clock synchronization device of the cloud base station includes a signal receiving unit and a synchronization unit. The signal receiving unit is used to receive a clock synchronization signal sent by an FPGA of a master cloud base station. The synchronization unit is used to send the clock synchronization signal to the master cloud base station and the slave cloud base station, so that the master cloud base station and the slave cloud base station maintain clock synchronization, thereby realizing clock synchronization between the cloud base stations.
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Description

Technical Field

[0001] The present invention belongs to the field of wireless communication technology, and in particular relates to a clock synchronization device, method, electronic device and storage medium for a cloud base station. Background Art

[0002] The existing base station functions are implemented as follows: the base station software protocol stack is directly installed on the hardware and operating system. At this time, the clock synchronization of the device comes from the transmission equipment in the network equipment, or through an external GPS receiver, which ensures the consistency of uplink and downlink signal reception and transmission of all base station devices in the existing network, and ensures interference problems during the operation of the base station.

[0003] At present, 5G extended pico base stations use general-purpose CPU+FPGA acceleration cards to realize 5G base station functions. The CPU and FPGA have completed the split implementation of the protocol stack and have virtualization functions. By superimposing the corresponding cloud virtual layer (Hypervisor, virtual machine monitor), such as openstack, docker, etc., the underlying hardware resources can be shared in a pooled manner. The protocol stack carried on the CPU is an App (Application) on the cloud computing platform. The corresponding entire cloud platform will simultaneously start multiple virtual machines or containers running the 5G protocol stack. At this time, it is necessary to ensure the clock synchronization of the high-level 5G protocol stack running in each virtual machine, otherwise it will cause interference between base stations.

[0004] Currently, FPGA does not support virtualization, so a single FPGA chip will be bound to a single virtual machine on the virtual layer, where a virtual machine runs the function of a base station. Each FPGA needs to obtain the clock signal from the transmission device at the same time and pass the clock signal to the corresponding 5G high-level protocol stack. Figure 1 As shown, Figure 1 vCPU (virtual Central Processing Unit) is a virtual central processing unit, LOWPHY is used to achieve the conversion between time domain and frequency domain, HostOS is the host operating system, and Guest OS is the client operating system. In the existing technology, the clock of the upper layer protocol stack of the cloud base station on different virtual machines is out of sync due to the transparent transmission of FPGA through the virtual layer, which in turn causes interference in the functions of the cloud base station. Summary of the invention

[0005] The purpose of the present invention is to provide a clock synchronization device, method, electronic device and storage medium for a cloud base station, aiming to solve the problem of clock signal asynchrony caused by multiple transparent transmissions during the cloud base station clock synchronization process in the prior art.

[0006] In one aspect, the present invention provides a clock synchronization device for a cloud base station, which is applied to a virtual layer of a cloud base, and the device comprises:

[0007] A signal receiving unit, used to receive a clock synchronization signal sent by the FPGA of the main cloud base station; and

[0008] A synchronization unit is used to send the clock synchronization signal to the master cloud base station and the slave cloud base station so that the master cloud base station and the slave cloud base station maintain clock synchronization.

[0009] Specifically, the FPGA of the master cloud base station periodically sends the clock synchronization signal, and the synchronization unit is used to send the clock synchronization signal to the MAC layer of the master cloud base station and the slave cloud base station, so that the MAC layer synchronizes the protocol stack upward and downward based on the clock synchronization signal.

[0010] Preferably, the device further comprises:

[0011] A notification receiving unit, used to receive a ready state notification sent by the master cloud base station and the slave cloud base station, the master cloud base station and the slave cloud base station enter a ready state after completing clock synchronization, and send the ready state notification; and

[0012] A command sending unit is used to send a start command to the master cloud base station and the slave cloud base station based on the ready state notification, so that the master cloud base station and the slave cloud base station activate the cell based on the start command.

[0013] Preferably, the command sending unit is further used to add a transmission delay when sending the start command to perform time advance sending.

[0014] On the other hand, the present invention provides a clock synchronization method for a cloud base station, which is applied to a virtual layer of a cloud base, and the method comprises the following steps:

[0015] Receive the clock synchronization signal sent by the FPGA of the main cloud base station;

[0016] The clock synchronization signal is sent to the master cloud base station and the slave cloud base station to keep the clocks of the master cloud base station and the slave cloud base station synchronized.

[0017] Specifically, the FPGA of the master cloud base station periodically sends the clock synchronization signal, and the step of synchronizing the clock synchronization signal to the master cloud base station and the slave cloud base station includes:

[0018] The clock synchronization signal is sent to the MAC layers of the master cloud base station and the slave cloud base station, so that the MAC layer performs upward and downward synchronization of the protocol stack based on the clock synchronization signal.

[0019] Preferably, after sending the clock synchronization signal to the master cloud base station and the slave cloud base station, the method further comprises:

[0020] Receiving a ready state notification sent by the master cloud base station and the slave cloud base station, the master cloud base station and the slave cloud base station entering a ready state after completing clock synchronization, and sending the ready state notification;

[0021] A start command is sent to the master cloud base station and the slave cloud base station based on the ready state notification, so that the master cloud base station and the slave cloud base station activate the cell based on the start command.

[0022] Preferably, the step of sending a start command to the master cloud base station and the slave cloud base station based on the ready state notification includes:

[0023] A transmission delay is added when sending the start command to perform time advance sending.

[0024] On the other hand, the present invention further provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above method when executing the computer program.

[0025] On the other hand, the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the above method are implemented.

[0026] The clock synchronization device of the cloud base station provided by the present invention includes a signal receiving unit and a synchronization unit. The signal receiving unit is used to receive the clock synchronization signal sent by the FPGA of the master cloud base station. The synchronization unit is used to send the clock synchronization signal to the master cloud base station and the slave cloud base station so that the master cloud base station and the slave cloud base station maintain clock synchronization, thereby realizing clock synchronization between the cloud base stations. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is an example diagram of the clock synchronization process of a cloud base station provided by the background technology of the present invention;

[0028] Figure 2A It is a structural diagram of a clock synchronization device for a cloud base station provided in Embodiment 1 of the present invention;

[0029] Figure 2B This is an example diagram of the clock synchronization process of the cloud base station provided in the first embodiment of the present invention;

[0030] Figure 2C is an example diagram of a clock synchronization signal transmission process provided in Embodiment 1 of the present invention;

[0031] Figure 3is a flow chart of the implementation of the clock synchronization method of the cloud base station provided in the second embodiment of the present invention; and

[0032] Figure 4 It is a schematic diagram of the structure of an electronic device provided in Embodiment 3 of the present invention. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0034] The specific implementation of the present invention is described in detail below in conjunction with specific embodiments:

[0035] Embodiment 1:

[0036] Figure 2A The structure of the clock synchronization device of the cloud base station provided by the first embodiment of the present invention is shown. For the convenience of description, only the part related to the embodiment of the present invention is shown, including:

[0037] The clock synchronization device provided in the embodiment of the present invention is used to realize clock synchronization between cloud base stations, and the clock synchronization device of the cloud base station is applied to the virtual layer (Hypervisor) of the cloud base. The clock synchronization device 2 of the cloud base station includes a signal receiving unit 21 and a synchronization unit 22. Among them, the signal receiving unit is used to receive the clock synchronization signal sent by the FPGA of the master cloud base station, and the synchronization unit is used to send the clock synchronization signal to the master cloud base station and the slave cloud base station, so that the master cloud base station and the slave cloud base station maintain clock synchronization. Specifically, the synchronization unit is used to send the clock synchronization signal to the MAC layer of the master cloud base station and the slave cloud base station, so that the MAC layer synchronizes the protocol stack upward and downward based on the clock synchronization signal.

[0038] The cloud base station in the embodiment of the present invention is implemented by combining a general-purpose CPU and an FPGA accelerator card, that is, each cloud base station corresponds to an FPGA accelerator card. For details, see the description of the background technology. The master cloud base station can be any one of the multiple cloud base stations specified by the user, and the slave cloud base station is a cloud base station other than the master cloud base station, and there is at least one slave cloud base station.

[0039] Before clock synchronization, the clock synchronization function of the main cloud base station can be started first. When clock synchronization is performed, the FPGA of the main cloud base station is synchronized with the transmission equipment, and the clock synchronization signal is periodically sent to the clock synchronization device. The cloud base station obtains the periodic clock synchronization signal from the clock synchronization device, and sends the periodic clock synchronization signal to the MAC layer of the cloud base station. After the MAC layer receives the clock synchronization signal, it synchronizes the protocol stack upward and downward. Among them, the sending period of the clock synchronization signal can be pre-set by the user. Specifically, the clock synchronization signal can be sent every 500000ns-1ns. The clock synchronization device can have a specific IP address or a specific CPU register address.

[0040] by Figure 2B For example, the cloud base station corresponding to the designated FPGA is the master cloud base station, and the cloud base station corresponding to the FPGA other than the designated FPGA is the slave cloud base station. The designated FPGA interacts with the clock synchronization device for clock signals, and the clock synchronization device synchronizes the clock synchronization signal to multiple 5G high-level protocol stacks of the guest OS to perform upward and downward synchronization of the protocol stack.

[0041] Preferably, the device also includes a notification receiving unit and a command sending unit, wherein the notification receiving unit is used to receive a ready state notification sent by the master cloud base station and the slave cloud base station, and the command sending unit is used to send a start command to the master cloud base station and the slave cloud base station based on the ready state notification, so that the master cloud base station and the slave cloud base station activate the cell based on the start command, and schedule and transmit downlink information. The master cloud base station and the slave cloud base station enter the ready state after completing clock synchronization, and send a ready state notification after entering the ready state. Before sending the start command, all network elements will also complete clock synchronization with the base station and enter the ready state.

[0042] Preferably, the command sending unit is also used to add a transmission delay when sending the start command to send the time advance. Wherein, the transmission delay AT = (T1 + T3 + T3) / 3, wherein T1 = st1-st0, T1 = st3-st2, T1 = st5-st4, st0 represents the time when the master cloud base station sends the clock synchronization signal, st1 represents the time when the clock synchronization device receives the clock synchronization signal sent by the master cloud base station, st2 represents the time when the clock synchronization device sends the clock synchronization signal, st3 represents the time when the slave cloud base station receives the clock synchronization signal, st4 represents the time when the slave cloud base station sends the clock synchronization signal, and st5 represents the time when the clock synchronization device receives the clock synchronization signal sent by the slave cloud base station, as shown in detail. Figure 2C shown.

[0043] In an embodiment of the present invention, the clock synchronization device of the cloud base station includes a signal receiving unit and a synchronization unit. The signal receiving unit is used to receive the clock synchronization signal sent by the FPGA of the master cloud base station. The synchronization unit is used to send the clock synchronization signal to the master cloud base station and the slave cloud base station so that the master cloud base station and the slave cloud base station maintain clock synchronization, thereby realizing clock synchronization between the cloud base stations.

[0044] In an embodiment of the present invention, each unit of the clock synchronization device of the cloud base station can be implemented by a corresponding hardware or software unit. Each unit can be an independent software or hardware unit or integrated into one software or hardware unit, which is not intended to limit the present invention.

[0045] Embodiment 2:

[0046] Figure 3 The implementation process of the clock synchronization method of the cloud base station provided by the second embodiment of the present invention is shown. For the convenience of explanation, only the part related to the embodiment of the present invention is shown, which is described in detail as follows:

[0047] In step S301, a clock synchronization signal sent by the FPGA of the main cloud base station is received.

[0048] The clock synchronization method provided in the embodiment of the present invention is used to achieve clock synchronization between cloud base stations, and the clock synchronization method of the cloud base station is applied to the virtual layer (Hypervisor) of the cloud base. In the embodiment of the present invention, the cloud base station is implemented using a general-purpose CPU and an FPGA acceleration card, that is, each cloud base station corresponds to an FGPA acceleration card, see the description of the background technology for details. The master cloud base station can be any one of the multiple cloud base stations specified by the user, and the slave cloud base station is a cloud base station other than the master cloud base station, and there is at least one slave cloud base station. In a specific implementation, before performing clock synchronization, the clock synchronization function of the master cloud base station can be started first. When performing clock synchronization, the FPGA of the master cloud base station performs clock synchronization with the transmission equipment, and periodically sends a clock synchronization signal to the clock synchronization device.

[0049] In step S302, a clock synchronization signal is sent to the master cloud base station and the slave cloud base station to keep the clocks of the master cloud base station and the slave cloud base station synchronized.

[0050] In an embodiment of the present invention, when the clock synchronization signal is sent to the master cloud base station and the slave cloud base station, specifically, the clock synchronization signal is sent to the MAC layer of the master cloud base station and the slave cloud base station, so that the MAC layer synchronizes the protocol stack upward and downward based on the clock synchronization signal.

[0051] After sending the clock synchronization signal to the master cloud base station and the slave cloud base station, preferably, the ready state notification sent by the master cloud base station and the slave cloud base station is received, and a start command is sent to the master cloud base station and the slave cloud base station based on the ready state notification, so that the master cloud base station and the slave cloud base station activate the cell based on the start command. After the master cloud base station and the slave cloud base station complete the clock synchronization, they enter the ready state and send the ready state notification. Further preferably, a transmission delay is added when sending the start command to send the time advance.

[0052] In an embodiment of the present invention, a clock synchronization signal sent by the FPGA of the master cloud base station is received, and the clock synchronization signal is sent to the master cloud base station and the slave cloud base station so that the master cloud base station and the slave cloud base station maintain clock synchronization, thereby achieving clock synchronization between the cloud base stations.

[0053] Embodiment three:

[0054] Figure 4 The structure of an electronic device provided by the third embodiment of the present invention is shown. For the convenience of description, only the part related to the embodiment of the present invention is shown.

[0055] The electronic device 4 of the embodiment of the present invention includes a processor 40, a memory 41, and a computer program 42 stored in the memory 41 and executable on the processor 40. When the processor 40 executes the computer program 42, the steps in the above-mentioned method embodiments are implemented. For example, Figure 3 Alternatively, when the processor 40 executes the computer program 42, the functions of each unit in the above-mentioned device embodiments are realized, for example, Figure 2A The functions of the units 21 to 22 are shown.

[0056] In an embodiment of the present invention, a clock synchronization signal sent by the FPGA of the master cloud base station is received, and the clock synchronization signal is sent to the master cloud base station and the slave cloud base station so that the master cloud base station and the slave cloud base station maintain clock synchronization, thereby achieving clock synchronization between the cloud base stations.

[0057] Embodiment 4:

[0058] In an embodiment of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in the above method embodiment are implemented, for example, Figure 3 Alternatively, when the computer program is executed by a processor, the functions of each unit in the above-mentioned device embodiments are realized, for example, Figure 2A The functions of the units 21 to 22 are shown.

[0059] In an embodiment of the present invention, a clock synchronization signal sent by the FPGA of the master cloud base station is received, and the clock synchronization signal is sent to the master cloud base station and the slave cloud base station so that the master cloud base station and the slave cloud base station maintain clock synchronization, thereby achieving clock synchronization between the cloud base stations.

[0060] The computer-readable storage medium of the embodiment of the present invention may include any entity or device or recording medium capable of carrying computer program code, for example, ROM / RAM, magnetic disk, optical disk, flash memory and other memories.

[0061] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A clock synchronization device for a cloud base station, characterized in that: A virtual layer Hypervisor applied to a cloud base, wherein the cloud base station is implemented by combining a general-purpose CPU and an FPGA accelerator card, and the device comprises: A signal receiving unit, used to receive a clock synchronization signal sent by the FPGA of the main cloud base station; A synchronization unit, used to send the clock synchronization signal to the master cloud base station and the slave cloud base station, so that the master cloud base station and the slave cloud base station maintain clock synchronization; A notification receiving unit, used to receive a ready state notification sent by the master cloud base station and the slave cloud base station, the master cloud base station and the slave cloud base station enter a ready state after completing clock synchronization, and send the ready state notification; and A command sending unit is used to send a start command to the master cloud base station and the slave cloud base station based on the ready state notification, so that the master cloud base station and the slave cloud base station activate the cell based on the start command.

2. The device according to claim 1, characterized in that The FPGA of the master cloud base station periodically sends the clock synchronization signal, and the synchronization unit is used to send the clock synchronization signal to the MAC layer of the master cloud base station and the slave cloud base station, so that the MAC layer synchronizes the protocol stack upward and downward based on the clock synchronization signal.

3. The device according to claim 1, characterized in that The command sending unit is further used to add a transmission delay when sending the start command to perform time advance sending.

4. A clock synchronization method for a cloud base station, characterized in that: A virtual layer Hypervisor applied to a cloud base, wherein the cloud base station is implemented by combining a general-purpose CPU and an FPGA accelerator card, and the method comprises the following steps: Receive the clock synchronization signal sent by the FPGA of the main cloud base station; Sending the clock synchronization signal to the master cloud base station and the slave cloud base station to keep the clocks of the master cloud base station and the slave cloud base station synchronized; Receiving a ready state notification sent by the master cloud base station and the slave cloud base station, the master cloud base station and the slave cloud base station entering a ready state after completing clock synchronization, and sending the ready state notification; A start command is sent to the master cloud base station and the slave cloud base station based on the ready state notification, so that the master cloud base station and the slave cloud base station activate the cell based on the start command.

5. The method according to claim 4, characterized in that The FPGA of the master cloud base station periodically sends the clock synchronization signal, and the step of synchronizing the clock synchronization signal to the master cloud base station and the slave cloud base station includes: The clock synchronization signal is sent to the MAC layers of the master cloud base station and the slave cloud base station, so that the MAC layer performs upward and downward synchronization of the protocol stack based on the clock synchronization signal.

6. The method according to claim 4, characterized in that The step of sending a start command to the master cloud base station and the slave cloud base station based on the ready state notification includes: A transmission delay is added when sending the start command to perform time advance sending.

7. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the function of the device according to any one of claims 1 to 3 is realized.

8. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the function of the device according to any one of claims 1 to 3 is realized.