Display device and cascade control method

Abstract

The present disclosure provides a display device and a cascade control method, wherein the display device includes a plurality of display modules, each of which includes a display component and a signal processing component; wherein the plurality of display modules includes a first display module, and the first display module includes a first display component and a first signal processing component; wherein the first signal processing component includes: a first communication interface, a second communication interface, and a first processor; the first processor is configured to determine address information of other display modules except the first display module according to the cascade rules of the plurality of display modules, and output the address information of the other display modules through the second communication interface.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display device and a cascade control method. Background Art

[0002] In some display devices (such as spliced ​​display devices), multiple display modules are connected to each other to display images together. In order to ensure the display effect of the display device, it is necessary to debug each display module of the display device to make the display uniform. Before debugging, it is necessary to assign addresses to each display module. Summary of the invention

[0003] The present disclosure provides a display device and a cascade control method.

[0004] In a first aspect, the present disclosure provides a display device, comprising a plurality of display modules, each of which comprises a display component and a signal processing component; wherein the plurality of display modules comprises a first display module, the first display module comprises a first display component and a first signal processing component; wherein the first signal processing component comprises: a first communication interface, a second communication interface and a first processor;

[0005] The first processor is configured to determine address information of other display modules except the first display module according to a cascading rule of the plurality of display modules, and output the address information of the other display modules through the second communication interface.

[0006] In some embodiments, the first processor is further configured to: receive the cascading rules of the plurality of display modules through the first communication interface;

[0007] The first processor is configured to, in response to the address allocation instruction received by the first communication interface, output the address information of the other display modules through the second communication interface.

[0008] In some embodiments, the plurality of display modules are connected in series in sequence; the cascade order of the first display module in the plurality of display modules is the first level;

[0009] Outputting the address information of the other display modules through the second communication interface includes:

[0010] directly sending the address of the second-level display module to the second-level display module via the second communication interface; and,

[0011] sending the address information of the j-th level display module to the second level display module through the second communication interface;

[0012] Wherein, j is a positive integer, 2≤j≤N, and N is the number of the plurality of display modules.

[0013] In some embodiments, transmitting the address information of the j-th display module to the second-level display module through the second communication interface includes: in response to feedback information of the j-1-th display module, sending the address information of the j-th display module to the second-level display module through the second communication interface.

[0014] In some embodiments, the first processor is further configured to, in response to the address allocation instruction received by the first communication interface, allocate address information to the first display module; and, in response to the modulation information, obtain the target address information in the modulation information; determine whether the target address information is consistent with the current address information of the first display module, and if so, obtain the target control information in the modulation information; if not, output the modulation information to other display modules through the second communication interface, so that the other display modules can determine whether their address information is consistent with the target address information;

[0015] The first display module also includes a first regulating circuit.

[0016] The first regulating circuit is electrically connected to the first processor and the first display component, or the first regulating circuit is located in the first processor;

[0017] The first adjustment circuit is configured to adjust a display parameter of the first display component according to the target control information.

[0018] In some embodiments, the plurality of display modules are connected in series in cascade connection; the plurality of display modules include a second display module, the second display module is a display module other than the first display module among the plurality of display modules, and the second display module includes a second processor;

[0019] The second processor responds to the address information of the previous display module to determine whether the current display module has completed address update. If completed, the received address information is forwarded to the next display module; if not completed, the address is updated according to the received address information.

[0020] In some embodiments, the second processor is further configured to send feedback information to a higher-level display module after performing address update according to the received address information.

[0021] In some embodiments, the second processor is further configured to send the feedback information to the previous display module in response to the feedback information sent by the next display module.

[0022] In some embodiments, the second display module further includes a third communication interface and a fourth communication interface, wherein the cascade order of the first display module in the plurality of display modules is level 1, and the third communication interface of the second display module at level 2 is connected to the second communication interface of the first display module;

[0023] For any two adjacent levels of second display modules, the fourth communication interface of the second display module of the upper level is connected to the third communication interface of the second display module of the lower level.

[0024] In some embodiments, the second display module further includes: a second display component and a second adjustment circuit;

[0025] The second processor is further configured to, in response to the modulation information, obtain target address information in the modulation information; determine whether the target address information is consistent with the current address information of the second display module, and if so, obtain target control information in the modulation information; if not, output the modulation information to other display modules, so that the other display modules can determine whether their address information is consistent with the target address information;

[0026] The second regulating circuit is electrically connected to the second processor and the second display component, or the second regulating circuit is located in the second processor;

[0027] The second adjustment circuit is configured to adjust the display parameters of the second display component according to the target control information.

[0028] In some embodiments, the serial positions of the first display module and at least one second display module are interchangeable;

[0029] When one of the at least one second display module is exchanged to the series position of the first display module, the function of the first display module is executed; when the first display module is exchanged to the series position of one of the at least one second display module, the function of the second display module is executed.

[0030] In some embodiments, the display device is a spliced ​​display device, the spliced ​​display device includes M display windows, the M display windows include the multiple display modules, and any one of the multiple display modules serves as one of the M display windows;

[0031] The M display windows are arranged in one of a row of multiple columns, multiple rows and one column, and multiple rows and multiple columns.

[0032] In some embodiments, the M display windows are arranged in R rows and C columns, where R and C are both integers greater than 1;

[0033] In any two adjacent rows, the last display window in the previous row is connected to the first display window in the next row, and in the same row, every two adjacent display windows are connected;

[0034] Alternatively, in any two adjacent columns, the last display window in the previous column is connected to the first display window in the next column, and in the same column, every two adjacent display windows are connected;

[0035] Alternatively, for any adjacent display windows in the uth row and the u+1th row, when u is an odd number, the last display window in the uth row is connected to the last display window in the u+1th row; when u is an even number, the first display window in the uth row is connected to the first display window in the u+1th row; in the same row, two adjacent display windows are connected; wherein u is an integer greater than 0 and less than R;

[0036] Alternatively, for any adjacent display windows in the vth column and the v+1th column, when v is an odd number, the last display window in the vth column is cascaded with the last display window in the v+1th column; when v is an even number, the first display window in the vth column is cascaded with the first display window in the v+1th column; in the same column, two adjacent display windows are cascaded; where v is an integer greater than 0 and less than C.

[0037] In a second aspect, the present disclosure further provides a cascade control method, which is applied to the display device in the first aspect, wherein the method comprises:

[0038] The first processor of the first display module determines address information of other display modules except the first display module according to the cascading rule of the multiple display modules, and outputs the address information of the other display modules through the second communication interface.

[0039] In some embodiments, the first processor receives the cascading rules of the plurality of display modules through the first communication interface;

[0040] Outputting the address information of the other display modules through the second communication interface specifically includes: the first processor outputting the address information of the other display modules through the second communication interface in response to the address allocation instruction received by the first communication interface.

[0041] In some embodiments, the plurality of display modules are connected in series in sequence; the cascade order of the first display module in the plurality of display modules is the first level;

[0042] Outputting the address information of the other display modules through the second communication interface includes:

[0043] directly sending the address information of the second-level display module to the second-level display module via the second communication interface; and,

[0044] transmitting the address information of the j-th level display module to the second level display module through the second communication interface;

[0045] Wherein, j is a positive integer, 2≤j≤N, and N is the number of the plurality of display modules.

[0046] In some embodiments, transmitting the address information of the j-th display module to the second-level display module through the second communication interface includes: in response to feedback information of the j-1-th display module, transmitting the address information of the j-th display module to the second-level display module through the second communication interface.

[0047] In some embodiments, the first display module further includes a first adjustment circuit, and the method further includes:

[0048] The first processor allocates address information to the first display module in response to the address allocation instruction received by the first communication interface; and, in response to the modulation information, obtains the target address information in the modulation information; determines whether the target address information is consistent with the current address information of the first display module, and if so, obtains the target control information in the modulation information; if not, outputs the modulation information to other display modules through the second communication interface, so that the other display modules can determine whether their address information is consistent with the target address information;

[0049] The first adjustment circuit adjusts the display parameters of the first display component according to the target control information.

[0050] In some embodiments, the plurality of display modules are connected in series in cascade connection; the plurality of display modules include a second display module, the second display module is a display module other than the first display module among the plurality of display modules, and the second display module includes a second processor;

[0051] The method further comprises:

[0052] The second processor responds to the address information of the previous display module to determine whether the current display module has completed address update. If completed, the received address information is forwarded to the next display module; if not completed, the address is updated according to the received address information.

[0053] In some embodiments, the method further comprises:

[0054] After updating the address according to the received address information, the second processor sends feedback information to the upper-level display module.

[0055] In some embodiments, the second processor sends the feedback information to the previous display module in response to the feedback information sent by the next display module.

[0056] In some embodiments, the second display module further includes: a second display component and a second adjustment circuit; the method further includes:

[0057] The second processor obtains the target address information in the modulation information in response to the modulation information; determines whether the target address information is consistent with the current address information of the second display module, and if so, obtains the target control information in the modulation information; if not, outputs the modulation information to other display modules, so that the other display modules can determine whether their address information is consistent with the target address information;

[0058] The second adjustment circuit adjusts the display parameters of the second display component according to the target control information.

[0059] In some embodiments, the serial positions of the first display module and at least one second display module are interchangeable;

[0060] When one of the at least one second display module is exchanged to the series position of the first display module, the function of the first display module is executed; when the first display module is exchanged to the series position of one of the at least one second display module, the function of the second display module is executed. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0062] Figure 1 This is a schematic diagram of a first display module provided in some embodiments of the present disclosure.

[0063] Figure 2 A schematic diagram of a cascade connection method of N display modules provided in some embodiments of the present disclosure.

[0064] Figure 3 It is a schematic diagram of the cascading method of display modules provided in some other embodiments of the present disclosure.

[0065] Figure 4 Schematic diagram of the cascading method of display modules provided in some other embodiments of the present disclosure.

[0066] Figure 5 Schematic diagram of the cascading method of display modules provided in some other embodiments of the present disclosure.

[0067] Figure 6 This is a schematic diagram of a second display module provided in some embodiments of the present disclosure.

[0068] Figure 7 It is a schematic diagram of an integrated board of a display module in an embodiment of the present disclosure.

[0069] Figure 8 Schematic diagram of an integrated board of a display module in some other embodiments of the present disclosure.

[0070] Fig. 9 It is a schematic diagram of a cascade control method provided in some embodiments of the present disclosure.

[0071] Fig.10 It is a schematic diagram of a cascade control method provided in some embodiments of the present disclosure. DETAILED DESCRIPTION

[0072] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0073] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0074] In some display devices (such as spliced ​​display devices), multiple display modules are interconnected to display images together. In order to ensure the display effect of the display device, it is necessary to debug each display module of the display device to make the display uniformity of each display module. In the related art, before each display module is spliced ​​together, a corresponding address is assigned to each display module, which can be the target position of the display module in the display device, for example, the target row number and target column number of the display module in the spliced ​​display device. Afterwards, according to the address of each display module, multiple display modules are connected together and the debugging process is performed.

[0075] However, this method results in that the display modules can only be arranged in a specific order, resulting in low assembly efficiency.

[0076] The present disclosure provides a display device, which includes N display modules, where N is an integer greater than 2. Each of the N display modules includes a display component and a signal processing component. The display component may include a display panel. The N display modules include a first display module. Among the N display modules, the number of the first display modules is 1. Figure 1 is a schematic diagram of a first display module provided in some embodiments of the present disclosure, such as Figure 1 As shown, the first display module 100 includes a first display component 110 and a first signal processing component 120 .

[0077] The first signal processing component 120 includes: a first communication interface 121, a second communication interface 122 and a first processor 123. The first communication interface 121 and the second communication interface 122 can be used to communicate with other devices (eg, other display modules or signals, or command input devices).

[0078] The first processor 123 is configured to determine address information of other display modules except the first display module 100 according to the cascading rule of the N display modules, and output the address information of other display modules through the second communication interface 122 .

[0079] In some examples, the cascading rule of the N display modules may be provided by an external command input device, and information of the cascading rule may be provided to the first processor 123 via the first communication interface 121 .

[0080] In addition, the address information of the first display module 100 itself can be pre-stored in the first processor 123, or the first processor 123 can assign a preset address to the first display module 100 after receiving the address assignment instruction, and determine the address information of other display modules according to the address and cascading rules.

[0081] In the embodiment of the present disclosure, the first processor 123 in the first display module 100 can determine the address information of other display modules according to the cascade rule, and output the address information of other display modules. In other words, the positional relationship or cascade relationship between the display modules in the display device may not be fixed, but may be set at will. After the display modules are connected, the first display module 100 can automatically allocate address information to other display modules according to the cascade rule, thereby improving assembly efficiency.

[0082] In some embodiments, the first processor 123 is further configured to: receive the cascading rules of N display modules through the first communication interface 121. When the first processor 123 outputs the address information of other display modules through the second communication interface 122, specifically, in response to the address allocation instruction received by the first communication interface 121, the address information of other display modules is output through the second communication interface 122.

[0083] In one example, the first communication interface 121 may include a first sub-interface 121a and / or a second sub-interface 121a, and the first sub-interface 121a may be connected to an external control device (such as a computer) to receive address assignment instructions provided by the control device; the first sub-interface 121a may be an infrared sensor interface to receive address assignment instructions provided by a remote control.

[0084] In some embodiments, the N display modules are connected in series in a sequential cascade connection; the so-called "sequential cascade connection" means that the N display modules are connected in series in a certain order. The following description takes the cascade order of the first display module 100 in the N display modules as 1 as an example.

[0085] Among them, the cascading methods of N display modules can be various. Figure 2 is a schematic diagram of a cascade connection method of N display modules provided in some embodiments of the present disclosure, Figure 3 is a schematic diagram of a cascade connection method of display modules provided in some other embodiments of the present disclosure, Figure 4 is a schematic diagram of a cascade connection method of display modules provided in some other embodiments of the present disclosure, Figure 5 This is a schematic diagram of the cascade mode of display modules provided in some other embodiments of the present disclosure. For example, Figure 2 The cascade mode shown is a "Z"-shaped connection mode. Specifically, N display modules 1 can be arranged in multiple rows and columns, and multiple rows of display modules 1 are arranged along the Y direction, and the display modules 1 in each row are arranged along the X direction. In any two adjacent rows, the last display module 1 in the previous row is cascaded with the first display module 1 in the next row. In the same row, every two adjacent display modules are cascaded in sequence. According to this rule, N display modules 1 are cascaded into a module string.

[0086] For another example, Figure 3 The cascading method shown is an inverted "U" - shaped connection method. Specifically, N display modules 1 can be arranged in R rows and C columns. The R - row display modules 1 are arranged along the Y - direction, and the display modules 1 in each row are arranged along the X - direction. For any adjacent u - th row and (u + 1) - th row, when u is odd, the last display module 1 in the u - th row is cascaded with the last display module 1 in the (u + 1) - th row; when u is even, the first display module 1 in the u - th row is cascaded with the first display module 1 in the (u + 1) - th row. Wherein, R, C, and u are integers, R≥3, C≥2, 0 < u < R. And, in the same row, two adjacent display modules 1 are cascaded. According to this rule, N display modules 1 are cascaded into a module string.

[0087] For another example, Figure 4 The cascading method shown is an "N" - shaped connection method. Specifically, N display modules 1 can be arranged in multiple rows and multiple columns. The multiple - row display modules 1 are arranged along the Y - direction, and the display modules 1 in each row are arranged along the X - direction. For any two adjacent columns of display modules 1, the last display module 1 in the previous column is cascaded with the first display module 1 in the next column. In the same column, two adjacent display modules 1 are cascaded. According to this rule, N display modules 1 are cascaded into a module string.

[0088] For another example, Figure 5 The cascading method shown is a "U" - shaped connection method. Specifically, N display modules 1 can be arranged in R rows and C columns. The R - row display modules 1 are arranged along the Y - direction, and the display modules 1 in each row are arranged along the X - direction. For any adjacent v - th column and (v + 1) - th column, when v is odd, the last display module 1 in the v - th column is cascaded with the last display module 1 in the (v + 1) - th column; when v is even, the first display module 1 in the v - th column is cascaded with the first display module 1 in the (v + 1) - th column. Wherein, R, C, and v are integers, R≥2, C≥3, 0 < v < C. And, in the same column, two adjacent display modules 1 are cascaded. According to this rule, N display modules 1 are cascaded into a module string.

[0089] In some embodiments, among the N display modules 1, each display module 1 except the first display module 100 is a second display module 200. Figure 6 It is a schematic diagram of the second display module provided in some embodiments of the present disclosure, as Figure 6As shown, the second display module 200 includes: a second display component 210 and a second signal processing component 220, and the second signal processing component 220 includes: a third communication interface 221, a fourth communication interface 222, and a second processor 223. In some embodiments, the first communication interface 121 of the first display module 100 may include a first sub-interface 121a and a second sub-interface 121b, wherein the first sub-interface 121a may be an RS232 standard interface (asynchronous transmission standard interface), and the second sub-interface 121b is used to receive infrared signals. The third communication interface 221 of the second display module 200 may include: a third sub-interface 221a and a fourth sub-interface 221b, wherein the third sub-interface 221a may be an RS232 interface, and the fourth sub-interface 221b is used to receive infrared signals. In the module string formed by the various cascading methods described above, the second communication interface 122 of the first display module 100 is connected to the third sub-interface 221a of the adjacent second display module 200; for any two adjacent levels of second display modules 200 in the module string, the fourth communication interface 222 of the upper level second display module 200 is connected to the third sub-interface 221a of the lower level second display module 200.

[0090] In some embodiments, the cascade rules of the multiple display modules received by the first communication interface 121 may include: the number of rows and columns of the N display modules, and also include the cascade mode. The first processor 123 may determine the address information of the display module with a cascade order of a according to the cascade mode and the number of rows and columns of the N display modules, and when outputting the address information, the first processor 123 may output the address information of other display modules other than the first display module 100 in sequence according to the cascade order. a is an integer greater than 1 and less than or equal to N. For example, the cascade order of the first display module 100 among the N display modules is 1, and the first display module 100 sequentially outputs the address information of the second-level display module, the address information of the third-level display module, the address information of the fourth-level display module, and so on, that is, the address information output for the pth time is the address information of the p+1th level display module.

[0091] In some embodiments, the process in which the first processor 123 sequentially outputs the address information of other display modules to the corresponding display modules through the second communication interface 122 specifically includes: the first processor 123 directly sends the address of the second-level display module to the second-level display module through the second communication interface 122; and, through the second communication interface 122, transmits the address information of the j-th level display module to the second-level display module, so that the second-level display module transmits the address information of the j-th level display module backward until it is transmitted to the j-th level display module. Wherein, j is a positive integer, 2≤j≤N.

[0092] In some embodiments, the second display module 200 includes the third communication interface 221 and the fourth communication interface 222, and further includes a second processor 223. The second processor 223 responds to the address information of the upper-level display module to determine whether the current-level display module has completed address update. If it has been completed, the received address information is forwarded to the next-level display module; if it has not been completed, the address is updated according to the received address information.

[0093] It is understandable that, in the same second display module 200 , the second processor 223 is connected to the third communication interface 221 and the fourth communication interface 222 , and the second processor 223 receives the address information of the upper-level display module through the third communication interface 221 .

[0094] It should be noted that before the first address allocation, the address information may not be stored in each display module; after the address allocation, the address information is stored in each display module. The above-mentioned "address update" can be the process of the display module changing from an unstored address to a stored address, or it can be the process of updating the stored old address to a new address.

[0095] In actual applications, when the user needs to update the address of each display module (for example, when the display modules are cascaded together for the first time, or when the cascade order or position between the display modules changes), the user can input an address allocation instruction to the first display module 100 and send an address update instruction to each second display module 200. The first display module 100 outputs the address information of other display modules in sequence according to the address allocation instruction. For each second display module 200, when the second display module 200 receives the address information, it can determine whether the display module at this level has updated the address from the time the address update instruction is received to the current moment. If not, the received address information is used as the updated address information of itself and stored; if it has been updated, it means that the address information received this time is not the address information of the display module at this level, and the address information is sent to the display module at the next level.

[0096] In addition, for the second processor 223 in each second display module 200, the second processor 223 is also configured to send feedback information to the upper display module after performing address update according to the received address information, and the feedback information is finally sent to the first display module 100. The feedback information is: information indicating that the display module has completed address update. In addition, for each second processor 223, the second processor 223 is also configured to send feedback information to the upper display module in response to the feedback information sent by the next display module. For example, when the address information output by the first display module 100 at the first level is sent to the second display module 200 at the fifth level, and the second display module 200 at the fifth level completes the address update, the feedback information is sent to the second display module 200 at the fourth level, and the feedback information is successively received by the second display module 200 at the fourth level, the second display module 200 at the third level, and the second display module 200 at the second level, and finally received by the first display module 100.

[0097] In some embodiments, for the first processor 123, the process of the first processor 123 transmitting the address information of the j-th display module to the second-level display module through the second communication interface 122 may specifically include: the first processor 123 responds to the feedback information of the j-1-th display module and transmits the address information of the j-th display module to the second-level display module through the second communication interface 122. That is, the first processor 123 may send the address information of the j-th display module only after receiving the feedback information of the j-1-th display module, thereby preventing information congestion (for example, a second display module 200 receives an address information again during the process of receiving the address information and updating it), thereby ensuring the accuracy of address allocation and address update.

[0098] The address update process of the N-level display module is introduced below by way of example. It should be noted that, in the embodiment of the present disclosure, the serial positions of the first display module 100 and at least one second display module 200 are interchangeable. When the first display module 100 is exchanged to the serial position of one of the at least one second display module 200, the function of the second display module 200 is performed. In other words, any one of the N display modules may serve as the first display module 100 or the second display module 200. Therefore, the cascade relationship between the display modules in the display device may not be fixed, but may be set at will. After the display modules are connected, the display module at the first level serves as the first display module 100, which can automatically assign address information to other display modules according to the cascade rule, thereby improving assembly efficiency.

[0099] After cascading N display modules into a module string (for example, cascading each display module for the first time, or adjusting the cascading order of multiple display modules cascaded together and re-cascading), the user can send an address allocation instruction to the display module at the first level through the remote control; and send an address update instruction to each display module after the first level. Of course, the address allocation instruction can also be sent to the first-level display module using a control device such as an external computer, and the address update instruction can be sent by the user to each display module after the first level through the remote control, or it can be sent to each second display module 200 after the first level after the display module at the first level receives the address allocation instruction and before outputting the address information.

[0100] Among them, after receiving the address allocation instruction, the display module of the first level acts as the first display module 100 and executes the function of the first display module 100 introduced above, and the other display modules act as the second display module 200 and execute the function of the second display module 200 introduced above.

[0101] For example, a plurality of display modules are arranged in 3 rows and 3 columns, and are arranged in a Z-shaped manner. The first display module 100 responds to the address allocation instruction, determines its own address information, and determines the address information of each second display module 200 according to the cascade rule. Afterwards, the first processor 123 of the first display module 100 sequentially outputs the second address information of each second display module 200 through the second communication interface 122.

[0102] For example, the address information of each display module includes the row and column number of the display module in the display device. The first processor 123 determines that its own address information is (1,1), and the address information of the 2nd to 9th level display modules are (1,2), (1,3), (2,1), (2,2), (2,3), (3,1), (3,2), (3,3). Afterwards, the first processor 123 of the first display module 100 outputs the 2nd to 9th level display modules in sequence in cascade order. Specifically, the first processor 123 outputs the address information (1,2) for the first time. After the address information is output to the second level display module, since the second level display module has not yet updated the address after receiving the address update instruction, the second level display module stores (1,2) as its own address information and sends a feedback signal to the first display module 100. After receiving the feedback signal, the first processor 123 performs a second address output. The second output is the address information of (1, 3), which is output to the second-level display module. Since the second-level display module has completed the address update after receiving the address update instruction, the second-level display module sends the address information (1, 3) to the third-level display module. Since the third-level display module has not performed an address update after receiving the address update instruction, the third-level display module stores the address information (1, 3) as its own address information and sends a feedback signal to the second-level display module, and the second-level display module sends the feedback signal to the first display module 100. After receiving the feedback signal, the first processor 123 performs the third address output. The third output is the address information of (2, 1), which is output to the second-level display module. Since the second-level display module has completed the address update after receiving the address update instruction, the second-level display module sends the address information of (2, 1) to the third-level display module. Similarly, since the third-level display module has completed the address update after receiving the address update instruction, the third-level display module sends the address information of (2, 1) to the fourth-level display module. Since the fourth-level display module has not performed the address update after receiving the address update instruction, the fourth-level display module stores the address information of (2, 1) as its own address information and sends a feedback signal to the third-level display module. The feedback information is sent to the first display module 100 through the third-level display module and the second-level display module in turn. The process continues in this way until the first display module 100 finishes outputting the address information of the remaining display modules.

[0103] In some embodiments, the first display module 100 and the second display module 200 both have parameter adjustment functions, so that the display parameters of the display component can be adjusted according to their respective address information and the received modulation information. Specifically, the first processor 123 is also configured to, in response to the modulation information, obtain the target address information in the modulation information, and determine whether the target address information is consistent with the current address information of the first display module 100, if consistent, then obtain the target control information in the modulation information; if inconsistent, then output the modulation information to other display modules through the second communication interface 122, so that other display modules can determine whether their address information is consistent with the target address information. The first display module 100 also includes a first adjustment circuit, which is electrically connected to the first processor 123 and the first display component 110, or the first adjustment circuit is located in the first processor 123. The first adjustment circuit is configured to adjust the display parameters of the first display component 110 according to the target control information. Among them, the modulation information received by the first processor 123 is the modulation information received by the first communication interface 121.

[0104] Similarly, the second processor 223 of the second display module 200 is also configured to: in response to the modulation information, obtain the target address information in the modulation information; determine whether the target address information is consistent with the current address information of the second display module 200, if consistent, obtain the target control information in the modulation information; if inconsistent, output the modulation information to other display modules, so that other display modules can determine whether their address information is consistent with the target address information. The second display module 200 also includes a second adjustment circuit, which is electrically connected to the second processor 223 and the second display component 210, or the second adjustment circuit is located in the second processor 223. The second adjustment circuit is configured to adjust the display parameters of the second display component 210 according to the target control information.

[0105] In some preferred implementations, the modulation information is transmitted unidirectionally among the N display modules. That is, the modulation information received by the second processor 223 is specifically the modulation information received by the third communication interface 221. When the second processor 223 determines that the target address information is inconsistent with the current address information of the second display module 200, the second processor 223 sends the modulation information to the next-level display module, that is, the display module that has not received the modulation information, through the fourth communication interface 222.

[0106] For example, taking a case where a plurality of display modules are arranged in 3 rows and 3 columns and cascaded in a Z-shaped manner, when it is necessary to adjust the display parameters of the display module at the third level (i.e., the display module with the address (1,3)), modulation information is input to the display module at the first level (i.e., the first display module 100), and the modulation information includes the target address information (1,3); after receiving the modulation information, the display module at the first level obtains the target address information therein, and determines that the target address information is inconsistent with its current address information (1,1), and therefore outputs the modulation information to the display module at the second level; the display module at the second level After the display module receives the modulation information, it obtains the target address information therein, and determines that the target address information is inconsistent with its own current address information (1, 2), therefore, the modulation information is output to the third-level display module; after the third-level display module receives the modulation information, it obtains the target address information therein, and determines that the target address information is consistent with its own current address information (1, 3), therefore, the second processor 223 in the third-level display module obtains the target control information in the modulation information, and the second adjustment circuit adjusts the display parameters of the second display component 210 according to the target control information.

[0107] In some embodiments, the above display parameters may include at least one of display brightness, color temperature, contrast, etc.

[0108] In some embodiments, the modulation information may specifically include: a modulation data group, which may include multi-bit data. For any display module, the process of the display module obtaining the target control information in the adjustment information may specifically include: obtaining the data at the first position from the modulation data group according to a preset transmission protocol as the target address information. The process of the display module obtaining the target control information in the modulation information may include: obtaining the data at the second position from the modulation data group according to a preset transmission protocol as the target control information.

[0109] It should be noted that the above-mentioned "first position" and "second position" do not necessarily refer to one data bit, and may include multiple data bits. For example, the data at the first position may include: data from the fth to gth data bits, where f and g are both integers, both greater than 0, and less than or equal to the total number of bits of the modulated data group, g≥f. The data at the second position may include: data from the kth to k'th data bits, where k and k' are both integers, both greater than 0, and less than or equal to the total number of bits of the modulated data group, k≥k'.

[0110] In some embodiments, the display parameters of multiple display modules can also be adjusted at the same time. In this embodiment, after receiving the modulation information and determining whether the target address information is consistent with the currently stored address information, each display module except the last level sends the modulation information to the next level display module regardless of the determination result. In one example, the target address information at the first position can be specific address information, which is used to characterize the parameter adjustment of all data modules. For any display module, after obtaining the above-mentioned specific address information, it is determined that the specific address information is consistent with the current address information of the display module, thereby adjusting the parameters of the display component according to the target control information in the modulation information. In addition, the display modules except the last level send the modulation information to the next level display module.

[0111] In another example, the modulation information may include one modulation data group or multiple modulation data groups, each modulation data group includes target address information and target control information. For any display module, after obtaining the modulation information, if the current address information of the display module is consistent with a certain target address information in the modulation information, the target control information in the same modulation data group as the target address information is obtained, and the display component parameters are adjusted according to the target control information.

[0112] In an embodiment of the present disclosure, the display device may be a spliced ​​display device. In one example, the spliced ​​display device includes the N display modules mentioned above, and the N display modules may be arranged in multiple rows and columns as described above. Of course, the N display modules may also be arranged in one row and multiple columns, or multiple rows and one column. In another example, the spliced ​​display device includes M display windows, and the arrangement of the M display windows may be one of one row and multiple columns, multiple rows and one column, and multiple rows and multiple columns, and at least part of the M display windows belongs to the N display modules. Wherein, M≥N, and each of the above-mentioned N display modules serves as a display window. That is, when M>N, the spliced ​​display device may include an additional display window in addition to the above-mentioned N display modules, and the additional display window may not participate in the address allocation process described above.

[0113] It should be understood that, for the M display windows, when they are arranged in multiple rows and columns, the N display modules therein can still be connected in the cascade manner as described above.

[0114] Taking N display modules arranged in R rows and C columns as an example, when the N display modules are arranged in a Z shape, in any two adjacent rows, the last display module in the previous row is connected to the first display module in the next row, and in the same row, every two adjacent display modules are connected.

[0115] When N display modules are connected in an "N" shape, in any two adjacent columns, the last display module in the previous column is connected to the first display module in the next column, and in the same column, every two adjacent display modules are connected.

[0116] When N display modules are connected in an inverted "U" shape, for any adjacent display modules in the u-th row and u+1-th row, when u is an odd number, the last display module in the u-th row is connected to the last display module in the u+1-th row; when u is an even number, the first display module in the u-th row is connected to the first display module in the u+1-th row; in the same row, two adjacent display modules are connected; wherein u is an integer greater than 0 and less than R.

[0117] When N display modules are connected in a "U" shape, for any adjacent display modules in the vth column and the v+1th column, when v is an odd number, the last display module in the vth column is cascaded with the last display module in the v+1th column; when v is an even number, the first display module in the vth column is cascaded with the first display module in the v+1th column; in the same column, two adjacent display modules are cascaded; wherein v is an integer greater than 0 and less than C.

[0118] It should be noted that, when M>N, when the addresses of the N display modules are allocated, the address of each display module may be the row and column number of the display module in the M display windows.

[0119] In addition, when M>N, N display modules may be cascaded in sequence, and the remaining additional display windows may be cascaded in sequence, and there may be no alternating connection between the display modules and the additional display windows.

[0120] In the embodiment of the present disclosure, the display module may include an integrated board. Figure 7 is a schematic diagram of an integrated board of a display module in an embodiment of the present disclosure, such as Figure 7 As shown, the integrated board C-Mult includes an FPGA (field programmable gate array), a power management unit PMIC, a gamma voltage unit GMIC, a power module PM and a backlight drive unit LEDD on the same circuit board. In addition, the circuit board is also provided with a panel port PNL-CNT for connecting to a display component, a backlight port BLU-CNT for connecting to a backlight module, and a power port AC-CNT connected to an external power supply.

[0121] The FPGA is configured to, after receiving the picture data, generate picture synchronization data according to the picture data and send it to the display component, and to generate backlight driving data according to the picture data and send it to the backlight driving unit LEDD; the backlight driving unit LEDD is configured to directly drive the backlight module according to the backlight driving data. The power module PM can supply power to the power management unit PMIC, and the power management unit PMIC can supply power to the FPGA, for example, providing a 3.3V voltage as the operating voltage of the FPGA. Of course, in other embodiments of the present disclosure, the power of the FPGA can come from the power module PM instead of the power management unit PMIC, that is, the power module PM can directly supply power to the FPGA (such as Figure 7 ).

[0122] The power management unit PMIC can generate AVDD and provide it to the display component through the panel terminal to serve as the power supply for some devices in the display component, for example, as the power supply for the source driver circuit in the display component. The power management unit PMIC can also generate and provide VGL voltage (gate drive low level) and VGH voltage (gate drive high level) to the display component through the panel port. The power management unit PMIC can also generate HAVDD (i.e., half of the AVDD voltage) and provide it to the gamma voltage unit GMIC to serve as the operating voltage of the gamma voltage unit GMIC. Under the power supply of the power management unit PMIC, the gamma voltage unit GMIC can generate a gamma binding point voltage VGamma corresponding to each gamma binding point grayscale according to the stored gamma register data, and transmit the gamma binding point voltage VGamma to the source driver circuit SIC. In this way, the source driver circuit can determine the gamma voltage of each pixel according to the synchronous picture data and the gamma binding point voltage VGamma. In this way, the source driver circuit realizes gamma compensation for the display picture. See Figure 7 In this example, the gamma voltage unit GMIC may also generate a common voltage and transmit it to the display component.

[0123] The integrated board also includes a communication module located on the circuit board, and the communication module is configured to implement at least one function of receiving a video signal, receiving a control signal, and sending a signal outward.

[0124] See also Figure 7, the communication module includes at least one video signal port and a signal conversion unit TRU; the video signal port is configured to receive a video signal and forward it to the signal conversion unit TRU. The video signal port is selected from one or more of an HDMI port, a DVI port, a VGA port, and a DP port. In one example, an HDMI port and a DVI port are provided on an integrated board. The signal conversion unit TRU is configured to transcode the video signal into the picture data and forward the picture data to the FPGA. In this way, the communication module can receive a video signal and provide picture data to the FPGA according to the video signal.

[0125] In one example, see Figure 7 The signal conversion unit TRU can forward the picture data to the FPGA in the form of a TTL signal, for example, in the form of a 24-channel TTL signal. It is understandable that in other examples of the present disclosure, the signal conversion unit TRU can also use other signals to forward the picture data, such as forwarding the picture data through an SPI signal, an LVDS signal, or a Mini LVDS signal.

[0126] The communication module of the integrated board C-Mult may also include a serial communication interface, which may include a first serial interface RS1 and a second serial interface RS2. The first serial interface RS1 may receive external communication signals, for example, it may be configured to receive external control signals and transmit them to the FPGA; the second serial interface RS2 is used to send communication signals to the outside, for example, it may be configured to send signals generated by the FPGA to the outside. In one example, the first serial interface RS1 and the second serial interface RS2 are RS-232 standard interfaces.

[0127] The communication module also includes an infrared sensor IRM; the infrared sensor IRM is configured to receive an infrared signal to generate a control signal, and transmit the control signal to the FPGA.

[0128] In the embodiment of the present disclosure, a processor may be integrated in the FPGA. When the display module is used as the first display module 100, the processor performs the function of the first processor 123. In addition, the infrared sensor performs the function of the second sub-interface 121b, the first serial interface serves as the first sub-interface 121a, and the second serial interface serves as the second communication interface 122. When the display module is used as the second display module 200, the processor performs the function of the second processor 223. In addition, the infrared sensor performs the function of the fourth sub-interface 221b, the first serial interface serves as the third sub-interface 221a, and the second serial interface serves as the fourth communication interface 222.

[0129] In addition, when adjusting the parameters of the display component, the processor can provide a control signal to the backlight driving unit, so that the backlight control unit controls the brightness of the backlight, thereby achieving adjustment of parameters such as brightness and contrast.

[0130] Figure 8 is a schematic diagram of an integrated board of a display module in some other embodiments of the present disclosure, Figure 8 The integrated board C-Mult shown is Figure 7 The integrated board C-Mult shown is similar, except that Figure 8 In the integrated board C-Mult, a microprocessor chip MCU is also provided, and information can be exchanged between the microprocessor chip MCU and the FPGA. In this case, the first processor 123 or the second processor 223 can be integrated in the microprocessor chip MCU; the first regulating circuit or the second regulating circuit can be integrated in the microprocessor chip MCU.

[0131] In practical applications, when the amount of computation required by the FPGA during the display process of the display module is large and insufficient to integrate the first processor 123 / the second processor 223, the first processor 123 / the second processor 223 can be integrated into the microprocessor chip MCU.

[0132] The embodiment of the present disclosure further provides a cascade control method, which is applied to the display device in the above embodiment. Fig. 9 is a schematic diagram of a cascade control method provided in some embodiments of the present disclosure, such as Fig. 9 As shown, the cascade control method includes:

[0133] S1. A first processor of a first display module determines address information of other display modules except the first display module according to a cascading rule of multiple display modules, and outputs the address information of other display modules through a second communication interface.

[0134] In some embodiments, the first processor specifically receives the cascading rules of multiple display modules through the first communication interface. In the above step S1, the process of outputting the address information of other display modules through the second communication interface may specifically include: the first processor responds to the address allocation instruction received by the first communication interface, and outputs the address information of the other display modules through the second communication interface.

[0135] In some embodiments, the connection mode of the multiple display modules is to be cascaded in series in sequence; the cascade order of the first display module in the multiple display modules is the first level. At this time, in the above step S1, when the address information of other display modules is output through the second communication interface, the address information of the second to j-th level display modules can be output in sequence. Specifically, through the second communication interface, the address of the second-level display module is directly sent to the second-level display module; and, through the second communication interface, the address information of the j-th level display module is transmitted to the second-level display module; wherein j is a positive integer, 2≤j≤N, and N is the number of the multiple display modules.

[0136] In some embodiments, transmitting the address information of the j-th display module to the second-level display module through the second communication interface includes: in response to feedback information of the j-1-th display module, transmitting the address information of the j-th display module to the second-level display module through the second communication interface.

[0137] In some embodiments, the first display module further includes a first regulating circuit; Fig.10 is a schematic diagram of a cascade control method provided in some embodiments of the present disclosure, such as Fig.10 As shown, the cascade control method also includes:

[0138] S0. The first processor allocates address information to the first display module in response to the address allocation instruction received by the first communication interface.

[0139] S2. The first processor obtains the target address information in the modulation information in response to the modulation information; determines whether the target address information is consistent with the current address information of the first display module, and if so, obtains the target control information in the modulation information; if not, outputs the modulation information to other display modules through the second communication interface, so that other display modules can determine whether their address information is consistent with the target address information. The first adjustment circuit adjusts the display parameters of the first display component according to the target control information.

[0140] In some embodiments, the connection mode of the multiple display modules is serial cascade connection; the multiple display modules include a second display module, the second display module is a display module other than the first display module in the multiple display modules, and the second display module includes a second processor. In this case, the cascade control method further includes: the second processor responds to the address information of the previous display module to determine whether the current display module has completed the address update, and if it has been completed, forwarding the received address information to the next display module; if it has not been completed, performing address update according to the received address information.

[0141] In some embodiments, the cascade control method further includes: after the second processor updates the address according to the received address information, sending feedback information to the upper display module. In addition, the second processor sends the feedback information to the upper display module in response to the feedback information sent by the lower display module.

[0142] In some embodiments, as described above, the second display module further includes: a second display component and a second adjustment circuit; in this case, the cascade control method may further include: the second processor obtains the target address information in the modulation information in response to the modulation information; determines whether the target address information is consistent with the current address information of the second display module, and if so, obtains the target control information in the modulation information; if not, outputs the modulation information to other display modules for other display modules to determine whether their address information is consistent with the target address information. The second adjustment circuit adjusts the display parameters of the second display component according to the target control information.

[0143] In some embodiments, the series positions of a first display module and at least one second display module are interchangeable; when one of the at least one second display module is exchanged to the series position of the first display module, the function of the first display module is performed; when the first display module is exchanged to the series position of one of the at least one second display module, the function of the second display module is performed.

[0144] Among them, after the multiple display modules in the display device are cascaded, the process of the first display module assigning addresses to other display modules, and after the address of each display module is determined, the process of adjusting the display parameters of at least one display module have been described above and will not be repeated here.

[0145] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A display device, comprising a plurality of display modules, each of which comprises a display component and a signal processing component; wherein: The plurality of display modules include a first display module, the first display module includes a first display component and a first signal processing component; wherein the first signal processing component includes: a first communication interface, a second communication interface and a first processor; The first processor is configured to determine address information of other display modules except the first display module according to the cascading rule of the multiple display modules, and output the address information of the other display modules through the second communication interface; The connection mode of the plurality of display modules is serial cascade connection in sequence; the cascade order of the first display module in the plurality of display modules is the first level; Outputting the address information of the other display modules through the second communication interface includes: directly sending the address of the second-level display module to the second-level display module via the second communication interface; and, sending the address information of the j-th level display module to the second level display module through the second communication interface; Wherein, j is a positive integer, 2≤j≤N, and N is the number of the plurality of display modules; Among them, transmitting the address information of the j-th level display module to the second level display module through the second communication interface includes: responding to feedback information of the j-1-th level display module, sending the address information of the j-th level display module to the second level display module through the second communication interface.

2. The display device according to claim 1, wherein: The first processor is further configured to: receive a cascading rule of the plurality of display modules through the first communication interface; The first processor is configured to, in response to the address allocation instruction received by the first communication interface, output the address information of the other display modules through the second communication interface.

3. The display device according to claim 1, wherein: The first processor is further configured to, in response to an address allocation instruction received by the first communication interface, allocate address information to the first display module; And, in response to the modulation information, obtaining the target address information in the modulation information; determining whether the target address information is consistent with the current address information of the first display module, and if they are consistent, obtaining the target control information in the modulation information; If not, the modulation information is output to other display modules through the second communication interface, so that other display modules can determine whether their address information is consistent with the target address information; The first display module also includes a first regulating circuit. The first regulating circuit is electrically connected to the first processor and the first display component, or the first regulating circuit is located in the first processor; The first adjustment circuit is configured to adjust a display parameter of the first display component according to the target control information.

4. The display device according to any one of claims 1 to 3, wherein: The connection mode of the multiple display modules is serial cascade connection in sequence; the multiple display modules include a second display module, the second display module is another display module among the multiple display modules except the first display module, and the second display module includes a second processor; The second processor determines whether the address update of the display module at the current level is completed in response to the address information of the display module at the previous level, and if it is completed, forwards the received address information to the display module at the next level; If not completed, the address is updated according to the received address information.

5. The display device according to claim 4, wherein: The second processor is further configured to send feedback information to a higher-level display module after performing address update according to the received address information.

6. The display device according to claim 4, wherein: The second processor is further configured to send the feedback information to the previous display module in response to the feedback information sent by the next display module.

7. The display device according to claim 4, wherein the second display module further comprises a third communication interface and a fourth communication interface, wherein: The cascade order of the first display module in the plurality of display modules is the first level, and the third communication interface of the second display module in the second level is connected to the second communication interface of the first display module; For any two adjacent levels of second display modules, the fourth communication interface of the second display module of the upper level is connected to the third communication interface of the second display module of the lower level.

8. The display device according to claim 4, wherein: The second display module further includes: a second display component and a second regulating circuit; The second processor is further configured to, in response to the modulation information, obtain target address information in the modulation information; determine whether the target address information is consistent with the current address information of the second display module, and if so, obtain target control information in the modulation information; if not, output the modulation information to other display modules, so that the other display modules can determine whether their address information is consistent with the target address information; The second regulating circuit is electrically connected to the second processor and the second display component, or the second regulating circuit is located in the second processor; The second adjustment circuit is configured to adjust the display parameters of the second display component according to the target control information.

9. The display device according to claim 4, wherein: The serial positions of the first display module and at least one second display module are interchangeable; When one of the at least one second display module is exchanged to the series position of the first display module, the function of the first display module is executed; when the first display module is exchanged to the series position of one of the at least one second display module, the function of the second display module is executed.

10. The display device according to any one of claims 1 to 3, wherein: The display device is a spliced ​​display device, comprising M display windows, at least part of the M display windows belong to the multiple display modules, and any one of the multiple display modules serves as one of the M display windows; The M display windows are arranged in one of a row of multiple columns, multiple rows and one column, and multiple rows and multiple columns.

11. The display device according to claim 10, wherein: The M display windows are arranged in R rows and C columns, where R and C are both integers greater than 1; In any two adjacent rows, the last display module in the previous row is connected to the first display module in the next row, and in the same row, every two adjacent display modules are connected; Alternatively, in any two adjacent columns, the last display module in the previous column is connected to the first display module in the next column, and in the same column, every two adjacent display modules are connected; Alternatively, for any adjacent display modules in the u-th row and the u+1-th row, when u is an odd number, the last display module in the u-th row is connected to the last display module in the u+1-th row; when u is an even number, the first display module in the u-th row is connected to the first display module in the u+1-th row; in the same row, two adjacent display modules are connected; wherein u is an integer greater than 0 and less than R; Alternatively, for any adjacent display modules in the vth column and the v+1th column, when v is an odd number, the last display module in the vth column is cascaded with the last display module in the v+1th column; when v is an even number, the first display module in the vth column is cascaded with the first display module in the v+1th column; in the same column, two adjacent display modules are connected; wherein v is an integer greater than 0 and less than C.

12. A cascade control method, applied to the display device according to any one of claims 1 to 11, wherein: The method comprises: The first processor of the first display module determines address information of other display modules except the first display module according to the cascading rule of the multiple display modules, and outputs the address information of the other display modules through the second communication interface.

13. The method according to claim 12, wherein: The first processor receives the cascading rules of the multiple display modules through the first communication interface; Outputting the address information of the other display modules through the second communication interface specifically includes: the first processor outputting the address information of the other display modules through the second communication interface in response to the address allocation instruction received by the first communication interface.

14. The method according to claim 12, wherein: The plurality of display modules are connected in series in a cascaded manner; the cascade order of the first display module in the plurality of display modules is the first level; Outputting the address information of the other display modules through the second communication interface includes: directly sending the address information of the second-level display module to the second-level display module via the second communication interface; and, transmitting the address information of the j-th level display module to the second level display module through the second communication interface; Wherein, j is a positive integer, 2≤j≤N, and N is the number of the plurality of display modules.

15. The method according to claim 12, wherein: The first display module further includes a first regulating circuit, and the method further includes: The first processor allocates address information to the first display module in response to the address allocation instruction received by the first communication interface; and, in response to the modulation information, obtains the target address information in the modulation information; determines whether the target address information is consistent with the current address information of the first display module, and if so, obtains the target control information in the modulation information; if not, outputs the modulation information to other display modules through the second communication interface, so that the other display modules can determine whether their address information is consistent with the target address information; The first adjustment circuit adjusts the display parameters of the first display component according to the target control information.

16. The method according to any one of claims 12 to 15, wherein: The connection mode of the multiple display modules is serial cascade connection in sequence; the multiple display modules include a second display module, the second display module is another display module among the multiple display modules except the first display module, and the second display module includes a second processor; The method further comprises: The second processor determines whether the address update of the display module at the current level is completed in response to the address information of the display module at the previous level, and if it is completed, forwards the received address information to the display module at the next level; If not completed, the address is updated according to the received address information.

Images