Detection components, display panels, display devices

By designing a detection component including a detection transistor and a mutual inductance coil, the problem of the leakage current of the detection transistor in the prior art is solved, and the accurate detection of the leakage current of the target transistor is achieved.

CN115497405BActive Publication Date: 2025-05-23BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
CN202210762605.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-06-29
Publication Date
2025-05-23
Estimated Expiration
2042-06-29

AI Technical Summary

Technical Problem

The prior art cannot effectively detect the leakage current of the detection transistor, resulting in the inability to accurately detect the leakage current of the target transistor.

Method used

A detection component is designed, including at least one detection transistor and a mutual inductance coil. The detection transistor is connected in parallel between the detection ends. The first coil and the second coil form a mutual inductance structure. The number of turns of the first coil is greater than the number of turns of the second coil. The current is amplified by the mutual inductance coil to realize detection.

Benefits of technology

The current amplification by the mutual inductance coil can effectively detect the leakage current of the detection transistor, thereby indirectly and accurately detecting the leakage current of the target transistor.

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Abstract

The present disclosure relates to the field of display technology, and proposes a detection component, a display panel, and a display device. The detection component includes: at least one detection transistor, a mutual inductance coil, at least one detection transistor is connected in parallel between a first detection terminal and a second detection terminal; the mutual inductance coil includes a first coil and a second coil forming a mutual inductance structure; wherein the first coil and the mutually parallel detection transistor are connected in series between the first detection terminal and the second detection terminal, and the number of turns of the first coil is greater than the number of turns of the second coil. The detection component can realize detection of detection transistor characteristics with fewer detection transistors.
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Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a detection component, a display panel, and a display device. Background Art

[0002] The display panel is usually provided with a test element group (TEG) in the test area. The test element group generally includes a test transistor. The test transistor has the same material and size as the target transistor in the display area, so that the output characteristics of the target transistor can be indirectly detected by detecting the output characteristics of the test transistor. For example, the leakage current of the target transistor can be indirectly detected by detecting the leakage current of the test transistor.

[0003] However, since the leakage current of the detection transistor is relatively small, the detection tool cannot detect the leakage current of the detection transistor due to the limitation of the detection accuracy of the detection tool.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0005] According to one aspect of the present disclosure, a detection component is provided, which includes: at least one detection transistor and a mutual inductance coil, at least one of the detection transistors is connected in parallel between a first detection end and a second detection end; the mutual inductance coil includes a first coil and a second coil forming a mutual inductance structure; wherein the first coil and the mutually parallel detection transistors are connected in series between the first detection end and the second detection end, and the number of turns of the first coil is greater than the number of turns of the second coil.

[0006] According to one aspect of the present disclosure, a display panel is provided. The display panel includes the above-mentioned detection component.

[0007] In an exemplary embodiment of the present disclosure, the display panel also includes: a base substrate, an active layer, and a first conductive layer, wherein the active layer is located on one side of the base substrate, the active layer includes at least one active portion, the active portion is arranged corresponding to the detection transistor, and at least a partial structure of the active portion is used to form a channel region of the detection transistor corresponding thereto; the first conductive layer is located on a side of the active layer away from the base substrate, the first conductive layer includes a gate line, and a partial structure of the gate line is used to form a gate of the detection transistor.

[0008] In an exemplary embodiment of the present disclosure, the first conductive layer also includes a plurality of first conductive line segments and a plurality of second conductive line segments; the orthographic projections of the first conductive line segments on the substrate are spaced apart along a first direction, and the first conductive line segments are used to form a partial structure of the first coil; the orthographic projections of the second conductive line segments on the substrate are spaced apart along a second direction, and the second conductive line segments are used to form a partial structure of the second coil. The display panel also includes: a second conductive layer and a third conductive layer, the second conductive layer is located on a side of the first conductive layer away from the base substrate, the second conductive layer includes conductive wires, and the conductive wires are used to form the magnetic cores of the first coil and the second coil; the third conductive layer is located on a side of the second conductive layer away from the base substrate, the third conductive layer includes third conductive line segments and fourth conductive line segments; the third conductive line segments are respectively connected between two adjacent first conductive line segments through vias, the first conductive line segments distributed in sequence are connected in sequence through the third conductive line segments, and the third conductive line segments are used to form a partial structure of the first coil; the fourth conductive line segments are respectively connected between two adjacent second conductive line segments through vias, the second conductive line segments distributed in sequence are connected in sequence through the fourth conductive line segments, and the fourth conductive line segments are used to form a partial structure of the second coil.

[0009] In an exemplary embodiment of the present disclosure, the first direction and the second direction are the same, the conductive wire is projected in a ring shape on the substrate, the conductive wire in the ring shape includes a first side and a second side that are oppositely arranged, the first side's projected in a ring shape on the substrate and the second side's projected in a ring shape on the substrate both extend along the first direction; the first side is used to form a magnetic core of the first coil, and the second side is used to form a magnetic core of the second coil.

[0010] In an exemplary embodiment of the present disclosure, at least one of the orthographic projection of the first conductive line segment on the substrate and the orthographic projection of the third conductive line segment on the substrate intersects with the orthographic projection of the conductive line on the substrate; at least one of the orthographic projection of the second conductive line segment on the substrate and the orthographic projection of the fourth conductive line segment on the substrate intersects with the orthographic projection of the conductive line on the substrate.

[0011] In an exemplary embodiment of the present disclosure, the display panel also includes: a buffer layer, the buffer layer is located between the base substrate and the active layer, a plurality of grooves are formed on the buffer layer, at least a portion of the structure of the first conductive line segment is located in the groove corresponding to the first conductive line segment, at least a portion of the structure of the second conductive line segment is located in the groove corresponding to the first conductive line segment; and the orthographic projection of the conductive line on the base substrate is located within the orthographic projection of the groove on the base substrate.

[0012] In an exemplary embodiment of the present disclosure, the display panel also includes: a third conductive layer, the third conductive layer is located on the side of the first conductive layer away from the base substrate, the third conductive layer includes: a first planar spiral coil, a second planar spiral coil, and a conductive portion, the first planar spiral coil forms the first coil, and the second planar spiral coil forms the second coil; wherein the orthographic projection of the first planar spiral coil on the base substrate and the orthographic projection of the second planar spiral coil on the base substrate spirally rotate around the orthographic projection of the conductive portion on the base substrate, and the number of rotations of the first planar spiral coil is greater than the number of rotations of the second planar spiral coil.

[0013] In an exemplary embodiment of the present disclosure, the active part includes a first sub-active part and a second sub-active part and a third sub-active part connected to both ends of the first sub-active part, the first sub-active part is used to form a channel region of the detection transistor; the third conductive layer also includes: a first conductive part and a second conductive part, the first conductive part connects each of the second sub-active parts; the second conductive part connects each of the third sub-active parts; the first conductive part connects the first end of the first coil.

[0014] According to one aspect of the present disclosure, a display device is provided, comprising the above-mentioned display panel.

[0015] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0017] Figure 1 It is a structural schematic diagram of an exemplary embodiment of the detection component disclosed in the present invention;

[0018] Figure 2 A structural diagram of an exemplary embodiment of a display panel disclosed herein;

[0019] Figure 3 for Figure 2 The structural layout of the active layer in the

[0020] Figure 4 for Figure 2 The structural layout of the third conductive layer;

[0021] Figure 5 for Figure 2 The structural layout of the active layer and the first conductive layer;

[0022] Figure 6 for Figure 2 A structural layout of an active layer, a first conductive layer, and a second conductive layer;

[0023] Figure 7 for Figure 6 A cross-sectional view along the dotted line BB;

[0024] Figure 8 for Figure 5 A cross-sectional view along the dotted line CC;

[0025] Fig. 9 for Figure 2 A cross-sectional view along the dotted line AA;

[0026] Fig.10 A structural diagram of another exemplary embodiment of a display panel disclosed herein;

[0027] Fig.11 FIG. 4 is a structural diagram of another exemplary embodiment of a display panel disclosed in the present invention. DETAILED DESCRIPTION

[0028] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that the present disclosure will be more comprehensive and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted.

[0029] The terms "a", "an", and "said" are used to indicate the presence of one or more elements / components / etc.; the terms "comprising" and "having" are used to indicate an open-ended inclusive meaning and mean that additional elements / components / etc. may be present in addition to the listed elements / components / etc.

[0030] The display panel includes a pixel driving circuit, which can be formed by LTPO (Low temperature polycrystalline TFT + Oxide TFT) technology. LTPO technology forms a pixel driving circuit by combining N-type transistors and P-type transistors. N-type transistors have a smaller off-leakage current than P-type transistors. For example, the off-leakage current of P-type transistors is generally 10 -13 A level, the off leakage current of N-type transistor is 10 -15A level, so LTPO technology can improve the stability of pixel driving circuit when driving.

[0031] In addition, in order to detect the off-leakage current of the transistor in the pixel driving circuit, the display panel is usually provided with a test element group (TEG) in the detection area. The test element group generally includes a test transistor. The test transistor has the same material and size as the target transistor in the pixel driving circuit, so that the off-leakage current of the target transistor can be indirectly detected by detecting the off-leakage current of the test transistor. However, most current detection devices on the market are affected by the accuracy of the source meter and the probe, and can only detect 10 -13 A or more. However, the off-leakage current of the N-type transistor is 10 -15 A level number, the current detection device cannot detect the N-type detection transistor.

[0032] In the related art, a plurality of parallel detection transistors are usually arranged in the detection component, and the total leakage current of the parallel transistors is detected to indirectly infer the turn-off leakage current of a single detection transistor. Based on the level of the turn-off leakage current of the N-type transistor and the accuracy of the circuit detection equipment, in the related art, the detection component needs to connect at least 100 N-type transistors in parallel. However, the more parallel detection transistors there are, the greater the difference between the detected turn-off leakage current and the actual value.

[0033] Based on this, this exemplary embodiment provides a detection component, such as Figure 1 As shown, it is a structural schematic diagram of an exemplary embodiment of the detection component of the present invention, and the detection component may include: a plurality of detection transistors T, a mutual inductance coil 5, and the plurality of detection transistors T are connected in parallel between the first detection terminal Pad1 and the second detection terminal Pad2; the mutual inductance coil 5 may include a first coil 51 and a second coil 52 forming a mutual inductance structure; wherein, the first coil 51 and the detection transistors T connected in parallel with each other are connected in series between the first detection terminal Pad1 and the second detection terminal Pad2, and the number of turns of the first coil 51 is greater than the number of turns of the second coil 52.

[0034] In this exemplary embodiment, the mutual inductance coil has the function of amplifying current. The change in magnetic field caused by the change in current in the first coil 51 will generate an induced electromotive force in the second coil 52, and the induced electromotive force will generate current in the second coil 52. For example, when a voltage is provided to the first coil 51, a corresponding current I1 will be generated in the first coil 51, and under the action of the change in magnetic field, a current I2 will be generated in the second coil 52. Among them, I1 / I2=N2 / N1, N1 represents the number of turns of the first coil 51, and N2 represents the number of turns of the second coil 52. According to this formula, when the number of turns of the second coil 52 is less than the number of turns of the first coil 51, the mutual inductance coil 5 can induce a larger current in the second coil 52 than in the first coil 51, thereby achieving the function of amplifying current.

[0035] This exemplary embodiment can provide a voltage to the first detection terminal Pad1 and the second detection terminal Pad2, and turn off all detection transistors through the gate drive signal terminal G. Since the detection transistor has a turn-off leakage current, a current can be formed between the first detection terminal Pad1 and the second detection terminal Pad2. The second coil 52 can induce a current greater than the current in the first coil 51. The current in the second coil 52 can be obtained by the current detection device A. Therefore, the current in the first coil 51 can be calculated based on the current in the second coil 52, and then the turn-off leakage current of a single detection transistor can be calculated based on the current in the first coil 51. Wherein, R represents resistance.

[0036] In this exemplary embodiment, the detection transistor may be an N-type transistor, and the multiple N-type detection transistors may have the same size as the N-type target transistor in the pixel driving circuit. By detecting the off leakage current of the N-type detection transistor, the off leakage current of the N-type target transistor in the pixel driving circuit may be indirectly detected. It should be understood that in other exemplary embodiments, the detection transistor may also be a P-type transistor, and the P-type detection transistor may be used to indirectly detect the off leakage current of the P-type transistor in the pixel driving circuit. In addition, the detection transistor may also be used to indirectly detect the off leakage current of transistors in other circuits, and the number of the detection transistors may also be one.

[0037] The exemplary embodiment also provides a display panel, which includes the above-mentioned detection component.

[0038] The display panel may include a base substrate, an active layer, a first conductive layer, a second conductive layer, and a third conductive layer stacked in sequence. An insulating layer may be disposed between the adjacent structural layers. Figure 2-9 As shown, Figure 2 This is a structural diagram of an exemplary embodiment of the display panel disclosed herein. Figure 3 for Figure 2 The structural layout of the active layer, Figure 4for Figure 2 The structural layout of the third conductive layer in Figure 5 for Figure 2 The structure layout of the active layer and the first conductive layer, Figure 6 for Figure 2 The structure layout of the active layer, the first conductive layer and the second conductive layer, Figure 7 for Figure 6 The cross-sectional view along the dotted line BB in the figure is as follows: Figure 8 for Figure 5 The cross-sectional view along the dotted line CC, Fig. 9 for Figure 2 Cross-sectional view along dotted line AA.

[0039] In this exemplary embodiment, Figure 2-9 As shown, the active layer may include at least one active portion 4, the active portion 4 is arranged corresponding to the detection transistor T, and at least a partial structure of the active portion 4 is used to form a channel region of the detection transistor corresponding thereto. When the detection transistor is an N-type transistor, the material of the active layer may be indium gallium zinc oxide, and when the detection transistor is a P-type transistor, the material of the active layer may be polysilicon. The first conductive layer may include a gate line G, and a partial structure of the gate line G is used to form a gate of the detection transistor T.

[0040] In this exemplary embodiment, Figure 2-9 As shown, the first conductive layer may further include a plurality of first conductive line segments 11 and a plurality of second conductive line segments 12; the orthographic projections of the first conductive line segments 11 on the substrate are spaced apart along a first direction X, and the first conductive line segments 11 are used to form a partial structure of the first coil 51; the orthographic projections of the second conductive line segments 12 on the substrate are spaced apart along the first direction X, and the second conductive line segments 12 are used to form a partial structure of the second coil 52. The second conductive layer may include a conductive wire 2, which is used to form the magnetic core of the first coil 51 and the second coil 52; the third conductive layer may include a third conductive wire segment 33 and a fourth conductive wire segment 34; the third conductive wire segment 33 is connected between two adjacent first conductive wire segments 11 through vias, and the first conductive wire segments 11 distributed in sequence can be connected in sequence through the third conductive wire segment 33, and the third conductive wire segment 33 is used to form a partial structure of the first coil 51; the fourth conductive wire segment 34 is connected between two adjacent second conductive wire segments 12 through vias, and the second conductive wire segments 12 distributed in sequence can be connected in sequence through the fourth conductive wire segment 34, and the fourth conductive wire segment 34 is used to form a partial structure of the second coil 52.

[0041] In this exemplary embodiment, Figure 2-9As shown, the first conductive line segment 11, the third conductive line segment 33, and the vias connected between the first conductive line segment 11 and the third conductive line segment 33 can form a first coil 51. The second conductive line segment 12, the fourth conductive line segment 34, and the vias connected between the second conductive line segment 12 and the fourth conductive line segment 34 can form a second coil 52.

[0042] In this exemplary embodiment, Figure 2-9 As shown, the orthographic projection of the conductive wire 2 on the substrate can be a ring, and the ring-shaped conductive wire 2 can include a first side 21 and a second side 22 that are relatively arranged, and the orthographic projection of the first side 21 on the substrate and the orthographic projection of the second side 22 on the substrate can both extend along the first direction X; the first side 21 is used to form the magnetic core of the first coil 51, and the second side 22 is used to form the magnetic core of the second coil 52.

[0043] It should be understood that the orthographic projection of the conductive line 2 on the substrate may also be other shapes, for example, the orthographic projection of the conductive line 2 on the substrate may be a line segment extending along the first direction X. The distribution direction of the first conductive line segment 11 and the distribution direction of the second conductive line segment 12 may also be different.

[0044] In this exemplary embodiment, Figure 2-9 As shown, the orthographic projection of the conductive line 2 on the substrate intersects with the orthographic projection of the first conductive line segment 11 on the substrate, the orthographic projection of the third conductive line segment 33 on the substrate, the orthographic projection of the second conductive line segment 12 on the substrate, and the orthographic projection of the fourth conductive line segment 34 on the substrate.

[0045] In this exemplary embodiment, Figure 7 , 9 As shown, the display panel further includes: a buffer layer 02, an insulating layer 03, a dielectric layer 04, and a planar layer 05. The buffer layer 02 is located between the base substrate 01 and the active layer, the insulating layer 03 is located between the first conductive layer and the active layer, the dielectric layer 04 is located between the first conductive layer and the second conductive layer, and the planar layer 05 is located between the second conductive layer and the third conductive layer. A plurality of grooves 021 are formed on the buffer layer 02, at least part of the structure of the first conductive line segment 11 is located in the groove 021 corresponding thereto, and at least part of the structure of the second conductive line segment 12 is located in the groove 021 corresponding thereto; and the orthographic projection of the conductive line 2 on the base substrate is located within the orthographic projection of the groove on the base substrate. This arrangement allows the conductive line 2 to have sufficient space for arrangement.

[0046] In this exemplary embodiment, Figure 2-9As shown, the active part 4 may include a first sub-active part 41 and a second sub-active part 42 and a third sub-active part 43 connected to both ends of the first sub-active part 41, wherein the first sub-active part 41 is used to form the channel region of the detection transistor; the third conductive layer may include: a first conductive part 31 and a second conductive part 32, wherein the first conductive part 31 may be connected to each of the second sub-active parts 42 through a via hole; and the second conductive part 32 may be connected to each of the third sub-active parts 43 through a via hole. It should be understood that in other exemplary embodiments, the first conductive part 31 may also be connected to each of the second sub-active parts 42 through a bridge part located in the second conductive layer; and the second conductive part 32 may be connected to each of the third sub-active parts 43 through a bridge part located in the second conductive layer. The first conductive part 31 may also be connected to the first end of the first coil 51. The first conductive part 31 may be connected to the first conductive line segment 11 through a conductive part via hole located in the third conductive layer to connect the first end of the first coil 51.

[0047] In this exemplary embodiment, Figure 2-9 As shown, the third conductive layer may further include a first detection terminal Pad1, a second detection terminal Pad2, a fourth detection terminal Pad4, and a fifth detection terminal Pad5. The first detection terminal Pad1 is connected to the second conductive portion 32, the second detection terminal Pad2 is connected to the first conductive line segment 11, the fourth detection terminal Pad4 is connected to the second conductive line segment 12 to connect one end of the second coil, and the fifth detection terminal Pad5 is connected to the second conductive line segment 12 to connect the other end of the second coil. The first conductive layer may further include a third detection terminal Pad3, and the third detection terminal Pad3 is connected to the gate line G. The first detection terminal Pad1, the second detection terminal Pad2, the third detection terminal Pad3, the fourth detection terminal Pad4, and the fifth detection terminal Pad5 may be used to connect to an external circuit through a probe.

[0048] It should be understood that in other exemplary embodiments, the first coil and the second coil may also have other structures. Fig.10 The orthographic projection of the third conductive line segment 33 and the orthographic projection of the fourth conductive line segment 34 on the substrate may not intersect with the orthographic projection of the conductive line 2 on the substrate.

[0049] For example, Fig.11As shown, it is a structural layout in another exemplary embodiment of the display panel of the present disclosure. The third conductive layer includes: a first planar spiral coil 35, a second planar spiral coil 36, and a conductive part 30, wherein the first planar spiral coil 35 forms the first coil 51, the second planar spiral coil 36 forms the second coil 52, and the conductive part 30 is used to form the magnetic core of the first coil 51 and the second coil 52; wherein the orthographic projection of the first planar spiral coil 35 on the substrate and the orthographic projection of the second planar spiral coil 36 on the substrate spirally rotate around the orthographic projection of the conductive part 30 on the substrate, and the number of rotations of the first planar spiral coil 35 is greater than the number of rotations of the second planar spiral coil 36. Fig.11 In the illustrated embodiment, the fourth detection terminal Pad4 may be located in the first conductive layer.

[0050] This exemplary embodiment also provides a display device, which may include the above-mentioned display panel. The display device may be a display device such as a mobile phone, a tablet computer, or a television.

[0051] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing what is disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary technical means in the art that are not disclosed in the present disclosure. The specification and embodiments are to be considered merely as exemplary, and the true scope and spirit of the present disclosure are indicated by the claims.

[0052] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A display panel, It is characterized in that The display panel includes a detection component, and the detection component includes: At least one detection transistor, at least one of the detection transistors is connected in parallel between the first detection terminal and the second detection terminal; A mutual inductance coil, the mutual inductance coil comprising a first coil and a second coil forming a mutual inductance structure; Wherein, the first coil and the detection transistor connected in parallel with each other are connected in series between the first detection end and the second detection end, and the number of turns of the first coil is greater than the number of turns of the second coil; The display panel further includes: substrate substrate; An active layer, located on one side of the substrate, the active layer comprising at least one active portion, the active portion being arranged corresponding to the detection transistor, and at least a portion of the structure of the active portion being used to form a channel region of the detection transistor corresponding thereto; A first conductive layer, located on a side of the active layer away from the substrate, the first conductive layer comprising a gate line, a part of the gate line being used to form a gate of the detection transistor; The first conductive layer further includes a plurality of first conductive line segments and a plurality of second conductive line segments; The orthographic projections of the first conductive line segments on the substrate are spaced apart along a first direction, and the first conductive line segments are used to form a partial structure of the first coil; The orthographic projections of the second conductive line segments on the substrate are spaced apart along a second direction, and the second conductive line segments are used to form a partial structure of the second coil; The display panel further includes: A second conductive layer, located on a side of the first conductive layer away from the substrate, the second conductive layer comprising conductive wires, the conductive wires being used to form magnetic cores of the first coil and the second coil; A third conductive layer, located on a side of the second conductive layer away from the substrate, the third conductive layer comprising a third conductive line segment and a fourth conductive line segment; The third conductive line segments are respectively connected between two adjacent first conductive line segments through vias, the first conductive line segments distributed sequentially are sequentially connected through the third conductive line segments, and the third conductive line segments are used to form a partial structure of the first coil; The fourth conductive line segments are connected between two adjacent second conductive line segments through vias, the sequentially distributed second conductive line segments are sequentially connected through the fourth conductive line segments, and the fourth conductive line segments are used to form a partial structure of the second coil.

2. The display panel according to claim 1, It is characterized in that The first direction is the same as the second direction, the orthographic projection of the conductive line on the substrate is a ring, the ring-shaped conductive line includes a first side and a second side that are oppositely arranged, and the orthographic projection of the first side on the substrate and the orthographic projection of the second side on the substrate both extend along the first direction; The first side is used to form a magnetic core of the first coil, and the second side is used to form a magnetic core of the second coil.

3. The display panel according to claim 1, It is characterized in that At least one of the orthographic projection of the first conductive line segment on the substrate and the orthographic projection of the third conductive line segment on the substrate intersects with the orthographic projection of the conductive line on the substrate; At least one of an orthographic projection of the second conductive line segment on the substrate and an orthographic projection of the fourth conductive line segment on the substrate intersects with an orthographic projection of the conductive line on the substrate.

4. The display panel according to claim 1, It is characterized in that The display panel further includes: a buffer layer, the buffer layer being located between the base substrate and the active layer, the buffer layer being formed with a plurality of grooves, at least a portion of the structure of the first conductive line segment being located in the grooves corresponding thereto, and at least a portion of the structure of the second conductive line segment being located in the grooves corresponding thereto; And the orthographic projection of the conductive line on the base substrate is located within the orthographic projection of the groove on the base substrate.

5. The display panel according to any one of claims 1 to 4, It is characterized in that The active portion includes a first sub-active portion and a second sub-active portion and a third sub-active portion connected to two ends of the first sub-active portion, wherein the first sub-active portion is used to form a channel region of the detection transistor; The third conductive layer further comprises: a first conductive portion connected to each of the second sub-active portions through a via; a second conductive portion connected to each of the third sub-active portions through a via hole; The first conductive portion is connected to a first end of the first coil.

6. A display device, It is characterized in that A display panel comprising any one of claims 1 to 5.

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