Display device
By using a gate insulating film formed by stacking silicon oxide film and aluminum oxide film in the oxide semiconductor TFT, the oxygen amount of the oxide semiconductor is controlled, and the balance problem between the initial characteristics and reliability of the oxide semiconductor TFT is solved, thereby achieving higher reliability and stability.
Patent Information
- Application Number
- CN202211306654.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2017-03-29
- Filing Date
- 2018-02-26
- Publication Date
- 2025-07-11
- Estimated Expiration
- 2038-02-26
AI Technical Summary
In the prior art, reliability control of oxide semiconductor TFTs in initial characteristics and operating life is difficult to balance, especially the increase in oxygen in the insulating film leads to an increase in defects, affecting the stability and reliability of TFT characteristics.
A gate insulating film composed of a first silicon oxide film and a first aluminum oxide film are formed on the first oxide semiconductor, and a gate electrode is formed thereon. A silicon oxide film with low defect density and an aluminum oxide film are used to control the amount of oxygen to maintain the characteristics of the oxide semiconductor.
The initial characteristics and reliability of the operating life of the oxide semiconductor TFT are improved. By controlling the oxygen in the oxide semiconductor, the TFT characteristics are stably maintained and the impact of film defects on the process gas is reduced.
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Figure CN115498028B_ABST
Abstract
Description
[0001] This application is a divisional application of Chinese Patent Application No. 201810159539.X, with the filing date of February 26, 2018 and the invention title of "Display Device". Technical Field
[0002] The present invention relates to a display device, and particularly to a display device having a TFT using an oxide semiconductor. Background Art
[0003] In a liquid crystal display device and an organic EL display device, thin film transistors (TFTs: Thin Film Transistors) are used in switching elements and driving circuits of respective pixels. In the TFTs, a-Si (amorphous silicon), Poly-Si (PolySlicion: polysilicon), or an oxide semiconductor is used.
[0004] Since amorphous silicon has a small mobility, there are problems when using an a-Si-based TFT in a peripheral driving circuit. Polysilicon has a large mobility and can be used for a peripheral driving circuit, but when used as a switching element of a pixel, there is a problem of a large leakage current. For an oxide semiconductor, its mobility is larger than that of amorphous silicon, and also the leakage current is small, but there are issues in reliability related to control of film defects.
[0005] Patent Document 1 describes a configuration in which an entire TFT including a gate electrode and formed of an oxide semiconductor is covered with an inorganic insulating film (for example, an alumina film, a titanium oxide film, or an indium oxide film).
[0006] Patent Document 2 describes the following configuration: In order to improve the performance of a TFT using an oxide semiconductor, the gate insulating film is thinned, and the tunneling effect in this case is used to suppress gate leakage. As the gate insulating film, a high dielectric constant material such as hafnium oxide or tantalum oxide having a high dielectric constant is used, and a film layer including silicon oxide, silicon nitride, alumina, etc. is laminated thereon.
[0007] Patent Document 3 describes the following configuration: In order to make the characteristics of a TFT using an oxide semiconductor stable, an oxide semiconductor is clamped with an inorganic insulating film in a channel portion. As the inorganic insulating film in this case, alumina, titanium oxide, indium oxide, etc. are exemplified.
[0008] Prior Art Documents
[0009] Patent Documents
[0010] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2012-15436
[0011] Patent Document 2: Japanese Patent Application Laid-Open No. 2015-92638
[0012] Patent Document 3: WO2010 / 041686 Summary of the Invention
[0013] Problems to be Solved by the Invention
[0014] As oxide semiconductors, there are IGZO (Indium Gallium Zinc Oxide), ITZO (Indium Tin Zinc Oxide), ZnON (Zinc Oxide Nitride), IGO (Indium Gallium Oxide), etc. Since these oxide semiconductors are transparent, they are sometimes also referred to as TAOS (Transparent Amorphous Oxide Semiconductor). It should be noted that, for example, in the case of IGZO, etc., In:Ga:Zn = 1:1:1 is mostly the case, but in this specification, cases deviating from this ratio are also included.
[0015] For a TFT using an oxide semiconductor, the initial characteristics can be adjusted by the amount of oxygen in the oxide semiconductor or the amount of oxygen in the insulating film in contact with the oxide semiconductor, but it is difficult to control the reliability. In particular, if the amount of oxygen in the insulating film is increased, the defects in the insulating film increase. Thus, there is a trade-off relationship between the initial characteristics and the reliability.
[0016] In addition, even if the amount of oxygen in the oxide semiconductor is controlled initially, there is a problem that the above-mentioned oxygen is gradually removed during the operating life, resulting in changes in the TFT characteristics.
[0017] An object of the present invention is to provide a display device that can ensure both the initial characteristics and the reliability during the operating life of a TFT using an oxide semiconductor, and has excellent initial characteristics and reliability.
[0018] Means for Solving the Problems
[0019] The present invention solves the above problems, and the specific means are as follows.
[0020] (1) A display device, characterized in that the display device includes a substrate having a display area, and a plurality of pixels are formed in the display area, wherein the pixel includes a first TFT using a first oxide semiconductor, a first gate insulating film is formed on the first oxide semiconductor, the first gate insulating film is formed of a stacked structure of a first silicon oxide film and a first aluminum oxide film, and a first gate electrode is formed on the first aluminum oxide film.
[0021] (2) The display device according to (1), characterized in that the first gate electrode is composed of a stacked structure of a second oxide semiconductor and a metal formed on the second oxide semiconductor.
[0022] (3) The display device according to (1), characterized in that, through ESR analysis, the defect density of the first silicon oxide film is 1×10 18 (spins / cm 3 ) or less.
[0023] (4) The display device according to (3), characterized in that, through TDS analysis, under the condition of M / z = 32, the oxygen (O2) release amount of the first silicon oxide film is 1×10 15 (molec. / cm 2 ) or more at 100°C to 250°C.
[0024] This application relates to the following items.
[0025] Item 1: A display device, the display device includes a substrate having a display area, a plurality of pixels are formed in the display area, and the display device is characterized in that
[0026] the pixel includes a first TFT using a first oxide semiconductor,
[0027] a first gate insulating film is formed on the first oxide semiconductor,
[0028] the first gate insulating film is formed of a stacked structure of a first silicon oxide film and a first aluminum oxide film,
[0029] and a first gate electrode is formed on the first aluminum oxide film.
[0030] Item 2: The display device according to Item 1, characterized in that the first gate electrode is composed of a stacked structure of a second oxide semiconductor and a metal formed on the second oxide semiconductor.
[0031] Item 3. The display device according to Item 1, characterized in that an interlayer insulating film is formed to cover the first gate insulating film and the first gate electrode, the defect density of the first silicon oxide film is lower than that of the interlayer insulating film, and the defect density of the first silicon oxide film is 1×10 18 hereinafter, with the unit of spins / cm 3 .
[0032] Item 4. The display device according to Item 3, characterized in that, through TDS analysis, under the condition of M / z = 32, the oxygen (O2) release amount of the first silicon oxide film is 1×10 15 or more, with the unit of molec. / cm 2 .
[0033] Item 5. The display device according to Item 3, characterized in that, through TDS analysis, under the condition of M / z = 44, the N2O release amount of the first silicon oxide film is 8×10 13 or less, with the unit of molec. / cm 2 .
[0034] Item 6. The display device according to Item 1, characterized in that the first oxide semiconductor is formed on the second silicon oxide film, and the defect density of the second silicon oxide film is 1×10 18 or less, with the unit of spins / cm 3 .
[0035] Item 7. The display device according to Item 1, characterized in that the first oxide semiconductor is formed on the second aluminum oxide film.
[0036] Item 8. The display device according to Item 1, characterized in that the thickness of the first aluminum oxide film is 1 to 20 nm.
[0037] Item 9. The display device according to Item 2, characterized in that the thickness of the second oxide semiconductor is smaller than that of the first oxide semiconductor.
[0038] Item 10. The display device according to Item 1, characterized in that the first gate insulating film is only formed under the first gate electrode.
[0039] Item 11. The display device according to Item 1, characterized in that the first oxide semiconductor has a drain region connected to the drain electrode and a source region connected to the source electrode, and a protective layer formed of a metal or an alloy is formed between the drain electrode and the drain region and between the source electrode and the source region.
[0040] Item 12. The display device according to Item 11, characterized in that the protective layer is formed of the same material as the video signal line.
[0041] Item 13. The display device according to Item 1, characterized in that the substrate has a second TFT using polysilicon, and the distance between the polysilicon and the substrate is less than the distance between the first oxide semiconductor and the substrate.
[0042] Item 14. The display device according to Item 11, characterized in that the substrate has a second TFT using polysilicon, and the distance between the polysilicon and the substrate is less than the distance between the first oxide semiconductor and the substrate.
[0043] Item 15. The display device according to Item 1, characterized in that a second gate insulating film including a third silicon oxide film is formed under the first oxide semiconductor, and a second gate electrode is formed under the second gate insulating film.
[0044] The first oxide semiconductor is formed on the third silicon oxide film.
[0045] Item 16. The display device according to Item 15, characterized in that the second gate insulating film is formed of a stacked film of the third silicon oxide film and a third aluminum oxide film, and the second gate electrode is in contact with the third aluminum oxide film.
[0046] Item 17. The display device according to Item 15, characterized in that the second gate electrode is formed of a stacked film of a metal and a third oxide semiconductor, and the third oxide semiconductor is in contact with the second gate insulating film.
[0047] Item 18. The display device according to Item 15, characterized in that the first oxide semiconductor has a drain region connected to a drain electrode and a source region connected to a source electrode, and a protective layer formed of a metal or an alloy is formed between the drain electrode and the drain region and between the source electrode and the source region.
[0048] Item 19. The display device according to Item 15, characterized in that the substrate has a second TFT using polysilicon, and the distance between the polysilicon and the substrate is less than the distance between the second gate electrode and the substrate.
[0049] Item 20. The display device according to Item 18, characterized in that the substrate has a second TFT using polysilicon, and the distance between the polysilicon and the substrate is less than the distance between the second gate electrode and the substrate. Description of the Drawings
[0050] Figure 1 : A top view of a liquid crystal display device.
[0051] Figure 2 : is Figure 1 the A-A sectional view of
[0052] Figure 3 : is the sectional view of the display area of the liquid crystal display device.
[0053] Figure 4 : is the sectional view showing Example 1.
[0054] Figure 5 : is the sectional view showing the second mode of Example 1.
[0055] Figure 6 : is the sectional view showing the third mode of Example 1.
[0056] Figure 7 : is the sectional view showing Example 2.
[0057] Figure 8 : is the sectional view showing Example 3.
[0058] Figure 9 : is the sectional view showing Example 4.
[0059] Figure 10 : is the sectional view showing the second mode of Example 4.
[0060] Figure 11 : is the sectional view showing the third mode of Example 4.
[0061] Figure 12 : is the sectional view showing the fourth mode of Example 4.
[0062] Figure 13 : is the sectional view showing Example 5.
[0063] Figure 14 : is the sectional view showing the second mode of Example 5.
[0064] Figure 15 : is the sectional view of the organic EL display device.
[0065] Explanation of reference numerals
[0066] 10…TFT substrate, 11…base film, 12…first oxide semiconductor, 13…first gate insulating film, 14…first gate electrode, 15…interlayer insulating film, 16…drain electrode, 17…source electrode, 18…organic passivation film, 19…common electrode, 20…capacitor insulating film, 21…pixel electrode, 22…alignment film, 23…via hole, 30…reflective electrode, 31…anode, 32…bank, 33…organic EL layer, 34…cathode, 35…protective film, 36…adhesive, 37…circular polarizing plate, 40…opposing substrate, 41…color filter, 42…black matrix, 43…protective film, 44…alignment film, 50…protective layer, 60…second gate electrode, 61…second gate insulating film, 70…polycrystalline silicon, 71…third gate insulating film, 72…third gate electrode, 80…sealing material, 90…display area, 91…scan line, 92…video signal line, 93…pixel, 95…driver IC, 96…flexible printed circuit board, 111…SiO / SiN stacked film, 112…second aluminum oxide film, 121…drain region, 122…source region, 131…silicon oxide film, 132…aluminum oxide film, 141…second oxide semiconductor, 142…metal, 300…liquid crystal layer, 301…liquid crystal, 510…lower polarizing plate, 520…upper polarizing plate, 601…third oxide semiconductor, 602…metal, 611…third silicon oxide film, 612…second silicon oxide film, 1000…backlight Detailed Description of the Embodiment
[0067] Hereinafter, the content of the present invention will be described in detail by way of examples.
[0068]
Example 1
[0069] Figure 1 It is a top view of a liquid crystal display device used in a mobile phone or the like as an example to which the present invention can be applied. Figure 1 In this, a TFT substrate 10 on which a plurality of pixels 93 are formed and an opposing substrate 40 are joined by a sealing material 80. A liquid crystal is sandwiched between the TFT substrate 10 and the opposing substrate 40. The inside of the sealing material 80 becomes a display area 90. In the display area 90, scan lines 91 extend in the horizontal direction and are arranged in the vertical direction. In addition, video signal lines 92 extend in the vertical direction and are arranged in the horizontal direction.
[0070] Pixels 93 are formed in the area surrounded by the scan lines 91 and the video signal lines 92. In each pixel 93, a pixel electrode and a TFT for controlling a signal supplied to the pixel electrode are formed. The TFT substrate 10 is formed larger than the opposing substrate 40, and the portion of the TFT substrate 10 that does not overlap with the opposing substrate 40 becomes a terminal area. In the terminal area, a driver IC 95 for controlling signals is mounted. In addition, in the terminal area, a flexible printed circuit board 96 for supplying signals and power to the liquid crystal display device is connected.
[0071] Figure 2 is Figure 1 the A-A cross-sectional view of Figure 2 In, the TFT substrate 10 and the counter substrate 40 are stacked. Compared with the thicknesses of the TFT substrate 10 and the counter substrate 40, the thickness of the liquid crystal layer is quite small. Therefore, in Figure 2 the liquid crystal layer is omitted. The portion where the TFT substrate 10 does not overlap with the counter substrate 40 becomes a terminal region, and a driving IC 95 is mounted in this portion, and a flexible wiring substrate 96 is connected thereto.
[0072] Since liquid crystal itself does not emit light, a backlight 1000 is disposed on the back surface of the TFT substrate 10. The light from the backlight 1000 is controlled for each pixel, and thus an image is formed. Since liquid crystal can only control polarized light, a lower polarizing plate 510 is attached to the lower side of the TFT substrate 10, and an upper polarizing plate 520 is attached to the upper side of the counter substrate 40.
[0073] Figure 3 is the cross-sectional view of the display area of the liquid crystal display device. Figure 3 In, the TFT substrate 10 is formed of glass or resin. In order to prevent impurities from glass or resin from contaminating the semiconductor layer, a base film 11 is formed on the TFT substrate 10. The base film 11 is a stacked film of a silicon oxide film (hereinafter, also referred to as SiO), a silicon nitride film (hereinafter, also referred to as SiN), but sometimes an aluminum oxide film (hereinafter, also referred to as AlO) or the like is stacked.
[0074] On the base film 11, an oxide semiconductor 12 formed of, for example, IGZO is formed. A gate insulating film 13 is formed to cover the oxide semiconductor 12. In the present invention, as will be described later, the gate insulating film 13 is configured to stack an aluminum oxide film on a silicon oxide film. A gate electrode 14 is formed on the gate insulating film 13. In an embodiment of the present invention, as will be described later, the gate electrode 14 has a stacked structure of a second oxide semiconductor and a metal film. For the metal film, Mo, W, or an alloy thereof is suitable.
[0075] Figure 3 In, after the gate electrode 14 is formed, ions are implanted using the gate electrode 14 as a mask, and thus defects are formed in the oxide semiconductor 12 to impart conductivity, and a drain region 121 and a source region 122 are formed in the oxide semiconductor 12. An interlayer insulating film 15 is formed to cover the gate electrode 14 and the gate insulating film 13. The interlayer insulating film 15 is formed of a silicon oxide film, and may also be formed of a silicon nitride film, or a stacked film of a silicon oxide film and a silicon nitride film. Through holes are formed in the interlayer insulating film 15 and the gate insulating film 13, and a drain electrode 16 or a source electrode 17 is formed. The drain electrode 16 is connected to a video signal line, and the source electrode 17 is connected to a pixel electrode 21 via a through hole 23.
[0076] An organic passivation film 18 is formed to cover the interlayer insulating film 15, the drain electrode 16, the source electrode 17, etc. The organic passivation film 18 also functions as a planarizing film, and thus, is formed to be as thick as 2 to 4 μm. In order to connect the pixel electrode 21 to the source electrode 17 of the TFT, a through hole 23 is formed in the organic passivation film 18.
[0077] On the organic passivation film 18, a planar common electrode 19 is formed. A capacitive insulating film 20 is formed by SiN to cover the common electrode 19, and a pixel electrode 21 is formed on the capacitive insulating film 20. The insulating film covering the common electrode 19 is called the capacitive insulating film 20 because a pixel capacitance is formed between it and the pixel electrode. An alignment film 22 for initial alignment of liquid crystal is formed to cover the pixel electrode 21. The pixel electrode 21 is formed in a strip shape or a comb shape in plan view. When a voltage is applied to the pixel electrode 21, Figure 3 as shown by the arrow in, power lines are generated, whereby the liquid crystal molecules 301 are rotated, and thus, the transmittance of light from the backlight source in the pixel is controlled.
[0078] Figure 3 In, a counter substrate 40 is disposed to sandwich the liquid crystal layer 300. In the counter substrate 40, a color filter 41 is formed corresponding to the pixel electrode, so that a color image can be formed. In addition, a black matrix 42 is formed between the color filters 41 to improve the contrast of the image. A protective film (over coat film) 43 is formed to cover the color filter 41 and the black matrix 42. The protective film 43 prevents the pigment constituting the color filter 41 from leaking into the liquid crystal layer 300. An alignment film 44 is formed to cover the protective film 43.
[0079] Figure 4 A cross-sectional view showing Embodiment 1 of the present invention. Figure 4 In, on the stacked film of SiO and SiN constituting the base film 11, a first oxide semiconductor 12 formed of, for example, IGZO is formed. The thickness of the first oxide semiconductor 12 is 10 nm to 70 nm. A gate insulating film 13 is formed to cover the first oxide semiconductor 12. The gate insulating film 13 is formed of a double layer structure of a silicon oxide film 131 and a first aluminum oxide film 132. The thickness of the silicon oxide film 131 constituting the gate insulating film 13 is, for example, 50 nm to 200 nm, and the thickness of the aluminum oxide film 132 covering it is, for example, 1 nm to 20 nm.
[0080] Figure 4 In, a gate electrode 14 is formed on the first aluminum oxide film 132, and Figure 4The gate electrode 14 therein forms a bilayer structure of a second oxide semiconductor 141 and a metal layer 142. The metal layer 142 is, for example, Mo, W, or an alloy thereof. The second oxide semiconductor 141 is formed of, for example, IGZO. The second oxide semiconductor 141 and the first oxide semiconductor 12 may not be of the same material, but when they are of the same material, the process becomes simple. The thickness of the second oxide semiconductor 141 is 1 to 30 nm.
[0081] By supplying oxygen from the gate insulating film 13 to the oxide semiconductor 12, the characteristics of the TFT using the oxide semiconductor 12 are maintained. In order to supply oxygen from the gate insulating film 13 to the oxide semiconductor 12, it is necessary to previously increase the defects in the gate insulating film 13. However, gases and the like used in the process are easily absorbed into the gate insulating film 13 with many defects, thereby impairing the reliability of the oxide semiconductor 12.
[0082] The feature of the present invention is that a silicon oxide film 131 with few defects is used as the gate insulating film 13, and an aluminum oxide film 132 is formed on the silicon oxide film 131. By adopting such a configuration, oxygen can be supplied from the aluminum oxide film 132 to the oxide semiconductor 12 through the silicon oxide film 131. Therefore, the characteristics of the oxide semiconductor 12 can be stably maintained.
[0083] In addition, in this embodiment, by using the second oxide semiconductor 141 in the lower layer of the gate electrode 14, oxygen can be supplied from the second oxide semiconductor 141 to the first oxide semiconductor 12 constituting the TFT. Further, when the second oxide semiconductor 141 is formed, the substrate is annealed. At this time, the oxygen released from the aluminum oxide film 132 will be supplied to the first oxide semiconductor 12 constituting the TFT. Therefore, according to the present invention, even if the silicon oxide film 131 with few defects is used as the gate insulating film 13, the characteristics of the oxide semiconductor 12 can be maintained. Thus, the reliability of the TFT using the oxide semiconductor 12 can be improved.
[0084] The characteristics of the silicon oxide film 131 constituting the gate insulating film 13 of the present invention are as follows. First, the defect density is small. Specifically, through ESR (Electron Spin Resonance) analysis, the defect density is 1×10 18 (spins / cm 3)The following are the measurement conditions for ESR: measurement temperature: 85 K; μ-wave power: 10 [mW]; direction of magnetic field: parallel to the film surface; magnetic field range: 317 ± 25 [mT]; modulation width: 0.5 [mT], modulation frequency: 100 [kHz]; time constant: 0.03 [s]. Second, the supply amount of oxygen should be sufficient to maintain the characteristics of the oxide semiconductor. Specifically, by TDS (Thermal Desorption Spectrometry) analysis, under the condition of M / z = 32, the oxygen (O2) release amount is 1 × 10 15 (molec. / cm 2 ) or more. A configuration that satisfies both the first characteristic and the second characteristic has not been achieved in the past.
[0085] Third, the release of gases other than oxygen is small. The TFT substrate undergoes various processes. If there are many film defects, the process gases are contained in the above defects, and these gases have an adverse effect on the characteristics of the oxide semiconductor, thereby reducing the reliability. Therefore, by using the silicon oxide film 131 with few film defects, the reliability of the TFT using the oxide semiconductor 12 can be improved.
[0086] Specifically, taking N2O among the gases exposed in the process as an example for evaluation, it is as follows. By TDS, under the condition of M / z = 44, the release amount of N2O is 8 × 10 13 (molec. / cm 2 ) or less.
[0087] The above characteristics are the characteristics of the silicon oxide film 131 in the state after the display device is completed. For measuring the characteristics of the silicon oxide film 131 in the finished product, in Figure 4 , remove the layer above the silicon oxide film 131 that constitutes the gate insulating film 13, and perform ESR analysis and TDS analysis.
[0088] Figure 4 In, the base film 11 is a double layer of SiN and SiO. The lowermost layer is SiN, and the upper layer is SiO. SiN is particularly excellent in moisture barrier property, so it is a necessary layer, but it is also a supply source of hydrogen that reduces the oxide semiconductor 12. Therefore, SiO is laminated on SiN. The laminated film of SiO and SiN can be continuously formed by CVD.
[0089] Since the above upper silicon oxide film (SiO) is in direct contact with the oxide semiconductor 12, its characteristics need to be controlled. The specific characteristics are the same as those of SiO in the gate insulating film 13. First, the defect density is small. Specifically, by ESR (Electron Spin Resonance) analysis, the defect density is 1 × 1018 (spins / cm 3 ) or less. It should be noted that the defect density of the interlayer insulating film 15 is 1 × 10 18 (spins / cm 3 ) or more as analyzed by ESR (Electron Spin Resonance). Second, the supply amount of oxygen should be sufficient to maintain the characteristics of the oxide semiconductor. Specifically, as analyzed by TDS (Thermal Desorption Spectrometry), under the condition of M / z = 32, the oxygen (O2) release amount is 1 × 10 15 (molec. / cm 2 ) or more from 100°C to 250°C. Third, the release of gases other than oxygen is small. Taking N2O as an example, as analyzed by TDS, under the condition of M / z = 44, the N2O release amount is 8 × 10 13 (molec. / cm 2 ) or less from 100°C to 400°C.
[0090] For the measurement method of the silicon oxide film (SiO) in the base film 11, it is the same as the measurement method of the silicon oxide film (SiO) in the gate insulating film 13. Remove the layer above the measured silicon oxide film (SiO), and perform ERS analysis and TDS analysis on the exposed silicon oxide film (SiO).
[0091] Figure 5 FIG. is a cross-sectional view showing the second mode in this embodiment. Figure 5 Different from Figure 4 is that a second aluminum oxide film 112 is added on the base film 11. The film thickness of the second aluminum oxide film 112 can also be 1 nm to 20 nm. Figure 5 In, the base film is a second aluminum oxide film 112 formed on a stacked film 111 of SiO and SiN. When the stacked film of SiO and SiN has a three-layer structure of SiO / SiN / SiO, the aluminum oxide film 112 can be stacked on the uppermost SiO, or the aluminum oxide film 112 can be formed in place of the uppermost SiO.
[0092] The aluminum oxide film has excellent barrier properties against moisture and gases. Moreover, it also serves as a source of oxygen supply for the oxide semiconductor 12. Therefore, it is suitable as a base film for the oxide semiconductor 12. On the other hand, the aluminum oxide film has more film defects compared to the silicon oxide film and the like. Therefore, there is a risk that gases and the like absorbed into the defect portions may have an adverse effect on the oxide semiconductor 12. However, for the operation of the TFT, the characteristics on the side of the first gate insulating film 13 in the oxide semiconductor 12 are dominant. Therefore, it does not pose a major problem as a TFT.
[0093] Figure 6 A cross-sectional view showing the third mode of this embodiment. Figure 6 Different from Figure 4 In the aspect, a protective layer 50 formed of a metal is formed at a portion where the oxide semiconductor 12 is connected to the drain electrode 16 and the source electrode 17. The drain electrode 16 and the source electrode 17 are formed in through-holes formed in the interlayer insulating film 15 and the gate insulating film 13. The formation of the through-holes is performed by dry etching or the like. Since the thickness of the oxide semiconductor 12 is very thin, such as 10 nm to 70 nm, there is a risk of being removed simultaneously when the interlayer insulating film 15 and the gate insulating film 13 are etched.
[0094] Figure 6 In , a protective layer 50 formed of a metal is formed in a portion where the oxide semiconductor 12 is in conduction with the drain electrode 16 or the source electrode 17, thereby preventing the oxide semiconductor 12 from being removed by etching. The metal constituting the protective layer 50 may have the same constitution as the metal forming the video signal line 92. For example, it is a constitution in which Al alloy is clamped by Ti or the like. By adopting Figure 6 such a constitution, a TFT using an oxide semiconductor with high reliability can be manufactured.
[0095]
Embodiment 2
[0096] Figure 7 A cross-sectional view showing Embodiment 2 of the present invention. Figure 7 Different from Figure 4 in the aspect that the gate insulating film 13 is formed only under the gate electrode 14. Figure 7 In , a silicon oxide film 131 constituting the gate insulating film 13 is formed on the oxide semiconductor 12, and an aluminum oxide film 132 is formed thereon. The film thicknesses of the silicon oxide film 131 and the aluminum oxide film 132 are the same as those in Embodiment 1.
[0097] Figure 7 In , the silicon oxide film 131 and the aluminum oxide film 132 are removed in portions other than under the gate electrode 13. Figure 7 The advantages are as follows. The oxide semiconductor 12 needs to have conductivity in a region other than the channel portion. Therefore, in Figure 4 the constitution of , it is necessary to perform ion implantation using the gate electrode 14 as a mask and form crystal defects to impart conductivity.
[0098] According to Figure 7In the structure, after the part of the gate insulating film 13 other than the part under the gate electrode 14 is removed, the oxide semiconductor 12 is in an exposed state. In this state, the oxide semiconductor 12 can be reduced by passing, for example, silane (SiH4) to impart conductivity. Alternatively, in the state where the oxide semiconductor 12 is exposed, defects can be imparted to the oxide semiconductor 12 by exposure to Ar plasma or N2 plasma to impart conductivity. Therefore, according to the structure of this embodiment, necessary characteristics can be imparted to the oxide semiconductor 12 even without using ion implantation.
[0099] Figure 7 In this case, after imparting conductivity to the necessary part of the oxide semiconductor 12, the interlayer insulating film 15 is formed of a stacked film of SiO or SiN, or SiO and SiN in the same manner as in the prior art. The second aluminum oxide film can also be used for the base film 11, and a protective layer formed of a metal can also be used for the drain region and the source region of the oxide semiconductor 12, which is the same as in Embodiment 1. The performance of the TFT using the oxide semiconductor is the same as that of Embodiment 1.
[0100]
Embodiment 3
[0101] Figure 8 FIG. is a cross-sectional view showing Embodiment 3. Figure 8 Not used in Embodiment 1 Figure 4 In this aspect, the gate electrode 14 is formed only of a metal and there is no second oxide semiconductor. In this case, the second aluminum oxide film 132 becomes a supply source of oxygen for the oxide semiconductor 12. Therefore, the silicon oxide film 131 constituting the gate insulating film 13 can be a film with few defects.
[0102] That is, the aluminum oxide film 132 has the function of sealing oxygen into the oxide semiconductor 12 side while being a supply source of oxygen for the oxide semiconductor 12. Therefore, in many cases, the characteristics and reliability of the oxide semiconductor 12 can be maintained.
[0103] In this embodiment, the second aluminum oxide film can also be used for the base film 11, and a protective layer formed of a metal can also be used for the drain region and the source region of the oxide semiconductor 12, which is the same as in Embodiment 1. In addition, the structure of Embodiment 2 can also be used in combination.
[0104]
Embodiment 4
[0105] Figure 9 FIG. is a cross-sectional view showing Embodiment 4. The ON current of the TFT using the oxide semiconductor 12 can be about 10 times the ON current of the TFT using amorphous silicon. However, it cannot reach the ON current of the TFT using polysilicon. As a method of increasing the ON current of the TFT using the oxide semiconductor 12, the double-gate method can be used.
[0106] Figure 9 A cross-sectional view showing its structure. Figure 9 In this case, a second gate electrode 60 is formed over the TFT substrate 10, and a second gate insulating film 61 is formed to cover the second gate electrode 60. Over the second gate insulating film 61, a first oxide semiconductor 12 constituting the TFT is formed. The layer above the first oxide semiconductor 12 is the same as that in Embodiment 1. Figure 4 The same.
[0107] According to Figure 9 the structure, since current can flow on the upper side and the lower side of the oxide semiconductor 12, the ON current can be increased. Figure 9 In this case, the second gate insulating film 61 is a silicon oxide film, and the second gate electrode 60 is a metal, such as Mo or W, or an alloy thereof. The second gate insulating film 61 may also be a laminate of a silicon nitride film and a silicon oxide film. In this case, the silicon nitride film is the lower layer and the silicon oxide film is the upper layer.
[0108] Figure 10 For Figure 9 the structure, a protective layer 50 is formed in the drain region and the source region of the oxide semiconductor 12. When vias are formed in the interlayer insulating film 15 and the gate insulating film 13, the effect of preventing the oxide semiconductor 12 from disappearing is the same as that described in Embodiment 1 Figure 6 The same.
[0109] Figure 11 A cross-sectional view showing another aspect in this embodiment. Figure 11 The following aspect: In order to form a TFT with improved reliability, on the second gate electrode 60 side of the oxide semiconductor 12, the second gate insulating film 61 also has a double-layer structure of a silicon oxide film 612 and a third silicon oxide film 611, and the second gate electrode 60 has a double-layer structure of a metal 601 and a third oxide semiconductor 602.
[0110] That is, Figure 11 in this case, a third silicon oxide film 611 is formed to cover the second gate electrode 60, and a silicon oxide film 612 is formed thereon. In addition, the second gate electrode has a structure in which an oxide semiconductor 602 is formed over a metal such as MoW 601. The film thickness and the like of each layer are the same as those on the first gate electrode side.
[0111] Figure 12 For Figure 11 the structure, the oxide semiconductor 602 is omitted from the second gate electrode 60. The function and effect of this structure are the same as those described in Embodiment 3. According to Figure 11 and Figure 12The structure can achieve an oxide semiconductor TFT with a double-gate structure and further improved reliability. It should be noted that in Figure 11 and Figure 12 as shown in Figure 10 , a structure can also be adopted in which a protective layer 50 is provided in the drain region and the source region of the oxide semiconductor 12 to prevent the disappearance of the oxide semiconductor.
[0112]
Embodiment 5
[0113] Polycrystalline silicon has a high carrier mobility, so the TFT can operate at high speed. On the other hand, since the oxide semiconductor has a small leakage current, the TFT using it is suitable as a switching element. Therefore, by using a polycrystalline silicon TFT and an oxide semiconductor TFT in combination, a display device with high performance can be obtained. For example, the polycrystalline silicon TFT can be used for the driving circuit, and the oxide semiconductor TFT can be used as the switching TFT in the pixel.
[0114] Figure 13 is a cross-sectional view of Embodiment 5 of the present invention in which a TFT formed of polycrystalline silicon and a TFT formed of an oxide semiconductor coexist. The above-described structure is called a hybrid structure. Figure 13 The oxide semiconductor TFT shown is of the double-gate type. Figure 13 In
[0115] , a base film 11 is formed on the TFT substrate 10. The structure of the base film 11 can be the same as the structure described in Embodiment 1.
[0116] Polycrystalline silicon 70 is first formed on the base film 11. The polycrystalline silicon 70 is formed as follows: First, an amorphous silicon film is formed, and it is irradiated with excimer laser to be converted into polycrystalline silicon and patterned. A third gate insulating film 71 is formed to cover the polycrystalline silicon 70. The third gate insulating film 71 can be formed by CVD using, for example, TEOS (Tetraethyl orthosilicate) as the material.
[0116] On the third gate insulating film 71, the second gate electrode 60 of the oxide semiconductor TFT is formed. At the same time, the gate electrode (third gate electrode) 72 of the TFT using polycrystalline silicon is also formed. After that, a silicon oxide film 61 (which serves as the second gate insulating film of the oxide semiconductor 12) is formed to cover the second gate electrode 60 and the third gate electrode 72. The oxide semiconductor 12 is formed thereon.
[0117] The oxide semiconductor 12 is covered to form a gate insulating film 13 composed of a silicon oxide film 131 and an aluminum oxide film 132, and a gate electrode 14 composed of a second oxide semiconductor 141 and a metal 142 is formed thereon, which is the same as that described in Embodiment 1. It should be noted that, as described in Embodiment 1, the first gate insulating film 13 can be formed only under the first gate electrode 14. In addition, the second oxide semiconductor 141 can be omitted from the first gate electrode 14, and this is also the same as that described in Embodiment 1.
[0118] Figure 13 In [the above situation], the drain electrode 16 and the source electrode 17 are formed simultaneously with the oxide semiconductor TFT and the polysilicon TFT. That is, the through holes for forming the drain electrode 16 and the source electrode 17 are formed simultaneously on the oxide semiconductor TFT side and the polysilicon TFT side.
[0119] As Figure 13 shown, on the polysilicon 70 side, the through holes are formed with respect to the 5-layer insulating film. In contrast, on the oxide semiconductor 12 side, the through holes are formed with respect to the 3-layer insulating film. Therefore, on the oxide semiconductor TFT side, since the oxide semiconductor 12 is exposed to the etching solution for a longer time, the oxide semiconductor 12 is likely to disappear.
[0120] In addition, on the polysilicon 70 side, after the through holes are formed, it is necessary to clean with hydrofluoric acid HF. At this time, the oxide semiconductor 12 is also exposed to hydrofluoric acid HF. If the oxide semiconductor 12 is exposed to hydrofluoric acid HF, it is likely to disappear.
[0121] Figure 14 It is a TFT of a hybrid method for coping with the above problems. Figure 14 Different from Figure 13 is that a protective layer 50 formed of a metal is formed in the drain region and the source region of the oxide semiconductor 12. The above configuration of the TFT on the oxide semiconductor 12 side is the same as that in Figure 12 Embodiment 4.
[0122] For Figure 13 and Figure 14 the configuration, the TFT using the oxide semiconductor is a double-gate method, but it is not limited thereto. The TFT using the oxide semiconductor can also apply the present invention in the case of a single gate as Figures 4 to 8 described above. As described above, according to the present embodiment, a hybrid TFT with excellent characteristics and high reliability can be obtained.
[0123]
Embodiment 6
[0124] In Embodiments 1 to 5, for Figures 1 to 3The liquid crystal display device shown has been described. However, the present invention is not limited to liquid crystal display devices, and can also be applied to organic EL display devices in the same manner. Figure 15 It is a cross-sectional view of a display area of an organic EL display device. Figure 15 In this case, a TFT is formed on the TFT substrate 10, and an organic passivation film 18 is formed thereon. Before forming a through hole in the organic passivation film 18, it is the same as in the liquid crystal display device. Figure 3 The same.
[0125] Therefore, the configurations of the oxide semiconductor TFTs described in Examples 1 to 5 can be directly applied to organic EL display devices.
[0126] Figure 15 In this case, a reflective electrode 30 is formed on the organic passivation film 18, and an oxide conductive film formed of ITO (Indium Tin Oxide) or the like, which is the anode 31, is formed thereon. A bank 32 formed of an organic material such as acrylic acid is formed to cover the anode 31 and the organic passivation film 18. In the hole portion of the bank 32, an organic EL layer 33 as a light-emitting layer is formed on the anode 31. The organic EL layer 33 is formed of multiple layers, but the total thickness is several hundred nm and is very thin. The bank 32 prevents the organic EL layer 33 from being disconnected due to the anode 31 and the reflective electrode 30.
[0127] Figure 15 In this case, an upper electrode as the cathode 34 is formed by an oxide conductive film such as ITO or IZO (Indium Zinc Oxide) or a thin metal film to cover the organic EL layer 33. Since the organic EL layer 33 decomposes when exposed to moisture, a protective film 35 is formed mainly to prevent the intrusion of moisture, for example, by SiN or the like.
[0128] Since the organic EL display device uses the reflective electrode 30, external light is reflected by the reflective electrode 30. As a result, the screen is not easily visible. To prevent this, a circularly polarized plate 37 is attached to the display surface by an adhesive 36 or the like.
[0129] In this way, even in the case of an organic EL display device, before forming the drain electrode 16 and the source electrode 17 of the oxide semiconductor 12, the same configuration as that of the liquid crystal display device can be adopted, and therefore, the configurations described in Examples 1 to 5 can be directly applied.
Claims
1. A method of manufacturing a display device, which is a method of manufacturing a display device having a plurality of thin film transistors, characterized in that, comprising: a step of forming an oxide semiconductor on a TFT substrate; a step of forming a silicon oxide film on the oxide semiconductor; a step of forming an aluminum oxide film on the silicon oxide film; a step of forming a gate electrode on the oxide semiconductor; and a step of forming an interlayer insulating film on the gate electrode, wherein the thickness of the aluminum oxide film is 1 to 20 nm, The defect density of the silicon oxide film is lower than that of the interlayer insulating film. Through ESR analysis, the defect density of the silicon oxide film is 1×10 18 Hereinafter, the unit is spins / cm 3 , According to TDS analysis, under the condition of M / z = 32, the oxygen (O2) release amount of the silicon oxide film is 1×10 15 or more, and its unit is molec. / cm 2 .
2. The manufacturing method of the display device according to claim 1, characterized in that, and portions of the silicon oxide film and the aluminum oxide film other than those under the gate electrode are removed.
3. A method for manufacturing a display device, which is a method for manufacturing a display device having a plurality of thin film transistors, characterized in that, comprising: a step of forming a first aluminum oxide film on a TFT substrate; a step of forming an oxide semiconductor on the first aluminum oxide film; a step of forming a silicon oxide film on the oxide semiconductor; a step of forming a second aluminum oxide film on the silicon oxide film; a step of forming a gate electrode on the oxide semiconductor; and a step of forming an interlayer insulating film on the gate electrode, wherein the thickness of the first aluminum oxide film or the second aluminum oxide film is 1 to 20 nm, The defect density of the silicon oxide film is lower than that of the interlayer insulating film. Through ESR analysis, the defect density of the silicon oxide film is 1×10 18 The following, with the unit of spins / cm 3 , According to TDS analysis, under the condition of M / z = 32, the oxygen (O2) release amount of the silicon oxide film is 1×10 15 or more at 100 °C to 250 °C, and its unit is molec. / cm 2 .
4. The method of manufacturing a display device according to claim 3, wherein portions of the silicon oxide film and the second aluminum oxide film other than those under the gate electrode are removed.
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