Bidirectional current limiting circuit

Abstract

The application provides a bidirectional current limiting circuit, which comprises a load connection end, a power switch circuit, a comparator circuit, a switch group circuit, a delay circuit and a switch control circuit; the switch group circuit comprises a first switch and a second switch connected in series; the switch control circuit is connected with the delay controller and the power switch circuit respectively, and controls the power switch circuit to work according to the delay output signal of the delay controller; when the current of the load to be limited exceeds the maximum current or is lower than the minimum current, the first switch and the second switch cannot be turned on at the same time, the output end outputs a low level, the delay detection switch is turned on, the delay controller is started, and the switch control circuit controls the power switch circuit to be disconnected according to the delay control signal output by the delay controller, so that the power supply of the load to be limited by the load connection end is cut off. The application can realize accurate control of the size of the bidirectional current, does not need too complicated operation, and effectively reduces the complexity of product development and production cost.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to the field of current control circuit technology. Background Technology

[0002] In traditional product designs, one method to limit current is using fuses. Excessive current is controlled by the fuse blowing. However, this method results in the circuit not being fully functional after the fuse blows, requiring fuse replacement. Furthermore, the current limiting is not precise enough, failing to achieve mA-level limiting and only allowing unidirectional current limiting, not limiting minimum current. Another method involves using a microcontroller or ARM chip to programmatically acquire the current, calculate its magnitude, and then control the output load current via the chip's output pins. While this approach provides precise current limiting and bidirectional current limiting, it requires a microcontroller or ARM chip and programming. In mass production, this additional programming step further increases development complexity and production costs. Summary of the Invention

[0003] In view of the shortcomings of the prior art described above, the object of the present invention is to provide a bidirectional current limiting circuit for bidirectional current limiting.

[0004] To achieve the above and other related objectives, the present invention provides a bidirectional current limiting circuit for connection to a load to be current-limited. The bidirectional current limiting circuit includes: a load connection terminal, a power switch circuit, a comparator circuit, a switch group circuit, a delay circuit, and a switch control circuit. The load connection terminal has a load connection end for connecting to the load to be current-limited, and the load connection terminal has a power connection end and a switch connection end. The power connection end is connected to a power supply, and the switch connection end is connected to the power switch circuit. The comparator circuit includes a first comparator and a second comparator. The negative input end of the first comparator and the positive input end of the second comparator are respectively connected to the output end of the power switch circuit, and the output ends of the first comparator and the second comparator are respectively connected to the switch group circuit. The switch group circuit includes a first switch and a second switch connected in series. The first switch is connected to the output end of the first comparator. The second switch is connected to the output terminal of the second comparator, and the first switch and the second switch are connected in series to form an output terminal. The delay module includes a delay detection switch and a delay controller. The delay detection switch is connected to the output terminal formed by the first switch and the second switch connected in series, and controls the delay controller to work according to the signal of the output terminal. The switch control circuit is connected to the delay controller and the power switch circuit respectively, and controls the power switch circuit to work according to the delay output signal of the delay controller. When the current of the load to be current limited exceeds the maximum current or is lower than the minimum current, the first switch and the second switch cannot be turned on at the same time and the output terminal outputs a low level. The delay detection switch is turned on, controlling the delay controller to start. The switch control circuit controls the power switch circuit to be turned off according to the delay control signal output by the delay controller, thereby cutting off the power supply from the load connection terminal to the load to be current limited.

[0005] In one embodiment of the present invention, the power switch circuit includes a MOSFET or a transistor; the first switch and the second switch include MOSFETs or transistors; the delay detection switch includes a MOSFET or a transistor; and the switch control circuit includes a MOSFET or a transistor.

[0006] In one embodiment of the present invention, the positive input terminal of the first comparator is connected to a first resistor adjustment circuit for adjusting the positive threshold voltage of the first comparator.

[0007] In one embodiment of the present invention, the first resistor adjustment circuit includes: a first resistor circuit and a second resistor circuit; a first terminal of the first resistor circuit and a first terminal of the second resistor circuit are connected and connected to the positive input terminal of the first comparator; a second terminal of the first resistor circuit is connected to an external power supply, and a second terminal of the second resistor circuit is grounded; the first resistor circuit and / or the second resistor circuit includes an adjustable resistor.

[0008] In one embodiment of the present invention, the negative input terminal of the second comparator is connected to a second resistor adjustment circuit for adjusting the negative threshold voltage of the second comparator.

[0009] In one embodiment of the present invention, the second resistor adjustment circuit includes: a third resistor circuit and a fourth resistor circuit; the first terminal of the third resistor circuit and the first terminal of the fourth resistor circuit are connected and connected to the negative input terminal of the second comparator; the second terminal of the third resistor circuit is connected to an external power supply, and the second terminal of the fourth resistor circuit is grounded; the third resistor circuit and / or the fourth resistor circuit includes an adjustable resistor.

[0010] In one embodiment of the present invention, the power switch circuit further includes a sampling resistor.

[0011] In one embodiment of the present invention, the delay controller includes a timer chip.

[0012] In one embodiment of the present invention, the delay controller further includes a delay resistor R33 connected to the timer chip and a capacitor circuit connected to the timer chip and the delay resistor respectively.

[0013] In one embodiment of the present invention, the capacitor circuit includes a first capacitor, a second capacitor, and a third capacitor; the first terminal of the first capacitor and the first terminal of the second capacitor are respectively connected to the delay resistor, and the second terminals of the first capacitor and the second capacitor are grounded; the first terminal of the third capacitor is connected to the timer chip, and the second terminal is grounded.

[0014] As described above, the bidirectional current limiting circuit of the present invention has the following beneficial effects:

[0015] This invention enables precise control and limitation of bidirectional current without requiring overly complex operations, effectively reducing the complexity of product development and production costs. Furthermore, this invention has a wide range of applications, suitable for various products requiring current limiting, and can also serve as a circuit protection measure. Attached Figure Description

[0016] Figure 1 The diagram shown is a schematic diagram of the circuit structure of a bidirectional current limiting circuit in one embodiment of the present invention.

[0017] 100 Bidirectional Current Limiting Circuit

[0018] 110 Load Connection Terminal

[0019] 120 Power Switch Circuit

[0020] 130 comparator circuit

[0021] 140 Switching Circuit

[0022] 150 Delay Circuit

[0023] 160 Switch Control Circuit Detailed Implementation

[0024] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0025] It should be understood that the structures, proportions, sizes, etc., illustrated in the accompanying drawings are merely for illustrative purposes to aid those skilled in the art and are not intended to limit the implementation of the invention. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effectiveness and purpose of the invention, should still fall within the scope of the disclosed technical content. The following detailed description should not be considered restrictive, and the scope of the embodiments of this application is limited only by the claims of the published patents. The terminology used herein is for describing specific embodiments only and is not intended to limit the application. Spatial terms such as "upper," "lower," "left," "right," "below," "below," "lower part," "above," "upper part," etc., may be used in the text to illustrate the relationship between one element or feature shown in the figures and another element or feature.

[0026] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," "fixing," and "holding" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0027] Furthermore, as used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context indicates otherwise. It should be further understood that the terms “comprising,” “including,” indicate the presence of the stated feature, operation, element, component, item, kind, and / or group, but do not preclude the presence, occurrence, or addition of one or more other features, operations, elements, components, items, kinds, and / or groups. The terms “or” and “and / or” as used herein are interpreted as inclusive, or mean any one or any combination thereof. Thus, “A, B, or C” or “A, B, and / or C” means “any one of: A; B; C; A and B; A and C; B and C; A, B, and C.” Exceptions to this definition arise only when combinations of elements, functions, or operations are inherently mutually exclusive in some manner.

[0028] This invention proposes a technical solution for precisely limiting current through pure hardware, which can achieve precise control of the current limit without cumbersome operation.

[0029] To make the objectives, technical solutions, and advantages of this embodiment clearer, the technical solutions in the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are only for explaining the present invention and are not intended to limit the invention.

[0030] This enables multiple nodes in a low-power Bluetooth star network to execute specific commands simultaneously.

[0031] The following will describe in detail the principle and implementation of a bidirectional current limiting circuit and server of this embodiment, so that those skilled in the art can understand the bidirectional current limiting circuit and server of this embodiment without creative effort.

[0032] Example 1

[0033] This embodiment provides a bidirectional current limiting circuit. Figure 1 The diagram shown illustrates the circuit structure of the bidirectional current limiting circuit 100 in this embodiment. The bidirectional current limiting circuit 100 provided in this embodiment is used to connect to the load to be current-limited, precisely limiting the excessively high and low currents of the load.

[0034] Specifically, such as Figure 1 As shown, the bidirectional current limiting circuit 100 includes: a load connection terminal 110, a power switch circuit 120, a comparator circuit 130, a switch group circuit 140, a delay circuit 150, and a switch control circuit 160.

[0035] The bidirectional current limiting circuit 100 of this embodiment will be described in detail below.

[0036] In this embodiment, the load connection terminal 110 (CN1) has a load connection terminal 110 for connecting to the load to be current-limited, that is, the load to be current-limited is connected to the load connection terminal 110 (CN1). In this embodiment, the load connection terminal 110 has a power connection terminal and a switch connection terminal, and the power connection terminal is connected to the power supply (…). Figure 1 (As shown in the diagram, 24V), the switch connection terminal is connected to the power switch circuit 120.

[0037] In this embodiment, the power switch circuit 120 includes a three-terminal device M1. The main purpose of the three-terminal device M1 is to trigger conduction or cutoff after receiving a control signal from the control terminal. Specifically, it can be a MOSFET or a transistor. In this embodiment, the power switch circuit 120 includes a MOSFET.

[0038] In addition, in this embodiment, the power switch circuit 120 also includes a sampling resistor R10.

[0039] In this embodiment, the comparator circuit 130 includes a first comparator U1A and a second comparator U1B; the first comparator U1A and the second comparator U1B can be comparators composed of operational amplifiers, or they can be composed of logic devices with similar functions. This embodiment does not make specific limitations.

[0040] The negative input terminal of the first comparator U1A and the positive input terminal of the second comparator are respectively connected to the output terminal of the power switch circuit 120, and the output terminal IN1 of the first comparator and the output terminal IN2 of the second comparator are respectively connected to the switch group circuit 140.

[0041] In this embodiment, the positive input terminal of the first comparator U1A is connected to a first resistor adjustment circuit, which is used to adjust the positive threshold voltage of the first comparator U1A.

[0042] Specifically, in this embodiment, the first resistor adjustment circuit includes: a first resistor circuit and a second resistor circuit; the first terminal of the first resistor circuit and the first terminal of the second resistor circuit are connected and connected to the positive input terminal of the first comparator; the second terminal of the first resistor circuit is connected to an external power supply, and the second terminal of the second resistor circuit is grounded. The first resistor circuit and / or the second resistor circuit include adjustable resistors.

[0043] For example, the first resistor circuit includes resistors R1 and R2. One of resistors R1 and R2 can be an adjustable resistor, while the other can be omitted. Alternatively, the first resistor circuit can include only resistor R1 or resistor R2, and either resistor R1 or resistor R2 can be an adjustable resistor. This embodiment does not limit whether the resistance values ​​of resistors R1 and R2 are adjustable or whether they are connected in parallel.

[0044] The second resistor circuit includes a resistor R3, which can be an adjustable resistor.

[0045] In this embodiment, the negative input terminal of the second comparator U1B is connected to a second resistor adjustment circuit, which is used to adjust the negative threshold voltage of the second comparator U1B.

[0046] Specifically, in this embodiment, the second resistor adjustment circuit includes a third resistor circuit and a fourth resistor circuit; the first terminal of the third resistor circuit and the first terminal of the fourth resistor circuit are connected and connected to the negative input terminal of the second comparator; the second terminal of the third resistor circuit is connected to an external power supply, and the second terminal of the fourth resistor circuit is grounded. The third resistor circuit and / or the fourth resistor circuit include an adjustable resistor.

[0047] For example, the third resistor circuit includes resistors R6 and R7. One of resistors R6 and R7 can be an adjustable resistor, while the other can be omitted. The first resistor circuit can also include only resistor R6 or R7, which can be adjustable. This embodiment does not limit whether the resistance values ​​of resistors R6 and R7 are adjustable or whether they are connected in parallel.

[0048] The second resistor circuit includes a resistor R8, which can be an adjustable resistor.

[0049] In this embodiment, the switch group circuit 140 includes a first switch Q9 and a second switch Q6 connected in series. The first switch Q9 and the second switch Q6 are three-terminal devices. The main purpose of the three-terminal devices is to trigger conduction or cutoff upon receiving a control signal at the control terminal. Specifically, MOSFETs or transistors can be selected. In this embodiment, the first switch Q9 and the second switch Q6 are transistors.

[0050] Specifically, the first switch Q9 is connected to the output terminal of the first comparator, and the second switch Q6 is connected to the output terminal of the second comparator. The first switch Q9 and the second switch Q6 are connected in series to form an output terminal IN.

[0051] When the circuit current is normal, the output IN1 of the first comparator U1A is a positive voltage, and the output IN2 of the second comparator U1B is also a positive voltage. At this time, both the first switch Q9 and the second switch Q6 are turned on, and the output IN at the output terminal is high. When the circuit current exceeds the maximum current threshold or is less than the minimum current threshold, the output IN1 of the first comparator U1A and the output IN2 of the second comparator U1B cannot be positive voltages simultaneously. For example, when the current flowing through the sampling resistor R10 is too large, the voltage at the negative terminal of the first comparator U1A will be higher than the positive threshold voltage, and the first comparator U1A will output a low level. At this time, the first switch Q9 and the second switch Q6 cannot be turned on simultaneously, and the output IN at the output terminal is low.

[0052] In this embodiment, the delay module includes a delay detection switch and a delay controller.

[0053] Specifically, the delay detection switch includes a three-terminal device. The main purpose of the three-terminal device is to trigger conduction or cutoff upon receiving a control signal at the control terminal. Specifically, a MOSFET or a transistor can be selected. In this embodiment, the delay detection switch Q5 includes a transistor.

[0054] In this embodiment, the delay detection switch Q5 is connected to the output terminal IN formed by the series connection of the first switch Q9 and the second switch Q6. The delay controller is controlled according to the signal of the output terminal IN. When both the first switch Q9 and the second switch Q6 are on and the output terminal IN is high, the delay detection switch Q5 is off. When the first switch Q9 and the second switch Q6 are not on simultaneously and the output terminal IN is low, the delay detection switch Q5 is on.

[0055] In this embodiment, the delay controller includes a timer chip U6. The timer chip U6 may be a 555 timer, or it may be implemented by a similar chip with delay function; this embodiment does not limit the implementation.

[0056] When the delay detection switch Q5 is off, the timer chip U6 does not work and the output is low; when the delay detection switch Q5 is on, the timer chip U6 starts, the output level changes, and the output is high.

[0057] In this embodiment, the delay controller further includes a delay resistor R33 connected to the timer chip U6 and a capacitor circuit connected to the timer chip U6 and the delay resistor R33 respectively.

[0058] Specifically, in this embodiment, the capacitor circuit includes a first capacitor C7, a second capacitor C9, and a third capacitor C6. The first terminals of the first capacitor C7 and the second capacitor C9 are respectively connected to the delay resistor R33, and the second terminals of the first capacitor C7 and the second capacitor C9 are grounded. The first terminal of the third capacitor C6 is connected to the timer chip U6, and the second terminal is grounded.

[0059] In this embodiment, the timer chip U6 ensures the correct timing of the circuit operation. When the load current exceeds or falls below a preset value, it receives a signal from the comparator output, causing the delay detection switch Q5 to conduct and triggering the 555 timer. After a delay, pin 3 outputs a high level, turning on the three-terminal device Q1. This disconnects the operation at the three-terminal device M1, and the load is in an open-circuit state. Otherwise, the correct timing cannot be met, and the circuit will be in a vicious cycle of high-speed turn-on and turn-off. The phenomenon manifested is that the load at the load connection terminal 110 (CN1) is always operating at a voltage lower than VDD. When the current exceeds the limit, the load power supply cannot be completely cut off.

[0060] In this embodiment, the switch control circuit 160 is connected to the delay controller and the power switch circuit 120 respectively, and controls the power switch circuit 120 to work according to the delay output signal OUT1 of the delay controller.

[0061] Specifically, the switch control circuit 160 includes a three-terminal device Q1. The main purpose of the three-terminal device Q1 is to trigger conduction or cutoff after receiving a control signal from the control terminal. Specifically, a MOSFET or a transistor can be selected. In this embodiment, the switch control circuit 160 includes a transistor.

[0062] As can be seen from the above, in this embodiment, the first comparator U1A composed of operational amplifiers, the second comparator U1B, the two first switches Q9, the second switch Q6, and the AND gate circuit composed of a 555 timer are combined to achieve the effect of simultaneously and accurately limiting high current and low current.

[0063] The 555 timer ensures correct timing of the circuit operation. When the load current exceeds or falls below a preset value, it receives a signal from the comparator output, causing Q5 to conduct and triggering the 555 timer. After a delay, pin 3 outputs a high level, turning on Q1. This cuts off the MOSFET at M1, simultaneously opening the load circuit. Otherwise, the correct timing cannot be met, and the circuit will be in a vicious cycle of high-speed turn-on and turn-off. The symptom is that the load at CN1 continuously operates with a voltage below VDD. When the current exceeds the limit, the load power supply cannot be completely cut off.

[0064] When a load is connected to terminal 110 (CN1), assuming the load's internal resistance is R0, if the required load operating current I does not exceed Imax, i.e., I < Imax, At this point, the negative terminal voltage V- and the maximum current of the comparator can be calculated using the following formulas:

[0065] V-=R10×Imax

[0066]

[0067]

[0068]

[0069]

[0070] Wherein, resistor R0 represents the internal resistance of the load connected to the load to be current limited; VDD is the voltage of the power supply connected to the load to be current limited; and R10 is the sampling resistor.

[0071] Analyzing the first comparator U1A, according to the rules of operational amplifiers:

[0072] The positive voltage V+ of the first comparator U1A can be calculated using the following formula:

[0073] V+ = V-;

[0074] I < Imax

[0075]

[0076]

[0077]

[0078] Assuming the load current is to be limited to no more than 700mA, i.e., Imax≈700mA, the sampling resistor R10 is selected to be 0.05Ω, and the AVCC voltage is 15V.

[0079] After substituting into the formula, the ratio of resistors R1+R2 to R3 can be calculated: You can choose fixed resistors R1 (21.5kΩ), R2 (200Ω), and R3 (51Ω). If one of resistors R1 or R2 is adjustable, the other can be omitted. Resistor R3 can also be achieved by using two resistors connected in parallel or series to achieve the desired resistance ratio.

[0080] Analyzing op-amp U1B, according to the rules of operational amplifiers:

[0081] V+ = V-;

[0082] To limit the load's operating current to no less than 130mA (i.e., Imin≈130mA), the sampling resistor R10 should be 0.05Ω, and the AVCC voltage should be 15V.

[0083] Minimum current After substituting into the formula, the ratio of R6+R7 to R8 can be calculated: You can fix the resistors R6 at 21.5kΩ, R7 at 200Ω, and R8 at 10Ω. If one of the resistors R6 or R7 is an adjustable resistor, the other can be omitted. The resistor at R8 can also be achieved by using two resistors connected in parallel or in series to achieve the desired resistance ratio.

[0084] I > Imin

[0085]

[0086]

[0087]

[0088] The function of the 555 timer is to ensure the correct timing of the circuit operation. When the load current exceeds the preset current value, the signal from the comparator output turns on Q5, triggering the 555 timer. After a delay, pin 3 outputs a high level, turning on Q1. This cuts off the operation of the MOSFET at M1, and the load is in an open-circuit state. Otherwise, the correct timing cannot be met, and the circuit will be in a vicious cycle of high-speed turn-on and turn-off. The symptom is that the load at CN1 is constantly operating at a voltage lower than VDD. When the current exceeds the limit, the power supply to the load cannot be completely cut off.

[0089] The delay time of the 555 circuit is:

[0090]

[0091]

[0092]

[0093] t = R33 * C7 * 1.1;

[0094] Uc is the voltage across capacitor C7; one end of capacitor C7 is connected to the CONT pin of the 555 timer chip; one end of resistor R33 is connected to the DISCH and THRES pins of the 555 timer chip; the other end of capacitor C7 is connected to the other end of resistor R33; Vcc is the power supply VCC connected to the power supply terminal of the 555 timer chip. As shown in the formula, the delay time t depends on resistor R33 and capacitor C7, and can be adjusted according to the required delay time of the circuit.

[0095] When the current I at R10 is detected to be between Imin and Imax (i.e., Imin < I < Imax), the output IN1 of U1A is a positive voltage, and the output IN2 of UA1B is also a positive voltage. At this time, both the first switch Q9 and the second switch Q6 are turned on, resulting in a high level output for IN. The delay detection switch Q5 is turned off, and the output of the 555 timer is low. The entire circuit operates normally. However, when I is too large (exceeding Imax) or too small (below Imin), IN1 and IN2 cannot simultaneously output positive voltages. In this case, the second switch Q6 and the first switch Q9 cannot be turned on simultaneously, resulting in a low level output for IN. The delay detection switch Q5 is turned on, and the output level of the 555 timer changes. This causes the three-terminal device M1 to be turned off, thereby cutting off the load power supply at the load connection terminal 110 (CN1), thus achieving the purpose of simultaneously limiting excessively high and low currents.

[0096] That is, when the current of the load to be current limited exceeds the maximum current or is lower than the minimum current, the first switch Q9 and the second switch Q6 cannot be turned on at the same time and the output terminal outputs a low level. The delay detection switch is turned on, controlling the delay controller to start. The switch control circuit 160 controls the power switch circuit 120 to be turned off according to the delay control signal output by the delay controller, thereby cutting off the power supply from the load connection terminal 110 to the load to be current limited.

[0097] The experiment requires at least an electronic load tester and a power supply. First, the power supply is used to input the power voltage to the sample, and the electronic load tester is used as a simulated load connected to terminal CN1. The resistance of the load tester is reduced to gradually increase its output current. The above operation is repeated to test 16 samples. The output current values ​​before sample protection are as follows: 695mA, 696mA, 693mA, 701mA, 700mA, 697mA, 693mA, 701mA, 697mA, 703mA, 705mA, 698mA, 698mA, 706mA, 703mA, 698mA. Increase the resistance of the load cell to gradually decrease its output current. Repeat the above operation to test 16 samples. The output current values ​​of the samples before protection were observed to be: 131mA, 133mA, 132mA, 130mA, 130mA, 129mA, 128mA, 126mA, 127mA, 131mA, 130mA, 130mA, 129mA, 127mA, 125mA, and 123mA. The experimental data shows that the error is only within ±7mA. The error analysis points to: the difference in the internal resistance of the MOSFET at M1 due to the influence of temperature and humidity, the difference in the resistance values ​​of the components used, and the error caused by the selected resistance value and the theoretical ratio. The experimental data can effectively and accurately limit the current.

[0098] In summary, this invention can precisely control and limit the magnitude of bidirectional current without requiring overly cumbersome operations, effectively reducing the complexity of product development and production costs. Furthermore, this invention has a wide range of applications, suitable for various products requiring current limiting, and can also serve as a circuit protection device. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and possesses high industrial applicability.

[0099] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A bidirectional current limiting circuit for connection to a load to be current limited, characterized in that: The bidirectional current limiting circuit includes: a load connection terminal, a power switch circuit, a comparator circuit, a switch group circuit, a delay circuit, and a switch control circuit. The load connection terminal has a load connection terminal for connecting to the load to be current limited, and the load connection terminal has a power connection terminal and a switch connection terminal. The power connection terminal is connected to the power supply, and the switch connection terminal is connected to the power switch circuit. The comparator circuit includes a first comparator and a second comparator; the negative input terminal of the first comparator and the positive input terminal of the second comparator are respectively connected to the output terminal of the power switch circuit, and the output terminals of the first comparator and the second comparator are respectively connected to the switch group circuit; a first resistor adjustment circuit is connected to the positive input terminal of the first comparator for adjusting the positive threshold voltage of the first comparator; a second resistor adjustment circuit is connected to the negative input terminal of the second comparator for adjusting the negative threshold voltage of the second comparator. The switch group circuit includes a first switch and a second switch connected in series. The first switch is connected to the output terminal of the first comparator, and the second switch is connected to the output terminal of the second comparator. The first switch and the second switch are connected in series to form an output terminal. The delay circuit includes a delay detection switch and a delay controller. The delay detection switch is connected to the output terminal formed by the first switch and the second switch connected in series, and the delay controller is controlled to work according to the signal of the output terminal. The switch control circuit is connected to the delay controller and the power switch circuit respectively, and controls the power switch circuit to work according to the delay output signal of the delay controller. When the current of the load to be current limited exceeds the maximum current or falls below the minimum current, the first switch and the second switch cannot be turned on simultaneously and the output terminal outputs a low level. The delay detection switch is turned on, controlling the delay controller to start. The switch control circuit controls the power switch circuit to turn off according to the delay control signal output by the delay controller, thereby cutting off the power supply from the load connection terminal to the load to be current limited.

2. The bidirectional current limiting circuit according to claim 1, characterized in that: The power switch circuit includes a MOSFET or a transistor; the first switch and the second switch include MOSFETs or transistors; the delay detection switch includes a MOSFET or a transistor; and the switch control circuit includes a MOSFET or a transistor.

3. The bidirectional current limiting circuit according to claim 1, characterized in that: The first resistor adjustment circuit includes: a first resistor circuit and a second resistor circuit; the first terminal of the first resistor circuit and the first terminal of the second resistor circuit are connected and connected to the positive input terminal of the first comparator; the second terminal of the first resistor circuit is connected to an external power supply, and the second terminal of the second resistor circuit is grounded; the first resistor circuit and / or the second resistor circuit includes an adjustable resistor.

4. The bidirectional current limiting circuit according to claim 1, characterized in that: The second resistor adjustment circuit includes a third resistor circuit and a fourth resistor circuit; the first terminal of the third resistor circuit and the first terminal of the fourth resistor circuit are connected and connected to the negative input terminal of the second comparator; the second terminal of the third resistor circuit is connected to an external power supply, and the second terminal of the fourth resistor circuit is grounded; the third resistor circuit and / or the fourth resistor circuit includes an adjustable resistor.

5. The bidirectional current limiting circuit according to claim 1 or 2, characterized in that: The power switch circuit also includes a sampling resistor.

6. The bidirectional current limiting circuit according to claim 1, characterized in that: The delay controller includes a timer chip.

7. The bidirectional current limiting circuit according to claim 6, characterized in that: The delay controller also includes a delay resistor connected to the timer chip and a capacitor circuit connected to the timer chip and the delay resistor respectively.

8. The bidirectional current limiting circuit according to claim 7, characterized in that: The capacitor circuit includes a first capacitor, a second capacitor, and a third capacitor; the first terminal of the first capacitor and the first terminal of the second capacitor are respectively connected to the delay resistor, and the second terminals of the first capacitor and the second capacitor are grounded; the first terminal of the third capacitor is connected to the timer chip, and the second terminal is grounded.

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