Thin film bulk acoustic resonator with multi-layer composite substrate and method of manufacturing the same

Abstract

The application provides a film bulk acoustic resonator with a multilayer composite substrate and a preparation method thereof, which comprises a first substrate, a second substrate, a third substrate, a bottom electrode, a piezoelectric layer and a top electrode; the third substrate, the second substrate and the first substrate are sequentially arranged to form a composite substrate; the bottom electrode is arranged on the third substrate; the piezoelectric layer is arranged on the bottom electrode, and the piezoelectric layer is connected with the bottom electrode and the third substrate; a cavity structure is formed among the third substrate, the bottom electrode and the piezoelectric layer; the top electrode is arranged on the piezoelectric layer; a release hole opening is arranged on the piezoelectric layer, and the release hole opening is communicated with the cavity. The application can obtain a cavity with high mechanical stability and almost no residues, and can limit the parasitic capacitance by arranging the composite substrate with the resistivity gradually increasing, and has the advantages of simple process and easy implementation.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of resonators, in particular to a thin film bulk acoustic resonator with a multi-layer composite substrate and a preparation method thereof. BACKGROUND

[0002] With the rapid development of wireless communication technology, the communication frequency band is increasingly high frequency and dense. The trend of high frequency and dense requires high requirements of high communication frequency, large bandwidth and dense communication frequency band division, so the filter of the radio frequency front end plays a crucial role in the wireless communication system. The filter is composed of a plurality of resonators in series and parallel, and the cavity is a key structure of the bulk acoustic resonator, which can effectively form acoustic isolation between the resonator and the cavity to suppress the escape of resonator energy to the substrate.

[0003] The prior art mainly sets the cavity in the substrate, backside grooving or replaces the cavity with SMR structure to achieve acoustic isolation. As shown in Figure 15 For the cavity in the substrate, the sacrificial layer filled in the cavity reacts completely with the wet chemical solution to form the cavity structure in the schematic diagram. The film layer on the cavity is prone to defects such as tympanic membrane, film cracking and even collapse during or after the cavity release process due to long-term immersion in the chemical solution and stress. In addition, the lack of multi-layer composite substrate also leads to the problem of electrical energy leakage. Figure 16 As shown in Figure 17 The backside grooving technology is mainly realized by wet etching technology. In actual process, the backside substrate is more than 100 um thick, especially the isotropic characteristics of the wet etching technology make it difficult to control the shape, angle and position of the groove. In addition, the etchant has the risk of corroding the dielectric layer, so it is difficult to realize the acoustic isolation function of the filter and the substrate.

[0004] The patent document with the publication number CN107809221A discloses a cavity type film bulk acoustic resonator and a preparation method thereof. The cavity type film bulk acoustic resonator comprises a support substrate, a support layer, a film structure layer and a top electrode. The support substrate, the support layer and the film structure layer form an air cavity, and the support substrate is an air cavity bottom. The support layer is arranged at the edge of the surface of the support substrate to form an air cavity wall. The film structure layer is arranged on the support substrate to form an air cavity cover. The film structure layer comprises a bottom electrode and a piezoelectric layer from bottom to top, and the top electrode is arranged on the piezoelectric layer. However, the technical solution of the patent document is different from the present application, and there are three differences: a, the structure is different, that is, the cavity of the patent document is surrounded by the support layer, the bottom electrode, the piezoelectric layer and the substrate; b, the cavity preparation method is different, that is, the cavity of the patent document is formed by bonding two substrates (one of which has been removed by peeling technology); c, the substrate is different, the patent document is two-layer substrate, and the present application is three-layer composite substrate, and the resistivity is gradually increased; in addition, the Au and Sn in the patent document have very high ductility, and the use of Au and Sn as the support layer will cause the deformation of the support layer and even the collapse of the cavity due to the temperature rise during the operation of the device, resulting in the failure of the device. The patent document uses an etching solution containing HF to remove and prepare the substrate, but in fact, the support substrate has been bonded with the preparation substrate during the removal and preparation of the substrate, and because the materials of the support substrate and the preparation substrate are both Si and react with the etching solution containing HF, the support substrate is also corroded during the removal of the preparation substrate, especially the anisotropy of the wet etching process, which will finally affect or even destroy the mechanical stability of the cavity structure. SUMMARY

[0005] In view of the defects in the prior art, the purpose of the present application is to provide a film bulk acoustic resonator with a multi-layer composite substrate and a preparation method thereof.

[0006] The film bulk acoustic resonator with a multi-layer composite substrate provided by the present application comprises a first substrate, a second substrate, a third substrate, a bottom electrode, a piezoelectric layer and a top electrode.

[0007] The third substrate, the second substrate and the first substrate are arranged in sequence to form a composite substrate.

[0008] The bottom electrode is arranged on the third substrate, the piezoelectric layer is arranged on the bottom electrode, and the piezoelectric layer is connected with the bottom electrode and the third substrate.

[0009] A cavity structure is formed between the third substrate, the bottom electrode and the piezoelectric layer, and the top electrode is arranged on the piezoelectric layer.

[0010] A release hole opening is arranged on the piezoelectric layer, and the release hole opening communicates with the cavity.

[0011] Preferably, the resistivity of the first substrate, the second substrate and the third substrate increases step by step.

[0012] Preferably, the first substrate is a silicon wafer, the second substrate is a silicon wafer, and the third substrate is a SiO2 layer or a Si3N4 layer.

[0013] The resistivity of the first substrate is 50-1000 Ω·cm, the resistivity of the second substrate is 2000 Ω·cm or above, and the resistivity of the third substrate is 10 10 Ω·cm or above.

[0014] The application also provides a preparation method of a film bulk acoustic resonator with a multi-layer composite substrate, based on the film bulk acoustic resonator with a multi-layer composite substrate, comprising the following steps:

[0015] Step 1: forming a second substrate on a first substrate to form a composite substrate with the first substrate and the second substrate;

[0016] Step 2: forming a third substrate on the second substrate to form a composite substrate with the first substrate, the second substrate and the third substrate;

[0017] Step 3: forming a sacrificial layer on the third substrate and patterning the sacrificial layer;

[0018] Step 4: forming a bottom electrode on the sacrificial layer and patterning the bottom electrode;

[0019] Step 5: forming a piezoelectric layer on the bottom electrode, and then forming a top electrode on the piezoelectric layer;

[0020] Step 6: opening, the bottom electrode is opened to expose the bottom electrode, and the release hole is opened to expose the sacrificial layer;

[0021] Step 7: completing the cavity release by etching.

[0022] Preferably, in step 1, the first substrate is a silicon wafer, and the second substrate is set by any one of the following two ways:

[0023] Way one: a silicon wafer is set on the first substrate, the silicon wafer forms a composite substrate with the first substrate through silicon bonding, and the silicon wafer serves as the second substrate;

[0024] Way two: a single crystal Si thin film is grown on the first substrate through MOCVD process, ALD process or PECVD process, and the grown single crystal Si thin film serves as the second substrate.

[0025] Preferably, in step 2, the third substrate is set by any of the following two ways:

[0026] Way 1: growing a SiO2 film or a Si3N4 film on the second substrate by a PECVD process or a PVD process, the SiO2 film or the Si3N4 film as the third substrate;

[0027] Way 2: forming a SiO2 layer on part of the second substrate by a thermal oxidation process, the formed SiO2 layer as the third substrate.

[0028] Preferably, in step 3, the sacrificial layer is grown by a MOCVD process, an ALD process or a PECVD process;

[0029] The patterning of the sacrificial layer is completed by the following processes in sequence: gluing, exposure, development, RIE or IBE, dry stripping and / or wet stripping, and a Plasma cleaning process;

[0030] The sacrificial layer is made of Si, and the Plasma cleaning process is an H2 Plasma treatment process.

[0031] Preferably, in step 4, the bottom electrode is a single-layer structure or a multi-layer structure;

[0032] When the bottom electrode is a single-layer structure, any of the following materials is selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt;

[0033] When the bottom electrode is a multi-layer structure, at least two of the following materials are selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt;

[0034] The patterning of the bottom electrode is completed by the following processes in sequence: gluing, exposure, development, RIE or IBE, dry stripping and / or wet stripping.

[0035] Preferably, in step 5, the piezoelectric layer is made of AlN, and the piezoelectric layer is grown on the bottom electrode by a metal type or a poisoned type Sputter process;

[0036] The top electrode is a single-layer structure or a multi-layer structure;

[0037] When the top electrode is a single-layer structure, any of the following materials is selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt;

[0038] When the top electrode is a multi-layer structure, at least two of the following materials are selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt;

[0039] The patterning of the top electrode is completed by sequentially performing the following steps: gluing, exposure, development, RIE or IBE, dry stripping and / or wet stripping.

[0040] Preferably, in step 6, the opening is completed by sequentially performing the following steps: gluing, exposure, development, RIE or IBE, dry stripping and / or wet stripping.

[0041] In step 7, the cavity is released by dry etching, the etching gas is XeF2, the XeF2 contacts the sacrificial layer through the release hole, chemically reacts with the sacrificial layer and does not chemically react with the bottom electrode, the top electrode, the piezoelectric layer and the third substrate.

[0042] Compared with the prior art, the present application has the following advantages:

[0043] 1. The composite substrate has very high resistivity and increases from bottom to top, effectively suppresses the leakage of electric energy, improves the Q value of the resonator, suppresses the aggregation of carriers and forms a potential difference with the electrode, thereby suppressing the parasitic capacitance to a certain extent;

[0044] 2. The preparation method of the present application can obtain a cavity with high mechanical stability, thereby avoiding the collapse or film cracking of the device during operation;

[0045] 3. The present application can obtain a cavity with almost no residue, thereby ensuring the accuracy of the characteristic frequency of the device and avoiding the generation of unnecessary transverse mode noise. BRIEF DESCRIPTION OF DRAWINGS

[0046] Other features, objects and advantages of the present application will become more apparent from the following detailed description of non-limiting embodiments, read in conjunction with the accompanying drawings:

[0047] Figure 1 A schematic diagram showing the positional relationship between the electrode boundary, the cavity boundary and the release hole;

[0048] Figure 2 A Figure 1 A sectional view along line A-A;

[0049] Figure 3 A Figure 1 A sectional view along line B-B;

[0050] Figures 4 to 14 A schematic diagram of the structure forming process when prepared by the preparation method of the present application;

[0051] Figure 15 A schematic diagram of the structure of the cavity in the substrate in the prior art;

[0052] Figure 16This is a schematic diagram of the structure in the prior art where SMR replaces the cavity;

[0053] Figure 17 This is a schematic diagram of the back groove structure in the prior art.

[0054] The diagram shows:

[0055] First substrate 101, cavity 106

[0056] Second substrate 102 Top electrode 107

[0057] Third substrate 103 Release hole opening 108

[0058] Bottom electrode 104, electrode lead area 109

[0059] Piezoelectric layer 105, bottom electrode opening 110 Detailed Implementation

[0060] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the scope of protection of the present invention.

[0061] Example 1

[0062] like Figures 1 to 14 As shown, this embodiment provides a thin-film bulk acoustic wave resonator with a multilayer composite substrate, including a first substrate 101, a second substrate 102, a third substrate 103, a bottom electrode 104, a piezoelectric layer 105, and a top electrode 107. The third substrate 103, the second substrate 102, and the first substrate 101 are stacked sequentially to form a composite substrate. The bottom electrode 104 is disposed on the third substrate 103, and the piezoelectric layer 105 is disposed on the bottom electrode 104. The piezoelectric layer 105 is connected to the bottom electrode 104 and the third substrate 103. A cavity 106 structure is formed between the third substrate 103, the bottom electrode 104, and the piezoelectric layer 105. The top electrode 107 is disposed on the piezoelectric layer 105. The piezoelectric layer 105 is provided with a bottom electrode opening 110 and a release hole opening. The bottom electrode 104 is electrically connected to an external resonator or an external circuit through the bottom electrode opening 110. The release hole opening communicates with the cavity 106. The resistivity of the first substrate 101, the second substrate 102, and the third substrate 103 increases progressively.

[0063] This embodiment also provides a method for fabricating a thin-film bulk acoustic wave resonator with a multilayer composite substrate, which, based on the above-mentioned thin-film bulk acoustic wave resonator with a multilayer composite substrate, includes the following steps:

[0064] Step 1: forming a second substrate 102 on a first substrate 101, so that the first substrate 101 and the second substrate 102 form a composite substrate; the first substrate 101 is a silicon wafer, and the second substrate 102 is set by any one of the following two ways:

[0065] Way one: setting a silicon wafer on the first substrate 101, and the silicon wafer forms the composite substrate with the first substrate 101 through silicon bonding, and the silicon wafer is the second substrate 102;

[0066] Way two: growing a single crystal Si film on the first substrate 101 through a MOCVD process, an ALD process, or a PECVD process, and the grown single crystal Si film is the second substrate 102.

[0067] Step 2: forming a third substrate 103 on the second substrate 102, so that the first substrate 101, the second substrate 102, and the third substrate 103 form a composite substrate; the third substrate 103 is set by any one of the following two ways:

[0068] Way one: growing a SiO2 film or a Si3N4 film on the second substrate 102 through a PECVD process or a PVD process, and the SiO2 film or the Si3N4 film is the third substrate 103;

[0069] Way two: forming a SiO2 layer on part of the second substrate 102 through a thermal oxidation process, and the formed SiO2 layer is the third substrate 103.

[0070] Step 3: forming a sacrificial layer on the third substrate 103 and patterning the sacrificial layer; the sacrificial layer is grown through a MOCVD process, an ALD process, or a PECVD process;

[0071] The patterning of the sacrificial layer is completed through the following processes in sequence: gluing, exposure, development, RIE or IBE, dry glue removal and / or wet glue removal, and a Plasma cleaning process. That is, the patterning can be achieved through the following ways: a, gluing→exposure→development→RIE→dry glue removal, and a Plasma cleaning process; b, gluing→exposure→development→RIE→wet glue removal, and a Plasma cleaning process; c, gluing→exposure→development→RIE→dry glue removal+wet glue removal, and a Plasma cleaning process; d, gluing→exposure→development→IBE→dry glue removal, and a Plasma cleaning process; e, gluing→exposure→development→IBE→wet glue removal, and a Plasma cleaning process; f, gluing→exposure→development→IBE→dry glue removal+wet glue removal, and a Plasma cleaning process.

[0072] The sacrificial layer is made of Si, and the plasma cleaning process is made by H2 plasma treatment process.

[0073] Step 4: forming a bottom electrode 104 on the sacrificial layer, and patterning the bottom electrode 104; the bottom electrode 104 is a single-layer structure or a multi-layer structure.

[0074] When the bottom electrode 104 is a single-layer structure, any one of the following materials is selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt.

[0075] When the bottom electrode 104 is a multi-layer structure, at least two of the following materials are selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt.

[0076] The patterning of the bottom electrode 104 is completed by the following processes in sequence: gluing, exposure, development, RIE or IBE, dry adhesive removal, and / or wet adhesive removal.

[0077] Step 5: forming a piezoelectric layer 105 on the bottom electrode 104, and then forming a top electrode 107 on the piezoelectric layer 105; the piezoelectric layer 105 is made of AlN, and the piezoelectric layer 105 is grown on the bottom electrode 104 by a metal or poisoned sputter process.

[0078] The top electrode 107 is a single-layer structure or a multi-layer structure.

[0079] When the top electrode 107 is a single-layer structure, any one of the following materials is selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt.

[0080] When the top electrode 107 is a multi-layer structure, at least two of the following materials are selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt.

[0081] The patterning of the top electrode 107 is completed by the following processes in sequence: gluing, exposure, development, RIE or IBE, dry adhesive removal, and / or wet adhesive removal.

[0082] Step 6: opening, the bottom electrode 104 is opened to expose the bottom electrode 104, and the release hole 108 is opened to expose the sacrificial layer; the opening is completed by the following processes in sequence: gluing, exposure, development, RIE or IBE, dry adhesive removal, and / or wet adhesive removal.

[0083] Step 7: releasing the cavity 106 by dry etching; the etching gas is XeF2, which contacts the sacrificial layer through the release hole, chemically reacts with the sacrificial layer, and does not chemically react with the bottom electrode 104, the top electrode 107, the piezoelectric layer 105, and the third substrate 103 contacted.

[0084] The first substrate 101 is a silicon wafer, the second substrate 102 is a silicon wafer, and the third substrate 103 is a SiO2 layer or a Si3N4 layer. The first substrate 101 has a resistivity of 50-1000 Ω·cm, the second substrate 102 has a resistivity of 2000 Ω·cm or more, and the third substrate 103 has a resistivity of 1010 Ω·cm or more.

[0085] Example 2

[0086] Those skilled in the art can understand this embodiment as a more specific description of Embodiment 1.

[0087] The embodiment provides a cavity preparation method of a thin film bulk acoustic resonator with a multi-layer composite substrate, relates to the field of resonators, and particularly to the field of Fbar technology.

[0088] As shown in Figure 1 , the positional relationship among the electrode boundary, the cavity boundary, and the release hole is disclosed. The bottom electrode boundary outside the electrode lead area 109 slightly exceeds the top electrode boundary, and the projection thereof in the embodiment can also be coincident or inwardly retracted, that is, the distance by which the top electrode exceeds or inwardly retracts the bottom electrode is 0-10 um. In addition, the electrode boundary is projected in the cavity, and the release hole is projected between the electrode and the cavity boundary, and the number thereof is not limited to the number shown in the figure.

[0089] (1) Composite substrate preparation

[0090] As shown in Figure 4 , the first substrate is a silicon wafer, wherein the first substrate is polycrystalline silicon with a high resistivity, the resistivity is within 50-1000 Ω·cm, and the thickness is within 100-100 um.

[0091] As shown in Figure 5 , the second substrate is a silicon wafer, and is bonded to the first substrate to form a composite substrate; or a single-crystal Si film is grown on the first substrate through a process such as MOCVD / ALD / PECVD; wherein the second substrate has a higher resistivity than the first substrate, and the resistivity is 2000 Ω·cm or more; the second substrate is single-crystal silicon, and the crystal form is any one of <100>, <111>, and <110>; and the thickness of the second substrate is within 100-500 nm.

[0092] As shown in Figure 6As shown, the third substrate is selected as SiO2 or Si3N4. A SiO2 or Si3N4 thin film can be grown on the second substrate using processes such as PECVD / PVD; alternatively, a partial (not all, but meeting the thickness requirements of the second substrate) Si layer can be formed on the second substrate using a thermal oxidation process. The thickness of the third substrate is within the range of 100-500 nm. The third substrate and the sacrificial layer Si grown in the next step have a very high etching selectivity in the subsequent release process, thus protecting the Si of the first and second substrates from being damaged by the etching gas. In particular, the resistivity of SiO2 or Si3N4 can reach as high as 10⁻⁶. 10 With a strength exceeding Ω·cm, it far surpasses the Si material of the first and second substrates, effectively suppressing energy leakage from the substrate during the operation of subsequent devices.

[0093] (2) Preparation of sacrificial layer

[0094] like Figure 7 As shown, the sacrificial layer is grown using Si as the material and through processes such as MOCVD / ALD / PECVD. The thickness of the sacrificial layer is within the range of 0.5-3 μm.

[0095] like Figure 8 As shown, the patterning of the sacrificial layer is completed sequentially through a process of resist coating → exposure → development → RIE or IBE → dry resist removal and / or wet resist removal → plasma cleaning. Among these processes, H2 plasma treatment can be applied to improve the grain orientation of the subsequently grown film. The process of resist coating → exposure → development is a photolithography process, which will be referred to as photolithography in the future.

[0096] (3) Bottom electrode fabrication

[0097] like Figure 9 As shown, the electrode material can be any single layer or any combination of one or more of the following multilayer electrode structures: Mo / Ag / Au / Cu / Ti / Al / Ru / Pt. The bottom electrode patterning is completed by coating, exposure, development, RIE or IBE, dry stripping and / or wet stripping.

[0098] (4) Growth of piezoelectric layer

[0099] like Figure 10 As shown, the piezoelectric layer is made of AlN and grown using the Sputter process. The Sputter process for growing AlN can be divided into metallic and poisoned types, and one of the two can be selected.

[0100] (5) The preparation of the top electrode is similar to that of the bottom electrode, such as... Figure 11 As shown.

[0101] (6) Bottom electrode & release hole opening

[0102] like Figure 12and Figure 13 As shown, the opening is completed sequentially through resist coating → exposure → development → RIE or IBE → dry resist removal and / or wet resist removal, with the bottom electrode opening extending to the bottom electrode exposure; the release hole opening extends to the sacrificial layer Si exposure. The bottom electrode opening is for electrical connection with other resonators or external circuits, and the release hole opening is to allow the etching gas in the next step to react with the sacrificial layer.

[0103] (7) Cavity release

[0104] like Figure 14 As shown, cavity release is achieved through dry etching, where the etching gas is XeF2. After contacting the sacrificial layer Si through the release hole, a chemical reaction occurs at room temperature without reacting with the contacted electrodes, piezoelectric layer, or the third substrate SiO2 or Si3N4. Furthermore, this method can efficiently remove the sacrificial layer Si, thereby suppressing residual Si from causing device center frequency shifts or transverse waves.

[0105] The preparation method described in this invention can obtain a cavity with high mechanical stability, thereby avoiding device collapse or film cracking during operation. It can also obtain a cavity with almost no residue, thus ensuring the accuracy of the device's characteristic frequency and avoiding the generation of unnecessary transverse mode clutter.

[0106] In the description of this application, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0107] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A film bulk acoustic resonator having a multi-layer composite substrate, characterized by, The first substrate (101), the second substrate (102), the third substrate (103), the bottom electrode (104), the piezoelectric layer (105) and the top electrode (107) are sequentially arranged to form a composite substrate. The third substrate (103), the second substrate (102) and the first substrate (101) are sequentially arranged to form a composite substrate. The bottom electrode (104) is arranged on the third substrate (103), the piezoelectric layer (105) is arranged on the bottom electrode (104), and the piezoelectric layer (105) is arranged in connection with the bottom electrode (104) and the third substrate (103). The third substrate (103), the bottom electrode (104) and the piezoelectric layer (105) form a cavity (106) structure, and the top electrode (107) is arranged on the piezoelectric layer (105). The piezoelectric layer (105) is provided with a release hole opening (108) which is in communication with the cavity (106). The resistivity of the first substrate (101), the second substrate (102) and the third substrate (103) gradually increases.

2. The film bulk acoustic resonator having a multi-layer composite substrate of claim 1, wherein, The first substrate (101) is a silicon wafer, the second substrate (102) is a silicon wafer, and the third substrate (103) is a SiO2 layer or a Si3N4 layer. The first substrate (101) has a resistivity of 50 to 1000 Ω·cm, the second substrate (102) has a resistivity of 2000 Ω·cm or more, and the third substrate (103) has a resistivity of 10 10 Ω·cm or more.

3. A method of fabricating a film bulk acoustic resonator having a multi-layer composite substrate, characterized by, The thin film bulk acoustic resonator with a multi-layer composite substrate according to any one of claims 1-2 comprises the following steps: Step 1: forming a second substrate (102) on a first substrate (101) to form a composite substrate with the first substrate (101) and the second substrate (102); Step 2: forming a third substrate (103) on the second substrate (102) to form a composite substrate with the first substrate (101), the second substrate (102) and the third substrate (103); Step 3: forming a sacrificial layer on the third substrate (103) and patterning the sacrificial layer; Step 4: forming a bottom electrode (104) on the sacrificial layer and patterning the bottom electrode (104); Step 5: forming a piezoelectric layer (105) on the bottom electrode (104), and then forming a top electrode (107) on the piezoelectric layer (105); Step 6: opening, the bottom electrode (104) is opened to expose the bottom electrode (104), and the release hole (108) is opened to expose the sacrificial layer; Step 7: completing the cavity (106) release by etching.

4. The method of claim 3, wherein the multilayer composite substrate is prepared by a method comprising: depositing a first layer of a first material on a substrate; depositing a second layer of a second material on the first layer; and depositing a third layer of a third material on the second layer. In step 1, the first substrate (101) is a silicon wafer, and the second substrate (102) is arranged by any one of the following two ways: Method one: a silicon wafer is arranged on the first substrate (101), the silicon wafer is bonded with the first substrate (101) by silicon-silicon bonding to form a composite substrate, and the silicon wafer serves as the second substrate (102); Method two: a single crystal Si thin film is grown on the first substrate (101) by MOCVD process, ALD process or PECVD process, and the grown single crystal Si thin film serves as the second substrate (102).

5. The method of claim 3, wherein the multilayer composite substrate is prepared by a method comprising: depositing a first layer of a first material on a substrate; depositing a second layer of a second material on the first layer; and depositing a third layer of a third material on the second layer. In step 2, the third substrate (103) is set by any of the following two ways: Way 1: growing a SiO2 film or a Si3N4 film on the second substrate (102) by a PECVD process or a PVD process, the SiO2 film or the Si3N4 film as the third substrate (103); Way 2: forming a SiO2 layer on part of the second substrate (102) by a thermal oxidation process, the formed SiO2 layer as the third substrate (103).

6. The method of claim 3, wherein the multilayer composite substrate is prepared by a method comprising: depositing a first layer of a first material on a substrate; depositing a second layer of a second material on the first layer; and depositing a third layer of a third material on the second layer. In step 3, a sacrificial layer is grown by a MOCVD process, an ALD process or a PECVD process; The patterning of the sacrificial layer is completed by the following processes in sequence: gluing, exposure, development, RIE or IBE, dry or wet degumming, and a Plasma cleaning process; The sacrificial layer is made of Si, and the Plasma cleaning process is an H2 Plasma treatment process.

7. The method of claim 3, wherein the multilayer composite substrate is prepared by a method comprising: depositing a first layer of a piezoelectric material on a substrate; depositing a second layer of a piezoelectric material on the first layer; and depositing a third layer of a piezoelectric material on the second layer. In step 4, the bottom electrode (104) is a single-layer structure or a multi-layer structure; When the bottom electrode (104) is a single-layer structure, any of the following materials is selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt; When the bottom electrode (104) is a multi-layer structure, at least two of the following materials are selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt; The patterning of the bottom electrode (104) is completed by the following processes in sequence: gluing, exposure, development, RIE or IBE, dry or wet degumming.

8. The method of claim 3, wherein the multilayer composite substrate is prepared by a method comprising: depositing a first layer of a piezoelectric material on a substrate; depositing a second layer of a piezoelectric material on the first layer; and depositing a third layer of a piezoelectric material on the second layer. In step 5, the piezoelectric layer (105) is made of AlN, and the piezoelectric layer (105) is grown on the bottom electrode (104) by a metal or poisoning Sputter process; The top electrode (107) is a single-layer structure or a multi-layer structure; When the top electrode (107) is a single-layer structure, any of the following materials is selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt; When the top electrode (107) is a multi-layer structure, at least two of the following materials are selected: Mo, Ag, Au, Cu, Ti, Al, Ru, and Pt; The patterning of the top electrode (107) is completed by the following processes in sequence: gluing, exposure, development, RIE or IBE, dry or wet degumming.

9. The method of claim 3, wherein the multilayer composite substrate is prepared by a method comprising: depositing a first layer of a piezoelectric material on a substrate; depositing a second layer of a piezoelectric material on the first layer; and depositing a third layer of a piezoelectric material on the second layer. In step 6, the following processes are used in sequence to complete the opening: gluing, exposure, development, RIE or IBE, dry or wet degumming; In step 7, the cavity (106) is released by dry etching, the etching gas is XeF2, the cavity (106) is in contact with the sacrificial layer through the release hole (108), and the sacrificial layer reacts chemically, while the bottom electrode (104), the top electrode (107), the piezoelectric layer (105), and the third substrate (103) do not react chemically.

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