Switch module, battery management system, battery pack and electric device

Abstract

This application relates to the field of batteries, disclosing a switching module, a battery management system, a battery pack, and an electrical device. The switching module includes a first switching circuit, a voltage conversion circuit, a second switching circuit, a controller, a first port, and a second port. The first switching circuit is connected to both the first and second ports. The voltage conversion circuit is connected to the controller, the first port, and the second switching circuit. The voltage conversion circuit processes the voltage at the first port according to a first control signal output by the controller. The second switching circuit is connected to both the controller and the first switching circuit. The controller controls the on / off state of the second switching circuit to control the on / off state of the first switching circuit. Because the driving voltage supplied to the first switching circuit is adjustable when the first switching circuit is on, it can flexibly change the driving capability of the first switching circuit.

Description

Technical Field

[0001] This application relates to the field of batteries, and in particular to a switch module, a battery management system, a battery pack, and an electrical device. Background Technology

[0002] Currently, in order to control the input and output of a battery, a PMOS (P-Metal-Oxide-Semiconductor) or NMOS (N-Metal-Oxide-Semiconductor) is typically connected in series between the positive terminal of the battery and an external port. Then, a drive control module controls the conduction and cutoff of the PMOS or NMOS to realize the input and output of the battery.

[0003] Drive control modules generally use dedicated integrated chips or drive modules with isolated power supplies. When using dedicated integrated chips, the driving capability is limited by the internal circuitry of the dedicated integrated chip, making expansion inconvenient and the cost relatively high. On the other hand, drive modules with isolated power supplies are not only expensive but also relatively large in size, and have a narrower range of applications. Summary of the Invention

[0004] This application provides a switching module and a battery that can improve the technical problems of limited driving capability, high cost or large size in related technologies.

[0005] The embodiments of this application provide the following technical solutions to improve the related technical problems:

[0006] In a first aspect, embodiments of this application provide a switching module, including a first switching circuit, a voltage conversion circuit, a second switching circuit, a controller, a first port, and a second port. The first switching circuit is connected to the first port and the second port respectively. The voltage conversion circuit is connected to the controller, the first port, and the second switching circuit respectively. The voltage conversion circuit is used to process the voltage of the first port according to a first control signal output by the controller. The second switching circuit is connected to the controller and the first switching circuit respectively. The second switching circuit is used to turn on or off under the control of the controller to control the on and off of the first switching circuit.

[0007] When the second switching circuit is turned on, the voltage conversion circuit is connected to the first switching circuit so that the voltage output by the voltage conversion circuit turns on the first switching circuit. When the second switching circuit is turned off, the voltage conversion circuit is disconnected from the first switching circuit, which turns off the first switching circuit.

[0008] In one optional embodiment, the first switching circuit includes a sixth NMOS transistor and a seventh NMOS transistor. The source of the sixth NMOS transistor is connected to the first port, the drain of the sixth NMOS transistor is connected to the drain of the seventh NMOS transistor, the source of the seventh NMOS transistor is connected to the second port, and the gates of both the sixth and seventh NMOS transistors are connected to the second switching circuit.

[0009] In one optional embodiment, the first switching circuit further includes a first Zener diode, a second Zener diode, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, and a twenty-sixth resistor. The anode of the first Zener diode is connected to one end of the twenty-third resistor and the source of the sixth NMOS transistor, respectively. One end of the twenty-fourth resistor is connected to the gate of the sixth NMOS transistor. The cathode of the first Zener diode, the other end of the twenty-third resistor, and the other end of the twenty-fourth resistor are all connected to the second switching circuit. The anode of the second Zener diode is connected to one end of the twenty-fifth resistor and the source of the seventh NMOS transistor, respectively. One end of the twenty-sixth resistor is connected to the gate of the seventh NMOS transistor. The cathode of the second Zener diode, the other end of the twenty-fifth resistor, and the other end of the twenty-sixth resistor are all connected to the second switching circuit.

[0010] In one optional embodiment, the second switching circuit includes a third NMOS transistor, a fourth NMOS transistor, a first PMOS transistor, a second PMOS transistor, a third diode, a fourth diode, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, and a fourteenth resistor. One end of the fifth resistor is connected to the controller, and the other end of the fifth resistor is connected to one end of the sixth resistor and the gate of the third NMOS transistor. The other end of the sixth resistor and the source of the third NMOS transistor are grounded. The drain of the third NMOS transistor is connected to one end of the seventh resistor. The other end of the seventh resistor is connected to one end of the eighth resistor and the gate of the first PMOS transistor. The other end of the eighth resistor is connected to the source of the first PMOS transistor and the cathode of the third diode. The third diode... The anode is connected to the voltage conversion circuit and the anode of the fourth diode, respectively. The drain of the first PMOS transistor is connected to one end of the ninth resistor. The other end of the ninth resistor is connected to the first switching circuit. One end of the tenth resistor is connected to the controller. The other end of the tenth resistor is connected to one end of the eleventh resistor and the gate of the fourth NMOS transistor. The other end of the eleventh resistor and the source of the fourth NMOS transistor are grounded. The drain of the fourth NMOS transistor is connected to one end of the twelfth resistor. The other end of the twelfth resistor is connected to one end of the thirteenth resistor and the gate of the second PMOS transistor. The other end of the thirteenth resistor is connected to the source of the second PMOS transistor and the cathode of the fourth diode, respectively. The drain of the second PMOS transistor is connected to one end of the fourteenth resistor. The other end of the fourteenth resistor is connected to the first switching circuit.

[0011] In one optional embodiment, the second switching circuit includes a third PMOS transistor, a fifth NMOS transistor, a fifth diode, a sixth diode, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, and a twentieth resistor. One end of the fifteenth resistor is connected to the controller, and the other end of the fifteenth resistor is connected to one end of the sixteenth resistor and the gate of the fifth NMOS transistor. The other end of the sixteenth resistor and the source of the fifth NMOS transistor are grounded. The drain of the fifth NMOS transistor is connected to one end of the seventeenth resistor. The other end of the seventeenth resistor is connected to one end of the eighteenth resistor and the gate of the third PMOS transistor. The other end of the eighteenth resistor and the source of the third PMOS transistor are both connected to the voltage conversion circuit. The drain of the third PMOS transistor is connected to the anode of the fifth diode and the anode of the sixth diode. The cathode of the fifth diode is connected to one end of the nineteenth resistor, and the other end of the nineteenth resistor is connected to the first switching circuit. The cathode of the sixth diode is connected to one end of the twentieth resistor, and the other end of the twentieth resistor is connected to the first switching circuit.

[0012] In one optional embodiment, the voltage conversion circuit includes a boost unit connected to the controller, the first port, and the second switching circuit, respectively. The boost unit is used to boost the voltage of the first port according to the first control signal.

[0013] In one alternative implementation, the boost unit is based on a charge pump circuit, a BOOST boost circuit, or the like.

[0014] In one alternative implementation, the first control signal is a PWM control signal.

[0015] In one optional embodiment, the voltage conversion circuit further includes a voltage feedback unit, which is connected to the boost unit and the controller respectively. The voltage feedback unit is used to feed back the output voltage of the boost unit to the controller, so that when the output voltage of the boost unit is greater than a preset voltage threshold, the controller outputs a second control signal to the second switching circuit to turn on the second switching circuit.

[0016] In one alternative implementation, the second control signal is a low-level signal or a high-level signal.

[0017] In one optional implementation, the preset voltage threshold can be set to be consistent with the driving voltage of the first switching circuit, or it can be set to be slightly greater than or slightly less than the driving voltage of the first switching circuit.

[0018] In one optional embodiment, the boost unit includes a first NMOS transistor, a second NMOS transistor, a PNP transistor, a first diode, a second diode, a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, and a fourth resistor. One end of the first resistor is connected to the controller, and the other end of the first resistor is connected to one end of the second resistor and the gate of the first NMOS transistor. The source of the first NMOS transistor and the other end of the second resistor are grounded. The drain of the first NMOS transistor is connected to one end of the third resistor, the gate of the second NMOS transistor, and the base of the PNP transistor. A first voltage is applied to the drain of the second NMOS transistor and the other end of the third resistor. The source of the second NMOS transistor is connected to the emitter of the PNP transistor and one end of the first capacitor. The other end of the first capacitor is connected to the cathode of the first diode and the anode of the second diode. The anode of the first diode is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the first port. The cathode of the second diode is connected to one end of the second capacitor and the second switching circuit. The other end of the second capacitor and the collector of the PNP transistor are grounded.

[0019] In one optional embodiment, the voltage feedback unit includes a 21st resistor and a 22nd resistor. One end of the 21st resistor is connected to the boost unit, and the other end of the 21st resistor is connected to one end of the 22nd resistor and the controller, respectively. The other end of the 22nd resistor is grounded.

[0020] In an optional embodiment, a status feedback circuit is further included. The status feedback circuit is used to provide feedback on the switching status of the first switching circuit. The status feedback circuit includes a 27th resistor and a 28th resistor. One end of the 27th resistor is connected to the first switching circuit and the second port, respectively. The other end of the 27th resistor is connected to one end of the 28th resistor and the controller, respectively. The other end of the 28th resistor is grounded.

[0021] In a second aspect, embodiments of this application also provide a battery management system, including a switch module as described above and an external port, wherein the external port is connected to a second port of the switch module.

[0022] In a third aspect, embodiments of this application also provide a battery pack, including a battery management system and a battery cell as described above, wherein the positive terminal of the battery cell is connected to a first port of a switching module in the battery management system.

[0023] In a fourth aspect, embodiments of this application also provide an electrical device, including a battery pack as described above and a load, wherein the battery pack is used to supply power to the load.

[0024] The beneficial effects of this application's embodiments include: providing a switching module, a battery management system, a battery pack, and an electrical device. The switching module includes a first switching circuit, a voltage conversion circuit, a second switching circuit, a controller, a first port, and a second port. The first switching circuit is connected to both the first and second ports. The voltage conversion circuit is connected to the controller, the first port, and the second switching circuit. The voltage conversion circuit processes the voltage at the first port according to a first control signal output by the controller. The second switching circuit is connected to both the controller and the first switching circuit. The controller controls the on / off state of the second switching circuit to control the on / off state of the first switching circuit. Because the driving voltage provided to the first switching circuit is adjustable when the first switching circuit is on, it can flexibly change the driving capability of the first switching circuit. Attached Figure Description

[0025] One or more embodiments are illustrated by way of example only, and these illustrative examples do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements, and unless otherwise stated, the figures in the drawings do not constitute a limitation on scale.

[0026] Figure 1 This is a schematic diagram of the structure of an electrical device provided in an embodiment of this application;

[0027] Figure 2 yes Figure 1 A schematic diagram of a battery pack structure is provided.

[0028] Figure 3 yes Figure 2 A schematic diagram of a battery management system is provided.

[0029] Figure 4 yes Figure 3 A schematic diagram of a switching module is provided.

[0030] Figure 5 yes Figure 3 The diagram below provides a schematic of another switching module.

[0031] Figure 6 yes Figure 4 or Figure 5 A schematic diagram of a voltage conversion circuit is provided.

[0032] Figure 7 This is a schematic diagram of the circuit structure of a switching module provided in an embodiment of this application;

[0033] Figure 8 This is a schematic diagram of the circuit structure of another switching module provided in an embodiment of this application. Detailed Implementation

[0034] To facilitate understanding of this application, a more detailed description is provided below with reference to the accompanying drawings and specific embodiments. It should be noted that when an element is described as "connected" to another element, it can be directly connected to the other element, or there may be one or more intervening elements. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0035] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items.

[0036] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0037] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of an electrical device 1000 provided in an embodiment of this application. Figure 1 As shown, the electrical device 1000 includes a battery pack 100 and a load 200. The battery pack 100 supplies power to the load 200, enabling the electrical device 1000 to operate. The electrical device 1000 can be any battery-powered device or equipment, such as unmanned aerial vehicles, energy storage products, electric vehicles, power tools, and so on.

[0038] Specifically, such as Figure 2 As shown, the battery pack 100 includes a battery management system 10 and a battery unit 20, which can be connected via a CAN bus.

[0039] The battery pack 100 is equivalent to an energy storage system, and the battery cells 20 serve as the energy storage units of this system. Each battery cell 20 can consist of multiple batteries. The battery cells 20 are configured to upload various real-time operating status information of the batteries, such as battery voltage, current, temperature, and protection parameters, to the battery management system 10 via a CAN bus, and to receive control commands from the battery management system 10. The battery management system 10 is configured to receive and monitor various real-time operating status information from the battery cells 20, and transmit this information externally, or process this information to assess the status of the battery cells 20 and provide safety protection for the batteries, etc.

[0040] In some embodiments, such as Figure 3 As shown, the battery management system 10 includes a switch module 11 and an external port 12.

[0041] The switch module 11 includes a first port 11A and a second port 11B. The first port 11A is connected to the positive terminal of the battery unit 20, and the second port 11B is connected to an external port 12. The external port 12 is also connected to the load 200. The switch module 11 can turn on or off the circuit in which the battery unit 20 supplies power to the load 200.

[0042] Please see Figure 4 ,like Figure 4 As shown, the switch module 11 also includes a first switch circuit 111, a voltage conversion circuit 112, a second switch circuit 113, and a controller 114.

[0043] The first port 11A is connected to the positive terminal of the battery cell 20. When the first port 11A is connected to the positive terminal of the battery cell 20, the positive voltage B+ of the battery cell 20 (i.e., the voltage of the first port 11A; the following description of the voltage B+ of the first port 11A is based on the positive voltage B+ of the battery cell 20) can be applied to the first port 11A.

[0044] The second port 11B is connected to the external port 12 of the battery management system 10.

[0045] The first switching circuit 111 is connected to the first port 11A and the second port 11B respectively, and can turn on or off the connection between the first port 11A and the second port 11B. When the first switching circuit 111 is turned on, the positive voltage of the battery cell 20 can be output to the external port 12 through the first switching circuit 111, and then the external port 12 transmits the positive voltage of the battery cell 20 to the load 200.

[0046] The voltage conversion circuit 112 is connected to the controller 114, the first port 11A and the second switching circuit 113 respectively. The voltage conversion circuit 112 can process the voltage B+ of the first port 11A according to the first control signal output by the controller 114.

[0047] The second switching circuit 113 is connected to the controller 114 and the first switching circuit 111 respectively. The controller 114 can output a control signal to the second switching circuit 113 to control the second switching circuit 113 to be turned on or off.

[0048] When the second switching circuit is turned on, the voltage conversion circuit 112 is connected to the first switching circuit 111. At this time, the voltage B+ of the processed first port 11A is provided to the first switching circuit 111 to turn on the first switching circuit 111. When the second switching circuit is turned off, the voltage conversion circuit 112 is disconnected from the first switching circuit. At this time, the first switching circuit 111 is turned off because it does not receive a driving voltage.

[0049] Controller 114 can be any general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), microcontroller, ARM (Acorn RISC Machine) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. Furthermore, controller 114 can also be any conventional processor, controller, microcontroller, or state machine. Controller 114 can also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP, and / or any other such configuration.

[0050] In some embodiments, such as Figure 5 As shown, the switch module 11 also includes a status feedback circuit 115. The status feedback circuit 115 is connected to the second port 11B and the controller 114 respectively. The status feedback circuit 115 is used to detect the voltage of the second port 11B. The controller 114 determines the operating state of the first switch circuit 111 based on the voltage of the second port 11B. The operating states of the first switch circuit 111 include normal conduction state, abnormal conduction state, normal shutdown state, and abnormal shutdown state.

[0051] Specifically, such as Figure 7 As shown, the state feedback circuit 115 includes a twenty-seventh resistor R27 and a twenty-eighth resistor R28.

[0052] One end of the twenty-seventh resistor R27 is connected to the second port 11B, and the other end of the twenty-seventh resistor R27 is connected to one end of the twenty-eighth resistor R28 and the control pin C of the controller 114. The other end of the twenty-eighth resistor R28 is grounded.

[0053] In this embodiment, the state feedback circuit 115 can detect the voltage at the second port 11B and feed the voltage back to the controller 114, thereby allowing the controller 114 to determine the switching state of the first switching circuit 111 based on the voltage. When the voltage indicates that the switching state of the first switching circuit 111 is abnormal, the controller 114 will shut it down. For example, when the operation of turning on the first switching circuit 111 is performed, if the first switching circuit 111 is successfully driven, the voltage at the second port 11B is almost equal to the voltage B+ at the first port 11A. However, if the voltage B+ at the second port 11B differs significantly from that at the first port 11A, it can be considered that the first switching circuit 111 has failed to be driven. In this case, the controller 114 controls the second switching circuit 113 to shut down.

[0054] In some embodiments, such as Figure 6 As shown, the voltage conversion circuit 112 includes a boost unit 1121 and a voltage feedback unit 1122.

[0055] The boost unit 1121 is connected to the controller 114, the first port 11A, and the second switch circuit 113. The connection node between the boost unit 1121 and the second switch circuit 113 is 11C. The boost unit 1121 is used to boost the voltage B+ of the first port 11A according to the first controller signal so as to obtain a driving voltage at the connection node 11C that can drive the first switch circuit 111 to conduct.

[0056] The voltage feedback unit 1122 is connected to both the boost unit 1121 and the controller 114. The voltage feedback unit 1122 can feed back the voltage at the output terminal (connection node 11C) of the boost unit 1121 to the controller 114. The controller 114 compares the fed-back voltage with a preset voltage threshold. When the fed-back voltage is less than the preset voltage threshold, the controller 114 adjusts the first control signal output to the boost unit 1121 (e.g., adjusting the duty cycle of the PWM control signal output to the boost unit 1121) to increase the output voltage of the boost unit 1121. When the output voltage of the boost unit 1121 is greater than the preset voltage threshold, a second control signal is output to the second switching circuit 113 to turn on the second switching circuit 113, thereby connecting the boost unit 1121 to the first switching circuit 111. At this time, the boost unit 1121 provides the voltage that has reached the preset voltage threshold to the first switching circuit 111 to reliably turn on the first switching circuit 111.

[0057] In this embodiment, the voltage boosted by the boost unit 1121 to the voltage B+ of the first port 11A is only provided to the first switching circuit 111 when it exceeds a preset voltage threshold. This ensures that the first switching circuit 111 can reliably conduct, avoiding abnormal or unsafe conduction caused by insufficient driving voltage. Furthermore, by setting the preset voltage threshold according to actual needs, the driving voltage provided to the first switching circuit 111 can be adjusted, thereby flexibly adjusting the driving capability of the first switching circuit 111 and providing strong scalability.

[0058] Specifically, such as Figure 7 As shown, the boost unit 1121 includes a first NMOS transistor NM1, a second NMOS transistor NM2, a PNP transistor Q1, a first diode D1, a second diode D2, a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4.

[0059] One end of the first resistor R1 is connected to control pin A of the controller 114. The other end of the first resistor R1 is connected to one end of the second resistor R2 and the gate of the first NMOS transistor NM1. The source of the first NMOS transistor NM1 and the other end of the second resistor R2 are grounded. The drain of the first NMOS transistor NM1 is connected to one end of the third resistor R3, the gate of the second NMOS transistor NM2, and the base of the PNP transistor Q1. The drain of the second NMOS transistor NM2 and the other end of the third resistor R3 are subjected to a first voltage V1. The source of NMOS transistor NM2 is connected to the emitter of PNP transistor Q1 and one end of the first capacitor C1. The other end of the first capacitor C1 is connected to the cathode of the first diode D1 and the anode of the second diode D2. The anode of the first diode D1 is connected to one end of the fourth resistor R4. The other end of the fourth resistor R4 is connected to the first port 11A. The cathode of the second diode D2 is connected to one end of the second capacitor C2 and the second switching circuit 113. The other end of the second capacitor C2 and the collector of PNP transistor Q1 are grounded.

[0060] In this embodiment, during boosting, the controller 114 outputs a PWM signal from control pin A. When the PWM signal is high, the first NMOS transistor NM1 is turned on, and the second NMOS transistor NM2 is turned off, thereby turning on the PNP transistor Q1. The voltage B+ at the first port 11A charges the first capacitor C1. When the PWM signal is low, the first NMOS transistor NM1 is turned off, the PNP transistor Q1 is turned off, and the second NMOS transistor NM2 is turned on. Therefore, the voltage at the connection node 11C of the first capacitor C1, the first diode D1, and the second diode D2 is equivalent to the voltage B+ at the first port 11A plus the value of the first voltage V1, i.e., V1 + V B+It is understandable that the first voltage V1 determines the boosting magnitude of the voltage B+ at the first port 11A. Therefore, after the voltage B+ at the first port 11A is boosted, the voltage at the connection node 11C is approximately equal to V1 + V. B+ At this time, if the voltage is greater than the preset voltage threshold, the controller 114 controls the second switching circuit 113 to be turned on, so as to provide the voltage as a driving voltage to the first switching circuit 111, thereby turning on the first switching circuit 111.

[0061] Among them, the second NMOS transistor NM2 and the PNP transistor Q1 are high-frequency complementary switches. When boosting, they together with the first diode D1, the second diode D2, the first capacitor C1, and the second capacitor C2 form a boost rectification structure.

[0062] Therefore, in this embodiment, the first voltage V1 is used as the reference voltage. By adjusting the value of the reference voltage V1, the driving voltage provided to the first switching circuit 111 can be flexibly adjusted, thereby facilitating the adjustment of the driving capability of the first switching circuit 111 for expansion.

[0063] like Figure 7 As shown, the voltage feedback unit 1122 includes a twenty-first resistor R21 and a twenty-second resistor R22.

[0064] One end of the twenty-first resistor R21 is connected to the drive voltage output node 11C, and the other end of the twenty-first resistor R21 is connected to one end of the twenty-second resistor R22 and the control pin B of the controller 114. The other end of the twenty-second resistor R22 is grounded.

[0065] The voltage at the connection point of the twenty-first resistor R21 and the twenty-second resistor R22 is fed back to the controller 114 in real time so that the controller 114 can obtain the voltage output of the boost unit 1121 and output a PWM control signal to the first NMOS transistor NM1 according to the voltage magnitude, so as to adjust the voltage output of the boost unit 1121 in a feedback manner.

[0066] In some embodiments, such as Figure 7 As shown, the first switching circuit 111 includes a sixth NMOS transistor NM6 and a seventh NMOS transistor NM7.

[0067] The source of the sixth NMOS transistor NM6 is connected to the first port 11A, the drain of the sixth NMOS transistor NM6 is connected to the drain of the seventh NMOS transistor NM7, the source of the seventh NMOS transistor NM7 is connected to the second port 11B, and the gates of the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 are both connected to the second switching circuit 113.

[0068] Among them, the sixth NMOS transistor NM6 is used as a charging MOS transistor, and the seventh NMOS transistor NM7 is used as a discharging MOS transistor.

[0069] When battery cell 20 is charging and discharging normally, the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 need to be turned on simultaneously. However, when battery cell 20 is over-discharged, discharge protection needs to be implemented. At this time, the discharge MOS transistor (seventh NMOS transistor NM7) needs to be turned off while the charging MOS transistor (sixth NMOS transistor NM6) remains on, allowing battery cell 20 to charge (the charging current flows through the body diode of the seventh NMOS transistor NM7 and the sixth NMOS transistor NM6). When battery cell 20 is overcharged, charge protection needs to be implemented. At this time, the charging MOS transistor (sixth NMOS transistor NM6) needs to be turned off while the discharge MOS transistor (seventh NMOS transistor NM7) remains on, allowing battery cell 20 to discharge (the discharge current flows through the body diode of the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7). Therefore, the turn-on and turn-off of the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 need to be controlled separately. Of course, depending on the application and design requirements, when the battery cell 20 is overcharged or over-discharged, the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 can be controlled to be turned off simultaneously.

[0070] In order to control the voltage output of the boost unit 1121 to be transmitted to the gates of the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7, so as to synchronously control the turn-on and turn-off of the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7, in some embodiments, such as Figure 7 As shown, the second switching circuit 113 includes a third PMOS transistor PM3, a fifth NMOS transistor NM5, a fifth diode D5, a sixth diode D6, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a nineteenth resistor R19, and a twentieth resistor R20.

[0071] One end of the fifteenth resistor R15 is connected to the control pin D of the controller 114. The other end of the fifteenth resistor R15 is connected to one end of the sixteenth resistor R16 and the gate of the fifth NMOS transistor NM5. The other end of the sixteenth resistor R16 and the source of the fifth NMOS transistor NM5 are grounded. The drain of the fifth NMOS transistor NM5 is connected to one end of the seventeenth resistor R17. The other end of the seventeenth resistor R17 is connected to one end of the eighteenth resistor R18 and the gate of the third PMOS transistor PM3. The eighteenth resistor R18... The other end and the source of the third PMOS transistor PM3 are both connected to the voltage conversion circuit 112. The drain of the third PMOS transistor PM3 is connected to the anode of the fifth diode D5 and the anode of the sixth diode D6, respectively. The cathode of the fifth diode D5 is connected to one end of the nineteenth resistor R19. The other end of the nineteenth resistor R19 is connected to the gate of the sixth NMOS transistor NM6. The cathode of the sixth diode D6 is connected to one end of the twentieth resistor R20. The other end of the twentieth resistor R20 is connected to the gate of the seventh NMOS transistor NM7.

[0072] In this embodiment, when the control pin D of the controller 114 outputs a high level, the fifth NMOS transistor NM5 is turned on, thereby turning on the third PMOS transistor PM3, so as to transmit the voltage output by the voltage conversion circuit 112 (the voltage at the connection node 11C) to the gate of the sixth NMOS transistor NM6 and the gate of the seventh NMOS transistor NM7; when the control pin D of the controller 114 outputs a low level, the fifth NMOS transistor NM5 is turned off, thereby turning off the third PMOS transistor PM3, so as to disconnect the connection between the connection node 11C and the gate of the sixth NMOS transistor NM6 and the gate of the seventh NMOS transistor NM7.

[0073] Therefore, in this embodiment, the second switching circuit 113 can synchronously control the transmission of the driving voltage to the gate of the sixth NMOS transistor NM6 and the gate of the seventh NMOS transistor NM7 according to the control signal output by the controller 114, thereby controlling the conduction and turn-off of the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7.

[0074] and Figure 7 The difference between the embodiments shown is that, Figure 8 The illustrated embodiment can independently control the on / off state of the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7. For example, it can control the sixth NMOS transistor NM6 to turn on while simultaneously controlling the seventh NMOS transistor NM7 to turn off, or control the seventh NMOS transistor NM7 to turn on while simultaneously controlling the sixth NMOS transistor NM6 to turn off, thereby controlling the current in two directions. Specifically, as shown... Figure 8As shown, the second switching circuit 113 includes a third NMOS transistor NM3, a fourth NMOS transistor NM4, a first PMOS transistor PM1, a second PMOS transistor PM2, a third diode D3, a fourth diode D4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, and a fourteenth resistor R14.

[0075] The voltage of the drive voltage output node 11C is controlled to be transmitted to the sixth NMOS transistor NM6 through the third NMOS transistor NM3, the first PMOS transistor PM1, the third diode D3, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, and the ninth resistor R9.

[0076] One end of the fifth resistor R5 is connected to the control pin E of the controller 114. The other end of the fifth resistor R5 is connected to one end of the sixth resistor R6 and the gate of the third NMOS transistor NM3. The other end of the sixth resistor R6 and the source of the third NMOS transistor NM3 are grounded. The drain of the third NMOS transistor NM3 is connected to one end of the seventh resistor R7. The other end of the seventh resistor R7 is connected to one end of the eighth resistor R8 and the gate of the first PMOS transistor PM1. The other end of the eighth resistor R8 is connected to the source of the first PMOS transistor PM1 and the cathode of the third diode D3. The anode of the third diode D3 is connected to the voltage conversion circuit 112 and the anode of the fourth diode D4. The drain of the first PMOS transistor PM1 is connected to one end of the ninth resistor R9. The other end of the ninth resistor R9 is connected to the gate of the sixth NMOS transistor NM6.

[0077] Here, when the control pin E of the controller 114 outputs a high level, the third NMOS transistor NM3 is turned on, thereby turning on the first PMOS transistor PM1, which in turn connects the output terminal (connection node 11C) of the voltage conversion circuit 112 to the gate of the sixth NMOS transistor NM6; when the control pin E of the controller 114 outputs a low level, the third NMOS transistor NM3 is turned off, thereby turning off the first PMOS transistor PM1, which in turn disconnects the connection between connection node 11C and the gate of the sixth NMOS transistor NM6.

[0078] The voltage output from the voltage conversion circuit 112 is controlled to be transmitted to the seventh NMOS transistor NM7 by the fourth NMOS transistor PM4, the second PMOS transistor PM2, the fourth diode D4, the tenth resistor R10, the eleventh resistor R11, the twelfth resistor R12, the thirteenth resistor R13, and the fourteenth resistor R14.

[0079] One end of the tenth resistor R10 is connected to the control pin F of the controller 114. The other end of the tenth resistor R10 is connected to one end of the eleventh resistor R11 and the gate of the fourth NMOS transistor NM4. The other end of the eleventh resistor R11 and the source of the fourth NMOS transistor NM4 are grounded. The drain of the fourth NMOS transistor NM4 is connected to one end of the twelfth resistor R12. The other end of the twelfth resistor R12 is connected to one end of the thirteenth resistor R13 and the gate of the second PMOS transistor PM2. The other end of the thirteenth resistor R13 is connected to the source of the second PMOS transistor PM2 and the cathode of the fourth diode D4. The drain of the second PMOS transistor PM2 is connected to one end of the fourteenth resistor R14. The other end of the fourteenth resistor R14 is connected to the gate of the seventh NMOS transistor NM7.

[0080] Here, when the control pin F of the controller 114 outputs a high level, the fourth NMOS transistor NM4 is turned on, thereby turning on the second PMOS transistor PM2; when the control pin F of the controller 14 outputs a low level, the fourth NMOS transistor NM4 is turned off, thereby turning off the second PMOS transistor PM2.

[0081] therefore, Figure 8 The embodiment shown enables separate control of the turn-on and turn-off of the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7, thus allowing control of current in two directions (charging current direction and discharging current direction).

[0082] To protect the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7, in some embodiments, such as Figure 7 or Figure 8 As shown, the first switching circuit 11 also includes a first Zener diode Z1, a second Zener diode Z2, a twenty-third resistor R23, a twenty-fourth resistor R24, a twenty-fifth resistor R25, and a twenty-sixth resistor R26.

[0083] The anode of the first Zener diode Z1 is connected to one end of the twenty-third resistor R23 and the source of the sixth NMOS transistor NM6, respectively. One end of the twenty-fourth resistor R24 ​​is connected to the gate of the sixth NMOS transistor NM6. The cathode of the first Zener diode Z1, the other end of the twenty-third resistor R23, and the other end of the twenty-fourth resistor R24 ​​are all connected to the second switching circuit 113.

[0084] The first Zener diode Z1 can provide overvoltage protection between the gate and source of the sixth NMOS transistor NM6. The twenty-third resistor R23 can discharge the junction capacitance of the sixth NMOS transistor NM6 to prevent it from being mis-turned on. The twenty-fourth resistor R24 ​​is a current-limiting resistor that can limit the current flowing through the sixth NMOS transistor NM6.

[0085] The anode of the second Zener diode Z2 is connected to one end of the twenty-fifth resistor R25 and the source of the seventh NMOS transistor NM7, respectively. One end of the twenty-sixth resistor R26 is connected to the gate of the seventh NMOS transistor NM7. The cathode of the second Zener diode Z2, the other end of the twenty-fifth resistor R25, and the other end of the twenty-sixth resistor R26 are all connected to the second switching circuit 113.

[0086] The second Zener diode Z2 can provide overvoltage protection between the gate and source of the seventh NMOS transistor NM7. The twenty-fifth resistor R25 can discharge the junction capacitance of the seventh NMOS transistor NM7 to prevent it from being mis-turned on. The twenty-sixth resistor R26 is a current-limiting resistor that can limit the current flowing through the seventh NMOS transistor NM7.

[0087] The following is about Figure 7 The working process of the illustrated embodiment will be described in detail.

[0088] When it is necessary to control the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 to conduct, the control pin A of the controller 114 outputs a PWM signal to boost the voltage at the connection node 11C to V1+V. B+ Furthermore, the voltage of connection node 11C is fed back to the controller 114 through the voltage feedback circuit 1122. When the controller 114 determines that the voltage of connection node 11C is less than the preset voltage threshold, it adjusts the output PWM signal to adjust the voltage of connection node 11C. When the voltage of connection node 11C is greater than the preset threshold, the control pin D of the controller 114 outputs a high level, the fifth NMOS transistor NM5 is turned on, and the third PMOS transistor PM3 is turned on, so that the voltage of connection node 11C at this time is used as the driving voltage to be transmitted to the gate of the sixth NMOS transistor NM6 and the gate of the seventh NMOS transistor NM7. Thus, the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 are turned on. Simultaneously, the voltage at the second port 11B is detected by the status feedback circuit 115. If the voltage at the second port 11B is almost equal to the voltage B+ at the first port 11A, it indicates that the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 are conducting normally, and the drive is successful. If the voltage at the second port 11B differs significantly from the voltage B+ at the first port 11A, it indicates that the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 are not conducting normally, and the drive fails. At this time, the control pin D of the controller 114 outputs a low-level signal to the gate of the fifth NMOS transistor NM5 to turn off the fifth NMOS transistor NM5, thereby turning off the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7.

[0089] When it is necessary to control the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 to turn off, the control pin D of the controller 114 outputs a low level, turning off the fifth NMOS transistor NM5, thereby turning off the third PMOS transistor PM3. This disconnects the voltage conversion circuit 112 from the gates of the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7. Then, the voltage at the second port 11B is detected by the status feedback circuit 115. If the voltage at the second port 11B is almost equal to 0V, it indicates that the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 are turned off normally and the turn-off is successful. If the voltage at the second port 11B is significantly different from 0V, it indicates that the sixth NMOS transistor NM6 and the seventh NMOS transistor NM7 are turned off abnormally and the turn-off fails. At this time, the controller 114 sends a fault message to the outside to remind the user.

[0090] The following is about Figure 8 The working process of the illustrated embodiment will be described in detail.

[0091] When it is necessary to control the sixth NMOS transistor NM6 or the seventh NMOS transistor NM7 to conduct, the control pin A of the controller 114 outputs a PWM signal to raise the voltage of the connection node 11C to V1+V. B+Furthermore, the voltage of connection node 11C is fed back to controller 114 via voltage feedback circuit 1122. When the voltage of connection node 11C is greater than a preset voltage threshold: if the sixth NMOS transistor NM6 is to be turned on, the control pin E of controller 114 outputs a high level, the third NMOS transistor NM3 is turned on, and thus the first PMOS transistor PM1 is turned on, so that the voltage of connection node 11C at this time is used as the driving voltage to be transmitted to the gate of the sixth NMOS transistor NM6. Thus, the sixth NMOS transistor NM6 is turned on. At the same time, the voltage of the second port 11B is detected by state feedback circuit 115. If the voltage of the second port 11B is almost equal to the voltage B+ of the first port 11A, it indicates that the sixth NMOS transistor NM6 is turned on normally and the drive is successful. If the voltage of the second port 11B differs greatly from the voltage B+ of the first port 11A, it indicates that the sixth NMOS transistor NM6 is not turned on normally and the drive fails. At this time, the control pin E of controller 114 outputs a low level signal to the gate of the third NMOS transistor NM3 to turn it off. The third NMOS transistor NM3 is turned off, which in turn turns off the sixth NMOS transistor NM6. At this time, if the seventh NMOS transistor NM7 is to be turned on, the control pin F of the controller 114 outputs a high level, the fourth NMOS transistor NM4 is turned on, and the second PMOS transistor PM2 is turned on, so that the voltage of the connection node 11C at this time is used as the driving voltage to be transmitted to the gate of the seventh NMOS transistor NM7. Thus, the seventh NMOS transistor NM7 is turned on. At the same time, the voltage of the second port 11B is detected by the status feedback circuit 115. If the voltage of the second port 11B is almost equal to the voltage B+ of the first port 11A, it means that the seventh NMOS transistor NM7 is turned on normally and the drive is successful. If the voltage of the second port 11B is significantly different from the voltage B+ of the first port 11A, it means that the seventh NMOS transistor NM7 is not turned on normally and the drive fails. At this time, the control pin F of the controller 114 outputs a low level signal to the gate of the fourth NMOS transistor NM4 to turn off the fourth NMOS transistor NM4, which in turn turns off the seventh NMOS transistor NM7.

[0092] After the sixth NMOS transistor NM6 is turned on, when it is necessary to control the sixth NMOS transistor NM6 to turn off, the control pin E of the controller 114 outputs a low level, the third NMOS transistor NM3 turns off, and thus the first PMOS transistor PM1 turns off, thereby disconnecting the connection between the connection node 11C and the gate of the sixth NMOS transistor NM6. Then, the voltage of the second port 11B is detected by the status feedback circuit 115. If the voltage of the second port 11B is almost equal to 0V, it means that the sixth NMOS transistor NM6 is turned off normally and the turn-off is successful. If the voltage of the second port 11B is significantly different from 0V, it means that the sixth NMOS transistor NM6 is turned off abnormally and the turn-off fails. At this time, the controller 114 sends a fault message to the outside to remind the user.

[0093] After the seventh NMOS transistor NM7 is turned on, when it is necessary to control the seventh NMOS transistor NM7 to turn off, the control pin F of the controller 114 outputs a low level, the fourth NMOS transistor NM4 turns off, and thus the second PMOS transistor PM2 turns off, so as to disconnect the connection between the connection node 11C and the gate of the seventh NMOS transistor NM7. Then, the voltage of the second port 11B is detected by the status feedback circuit 115. If the voltage of the second port 11B is almost equal to 0V, it means that the seventh NMOS transistor NM7 is turned off normally and the turn-off is successful. If the voltage of the second port 11B is significantly different from 0V, it means that the seventh NMOS transistor NM7 is turned off abnormally and the turn-off fails. At this time, the controller 114 sends a fault message to the outside to remind the user.

[0094] Finally, it should be noted that this application can be implemented in many different forms and is not limited to the embodiments described in this specification. These embodiments are not intended to impose additional limitations on the content of this application; the purpose of providing these implementation methods is to make the disclosure of this application more thorough and comprehensive. Furthermore, within the framework of this application, the above-mentioned technical features can be combined with each other, and there are many other variations of different aspects of this application as described above, all of which are considered to be within the scope of this specification. Moreover, those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A switching module, characterized in that, It includes a first switching circuit, a voltage conversion circuit, a second switching circuit, a controller, a first port, and a second port; The first switching circuit is connected to the first port and the second port respectively; The voltage conversion circuit is connected to the controller, the first port and the second switching circuit respectively. The voltage conversion circuit is used to process the voltage of the first port according to the first control signal output by the controller. The second switching circuit is connected to both the controller and the first switching circuit. The second switching circuit is used to turn on or off under the control of the controller to control the turn on and off of the first switching circuit. When the second switching circuit is turned on, the voltage conversion circuit is connected to the first switching circuit so that the voltage output by the voltage conversion circuit turns on the first switching circuit; when the second switching circuit is turned off, the voltage conversion circuit is disconnected from the first switching circuit. The voltage conversion circuit includes a boost unit; The boost unit is connected to the controller, the first port and the second switching circuit respectively, and the boost unit is used to boost the voltage of the first port according to the first control signal; The boost unit includes a first NMOS transistor, a second NMOS transistor, a PNP transistor, a first diode, a second diode, a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, and a fourth resistor; One end of the first resistor is connected to the controller, and the other end of the first resistor is connected to one end of the second resistor and the gate of the first NMOS transistor. The source of the first NMOS transistor and the other end of the second resistor are grounded. The drain of the first NMOS transistor is connected to one end of the third resistor, the gate of the second NMOS transistor, and the base of the PNP transistor. A first voltage is applied to the drain of the second NMOS transistor and the other end of the third resistor. The source of the second NMOS transistor is connected to the emitter of the PNP transistor and one end of the first capacitor. The other end of the first capacitor is connected to the cathode of the first diode and the anode of the second diode. The anode of the first diode is connected to one end of the fourth resistor. The other end of the fourth resistor is connected to the first port. The cathode of the second diode is connected to one end of the second capacitor and the second switching circuit. The other end of the second capacitor and the collector of the PNP transistor are grounded.

2. The switching module according to claim 1, characterized in that, The voltage conversion circuit also includes a voltage feedback unit; The voltage feedback unit is connected to the boost unit and the controller respectively. The voltage feedback unit is used to feed back the output voltage of the boost unit to the controller so that when the output voltage of the boost unit is greater than a preset voltage threshold, the controller outputs a second control signal to the second switching circuit to turn on the second switching circuit.

3. The switching module according to claim 1, characterized in that, The second switching circuit includes a third NMOS transistor, a fourth NMOS transistor, a first PMOS transistor, a second PMOS transistor, a third diode, a fourth diode, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a thirteenth resistor, and a fourteenth resistor; One end of the fifth resistor is connected to the controller, and the other end of the fifth resistor is connected to one end of the sixth resistor and the gate of the third NMOS transistor. The other end of the sixth resistor and the source of the third NMOS transistor are grounded. The drain of the third NMOS transistor is connected to one end of the seventh resistor. The other end of the seventh resistor is connected to one end of the eighth resistor and the gate of the first PMOS transistor. The other end of the eighth resistor is connected to the source of the first PMOS transistor and the cathode of the third diode. The anode of the third diode is connected to the voltage conversion circuit and the anode of the fourth diode. The drain of the first PMOS transistor is connected to one end of the ninth resistor, and the other end of the ninth resistor is connected to the first switching circuit. One end of the tenth resistor is connected to the controller, and the other end of the tenth resistor is connected to one end of the eleventh resistor and the gate of the fourth NMOS transistor. The other end of the eleventh resistor and the source of the fourth NMOS transistor are grounded. The drain of the fourth NMOS transistor is connected to one end of the twelfth resistor. The other end of the twelfth resistor is connected to one end of the thirteenth resistor and the gate of the second PMOS transistor. The other end of the thirteenth resistor is connected to the source of the second PMOS transistor and the cathode of the fourth diode. The drain of the second PMOS transistor is connected to one end of the fourteenth resistor, and the other end of the fourteenth resistor is connected to the first switching circuit.

4. The switching module according to claim 1, characterized in that, The second switching circuit includes a third PMOS transistor, a fifth NMOS transistor, a fifth diode, a sixth diode, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a nineteenth resistor, and a twentieth resistor; One end of the fifteenth resistor is connected to the controller. The other end of the fifteenth resistor is connected to one end of the sixteenth resistor and the gate of the fifth NMOS transistor. The other end of the sixteenth resistor and the source of the fifth NMOS transistor are grounded. The drain of the fifth NMOS transistor is connected to one end of the seventeenth resistor. The other end of the seventeenth resistor is connected to one end of the eighteenth resistor and the gate of the third PMOS transistor. The other end of the eighteenth resistor and the source of the third PMOS transistor are both connected to the voltage conversion circuit. The drain of the third PMOS transistor is connected to the anode of the fifth diode and the anode of the sixth diode. The cathode of the fifth diode is connected to one end of the nineteenth resistor. The other end of the nineteenth resistor is connected to the first switching circuit. The cathode of the sixth diode is connected to one end of the twentieth resistor. The other end of the twentieth resistor is connected to the first switching circuit.

5. The switching module according to claim 2, characterized in that, The voltage feedback unit includes a twenty-first resistor and a twenty-second resistor; One end of the 21st resistor is connected to the boost unit, and the other end of the 21st resistor is connected to one end of the 22nd resistor and the controller, respectively. The other end of the 22nd resistor is grounded.

6. The switching module according to claim 1, characterized in that, The first switching circuit includes a sixth NMOS transistor and a seventh NMOS transistor; The source of the sixth NMOS transistor is connected to the first port, the drain of the sixth NMOS transistor is connected to the drain of the seventh NMOS transistor, the source of the seventh NMOS transistor is connected to the second port, and the gates of both the sixth and seventh NMOS transistors are connected to the second switching circuit.

7. The switching module according to claim 6, characterized in that, The first switching circuit further includes a first Zener diode, a second Zener diode, a twenty-third resistor, a twenty-fourth resistor, a twenty-fifth resistor, and a twenty-sixth resistor; The anode of the first Zener diode is connected to one end of the second thirteenth resistor and the source of the sixth NMOS transistor, one end of the second fourteenth resistor is connected to the gate of the sixth NMOS transistor, and the cathode of the first Zener diode, the other end of the second thirteenth resistor, and the other end of the second fourteenth resistor are all connected to the second switching circuit. The anode of the second Zener diode is connected to one end of the second fifteenth resistor and the source of the seventh NMOS transistor, one end of the second sixteenth resistor is connected to the gate of the seventh NMOS transistor, and the cathode of the second Zener diode, the other end of the second fifteenth resistor, and the other end of the second sixteenth resistor are all connected to the second switching circuit.

8. The switching module according to any one of claims 1 to 7, characterized in that, It also includes a status feedback circuit, which is used to provide feedback on the switching status of the first switching circuit; The state feedback circuit includes a twenty-seventh resistor and a twenty-eighth resistor; One end of the 27th resistor is connected to the first switch circuit and the second port respectively, and the other end of the 27th resistor is connected to one end of the 28th resistor and the controller respectively. The other end of the 28th resistor is grounded.

9. A battery management system, characterized in that, Including the switching module as described in any one of claims 1 to 8; and An external port is connected to the second port of the switch module.

10. A battery pack, characterized in that, Including the battery management system as described in claim 9; and A battery cell, the positive terminal of which is connected to the first port of the switching module in the battery management system.

11. An electrical appliance, characterized in that, Including the battery pack as described in claim 10; and The battery pack is used to power the load.

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