Electronic device including driving circuit and driving method thereof

Abstract

The present disclosure provides an electronic device including a driving circuit and a driving method thereof. The driving circuit includes an electronic unit, a driving unit and a detection protection circuit. The driving unit is electrically connected to the electronic unit. The detection protection circuit is electrically connected to the electronic unit via a first node and is electrically connected to a gate terminal of the driving unit via a second node. When the voltage of the first node is pulled down, the detection protection circuit controls the driving unit to be turned off. The detection protection circuit of the driving circuit disclosed in the present disclosure can protect the electronic unit from being affected by excessive current.

Description

Technical Field

[0001] The present disclosure relates to an electronic device, and more particularly to a driving circuit including a detection protection circuit and a driving method thereof. Background Art

[0002] The driving circuit generally used to drive the display panel or backlight panel, such as the driving circuit used to drive the active-matrix organic light emitting diode (AMLED), does not have the function of detecting current. When the electronic unit such as the light-emitting unit or other electronic components is short-circuited or damaged, the current passing through may increase sharply, resulting in the risk of increased power consumption and overheating and burning of the electronic unit. In view of this, in order to quickly cut off the power supply source to protect the electronic unit from the influence of excessive current, the following will propose several embodiments of the solution. Summary of the invention

[0003] The present disclosure provides an electronic device including a driving circuit and a driving method thereof, which can detect the voltage passing through an electronic unit and protect the electronic unit from being affected by an excessive current.

[0004] According to an embodiment of the present disclosure, the electronic device of the present disclosure includes a driving circuit, and the driving circuit includes an electronic unit, a driving unit, and a detection protection circuit. The driving unit is electrically connected to the electronic unit. The detection protection circuit is electrically connected to the electronic unit via a first node, and is electrically connected to a gate terminal of the driving unit via a second node. When the voltage of the first node is pulled down, the detection protection circuit controls the driving unit to be turned off.

[0005] According to an embodiment of the present disclosure, the driving method of the driving circuit of the present disclosure includes: supplying a reset voltage to the first node during a reset period through the detection protection circuit; detecting the voltage of the first node during a scan period through the detection protection circuit; and when the voltage of the first node is pulled down, the detection protection circuit controls the driving unit to turn off.

[0006] Based on the above, the driving circuit disclosed in the present invention can be electrically connected to the electronic unit via the first node and electrically connected to the gate terminal of the driving unit via the second node through the detection protection circuit. When the detection protection circuit determines that the voltage of the first node is pulled down, the driving unit can be controlled to be turned off. In this way, the power supply to the electronic unit can be stopped in real time to protect the electronic unit from being affected by excessive current.

[0007] The present disclosure can be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that in order to facilitate the understanding of the readers and for the simplicity of the drawings, the various drawings in the present disclosure only depict a portion of the display device, and the specific components in the drawings are not drawn according to the actual scale. In addition, the number and size of each component in the drawings are only for illustration and are not intended to limit the scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a circuit block diagram of a driving circuit according to an embodiment of the present disclosure;

[0009] Figure 2 is a schematic diagram of an implementation scenario of a driving circuit according to an embodiment of the present disclosure;

[0010] Figure 3 is a flowchart of a driving method according to an embodiment of the present disclosure;

[0011] Figure 4 is a circuit diagram of a driving circuit according to an embodiment of the present disclosure;

[0012] Figure 5 is a schematic diagram of an operation waveform of a driving circuit according to an embodiment of the present disclosure;

[0013] Figure 6 is a circuit diagram of a driving circuit according to another embodiment of the present disclosure;

[0014] Figure 7 is a schematic diagram of an operation waveform of a driving circuit according to another embodiment of the present disclosure;

[0015] Figure 8 is a circuit diagram of a driving circuit according to another embodiment of the present disclosure;

[0016] Fig. 9 is a circuit diagram of a driving circuit according to another embodiment of the present disclosure;

[0017] Fig.10 is a circuit diagram of a driving circuit according to another embodiment of the present disclosure;

[0018] Fig.11 is a circuit diagram of a driving circuit according to another embodiment of the present disclosure;

[0019] Fig.12 is a circuit diagram of a driving circuit according to yet another embodiment of the present disclosure.

[0020] Description of Reference Numerals

[0021] 100, 200, 300, 400, 500, 600, 700, 800, P1, P2, Pn: driving circuit;

[0022] 110: electronic unit;

[0023] 120: drive unit;

[0024] 130: detection protection circuit;

[0025] 131, 132: reset circuit;

[0026] 140: pixel circuit;

[0027] C1, C2, C3, C4, C5: capacitors;

[0028] D1, D2: diodes;

[0029] DT: data voltage;

[0030] DIS, DIS_b: reset signal;

[0031] EM: enabling signal;

[0032] N1, N2, N3, N4: nodes;

[0033] R1, R2, R3: resistance;

[0034] S310, S320, S330: steps;

[0035] SCN: scanning signal;

[0036] T1, T2, T3, T4, T5, T6, T7, T8, T9: transistors;

[0037] TD: detection period;

[0038] TDI: Data writing period;

[0039] TE: lighting period;

[0040] TR: reset period;

[0041] TS: during scanning;

[0042] ARVDD, ARVSS: voltage;

[0043] VRST: reset voltage;

[0044] VREF: reference voltage. DETAILED DESCRIPTION

[0045] Certain words are used throughout this disclosure and in the appended claims to refer to specific components. Those skilled in the art will appreciate that display device manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that have the same function but different names. In the following description and claims, the words "including" and "comprising" are open-ended words and should therefore be interpreted as "including but not limited to..."

[0046] In some embodiments of the present disclosure, terms such as "coupled", "interconnected", etc., related to bonding and connection, unless otherwise defined, may refer to two structures being in direct contact, or may also refer to two structures not being in direct contact, wherein another structure is disposed between the two structures. Such terms related to bonding and connection may also include situations where both structures are movable, or both structures are fixed. In addition, the term "coupled" includes any direct and indirect electrical connection means.

[0047] The ordinal numbers used in the specification and claims, such as "first", "second", etc., are used to modify components. They do not imply or represent any previous ordinal numbers of the components, nor do they represent the order of one component and another component, or the order of the manufacturing method. The use of multiple ordinal numbers is only used to make a component with a certain name clearly distinguishable from another component with the same name. The claims and the specification may not use the same words. Accordingly, the first component in the specification may be the second component in the claims. It should be noted that the following embodiments can replace, reorganize, and mix the technical features in several different embodiments to complete other embodiments without departing from the spirit of the present disclosure.

[0048] Figure 1 FIG. 1 is a circuit block diagram of a driving circuit 100 according to an embodiment of the present disclosure. Figure 1In the illustrated embodiment, the driving circuit 100 includes an electronic unit 110, a driving unit 120, and a detection protection circuit 130. According to design requirements, in some embodiments, the electronic unit 110 may include one or more light-emitting units or other electronic components, and the number and arrangement thereof may be determined according to actual requirements. According to actual applications, the one or more light-emitting units may include light-emitting diodes (LED), micro-LEDs, organic light-emitting diodes (OLED), inorganic light-emitting diodes (ILED), sub-millimeter light-emitting diodes (Mini-LED), micro-LEDs (Micro-LED), electroluminescence (EL) components, laser diodes (Laser Diode) or other types of light-emitting components, and this embodiment is not limited thereto.

[0049] In the present embodiment, the driving unit 120 is electrically connected to the electronic unit 110, and the driving unit 120 can turn on or off the voltage or current signal used to drive the electronic unit 110. The detection protection circuit 130 is electrically connected to the electronic unit 110 via the node N1 (first node), and is electrically connected to the gate terminal (control terminal) of the driving unit 120 via the node N2 (second node). The detection protection circuit 130 can detect whether the voltage of the first node N1 changes (for example, the voltage is pulled down) to determine whether the electronic unit 110 is short-circuited or damaged. When the voltage of the first node N1 is pulled down, the detection protection circuit 130 can control the driving unit 120 to turn off, for example, control the driving unit 120 to turn off through the second node N2 to stop supplying power to the electronic unit 110, thereby protecting the electronic unit 110 from being affected by excessive current.

[0050] Figure 2 FIG. 1 is a schematic diagram of an implementation scenario of an electronic device 100D according to an embodiment of the present disclosure. Figure 2In the illustrated embodiment, one or more driving circuits P1, P2, ..., Pn may be configured in any electronic device 100D. In some embodiments, the electronic device 100D may include a plurality of driving circuits P1-Pn. The plurality of driving circuits P1-Pn may be disposed on a substrate to form a substrate module 100S. The plurality of driving circuits P1-Pn may be arranged in a matrix, but the present invention is not limited thereto. At least one of the plurality of driving circuits P1-Pn may be the aforementioned driving circuit 100, that is, may include the aforementioned electronic unit 110, the aforementioned driving unit 120, and the aforementioned detection protection circuit 130. According to some embodiments, each of the plurality of driving circuits P1-Pn may be the aforementioned driving circuit 100. According to some embodiments, the electronic unit 110 may be a light-emitting unit to form an electronic device 100D having a display function. For example, the substrate module 100S itself may constitute a display panel for image display. Alternatively, according to some embodiments, the electronic unit 110 may be a light-emitting unit, and the substrate module 100S itself may serve as a backlight module. The substrate module 100S serving as a backlight module may be combined with a liquid crystal display panel to form an electronic device 100D having a display function. For example, when the driving circuits P1 to Pn serve as a display panel to display an image, a driving circuit may include only a single light-emitting unit. When the driving circuits P1 to Pn serve as a backlight module, a driving circuit may include a plurality of light-emitting units connected in series, respectively, but this embodiment is not limited thereto. According to some embodiments, the electronic unit 110 may be a non-light-emitting unit. According to some embodiments, the electronic device 100D may be an antenna device, a liquid crystal display device, or a varactor device.

[0051] Figure 3 It is a flowchart of a driving method of a driving circuit according to an embodiment of the present disclosure. Figure 1 The driving circuit 100 shown can refer to Figure 3 Please also refer to Figure 1 and Figure 3 In step S310, the driving circuit 100 may supply a reset voltage (or a reference voltage) to the first node N1 during the reset period through the detection protection circuit 130. In step S320, the detection protection circuit 130 may detect the voltage of the first node N1 during the scan period. In step S330, when the detection protection circuit 130 detects that the voltage of the first node N1 is pulled down, the detection protection circuit 130 may turn off the driving unit 120 via the second node N2.

[0052] Please refer to Figure 4 and Figure 5 . Figure 4 is a circuit diagram of a driving circuit 200 according to an embodiment of the present disclosure. Figure 5It is a schematic diagram of an operation waveform of a driving circuit according to an embodiment of the present disclosure. Figure 4 The driving circuit 200 shown can be used as Figure 1 An implementation example of the driving circuit 100 is shown. Figure 5 The embodiment shown can be used as Figure 4 The driving circuit 200 shown in FIG. Figure 8 The driving circuit 400 shown in FIG. Fig. 9 The driving circuit 500 shown, Fig.10 The driving circuit 600 shown in FIG. Fig.11 The driving circuit 700 and (or) Fig.12 The operation waveform diagram of the driving circuit 800 is shown in FIG. Figure 4 In the illustrated embodiment, the driving circuit 200 includes a pixel circuit 140 and a detection protection circuit 130. The pixel circuit 140 may include an electronic unit 110 and a driving unit 120. According to actual needs, in some embodiments, the pixel circuit 140 may also include a switch unit T6, a control unit T7, a capacitor C3 and (or) other components not shown in the figure. Figure 4 In this embodiment, the electronic unit 110 may include a plurality of electronic units (for example, four in this embodiment) connected in series, but the number and arrangement thereof are only an example and are not limited in this embodiment. According to some embodiments, the electronic unit 110 may include a plurality of light-emitting units.

[0053] In the present embodiment, the driving unit 120 may include a transistor T8. For the convenience of explanation, the switch unit T6, the control unit T7, and the transistor T8 are all P-type transistors, but the present embodiment is not limited thereto. In the present embodiment, the first end of the switch unit T6 may receive the data voltage DT. The control end of the switch unit T6 may receive the scan signal SCN. The first end of the transistor T8 may receive the voltage ARVDD (first voltage). The driving unit 120 (for example, the control end of the transistor T8) may be electrically connected to the second end of the switch unit T6 through the second node N2. One end of the capacitor C3 may receive the first voltage ARVDD, and the other end of the capacitor C3 may be electrically connected to the second node N2. In the present embodiment, the driving unit 120 (for example, the second end of the transistor T8) may be electrically connected to the first node N1 through the first end of the control unit T7. The control end of the control unit T7 may receive the enable signal EM. One end of the electronic unit 110 (for example, the anode end of the plurality of light-emitting units) may be electrically connected to the second end of the control unit T7 through the first node N1. The other end of the electronic unit 110 (for example, the cathode end of multiple light-emitting units) can receive the voltage ARVSS (second voltage). In the present embodiment, the voltage level of the first voltage ARVDD may be higher than the voltage level of the second voltage ARVSS. For example, in some embodiments, the first voltage ARVDD may be a DC high level, and the second voltage ARVSS may be a DC low level or a ground level. In some embodiments, the switch unit T6, the control unit T7 and (or) the transistor T8 may also be a transistor with an N-type conductivity. In some embodiments, the voltage level of the first voltage ARVDD may also be lower than the voltage level of the second voltage ARVSS. For example, when the conductivity type of the transistor T8 is N-type, the first voltage ARVDD may be a DC low level or a ground level, and the second voltage ARVSS may be a DC high level.

[0054] Thus, for the pixel circuit 140, the switch unit T6 can transmit the data voltage DT to the second node N2 according to the scan signal SCN. That is, the switch unit T6 can be used to supply the data voltage DT to the second node N2 during the scan period TS. The capacitor C3 can stabilize the voltage level on the second node N2 according to the first voltage ARVDD. The transistor T8 in the driving unit 120 can transmit the first voltage ARVDD to the second end of the transistor T8 according to the voltage level on the second node N2. The control unit T7 can transmit the voltage level on the second end of the transistor T8 to the electronic unit 110 through the first node N1 according to the enable signal EM, so that the electronic unit 110 can be driven according to the potential difference between the first node N1 and the second voltage ARVSS. That is, the control unit T7 is used to turn off during the data writing period TDI to stop supplying power to the first node N1. In some embodiments, the electronic unit 110 can be a light-emitting unit, so that the electronic unit 110 can emit light according to the potential difference between the first node N1 and the second voltage ARVSS.

[0055] According to actual design requirements, in some embodiments, the detection protection circuit 130 may include a transistor T1 (first transistor), a transistor T2 (second transistor), a transistor T4 (third transistor), a capacitor C1 (first capacitor), a capacitor C2 (second capacitor), a reset unit 131, a reset unit 132 and (or) other components not shown in the figure. Figure 4, but this embodiment is not limited thereto. The first transistor T1 may be electrically connected to the second node N2 to supply the first voltage ARVDD to the second node N2 to turn off the driving unit 120. The reset unit 131 may be electrically connected to the other end of the first capacitor C1 through the fourth node N4, and the reset unit 132 may be electrically connected to the first node N1. In this embodiment, the reset unit 131 may include a transistor T3, and the reset unit 132 may include a transistor T5, but this embodiment is not limited thereto. For the convenience of explanation, it is taken that the transistors T1 to T5 all use a thin film transistor (TFT) with a conductivity type of P type as an example, but this embodiment is not limited thereto. In some embodiments, at least one of the transistors T1 to T5 may also be a transistor with a conductivity type of N type. In this embodiment, the first end of the first transistor T1 may receive the first voltage ARVDD. The second end of the first transistor T1 may be electrically connected to the control end of the transistor T8 in the driving unit 120 through the second node N2. In the present embodiment, one end of the first capacitor C1 has a node N3 (third node), and the first capacitor C1 can be electrically connected to the gate end (control end) of the first transistor T1 through the third node N3. In the present embodiment, one end of the second capacitor C2 can be electrically connected to the other end of the first capacitor C1 through the fourth node N4. In some embodiments, the other end of the second capacitor C2 can receive the second voltage ARVSS. In other embodiments, the other end of the second capacitor C2 can also receive the first voltage ARVDD or other DC levels, which is not limited in the present embodiment.

[0056] In some embodiments, the first end of the second transistor T2 may receive the first voltage ARVDD. The second end of the second transistor T2 may be electrically connected to the third node N3. The control end of the second transistor T2 may receive the reset signal DIS. In some embodiments, the first end of the transistor T3 in the reset unit 131 may receive the reset voltage VRST. The second end of the transistor T3 may be electrically connected to the fourth node N4. The control end of the transistor T3 may receive the reset signal DIS. In some embodiments, the first end of the third transistor T4 may be electrically connected to the fourth node N4. The control end of the third transistor T4 may receive the scan signal SCN. In some embodiments, the first end of the transistor T5 in the reset unit 132 may receive the reset voltage VRST. The second end of the transistor T5 may be electrically connected to the first node N1 together with the second end of the third transistor T4. The control end of the transistor T5 may receive the reset signal DIS. The reset voltage VRST may be a DC level between the first voltage ARVDD and the second voltage ARVSS. In some embodiments, the reset voltage VRST may be less than the voltage level required to drive the electronic unit 110 to prevent the electronic unit 110 from being driven by the reset voltage VRST. For example, in some embodiments, the first voltage ARVDD can be set to 15 volts, and the second voltage ARVSS can be set to 0 volts. Assuming that the voltage level required to drive the electronic unit 110 is 10 volts (2.5*4), the reset voltage VRST can be set to 9 volts, but this embodiment is not limited thereto.

[0057] Thus, for the detection protection circuit 130, the second transistor T2 can transfer the first voltage ARVDD to the third node N3 according to the reset signal DIS. The transistor T3 in the reset unit 131 can transfer the reset voltage VRST to the fourth node N4 according to the reset signal DIS. The transistor T5 in the reset unit 132 can transfer the reset voltage VRST to the first node N1 according to the reset signal DIS. The second capacitor C2 can be used as a voltage stabilizing capacitor to stabilize the voltage level on the fourth node N4 according to the second voltage ARVSS (or the first voltage ARVDD or other DC levels). The third transistor T4 can conduct the fourth node N4 and the first node N1 according to the scan voltage SCN. And the first transistor T1 can supply the first voltage ARVDD to the second node N2 according to the voltage level of the third node N3. Then, if at least any one of the multiple electronic units in the electronic unit 110 is short-circuited or damaged, the voltage level of the first node N1 will be instantaneously pulled down, and the voltage level of the fourth node N4 will also be pulled down. At this time, based on the coupling of the first capacitor C1, the voltage level of the third node N3 will also be pulled down. For example, assume that when the voltage level of the first node N1 is pulled down from the reset voltage VRST to the short-circuit voltage VST (VST < VRST), the voltage level of the third node N3 is ARVDD + (VST - VRST). Then, when the potential difference between the control terminal and the second terminal of the first transistor T1 is lower than the threshold voltage VTH (Threshold voltage) of the first transistor T1, that is, ARVDD + (VST - VRST) < ARVDD - VTH, the first transistor T1 is turned on. The first transistor T1 will supply the first voltage ARVDD to the second node N2 to cut off (turn off) the transistor T8 in the driving unit 120, so that the transistor T8 stops supplying power to the first node N1, thereby protecting the electronic unit 110 from being affected by excessive current.

[0058] For the waveform diagram of the above actions, reference can be made to Figure 5 the illustrated embodiment. Figure 5 The horizontal axis shown represents time. In Figure 5 the illustrated embodiment, when it is desired to drive Figure 4When the electronic unit 110 is shown, the enable signal EM can be switched from a logic low level to a logic high level first, so that the driving circuit 200 enters the data writing period TDI. At this time, the control unit T7 in the pixel circuit 140 is turned off, that is, it is switched from an on state to an off state to stop supplying power to the first node N1. In the data writing period TDI, when the reset signal DIS is switched from a logic high level to a logic low level, the driving circuit 200 enters the reset period TR. At this time, the second transistor T2 in the detection protection circuit 130 can supply the first voltage ARVDD to the third node N3 (i.e., one end of the first capacitor C1), the transistor T3 in the reset unit 131 can transmit the reset voltage VRST to the fourth node N4 (i.e., the other end of the first capacitor C1), and the transistor T5 in the reset unit 132 can supply the reset voltage VRST to the first node N1. The first node N1 and the fourth node N4 are both charged to the reset voltage VRST, and the third node N3 is charged to the first voltage ARVDD (here assumed to be a logic high level). At this time, the first transistor T1 is in the off state.

[0059] Assuming that the electronic unit 110 is operating normally at this time (for example, all light-emitting units can emit light normally), the voltage level of the first node N1 will remain unchanged (reset voltage VRST). Then, when the scan signal SCN switches from a logic high level to a logic low level, the driving circuit 200 enters a scan period TS (here equivalent to a detection period TD). The switch unit T6 in the pixel circuit 140 can transmit the data voltage DT to the second node N2, and the third transistor T4 can conduct the first node N1 and the fourth node N4 (i.e., the other end of the first capacitor C1). That is, according to some embodiments, the third transistor T4 is electrically connected to the first node N1, and the third transistor T4 is used to conduct the first node N1 and the other end of the first capacitor C1 during the detection period TD or the scan period TS. Since the voltage levels of the first node N1 and the fourth node N4 are the same, the first capacitor C1 is in a floating state, so the voltage level of the third node N3 will also remain unchanged (the first voltage ARVDD), so that the first transistor T1 is still maintained in a cut-off state. Finally, when the data voltage DT is completely written and the enable signal EM switches from a logic high level to a logic low level, the driving circuit 200 enters a lighting period TE. At this time, the control unit T7 switches from a cut-off state to a conducting state, and the transistor T8 in the driving unit 120 transmits the first voltage ARVDD to the first node N1 through the control unit T7 according to the data voltage DT to drive the electronic unit 110. Therefore, when there is no voltage abnormality in the electronic unit 110, the detection protection circuit 130 will not affect the normal operation of the pixel circuit 140.

[0060] Assuming that at least one of the multiple light-emitting units in the electronic unit 110 is short-circuited or damaged, the voltage level of the first node N1 will be pulled down instantly. Then, when the scan signal SCN is switched from a logic high level to a logic low level, the driving circuit 200 enters a scanning period TS. The switch unit T6 transmits the data voltage DT to the second node N2, and the third transistor T4 turns on the first node N1 and the fourth node N4. Since the voltage level of the first node N1 is pulled down, the voltage levels of the fourth node N4 and the third node N3 will also be pulled down in sequence. Then, when the voltage level of the third node N3 is low enough to turn on the first transistor T1, the second node N2 will be charged to the first voltage ARVDD through the first transistor T1, so that the transistor T8 enters a cut-off state. Finally, when the enable signal EM is switched from a logic high level to a logic low level, the driving circuit 200 enters a lighting period TE. Although the control unit T7 switches from the off state to the on state, the transistor T8 remains in the off state, so no current flows through the electronic unit 110 , thereby protecting the electronic unit 110 from being affected by excessive current.

[0061] Please refer to Figure 6 and Figure 7 . Figure 6 FIG. 4 is a circuit diagram of a driving circuit 300 according to another embodiment of the present disclosure. Figure 7 It is a schematic diagram of an operation waveform of a driving circuit according to another embodiment of the present disclosure. Figure 6 The driving circuit 300 shown can be used as Figure 1 The driving circuit 100 is shown as an example of an implementation example. Figure 6 In the illustrated embodiment, the driving circuit 300 includes a pixel circuit 140 and a detection protection circuit 130. The implementation of the pixel circuit 140 can refer to Figure 4 The relevant description of the pixel circuit 140 is not repeated here. Figure 4 The embodiment shown is that Figure 6 The control terminal of the third transistor T4 can also receive a reset signal DIS_b different from the scan signal SCN. Figure 6 The detection protection circuit 130 shown may also include a capacitor C4 (third capacitor) and (or) a resistor R1. One end of the third capacitor C4 may be electrically connected to the third node N3, and the other end of the third capacitor C4 may receive the first voltage ARVDD. The third capacitor C4 may stabilize the current on the third node N3. One end of the resistor R1 may be electrically connected to the first end of the third transistor T4, and the other end of the resistor R1 may be electrically connected to the other end of the first capacitor C1 through the fourth node N4. For the resistor R1, its resistance cross voltage is the potential difference between the first node N1 and the fourth node N4.

[0062] about Figure 6 The waveform diagram of the operation of the embodiment shown can be referred to Figure 7 The embodiment shown. Figure 7 The horizontal axis shows time. Figure 7 In the illustrated embodiment, the implementation of the enable signal EM, the reset signal DIS and the scan signal SCN can refer to Figure 5 The enable signal EM, the reset signal DIS and the scan signal SCN are shown in FIG. Figure 5 The embodiment shown is that Figure 7 The action waveform diagram shown also includes a reset signal DIS_b. In detail, when the enable signal EM switches from a logic low level to a logic high level, Figure 6 The driving circuit 300 shown enters the data writing period TDI. At this time, the control unit T7 switches from the on state to the off state to stop supplying power to the electronic unit 110. In the data writing period TDI, when the reset signal DIS and the reset signal DIS_b are both switched from the logic high level to the logic low level, the driving circuit 300 enters the reset period TR. At this time, the third node N3 is charged to the first voltage ARVDD through the second transistor T2, the first transistor T1 is in the off state, and the third capacitor C4 can stabilize the voltage level of the third node N3 according to the first voltage ARVDD. The fourth node N4 is charged to the reset voltage VRST through the transistor T3, and the first node N1 is charged to the reset voltage VRST through the transistor T5.

[0063] Next, when the reset signal DIS is switched from a logic low level to a logic high level and the reset signal DIS_b is maintained at a logic low level, the driving circuit 300 enters a detection period TD (different from Figure 5 The detection period TD is equal to the scanning period TS), at this time, the second transistor T2, the transistor T3 and the transistor T5 will switch from the on state to the off state, and the third transistor T4 will remain in the on state. Assuming that at this time, at least any of the multiple light-emitting units in the electronic unit 110 is short-circuited or damaged, the voltage level of the first node N1 and the voltage level of one end of the resistor R1 (electrically connected to the third transistor T4) will be pulled down instantly, so that the voltage levels of the fourth node N4 and the third node N3 will also be pulled down in sequence. Then, when the voltage level of the third node N3 is so low that the first transistor T1 is turned on, the second node N2 will be charged to the first voltage ARVDD through the first transistor T1 to turn off the transistor T8, thereby stopping the power supply to the electronic unit 110 to protect the electronic unit 110 from being affected by excessive current. This embodiment is based on Figure 6 The driving circuit 300 of FIG. 1 illustrates a case where the detection protection circuit 130 controls the driving unit 120 to be turned off when the voltage of the first node N1 is pulled down. However, according to some embodiments, and Figure 6 Similarly, the driving circuit 300 Figure 5 The driving circuit 200 can also realize that when the voltage of the first node N1 is pulled down, the detection protection circuit 130 controls the driving unit 120 to be turned off, which will not be described in detail herein.

[0064] Figure 8 FIG. 4 is a circuit diagram of a driving circuit 400 according to another embodiment of the present disclosure. Figure 8 The driving circuit 400 shown can be used as Figure 1 The driving circuit 100 is shown as an example of an implementation example. Figure 8 In the illustrated embodiment, the driving circuit 400 includes a pixel circuit 140 and a detection protection circuit 130. The implementation of the pixel circuit 140 can refer to Figure 4 The relevant description of the pixel circuit 140 is not repeated here. Figure 4 The embodiment shown is that, according to actual needs, Figure 8 The detection protection circuit 130 shown in the figure can use one or more diodes D1 (for example, three in this embodiment) connected in series and / or a capacitor C5 to replace Figure 4 The first capacitor C1 and (or) the second capacitor C2 in the illustrated embodiment. In detail, one end (e.g., the anode end) of one or more diodes D1 may be electrically connected to the third node N3, and the other end (e.g., the cathode end) of one or more diodes D1 may be electrically connected to the first end of the third transistor T4 through the fourth node N4. One end of the capacitor C5 may be electrically connected to the third node N3, and the other end of the capacitor C5 may receive the second voltage ARVSS or other voltage levels. The capacitor C5 may be used as a voltage stabilizing capacitor to stabilize the voltage level on the third node N3 according to the second voltage ARVSS or other voltage levels. In some embodiments, the one or more diodes D1 may be implemented using transistors, which is not limited in this embodiment.

[0065] about Figure 8 The detailed operation waveform of the embodiment shown can be referred to Figure 5 It should be noted that during the reset period TR, Figure 8The third node N3 is charged to the first voltage ARVDD through the second transistor T2, and the fourth node N4 is charged to the reset voltage VRST through the transistor T3. In some embodiments, the potential difference ARVDD-VRST between the third node N3 and the fourth node N4 can be less than the voltage level of turning on one or more diodes D1 to prevent one or more diodes D1 from being driven during the reset period TR. And during the scanning period TS, the third transistor T4 can turn on (for example, through the fourth node N4) the first node N1 and the other end of the one or more diodes D1. If at least any one of the multiple light-emitting units in the electronic unit 110 is short-circuited or damaged, the voltage level of the first node N1 and the fourth node N4 will be instantly pulled down from the reset voltage VRST to the short-circuit voltage VST, and if the voltage level of the third node N3 is Vc' at this time, the voltage across the one or more diodes D1, that is, the potential difference Vc'-VST between the third node N3 and the fourth node N4 can be greater than or equal to the voltage level of turning on one or more diodes D1. In this way, since one or more diodes D1 are turned on, the voltage level of the third node N3 will also be pulled down. When the voltage level of the third node N3 is low enough to turn on the first transistor T1, the second node N2 will be charged to the first voltage ARVDD to turn off the transistor T8, thereby stopping the power supply to the first node N1. Figure 8 When the electronic unit 110 is operating normally or at least one of the plurality of light emitting units is short-circuited or damaged, the detailed operation and waveform of the driving circuit 400 can be obtained from the above Figure 4 and Figure 5 The relevant descriptions of the illustrated embodiment are analogous and will not be repeated here.

[0066] Fig. 9 FIG. 5 is a circuit diagram of a driving circuit 500 according to another embodiment of the present disclosure. Fig. 9 The driving circuit 500 shown can be used as Figure 1 The driving circuit 100 is shown as an example of an implementation example. Fig. 9 In the illustrated embodiment, the driving circuit 500 includes a pixel circuit 140 and a detection protection circuit 130. The implementation of the pixel circuit 140 can refer to Figure 4 The relevant description of the pixel circuit 140 is not repeated here. Figure 4 The embodiment shown is that, according to actual needs, Fig. 9The reset circuit 132 shown may include transistor T5 and / or resistor R2. Specifically, the first terminal of transistor T5 may receive the reference voltage VREF, the second terminal of transistor T5 may be electrically connected to one end of resistor R2, the other end of resistor R2 may be electrically connected to the first node N1, and the control terminal of transistor T5 may receive the reset signal DIS. In some other embodiments, the reset unit 132 may not include resistor R2 and may adopt a smaller reference voltage VREF, and this embodiment is not limited.

[0067] Regarding Fig. 9 The detailed operation waveforms of the embodiments shown may be referred to Figure 5 the embodiments shown. It should be noted that, in some embodiments, Fig. 9 the reference voltage VREF shown may be less than the reset voltage VRST. In addition, in some embodiments, the voltage level (VREF’) reached by charging the first node N1 through the reset unit 132 during the reset period TR may be less than the voltage level required to drive the electronic unit 110, so as to prevent the electronic unit 110 from being driven prematurely. In some embodiments, the first voltage ARVDD may be set to 15 volts, the second voltage ARVSS may be set to 0 volts. Assuming that the voltage level required to drive the electronic unit 110 is 10 volts, the reset voltage VRST may be set to 9 volts, the reference voltage VREF may be set to 4 volts, and the voltage level VREF’ of the first node N1 during the reset period TR may be 8 volts (or any DC level between 7.5 and 10 volts), that is, the voltage level VREF’ is less than the voltage level required to drive the electronic unit 110, or VREF < VREF’ < VRST < ARVDD, but this embodiment is not limited. In this way, during the reset period TR, the first node N1 and the fourth node N4 in the detection control circuit 130 can be charged to different voltage levels according to actual application requirements, that is, the reference voltage VREF can be supplied to the first node N1 through the reset unit 132, and the voltage level of the first node N1 can be determined by using the reference voltage VREF or the voltage division of the reference voltage VREF and the resistor R2, thereby increasing the application scope of the detection protection circuit 130. In addition, using a reference voltage VREF smaller than the reset voltage VRST to charge the first node N1 can improve the sensitivity of the first node N1, increase the potential difference between the first node N1 and the fourth node N4, and increase the cross-voltage on the first capacitor C1, thereby improving the response speed and turn-off speed of transistor T8. Regarding Fig. 9 the driving circuit 500 shown, in the case where the electronic unit 110 is operating normally or at least any one of the plurality of light-emitting units is short-circuited or damaged, the detailed operation and waveforms of the driving circuit 500 can be analogized from the relevant descriptions of the above Figure 4 and Figure 5 embodiments shown, and will not be elaborated here.

[0068] Fig.10 FIG. 6 is a circuit diagram of a driving circuit 600 according to another embodiment of the present disclosure. Fig.10 The driving circuit 600 shown can be used as Figure 1 The driving circuit 100 is shown as an example of an implementation example. Fig.10 In the illustrated embodiment, the driving circuit 600 includes a pixel circuit 140 and a detection protection circuit 130. The implementation of the pixel circuit 140 can refer to Figure 4 The relevant description of the pixel circuit 140 is not repeated here. Figure 4 The embodiment shown is that, according to actual needs, Fig.10 The reset circuit 132 shown may include a transistor T5 and (or) one or more diodes D2 (for example, two in this embodiment) connected in series. In detail, the first end of the transistor T5 can receive a reference voltage VREF, the second end of the transistor T5 can be electrically connected to one end (for example, the cathode end) of the one or more diodes D2, the other end (for example, the anode end) of the one or more diodes D2 can be electrically connected to the first node N1, and the control end of the transistor T5 can receive a reset signal DIS. In some embodiments, the one or more diodes D2 can be implemented by transistors, which is not limited in this embodiment. About Fig.10 When the electronic unit 110 is operating normally or at least one of the plurality of light emitting units is short-circuited or damaged, the detailed operation and waveform of the driving circuit 600 can be obtained from the above Fig. 9 and Figure 5 The relevant descriptions of the illustrated embodiment are analogous and will not be repeated here.

[0069] Fig.11 FIG. 7 is a circuit diagram of a driving circuit 700 according to another embodiment of the present disclosure. Fig.11 The driving circuit 700 shown can be used as Figure 1 The driving circuit 100 is shown as an example of an implementation example. Fig.11 In the illustrated embodiment, the driving circuit 700 includes a pixel circuit 140 and a detection protection circuit 130. The implementation of the pixel circuit 140 can refer to Figure 4 The relevant description of the pixel circuit 140 is not repeated here. Figure 4 The embodiment shown is that, according to actual needs, Fig.11 The reset circuit 131 shown may include a transistor T9 and / or a resistor R3. In detail, a first terminal of the transistor T9 may receive a first voltage ARVDD, a second terminal of the transistor T9 may be electrically connected to one terminal of the resistor R3, another terminal of the resistor R3 may be electrically connected to a fourth node N4, and a control terminal of the transistor T9 may receive a reset signal DIS.

[0070] Regarding Fig.11 For the detailed operation waveforms of the illustrated embodiments, reference may be made to Figure 5 the illustrated embodiments. It should be noted that, in some embodiments, Fig.11 the voltage level ARVDD’ reached by the fourth node N4 shown during the reset period TR when being charged by the reset unit 131 may be greater than the reset voltage VRST, and since the reset circuit 131 has a resistor R3, the voltage level ARVDD’ is necessarily less than the first voltage ARVDD, that is, VRST < ARVDD’ < ARVDD, but this embodiment is not limited. Then, during the scan period TS, if any one or more of the multiple light-emitting units in the electronic unit 110 are short-circuited or damaged, the voltage level of the first node N1 will be pulled down, and at the same time, the voltage level of the fourth node N4 will also be pulled down. When the potential difference between the control terminal and the second terminal of the first transistor T1 is lower than the threshold voltage VTH of the first transistor T1, that is, ARVDD + (VST - ARVDD’) < ARVDD - VTH, the first transistor T1 is turned on to supply the first voltage ARVDD to the second node N2 to turn off the transistor T8, and thus stop supplying power to the first node N1. In this way, during the reset period TR, the first node N1 and the fourth node N4 in the detection control circuit 130 can be charged to different voltage levels according to actual application requirements, that is, the first voltage ARVDD can be supplied to the fourth node N4 (the other end of the first capacitor C1) through the reset unit 131, so as to use the voltage division of the first voltage ARVDD and the resistor R3 to determine the voltage level of the fourth node N4, thereby increasing the application scope of the detection protection circuit 130. Regarding Fig.11 the illustrated driving circuit 700, in the case where the electronic unit 110 is operating normally or at least any one of the multiple light-emitting units is short-circuited or damaged, the detailed operation and waveforms of the driving circuit 700 can be analogized from the relevant descriptions of the above Figure 4 and Figure 5 illustrated embodiments, and will not be elaborated here.

[0071] Fig.12 FIG. is a schematic circuit diagram of a driving circuit 800 according to another embodiment of the present disclosure. Fig.12 The illustrated driving circuit 800 can be used as Figure 1 an implementation example of the illustrated driving circuit 100. In Fig.12 the illustrated embodiment, the driving circuit 800 includes a pixel circuit 140 and a detection protection circuit 130. The implementation manner of the pixel circuit 140 can be referred to the relevant descriptions of Figure 4 the illustrated pixel circuit 140, and will not be elaborated here. Different from Figure 4 the illustrated embodiment is that, according to actual requirements, Fig.12The reset circuit 131 shown may include a transistor T9 and (or) one or more diodes D3 (for example, three in this embodiment) connected in series. In detail, the first end of the transistor T9 can receive the first voltage ARVDD, the second end of the transistor T9 can be electrically connected to one end (for example, the anode end) of the one or more diodes D3, the other end (for example, the cathode end) of the one or more diodes D3 can be electrically connected to the fourth node N4, and the control end of the transistor T9 can receive the reset signal DIS. In some embodiments, one or more diodes D2 can be implemented by transistors, which is not limited in this embodiment. About Fig.12 When the electronic unit 110 is operating normally or at least one of the plurality of light emitting units is short-circuited or damaged, the detailed operation and waveform of the driving circuit 800 can be obtained from the above Fig.11 and Figure 5 The relevant descriptions of the illustrated embodiment are analogous and will not be repeated here.

[0072] In summary, the driving device and the driving method thereof described in the embodiments of the present disclosure may be configured to electrically connect the detection protection circuit 130 to the electronic unit 110 and the driving unit 120 via the first node N1 and the second node N2, respectively. When the voltage of the first node N1 is pulled down, the detection protection circuit 130 may control the driving unit 120 to be turned off. According to some embodiments, during the reset period TR, the detection protection circuit 130 may supply the reset voltage VRST to the first node N1, and during the scan period TS, the detection protection circuit 130 may detect the voltage of the first node N1. According to some embodiments, through the driving circuit disclosed in the present disclosure, when the electronic unit 110 is short-circuited or damaged, the power supply to the electronic unit 110 may be stopped, thereby protecting the electronic unit 110 from being affected by excessive current.

[0073] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them; although the present disclosure is described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present disclosure. Moreover, the features of the embodiments can be mixed and matched as long as they do not violate the spirit of the invention or conflict with each other.

Claims

1. An electronic device comprising a driving circuit, characterized in that: The driving circuit comprises: Electronic unit; a driving unit, electrically connected to the electronic unit; and A detection protection circuit is electrically connected to the electronic unit via a first node and electrically connected to a gate terminal of the driving unit via a second node. When the voltage of the first node is pulled down, the detection protection circuit controls the driving unit to be turned off. The detection protection circuit comprises: A first capacitor, one end of which has a third node; and The second transistor is electrically connected to the third node, and is used for supplying a first voltage to the third node during a reset period.

2. The electronic device according to claim 1, characterized in that: The detection protection circuit further comprises: The first transistor is electrically connected to the second node, and is used for supplying the first voltage to the second node to turn off the driving unit.

3. The electronic device according to claim 2, characterized in that: The third node is electrically connected to the gate terminal of the first transistor.

4. The electronic device according to claim 3, characterized in that: The detection protection circuit further comprises: A second capacitor, one end of the second capacitor is electrically connected to the other end of the first capacitor, and the other end of the second capacitor receives a second voltage.

5. The electronic device according to claim 1, characterized in that: The detection protection circuit further comprises: A third capacitor, one end of the third capacitor is electrically connected to the third node, and the other end of the third capacitor receives the first voltage.

6. The electronic device according to claim 3, characterized in that: The detection protection circuit further comprises: The third transistor is electrically connected to the first node, and is used to conduct the first node and the other end of the first capacitor during a detection period or a scanning period.

7. The electronic device according to claim 6, characterized in that: The detection protection circuit further comprises: A resistor is electrically connected to the third transistor and the other end of the first capacitor.

8. The electronic device according to claim 3, characterized in that: The detection protection circuit further comprises: A reset unit is electrically connected to the other end of the first capacitor, and is used for supplying a reset voltage or the first voltage to the other end of the first capacitor during a reset period.

9. The electronic device according to claim 3, characterized in that: The detection protection circuit further comprises: The reset unit is electrically connected to the first node, and is used for supplying a reset voltage or a reference voltage to the first node during a reset period.

10. The electronic device according to claim 3, characterized in that: The detection protection circuit further comprises: A diode, one end of which is electrically connected to the third node.

11. The electronic device according to claim 10, characterized in that: The detection protection circuit further comprises: The third transistor is electrically connected to the first node, and is used for conducting the first node and the other end of the diode during a scanning period.

12. The electronic device according to claim 1, characterized in that: wherein the driving unit is electrically connected to the switch unit via the second node, and the driving unit is electrically connected to the first node via the control unit, wherein the switch unit is used to supply a data voltage to the second node during a scan period; And the control unit is used to shut down during data writing to stop supplying power to the first node.

13. The electronic device according to claim 1, characterized in that: The electronic unit comprises a light emitting unit.

14. A driving method for a driving circuit, characterized in that: The driving circuit comprises an electronic unit, a driving unit and a detection protection circuit, wherein the driving unit is electrically connected to the electronic unit, the detection protection circuit is electrically connected to the electronic unit via a first node and is electrically connected to a gate terminal of the driving unit via a second node, and the driving method comprises: supplying a reset voltage to the first node during a reset period through the detection protection circuit; detecting the voltage of the first node during scanning by the detection protection circuit; and When the voltage of the first node is pulled down, the driving unit is turned off through the detection protection circuit.

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