Flexible printed circuit finger layout for low crosstalk
By reordering the trace layout in the suspension tail tip region of the hard disk drive and employing multilayer wiring and tuned impedance technology, the crosstalk noise problem in flexible printed circuits is solved, improving the reliability of data transmission and read transducers, and reducing cost and space occupation.
Patent Information
- Application Number
- CN202210133141.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-06-23
- Filing Date
- 2022-02-10
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2042-02-10
AI Technical Summary
In hard disk drives, there is crosstalk noise between the electrical traces of flexible printed circuits, especially crosstalk noise from the interference source trace to the sensor trace, which affects the reliability of data transmission and the reliability of the read transducer.
By reordering the trace layout in the tip area of the suspension tail section, and employing multi-layer wiring and tuned impedance technology, interference source traces are isolated from interfered traces, reducing crosstalk noise.
It effectively reduces crosstalk noise, improves the reliability of data transmission and the reliability of the readout transducer, and reduces development costs and space occupation.
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Figure CN115589662B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Embodiments of the present invention can relate generally to hard disk drives, and in particular to a method of avoiding crosstalk noise from an aggressor trace to a sensor trace in a flexible printed circuit. BACKGROUND
[0002] A hard disk drive (HDD) is a non-volatile storage device that is housed in a protective enclosure and stores digitally encoded data on one or more disks having a magnetic surface. When the HDD is in operation, each magnetic recording disk is rapidly rotated by a spindle system. Data is read from and written to the magnetic recording disk using read-write heads (or "transducers") positioned by actuators over specific locations on the disk. The read-write heads use magnetic fields to write data to and read data from the surface of the magnetic recording disk. The write head works by utilizing an electric current flowing through its coil, which in turn generates a magnetic field. Electrical pulses are sent to the write head in different patterns of positive and negative current. The current in the coil of the write head generates a localized magnetic field in the gap between the head and the disk, which in turn magnetizes a small area on the recording medium.
[0003] In order to write data to the medium or read data from the medium, the head must receive instructions from a controller. Thus, the head is electrically connected to the controller in some manner so that the head not only receives instructions to read / write data, but the head can also send information back to the controller about the data read and / or write. Typically, a flexible printed circuit (FPC) is used to electrically transmit signals from the read-write head to other electronics within the HDD via the suspension tail. The FPC and suspension tail are typically soldered together at the comb or "E-block" portion of the head stack assembly (HSA) (see, e.g., U.S. Patent No. 6,426,50 1, incorporated herein by reference in its entirety). Figure 1 Unwanted signal transmission between communication channels, known as "crosstalk," is a well-known electronic phenomenon and is typically caused by unwanted capacitive, inductive, or conductive coupling from one channel to another. In HDDs, crosstalk "noise" can occur between an aggressor trace and a victim trace, typically from a write signal trace to a read signal trace. In the case of crosstalk, the data stream of the input / output head can be compromised and / or the reliability of the read transducer can be compromised as it is highly sensitive to overbias voltage stress.
[0004] Any methods described in this section can be methods that can be practiced, but need not be previously conceived or implemented. Thus, unless otherwise indicated, it should not be assumed that any method described in this section can not be a method that was previously conceived or implemented. Accordingly, the disclosure of any method in this section should not be taken to mean that the method was known in the art prior to the filing date of the present application. BRIEF DESCRIPTION OF DRAWINGS
[0005] Embodiments are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings in which like references indicate similar elements and in which:
[0006] Figure 1 is a plan view showing a hard disk drive in accordance with one embodiment;
[0007] Figure 2A is a perspective view showing an actuator assembly in accordance with one embodiment;
[0008] Figure 2B is a perspective view showing an integrated lead suspension (ILS) of an actuator assembly in accordance with one embodiment; Figure 2A
[0009] Figure 3A is an illustration showing mirror UP and DN read-write heads in accordance with one embodiment;
[0010] Figure 3B is an illustration showing flexible printed circuit (FPC) mirror trace layout for UP and DN read-write heads in accordance with one embodiment; Figure 3A
[0011] Figure 4A is an illustration showing common UP and DN read-write heads in accordance with one embodiment;
[0012] Figure 4B is an illustration showing FPC trace layout for common UP and DN read-write heads in accordance with one embodiment; Figure 4A
[0013] Figure 5A is an illustration showing FPC trace layout for common UP and DN read-write heads in accordance with one embodiment;
[0014] Figure 5B is a cross-sectional view showing FPC trace layout in accordance with one embodiment; Figure 5A
[0015] Figure 6A is an illustration showing FPC trace layout for common UP and DN read-write heads with tuned impedance in accordance with one embodiment;
[0016] Figure 6B is a cross-sectional view showing FPC trace layout in accordance with one embodiment; Figure 6A
[0017] Figure 7A is an illustration showing FPC trace layout for common UP and DN read-write heads in accordance with one embodiment;
[0018] Figure 7B It is based on an implementation plan illustration Figure 7A A cross-sectional view of the FPC trace layout;
[0019] Figure 8A This is a diagram illustrating the FPC trace layout for common UP and DN read / write heads according to one embodiment; and
[0020] Figure 8B It is based on an implementation plan illustration Figure 8A A cross-sectional view of the FPC trace layout. Detailed Implementation
[0021] Generally, this invention describes a method for avoiding crosstalk noise between flexible printed circuit traces in a hard disk drive (HDD). In the following description, numerous specific details are set forth for purposes of explanation in order to provide a thorough understanding of the embodiments of the invention described herein. However, it will be apparent, however, that the embodiments of the invention described herein can be practiced without these specific details. In other instances, well-known structures and apparatuses may be shown in block diagram form to avoid unnecessarily obscuring the embodiments of the invention described herein.
[0022] INTRODUCTION
[0023] TERMINOLOGY
[0024] References to "implementation," "an embodiment," etc., herein are intended to mean that a particular feature, structure, or characteristic described is included in at least one embodiment of the invention. However, instances of such phrases do not necessarily refer to the same embodiment.
[0025] The term "substantially" should be understood as describing features that are mostly or nearly structured, constructed, or dimensionally defined, but in practice, manufacturing tolerances and other factors may cause the structure, configuration, dimensions, etc., to not always or necessarily be as precise as described. For example, describing a structure as "substantially vertical" would give the term its general meaning, implying that the sidewalls are vertical for all practical purposes, but may not be precisely at 90 degrees throughout.
[0026] While terms such as "best," "optimize," "minimum," "minimize," "maximum," "maximize," and the like can not have certain values associated therewith, if such terms are used herein, it is intended that one of ordinary skill in the art would understand that such terms would include affecting values, parameters, metrics, and the like in a beneficial direction consistent with the overall disclosure. For example, describing a value of something as "minimum" does not require that the value actually equal some theoretical minimum (e.g., zero), but should be understood in a practical sense that the corresponding goal is to move the value in a beneficial direction toward the theoretical minimum.
[0027] CONTEXT
[0028] At a distal end of the suspension, there is a read-write transducer (or "head") to read and write data. At another proximal end of the suspension, there is a conductive pad (or simply "electrical pad") to electrically connect to a corresponding conductive pad on a flexible printed circuit (FPC). The suspension pad and the FPC pad are typically electrically interconnected with solder or ACF (anisotropic conductive film).
[0029] Figure 2A is a perspective view showing an actuator assembly according to one embodiment. The actuator assembly 200 includes a carriage 201 (see, e.g., the carriage 134 of Figure 1 , which is rotatably coupled with a central pivot shaft 202 (see, e.g., the pivot shaft 148 of Figure 1 ) via a pivot bearing assembly 203 (see, e.g., the pivot bearing assembly 152 of Figure 1 ) and is rotationally driven by a voice coil motor (VCM), the voice coil 204 of which is shown here. The actuator assembly 200 also includes one or more actuator arms 206 (see, e.g., the arms 132 of Figure 1 , each of which actuator arms is coupled to a suspension assembly 208 (see, e.g., the lead suspension 110c of Figure 1 ) and includes a suspension 210, which typically includes a base plate 210a (see, e.g., the base plate 110a of Figure 2B ) and a load beam 210b (see, e.g., the load beam 110d of Figure 1 ). Figure 2B ) Each suspension 210 is electrically connected with a flexible printed circuit (FPC) 212 that is coupled with the carriage 201 via a suspension tail 210c (see, e.g., the suspension tail 110b of Figure 2B ).
[0030] Figure 2B is a perspective view showing an integrated lead suspension (ILS) of the actuator assembly of Figure 2A according to one embodiment. The suspension 210 includes a base plate 210a (e.g., forged to Figure 2AThe corresponding actuator arm 206 in the actuator assembly 200 has a read / write head attached to the load beam at the distal end. Electrical signals are carried from the distal head and possibly other electronic components (such as, as a non-limiting example, a micro-actuator) to the proximal FPC 212 via electrical leads integrated with the suspension tail 210c. Figure 2A The rear suspension 210c has a fold at the folding area, and a plurality of electrical pads 210d on the rear suspension tip 210e extend beyond the folding area in the proximal direction. In the actuator assembly 200, these electrical pads 210d are electrically connected to the FPC 212, such as using solder or ACF.
[0031] According to one implementation plan, Figure 3A This is a diagram showing the mirrored UP and DN read / write heads, and Figure 3B It is shown that it is used for Figure 3A A diagram illustrating the mirrored trace layout of the flexible printed circuit (FPC) for the UP and DN read / write heads. Figure 3A The image depicts a UP head 302a mounted on the corresponding UP mount 304a (a read / write head facing upwards to serve the bottom surface of the corresponding disk; the disk is not shown here but can be referenced). Figure 1 The recording medium 120, and the DN heads 302b (facing downwards to serve the top surface of the same disk) mounted on the corresponding DN mount 304b. Electrical leads, wires, and traces on each mount 304a, 304b lead to the flexible printed circuit (FPC) 306 (see also...). Figure 2A The FPC 212 includes one or more FPC fingers 306a (one of which is shown in detail herein in exemplary form), each suspension 304a, 304b being electrically and mechanically coupled thereto, for example, via solder pads. Thus, each FPC finger 306a typically serves two heads, UP head 302a and DN head 302b, electrically connecting each corresponding UP suspension 304a and DN suspension 304b to a preamplifier 308 (or beyond) mounted on the FPC 306. For reference, each FPC described in the embodiments herein includes a top wiring layer, a bottom wiring layer, a distal end in the direction of the head sliders (e.g., UP head 302a, DN head 302b), and a proximal end in the direction of the preamplifier (e.g., preamplifier 308, integrated circuit (IC) chip).
[0032] Historically, HDD manufacturers used mirrored UP and DN read / write heads, such as the UP head 302a and DN head 302b. Mirrored heads have a mirrored pad layout between the heads (see...). Figure 3A Therefore, the FPC fingers 306a of FPC 306 will also have a mirrored trace layout between the UP trace and the DN trace, as shown below. Figure 3BHowever, this continued development of each individual UP and DN head increases development costs. For example, for cost reduction purposes, one can prefer a common head over a mirror head. A common head has the same pad layout between the UP and DN heads, thus requiring a new pad layout for the FPC. Thus, the new common head pad layout is reversed between UP and DN, and likewise, the FPC trace routing layout is not mirrored between UP and DN traces.
[0033] According to one embodiment, Figure 4A is a diagram showing a common UP and DN read-write head, and Figure 4B is a diagram showing an FPC trace layout for Figure 4A a common UP and DN read-write head of Figure 4A UP head 402a mounted on a corresponding UP suspension 404a, and a DN head 402b mounted on a corresponding DN suspension 404b. The electrical leads, wires, traces on each suspension 404a, 404b lead to a flexible printed circuit (FPC) 406 (see also Figure 2A FPC 212 of ), which includes one or more FPC fingers 406a (one of which is shown in detail here in an exemplary shape), each suspension 404a, 404b being electrically and mechanically coupled thereto, e.g., via solder pads. Thus, each FPC finger 406a typically serves two heads, a UP head 402a and a DN head 402b, which electrically connect each corresponding UP suspension 404a and DN suspension 404b to a preamplifier 408 (or beyond) mounted on the FPC 406.
[0034] However, Figure 4B This trace layout depicted in will likely increase cross-talk noise from the interferer traces (i.e., write traces, WT+ and WT-) to nearby sensor traces (e.g., R2A+, R2A-), because the interferer traces are routed in the center of the trace order, as depicted in Figure 4Bthe trace layout in the tail end of the suspension tip region to a mirrored layout to maintain sufficient distance between the aggressor traces and the victim traces if the FPC geometry allows such a reordering of the laydown. However, with a 90 degree connection between the suspension tail and the FPC, there can not be sufficient space for reordering the trace layout in the tail tip region. Similarly, other approaches can require an expanded FPC finger profile to provide sufficient spacing to further separate or block the aggressor traces and the victim traces, but the FPC finger width is constrained by the spacing between the disks. Further, adding a conductor layer is another approach to improve signal isolation to reduce crosstalk, but adding an additional conductor layer results in a significant increase in cost. Thus, there remains a challenge to reduce crosstalk noise from the aggressor traces to the sensor traces without occupying significant FPC space or adding additional conductor layers.
[0035] Flexible printed circuit trace layout for reducing crosstalk
[0036] Isolating interferer traces by location
[0037] According to one embodiment, Figure 5A is a diagram showing an FPC trace layout for a common UP and DN read-write head, and Figure 5B is a cross-sectional view showing Figure 5A the FPC trace layout. The trace layout 500 includes a plurality of electrical traces, as shown and labeled by Figure 5A and Figure 5B The trace layout 500 can include more layers than shown, and thus can vary from implementation to implementation, with only the relevant layers shown here for simplicity and clarity. Here, all of the sensor traces of the UP head are routed on a top routing layer 502a, and all of the sensor traces of the DN head are routed on a bottom routing layer 502b. Figure 5BA cross-sectional view A-A of FIG. 6A shows the interferer traces positioned at the proximal end of each of the top wiring layer 602a and the bottom wiring layer 602b. That is, the "interferer traces" corresponding to the WT+ (write signal) and WT- (write signal) traces of the UP head are laid out on the top wiring layer 602a, and the interferer traces corresponding to the WT+ and WT- traces of the DN head are laid out on the bottom wiring layer 602b. According to one embodiment and as depicted, all the interferer traces are positioned together at one edge of the proximal end, e.g., away from the interfered sensor traces (e.g., R2A+ (read signal), R2A- (read signal)). The read conductors present the primary cross-talk issue, where the read transducers pair corresponding to the data signals are highly sensitive to excessive bias voltage stress that can affect transducer reliability. The secondary cross-talk with less concern is associated with other transducers related to fly height control, e.g., TFC (thermal fly height control), and embedded contact sensor (ECS), and other interfered traces. According to one embodiment and as depicted, the interferer traces are further isolated from the interfered read traces by a pair of blocking TFC traces. Note that if the head pad layout is reversed between the UP head and the DN head, then all the sensor traces of the DN head would be wired on the top wiring layer 602a, and all the sensor traces of the UP head would be wired on the bottom wiring layer 602b, with the interferer traces still positioned together at the proximal end of each of the top wiring layer 602a and the bottom wiring layer 602b (e.g., with the interferer traces positioned at the right edge instead of the left edge as shown in FIG. 6A), and the same approach applies to isolation by positioning the interferer traces away from the sensor traces. Figure 5B the trace layout shown in FIG. 6A, where the interferer traces are positioned together at the right edge instead of the left edge), and the same approach applies to isolation by positioning the interferer traces away from the sensor traces.
[0038] According to one embodiment, Figure 6A is a diagram showing an FPC trace layout with tuned impedance for a common UP and DN read-write head, and Figure 6B is a diagram showing Figure 6A a cross-sectional view of the FPC trace layout of FIG. 6A. The trace layout 600 also includes a plurality of electrical traces, as shown and labeled by Figure 6A and Figure 6B The trace layout 600 can include more layers than shown, and thus can vary from embodiment to embodiment, where only the relevant layers are shown here for simplicity and clarity. Also here, all the sensor traces of the UP head are wired on the top wiring layer 602a, and all the sensor traces of the DN head are wired on the bottom wiring layer 602b. Figure 6BFIG. 7B is a cross-sectional view B-B of FIG. 7A showing the interferer trace positioned (e.g., proximate) to the proximal end of each of the top and bottom routing layers 602a, 602b. That is, the interferer traces corresponding to the pair of top WT+ (write signal) and WT- (write signal) traces of the UP head are laid out on the top routing layer 602a, and the interferer traces corresponding to the pair of bottom WT+ and WT- traces of the DN head are laid out on the bottom routing layer 602b, which in both cases are distanced from the interfered sensor traces R2A+ and R2A-. Figure 5A , Figure 5B and Figure 6A , Figure 6B One difference between the trace layouts of FIGS. 7A and 7B is that the WT+ and WT- traces need to be impedance-tuned, which can then be controlled by laying out each WT trace opposite (e.g., below or above) a TFC trace or a GND (ground) trace. However, all the interferer traces are still positioned together at one edge of the proximal end, e.g., distanced from the sensor traces. Again, note that if the head pad layout is reversed between the UP head and the DN head, then all the sensor traces of the DN head would be routed on the top routing layer 602a, and all the sensor traces of the UP head would be routed on the bottom routing layer 602b, with the interferer traces still positioned (e.g., proximate) to the proximal end of each of the top and bottom routing layers 602a, 602b (e.g., opposite to the trace layout shown in FIG. 7A, where the interferer traces are positioned together at the right edge instead of the left edge), and the same method applies to isolation by positioning the interferer traces distanced from the sensor traces. Figure 6B
[0039] Isolating interferer traces by layer
[0040] According to one embodiment, Figure 7A is a diagram showing an FPC trace layout for a common UP and DN read-write head, and Figure 7B is a cross-sectional view of the FPC trace layout of Figure 7A . The trace layout 700 includes a plurality of electrical traces, as shown and labeled in Figure 7A and Figure 7B . The trace layout 700 can include more layers than shown, and thus can vary from embodiment to embodiment, where only the relevant layers are shown here for simplicity and clarity. Here, Figure 7B FIG. 8 is a cross-sectional view C-C showing that all sensor traces of both UP and DN heads are routed on the bottom routing layer 702b, and all interferer traces are positioned at the proximal end of the top routing layer 702a, e.g., away from the sensor traces. That is, both the "interferer traces" corresponding to the UP head's WT+ (write signal) and WT- (write signal) traces and the interferer traces corresponding to the DN head's WT+ and WT- traces are laid on the top routing layer 702a, while all interfered sensor traces (e.g., both R2A+ (read signal) and R2A- (read signal)) are laid on the bottom routing layer 702b. According to one embodiment and as depicted, all interferer traces are positioned together at one edge of the proximal end, e.g., away from the interfered sensor traces by both location and layer. According to one embodiment and as depicted, if the WT+ and WT- traces require a tuned impedance, the impedance can be controlled by laying each WT trace opposite (e.g., below or above) a GND (ground) trace. Note that if the head pad layout is reversed between the UP head and the DN head, or if the top routing layer 702a and the bottom routing layer 702b are reversed, all sensor traces will be routed on the top routing layer 702a, and all interferer traces will be routed on the bottom routing layer 702b, and the same approach applies to isolation by layering the interferer traces away from the sensor traces. Figure 7B
[0041] Multiple layer interferer trace placement
[0042] According to one embodiment, Figure 8A is a diagram showing an FPC trace layout for a common UP and DN read-write head, and Figure 8B is a diagram showing Figure 8A a cross-sectional view of the FPC trace layout of FIG. 8. The trace layout 800 includes a plurality of electrical traces, as shown and labeled by Figure 8A and Figure 8B The trace layout 800 can include more layers than shown, and thus can vary from embodiment to embodiment, where only relevant layers are shown here for simplicity and clarity. Here, Figure 8B The cross-sectional view DD shows that all sensor traces for both the UP and DN heads are routed together on the top wiring layer 802a, and all interference source traces are also positioned near the end of the top wiring layer 802a, e.g., away from the sensor traces. That is, the "interference source traces" corresponding to the WT+ (write signal) and WT- (write signal) traces of the UP head and the interference source traces corresponding to the WT+ and WT- traces of the DN head are both laid on the top wiring layer 802a, and all interfered sensor traces (e.g., both R2A+ (read signal) and R2A- (read signal)) are also laid on the top wiring layer 802a. According to one embodiment and as depicted, all interference source traces are positioned together at a near-end edge, e.g., by means of a location away from the interfered sensor traces.
[0043] According to one implementation, a pair of interfering source traces (i.e., the pair furthest from the near end) are laid on a routing layer via vias away from the interfering traces, the routing layer being opposite the layer where the interfering source traces are grouped near the near end. For example, and as... Figure 8A As depicted, a pair of top interference source traces 804, starting on the top wiring layer 802a, are laid to the bottom wiring layer 802b through corresponding first pair of vias 806a to lay beneath and avoid the sensor traces, and then laid back to the top wiring layer 802a where the interference source traces are grouped near the end through corresponding second pair of vias 806b. Note that if the head pad layout is reversed between the UP head and the DN head, or if the top wiring layer 802a and the bottom wiring layer 802b are reversed, then all interference source traces and all sensor traces will be routed on the bottom wiring layer 802b, and the same method applies to isolation by laying multiple layers of interference source traces away from the sensor traces. According to one embodiment and as shown... Figure 8B The depicted ground plane (or ground plane) is positioned on the wiring layer opposite the interference source traces and sensor traces.
[0044] Physical description of example operating contexts
[0045] The implementation scheme can be used in contexts such as digital data storage devices (DSDs) like hard disk drives (HDDs). Therefore, according to one implementation scheme, Figure 1 A floor plan of a typical HDD 100 is shown to help illustrate how a typical HDD usually operates.
[0046] Figure 1A functional arrangement of components of the HDD 100 including a slider 110b that includes a magnetic read-write head 110a is shown. The slider 110b and the head 110a can be collectively referred to as a head slider. The HDD 100 includes at least one head gimbal assembly (HGA) 110 having the head slider, a lead suspension 110c that is typically attached to the head slider via a flexure, and a load beam 110d attached to the lead suspension 110c. The HDD 100 also includes at least one recording medium 120 rotatably mounted on a spindle 124 and a drive motor (not visible) attached to the spindle 124 for rotating the medium 120. The read-write head 110a (also referred to as a transducer) includes a write element and a read element for writing and reading information stored on the medium 120 of the HDD 100, respectively. A disk clamp 128 can be used to attach the medium 120 or multiple disk media to the spindle 124.
[0047] The HDD 100 also includes an arm 132 attached to the HGA 110, a carriage 134, a voice coil motor (VCM) including an armature 136 that includes a voice coil 140 attached to the carriage 134 and a stator 144 that includes a voice coil magnet (not visible). The armature 136 of the VCM is attached to the carriage 134 and is configured to move the arm 132 and the HGA 110 to access portions of the medium 120, which are collectively mounted on a pivot shaft 148 having an interposed pivot bearing assembly 152. In the case of an HDD having multiple disks, the carriage 134 can be referred to as an “E-block” or comb finger because the carriage is arranged to carry an array of linked arms, giving it the appearance of a comb finger.
[0048] Assemblies including a head gimbal assembly (e.g., the HGA 110) that includes a flexure to which a head slider is coupled, the flexure to which an actuator arm (e.g., the arm 132) and / or a load beam are coupled, and an actuator (e.g., the VCM) to which the actuator arm is coupled can be collectively referred to as a head stack assembly (HSA). However, a HSA can include more or fewer components than those described. For example, a HSA can refer to an assembly that also includes electrical interconnection components. Generally, a HSA is an assembly that is configured to move a head slider to access portions of the medium 120 for read and write operations.
[0049] Further reference is made to Figure 1Electrical signals, including write signals to the head 110a and read signals from the head 110a (e.g., current to the voice coil 140 of the VCM), are transmitted by a flexible cable assembly (FCA) 156 (or “flex cable,” or “flex printed circuit” (FPC)). The interconnect between the flexible cable 156 and the head 110a can include an arm electronics (AE) module 160, which can have on-board preamplifiers for the read signals, as well as other read channel and write channel electronics. The AE module 160 can be attached to the carriage 134, as shown. The flexible cable 156 can be coupled to an electrical connector block 164, which in some configurations provides electrical communication through an electrical feedthrough provided by a HDD housing 168. The HDD housing 168 (or “housing base” or “substrate” or simply “base”) along with a HDD cover provide a semi-sealed (or hermetically sealed, in some configurations) protective housing for the information storage components of the HDD 100.
[0050] Other electronics, including a disk controller and servo electronics including a digital signal processor (DSP), provide electrical signals to the drive motor, the voice coil 140 of the VCM, and the head 110a of the HGA 110. The electrical signals provided to the drive motor cause the drive motor to rotate, thereby providing torque to the spindle 124, which in turn is transmitted to the media 120 attached to the spindle 124. The media 120 is thus rotated in the direction 172. The rotating media 120 forms an air cushion that acts as an air bearing upon which the slider 110b rides to cause the slider 110b to fly above the surface of the media 120 without making contact with the thin magnetic recording layer that records information. Similarly, in HDDs that utilize a gas that is lighter than air, such as helium gas for a non-limiting example, the rotating media 120 forms a gas cushion that acts as a gas or fluid bearing upon which the slider 110b rides.
[0051] The electrical signals provided to the voice coil 140 of the VCM enable the head 110a of the HGA 110 to access the tracks 176 on which information is recorded. Thus, the armature 136 of the VCM swings through the arc 180, which enables the head 110a of the HGA 110 to access various tracks on the medium 120. Information is stored in a plurality of radially nested tracks on the medium 120, which are arranged in sectors, such as the sector 184, on the medium 120. Accordingly, each track is composed of a plurality of sectorized track portions (or "track sectors"), such as the sectorized track portion 188. Each sectorized track portion 188 can include recorded information and a data header containing error correction code information and servo burst signal patterns, such as an ABCD-servo burst signal pattern, which is information identifying the track 176. In accessing the track 176, the read element of the head 110a of the HGA 110 reads the servo burst signal pattern, which provides a position error signal (PES) to servo electronics, which controls the electrical signals provided to the voice coil 140 of the VCM, thereby enabling the head 110a to follow the track 176. Upon finding the track 176 and identifying a particular sectorized track portion 188, the head 110a either reads information from the track 176 or writes information to the track 176 according to instructions received from an external agent, such as a microprocessor of a computer system, by the disk controller.
[0052] The electronic architecture of the HDD includes a plurality of electronic components for performing their respective HDD operational functions, such as a hard disk controller ("HDC"), an interface controller, an arm electronics module, a data channel, a motor driver, a servo processor, a buffer memory, and the like. Two or more such components can be combined on a single integrated circuit board, referred to as a "system on a chip" ("SOC"). Several, if not all, of such electronic components are typically arranged on a printed circuit board that is coupled to the bottom side of the HDD, such as to the HDD housing 168.
[0053] Reference is made herein to a hard disk drive, such as to the HDD 100 of FIG. 1. Figure 1The illustrated and described HDD 100 can include what is sometimes referred to as a "hybrid drive." A hybrid drive generally refers to a storage device that has the functionality of a conventional HDD (see, e.g., HDD 100) combined with a solid state storage device (SSD) that uses non-volatile memory such as flash memory or other solid state (e.g., integrated circuit) memory that is electrically erasable and programmable. Because the operation, management, and control of different types of storage media are generally different, the solid state portion of a hybrid drive can include its own corresponding controller functionality that can be integrated together with the HDD functionality into a single controller. A hybrid drive can be built and configured to operate in a variety of ways and to utilize the solid state portion such as, by way of non-limiting example, using the solid state memory as cache memory for storing frequently accessed data, for storing I / O intensive data, etc. In addition, a hybrid drive can be built and configured to essentially function as two storage devices in a single housing, i.e., a conventional HDD and an SSD, with one or more interfaces for host connection.
[0054] Accordingly, the present disclosure describes methods for avoiding crosstalk in the FPCs of an HDD in which the source of interference traces, such as those carrying write signals, are in some manner distanced from and / or isolated from the associated victim traces, such as those carrying read signals. These methods are primarily described herein in the context of an HDD configuration in which a common head slider is implemented and in the context of write traces and read traces, however, these methods and techniques for avoiding or limiting crosstalk are not necessarily limited to configurations having a common head and head pad layout or configurations in which HDD write signals correspond to the source of interference traces and HDD read signals correspond to the victim traces. That is, these signal / traces isolation techniques can be used in other scenarios involving undesired crosstalk.
[0055] EXPANSIONS AND ALTERNATIVES
[0056] In the foregoing specification, embodiments of the application have been described with reference to a number of specific details that can vary depending on implementation. The routines and processes described herein can be implemented using digital electronic circuitry, or using computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of them. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense. This description of the application should be considered in conjunction with the accompanying drawings. The patentable scope of the application is measured by the appended claims.
[0057] Further, in this description, certain process steps can be shown in a particular order, and alphabetic and alphanumeric labels can be used to identify certain steps. Unless specifically stated in the specification, embodiments are not necessarily limited to any particular order of performing such steps. In particular, these labels are used merely for convenience and are not intended to specify or imply any particular order of executing such steps.
Claims
1. A flexible printed circuit for a hard disk drive, the flexible printed circuit having a top wiring layer, a bottom wiring layer, and a proximal end in a preamplifier direction, the top wiring layer having longitudinally extending opposing lateral edges, the bottom wiring layer having longitudinally extending opposing lateral edges, the flexible printed circuit comprising: Multiple electrical traces, the multiple electrical traces including an interference source trace configured to carry a signal capable of interfering with a signal carried by an interference trace, wherein the interference source traces include a pair of top interference source traces located adjacent to each other at a common lateral edge of the near end of the top wiring layer and a pair of bottom interference source traces located adjacent to each other at the common lateral edge of the near end of the bottom wiring layer. One of the grounding traces or thermal flight altitude control traces, positioned at the near end of the bottom wiring layer and opposite the pair of top interference source traces; and The grounding trace or the other of the thermal flight altitude control trace is located at the near end of the top wiring layer and is opposite to the pair of bottom interference source traces.
2. The flexible printed circuit according to claim 1, wherein the interference source trace carries the write signal.
3. A hard disk drive, comprising the flexible printed circuit according to claim 1.
4. A flexible printed circuit for a hard disk drive, the flexible printed circuit having a top wiring layer, a bottom wiring layer, and a proximal end in a preamplifier direction, the top wiring layer having longitudinally extending opposing lateral edges, the bottom wiring layer having longitudinally extending opposing lateral edges, the flexible printed circuit comprising: Multiple electrical traces, the multiple electrical traces including: Interference source traces, configured to carry signals capable of interfering with signals carried by interfering traces, and grouped adjacently together at a common lateral edge near the proximal end of either the top or bottom wiring layer; and All of the interfered traces are located on the top wiring layer or the bottom wiring layer and are opposite to the interference source trace.
5. The flexible printed circuit according to claim 4, wherein the interference source trace carries a write signal and the interfered trace carries a read signal.
6. The flexible printed circuit of claim 4, wherein the interference source traces are grouped together at the proximal end of the top wiring layer, the flexible printed circuit further comprising: A grounding trace is positioned at the common lateral edge of the near end of the bottom wiring layer and opposite the interference source trace.
7. The flexible printed circuit of claim 4, wherein the interference source traces are grouped together at the proximal end of the bottom wiring layer, the flexible printed circuit further comprising: A grounding trace is positioned at the common lateral edge of the near end of the top wiring layer and opposite the interference source trace.
8. A hard disk drive comprising the flexible printed circuitry of claim 4.
9. A flexible printed circuit for a hard disk drive, the flexible printed circuit having a top wiring layer, a bottom wiring layer, and a proximal end in a preamplifier direction, the top wiring layer having longitudinally extending opposing lateral edges, the bottom wiring layer having longitudinally extending opposing lateral edges, the flexible printed circuit comprising: Multiple electrical traces, including interference source traces configured to carry signals capable of interfering with signals carried by the interference traces, wherein the interference source traces include a pair of top interference source traces located adjacent to each other at the near end of the top wiring layer and a pair of opposing bottom interference source traces located adjacent to each other at the near end of the bottom wiring layer. as well as A thermal flight altitude control trace is positioned at the proximal end of each of the top wiring layer and the bottom wiring layer between the interference source trace and the interfered trace.
10. The flexible printed circuit according to claim 9, wherein the interference source trace carries the write signal.
11. A hard disk drive comprising the flexible printed circuitry of claim 9.
Citation Information
Patent Citations
Multi-layered integrated conductor trace array interconnect structure having optimized electrical parameters
US5995328A