A wideband oscillation discrimination system and method based on positive sequence instantaneous power algorithm

Abstract

This invention discloses a broadband oscillation discrimination system and method based on a positive-sequence instantaneous power algorithm, comprising: an A / D sampling module for acquiring an analog signal and obtaining a synchronously sampled digital signal based on the analog signal; an FPGA module for calculating the positive-sequence instantaneous power based on the synchronously sampled digital signal and obtaining a second calculation result; and a CPU module for obtaining a broadband oscillation discrimination result based on the second calculation result. The FPGA module is connected to the A / D sampling module and the CPU module via a parallel data bus. Using positive-sequence instantaneous power to discriminate broadband oscillations can filter out the second harmonic component caused by three-phase imbalance, and also filter out new frequency components caused by this component superimposed on the broadband oscillation instantaneous power.

Description

Technical Field

[0001] This invention relates to a broadband oscillation discrimination system and method based on a positive sequence instantaneous power algorithm, belonging to the field of power system automation measurement technology. Background Technology

[0002] Synchronous phasor measurement devices (PMUs) utilize satellite synchronous clock systems to provide unified sampling pulses and standard times for network-wide synchronous sampling over a wide area. This ensures that all stations have the same time reference point and sampling reference point. The synchronous phasors obtained after synchronous sampling and calculation can accurately describe the dynamic process of the actual system, providing a new data source for new protection, measurement and control, and safe and stable control of power systems.

[0003] Traditional PMU devices typically measure the fundamental frequency component. However, in new "high-frequency and high-voltage" power systems, there are more harmonics and interharmonics. In order to better describe the dynamic process of the power system, it is necessary to measure harmonics and interharmonics simultaneously and issue a broadband oscillation alarm when broadband oscillation occurs in the power system.

[0004] According to relevant standards, the instantaneous power frequency range of broadband oscillations is 100-300Hz. However, when there is three-phase imbalance in the power system, an instantaneous power component at twice the power frequency will appear in the instantaneous power, which happens to fall within the frequency discrimination range of broadband oscillations. Existing broadband measurement devices, when using power to discriminate broadband oscillations, cannot distinguish between the instantaneous power changes caused by three-phase imbalance and broadband oscillations. This can lead to false alarms of broadband oscillations when three-phase imbalance exists in the power system.

[0005] Meanwhile, CPUs can only perform serial calculations. When simultaneously measuring the harmonics and interharmonics of multiple components and calculating the positive-sequence instantaneous power of multiple components, the computational load is large, resulting in slow processing speed and excessive CPU load. The invention patents "A Synchronous Phasor Calculation Method Based on FPGA Hardware DFT Recursion" (Patent No.: 201210310767.5) and "A Fast Synchronous Phasor Correction Method" (Patent No.: 201410529646.9) both describe methods for parallel calculation of multi-component synchronous phasor measurements using FPGAs. However, these methods do not solve the problem of parallel calculation of the positive-sequence components of voltage and current and the positive-sequence instantaneous power of multiple components.

[0006] The information disclosed in this background section is intended only to enhance the understanding of the overall background of the invention and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0007] The purpose of this invention is to overcome the shortcomings of the prior art and provide a broadband oscillation discrimination system and method based on the positive sequence instantaneous power algorithm. By using the positive sequence instantaneous power to discriminate broadband oscillations, the double power frequency harmonic component caused by three-phase imbalance can be filtered out. At the same time, it can also filter out the new frequency components caused by the superposition of this component into the broadband oscillation instantaneous power.

[0008] To achieve the above objectives, the present invention is implemented using the following technical solution:

[0009] On one hand, this invention discloses a broadband oscillation discrimination system based on a positive-sequence instantaneous power algorithm, comprising,

[0010] The A / D sampling module is used to acquire analog signals and obtain synchronously sampled digital signals based on the analog signals.

[0011] The FPGA module is used to calculate the positive-sequence instantaneous power based on the synchronously sampled digital signal and obtain the second calculation result;

[0012] The CPU module is used to obtain the judgment result of wideband oscillation based on the second calculation result;

[0013] The FPGA module is connected to the A / D sampling module and the CPU module via a parallel data bus.

[0014] Furthermore, the FPGA module includes,

[0015] The synchronization unit is used to acquire the B-code time signal to obtain a 1PPS signal.

[0016] The first FFT unit is used to obtain the first operation result based on the synchronously sampled digital signal and the 1PPS signal using FFT operation;

[0017] Voltage and current buffer unit, used to store the first calculation result;

[0018] The second FFT unit is used to obtain a second calculation result based on the first calculation result and the FFT operation.

[0019] The positive-order instantaneous power buffer unit is used to store the result of the second operation.

[0020] Furthermore, the first calculation result includes harmonic and interharmonic amplitude and phase information of the three-phase voltage with time stamps, as well as harmonic and interharmonic amplitude and phase information of the three-phase current.

[0021] Furthermore, the second calculation result includes the amplitude information of the positive-sequence instantaneous power with a time stamp.

[0022] Furthermore, the FPGA module also includes,

[0023] The first compensation unit is located between the first FFT unit and the voltage and current buffer unit, and is used to correct the first calculation result.

[0024] Furthermore, the FPGA module also includes,

[0025] The second compensation unit is located between the second FFT unit and the positive sequence instantaneous power buffer unit, and is used to correct the second calculation result.

[0026] Furthermore, the FPGA module also includes,

[0027] The DFT unit is used to obtain phasor data based on DFT operations using the synchronously sampled digital signal and the 1PPS signal.

[0028] Phasor storage unit, used to store phasor data.

[0029] On the other hand, this invention discloses a discrimination method for a broadband oscillation discrimination system based on a positive-sequence instantaneous power algorithm, comprising the following steps:

[0030] Acquire an analog signal, and obtain a synchronously sampled digital signal based on the analog signal;

[0031] Based on the synchronously sampled digital signal, the positive-sequence instantaneous power is calculated to obtain the second calculation result;

[0032] Based on the second calculation result, the discrimination result of wideband oscillation is obtained.

[0033] Compared with the prior art, the beneficial effects achieved by the present invention are as follows:

[0034] This invention uses positive-sequence instantaneous power to identify broadband oscillations. It can filter out the double-harmonic components caused by three-phase imbalance, and also filter out new frequency components generated when these harmonic components are superimposed on the broadband oscillation instantaneous power. Filtering out the frequency components caused by three-phase imbalance avoids false alarms of broadband oscillations, allowing the broadband oscillation alarm function to accurately play its role in the safe and stable operation of the power system, better meeting user needs.

[0035] This invention utilizes the synchronous and concurrent computing capabilities of FPGAs to rapidly calculate the harmonics and interharmonics of the voltage and current of multiple components at the current moment, as well as the positive-sequence components of the voltage and current, and the harmonics and interharmonics of the positive-sequence instantaneous power at the previous moment. After the above measurement process is synchronized with the satellite synchronous clock, the calculated harmonic and interharmonic signals of different electrical components over a wide area can be directly compared, facilitating the location of the oscillation sources of low-frequency oscillations, sub-supersynchronous oscillations, and broadband oscillations. Attached Figure Description

[0036] Figure 1This is a schematic diagram of a broadband oscillation discrimination system based on the positive sequence instantaneous power algorithm.

[0037] Figure 2 This is the schematic diagram of the FPGA module;

[0038] Figure 3 This is a flowchart of a broadband oscillation discrimination system based on a positive-sequence instantaneous power algorithm;

[0039] Figure 4 This is the result of using the present invention to determine the normal state;

[0040] Figure 5 This is the result of using the present invention to determine the three-phase imbalance state;

[0041] Figure 6 This is the result of using the present invention to determine the broadband oscillation state. Detailed Implementation

[0042] The present invention will be further described below with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and should not be used to limit the scope of protection of the present invention.

[0043] Example

[0044] This embodiment discloses a broadband oscillation discrimination system based on a positive-sequence instantaneous power algorithm, such as... Figure 1-3 As shown, including,

[0045] The A / D sampling module is used to acquire analog signals and obtain synchronously sampled digital signals based on the analog signals.

[0046] The FPGA module is used to calculate the positive-sequence instantaneous power based on the synchronously sampled digital signal and obtain the second calculation result;

[0047] CPU module: Used to obtain the judgment result of wideband oscillation based on the second calculation result;

[0048] The FPGA module is connected to the A / D sampling module and the CPU module via a parallel data bus.

[0049] It should be noted that the analog signal acquired by the A / D sampling module is transformed and shaped by the AC module. The AC module is used to transform and shape the original sampled analog voltage and current signals into ±5V weak voltage signals that meet the requirements of A / D sampling before inputting them into the A / D sampling module.

[0050] In this embodiment, the rated phase voltage of the AC module is 57.74V and the rated phase current is 5A / 1A.

[0051] Specifically, the FPGA module has a synchronization unit that is tamed to the satellite synchronization clock to obtain the B-code time signal, i.e. the satellite synchronization clock signal, and thus obtain the 1PPS signal.

[0052] It should be noted that the 1PPS signal here needs to undergo frequency multiplication to obtain synchronous sampling pulses and synchronous calculation pulses. The synchronous sampling pulses are used to control the A / D sampling module to complete the wide-area synchronous sampling process, while the synchronous calculation pulses are used for subsequent FFT calculations.

[0053] The A / D sampling module converts the acquired analog signal into a digital signal. The conversion process is carried out under the control of the FPGA and the external satellite synchronous clock to obtain a synchronously sampled digital signal.

[0054] In this embodiment, when the PMU needs to access the B code pair, and the device collects analog signals of specified voltage and current, synchronous sampling is achieved when the B code pair is accessed. The 1PPS time coincides with the sampling time, and the sampling frequency is 1024Hz.

[0055] After conversion, the corresponding synchronously sampled digital signal x(k) is expressed as:

[0056]

[0057] in, Let x, y, y, y, y, and y represent the amplitude, frequency, and initial phase of the i-th component, respectively; k is the current sampling point number; and Δt is the sampling interval.

[0058] Furthermore, the FPGA module includes,

[0059] The first FFT unit is used to obtain the first operation result based on the synchronously sampled digital signal and the 1PPS signal using FFT operation;

[0060] Voltage and current buffer unit, used to store the first calculation result;

[0061] The second FFT unit is used to obtain a second calculation result based on the first calculation result and the FFT operation.

[0062] The positive-order instantaneous power buffer unit is used to store the result of the second operation.

[0063] Furthermore, the FPGA module also includes,

[0064] The first compensation unit is located between the first FFT unit and the voltage and current buffer unit, and is used to correct the first calculation result.

[0065] The second compensation unit is located between the second FFT unit and the positive sequence instantaneous power buffer unit, and is used to correct the second calculation result.

[0066] The DFT unit is used to obtain phasor data based on DFT operations using the synchronously sampled digital signal and the 1PPS signal.

[0067] Phasor storage unit, used to store phasor data.

[0068] Specifically, under the synchronization of the aforementioned 1PPS signal, the first FFT unit performs FFT operations on the obtained synchronized sampled digital signal to obtain a first calculation result with a high-precision time stamp. The first calculation result is then corrected by the first compensation unit and stored in the voltage and current data buffer unit.

[0069] The first calculation result is the frequency, amplitude, and phase information of the power frequency component and each harmonic and interharmonic component, including the harmonic and interharmonic amplitude and phase information of the three-phase voltage with time stamps, as well as the harmonic and interharmonic amplitude and phase information of the three-phase current.

[0070] The working principle of the first FFT unit is as follows: FFT operation is performed on the synchronously sampled digital signal, with N1 sampling points in the window, to obtain the spectral sequence of the amplitude of the three-phase voltage harmonics and interharmonics. Spectral sequence of phase And the spectral sequences of the amplitudes of three-phase current harmonics and interharmonics. Spectral sequence of phase Use sampling midpoint The time is used as the absolute timescale of the spectral sequence.

[0071] Under the synchronization of the aforementioned 1PPS signal, the second FFT unit reads the first calculation result from the voltage and current data buffer unit, performs FFT calculation, and obtains a second calculation result with a high-precision time stamp. The second calculation result is then corrected by the second compensation unit and stored in the positive-sequence instantaneous power buffer unit.

[0072] The second calculation result is the frequency and amplitude information of each harmonic and interharmonic component in the positive sequence instantaneous power, including the amplitude information of the positive sequence instantaneous power with time stamps.

[0073] The working principle of the second FFT unit is as follows: based on the three-phase voltage and current spectrum sequence in the first calculation result, calculate the positive sequence component sequence of voltage and current, and then calculate the positive sequence instantaneous power.

[0074] The calculation method for the k-th positive sequence voltage component and positive sequence current component is as follows:

[0075]

[0076]

[0077]

[0078]

[0079]

[0080]

[0081] Where e represents the natural constant, and j represents the imaginary part of the complex number. Let the complex frequency domain values ​​of the k-th components of the three-phase voltages and currents A, B, and C be respectively, satisfying:

[0082]

[0083]

[0084]

[0085]

[0086]

[0087]

[0088] Therefore, the k-th positive-order component can be represented as:

[0089] u A1k (t)=U A1k cos(2πf k t+α A1k )

[0090] u B1k (t)=U B1k cos(2πf k t+α B1k )

[0091] u C1k (t)=U C1k cos(2πf k t+α C1k )

[0092] i A1k (t)=I A1k cos(2πf k t+β A1k )

[0093] i B1k (t)=I B1k cos(2πf k t+β B1k )

[0094] i C1k(t)=I C1k cos(2πf k t+β C1k )

[0095] Among them, U A1k α A1k They are Amplitude and phase, U B1k α B1k They are The amplitude and phase of U C1k α C1k They are The amplitude and phase, I A1k β A1k They are The amplitude and phase, I B1k β B1k They are The amplitude and phase, I C1k β C1k They are The amplitude and phase of , where t is time.

[0096] Therefore, the instantaneous power corresponding to the time in the previous data window is

[0097]

[0098] Furthermore, under 1PPS signal synchronization, the FPGA performs FFT operation on the obtained positive-sequence instantaneous power, with N2 sampling points within the window, to obtain the spectral sequence of the positive-sequence instantaneous power amplitude. Use the time of the sampling midpoint as the absolute timescale of the spectral sequence.

[0099] The CPU module works as follows:

[0100] Take the maximum value of the spectral sequence components within the 100-300Hz range, and assume it to be P. k If the following formula is satisfied, it is determined that a wideband oscillation has occurred, and the device will issue a wideband oscillation alarm.

[0101]

[0102] In the formula, P m It is the primary-side threshold value of wideband oscillation power, k u k is the voltage transformation ratio measured in the primary and secondary measurements. i This refers to the current ratio measured in the primary and secondary measurements.

[0103] In this embodiment, the voltage and current under normal conditions contain only power frequency components, with amplitudes equal to their rated values ​​and phase differences of 120°. Under three-phase unbalanced conditions, the voltage and current still contain only power frequency components, but unlike the normal state, the voltage amplitude of phase A becomes 40V. Under broadband oscillation conditions, the voltage contains only power frequency components, while the current, in addition to the power frequency components, also contains harmonic components at 175Hz, 204Hz, and 220Hz. By exploring measurements under these three conditions—normal state, three-phase unbalanced state, and broadband oscillation state—the oscillation detection results under normal conditions are as follows: Figure 4 As shown, the oscillation detection results of the three-phase unbalanced state are as follows: Figure 5 As shown, the oscillation detection results in the wideband oscillation state are as follows: Figure 6 As shown.

[0104] Depend on Figure 4-6 As shown in the positive sequence instantaneous power spectrum diagrams for the three scenarios, the discrimination method of the present invention can correctly identify the occurrence of broadband oscillation and issue an alarm, and will not misjudge the three-phase unbalanced state as a broadband oscillation state.

[0105] This invention focuses on the application of a broadband oscillation discrimination method based on FPGA positive sequence instantaneous power algorithm in PMU. In practice, this method can also be applied in broadband measurement devices, power quality detection devices and other scenarios.

[0106] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0107] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0108] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0109] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0110] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A broadband oscillation discrimination system based on a positive-sequence instantaneous power algorithm, characterized in that, include, The A / D sampling module is used to acquire analog signals and obtain synchronously sampled digital signals based on the analog signals. The FPGA module is used to calculate the positive-sequence instantaneous power based on the synchronously sampled digital signal and obtain the second calculation result; The CPU module is used to obtain the judgment result of wideband oscillation based on the second calculation result; The FPGA module is connected to the A / D sampling module and the CPU module via a parallel data bus. The FPGA module includes, The synchronization unit is used to acquire the B-code time signal to obtain a 1PPS signal. The first FFT unit is used to obtain the first operation result based on the synchronously sampled digital signal and the 1PPS signal using FFT operation; Voltage and current buffer unit, used to store the first calculation result; The second FFT unit is used to obtain the second calculation result based on the first calculation result and the FFT operation. The forward-order instantaneous power buffer unit is used to store the result of the second operation; The first calculation result includes harmonic and interharmonic amplitude and phase information of the three-phase voltage with time stamps, as well as harmonic and interharmonic amplitude and phase information of the three-phase current. The second calculation result includes the amplitude information of the positive-sequence instantaneous power with time stamps.

2. The broadband oscillation discrimination system based on the positive-sequence instantaneous power algorithm according to claim 1, characterized in that, The FPGA module also includes, The first compensation unit is located between the first FFT unit and the voltage and current buffer unit, and is used to correct the first calculation result.

3. The broadband oscillation discrimination system based on the positive-sequence instantaneous power algorithm according to claim 1, characterized in that, The FPGA module also includes, The second compensation unit is located between the second FFT unit and the positive sequence instantaneous power buffer unit, and is used to correct the second calculation result.

4. The broadband oscillation discrimination system based on the positive-sequence instantaneous power algorithm according to claim 1, characterized in that, The FPGA module also includes, The DFT unit is used to obtain phasor data based on DFT operations using the synchronously sampled digital signal and the 1PPS signal. Phasor storage unit, used to store phasor data.

5. The discrimination method of the broadband oscillation discrimination system based on the positive-sequence instantaneous power algorithm according to any one of claims 1-4, characterized in that, Includes the following steps: Acquire an analog signal, and obtain a synchronously sampled digital signal based on the analog signal; Based on the synchronously sampled digital signal, the positive-sequence instantaneous power is calculated to obtain the second calculation result; Based on the second calculation result, the discrimination result of wideband oscillation is obtained.

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