Display substrate, preparation method thereof and display device
By employing a combination of polycrystalline silicon transistors and oxide transistors in OLED display devices, and optimizing the transistor layout through via and recess design, the problem of insufficient space utilization is solved, the resolution and display effect of the display panel are improved, and a narrow bezel design is achieved.
CN115623880BActive Publication Date: 2026-06-26BOE TECHNOLOGY GROUP CO LTD +1
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2021-04-28
- Publication Date
- 2026-06-26
AI Technical Summary
Technical Problem
In existing OLED display devices, the design of the transistor structure leads to insufficient space utilization, affecting the resolution and display effect of the display panel.
Method used
A combination structure of polysilicon transistors and oxide transistors is adopted, and the transistor layout is optimized by setting vias and grooves on the interlayer insulating layer to reduce overlapping areas and improve space utilization.
Benefits of technology
The resolution of the display panel has been improved, the display effect has been enhanced, low-frequency flicker and other issues have been reduced, the number of signal lines has been reduced, and a narrow bezel design has been achieved.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN115623880B_ABST
Abstract
A display substrate, a manufacturing method thereof, and a display device, the display substrate comprising a first semiconductor layer, a first conductive layer, a second conductive layer, a second semiconductor layer, a third conductive layer, an interlayer insulating layer and an organic layer stacked on a substrate; the first semiconductor layer comprises an active layer of a polysilicon transistor, the first conductive layer comprises a gate electrode of the polysilicon transistor and a first plate of a storage capacitor, the second conductive layer comprises a second plate of the storage capacitor, the second semiconductor layer comprises an active layer of an oxide transistor, and the third conductive layer comprises a gate electrode of the oxide transistor; the interlayer insulating layer is provided with a plurality of vias and grooves, the orthographic projection of the plurality of vias on the substrate overlaps at least one of the first semiconductor layer, the first conductive layer, the second conductive layer, the second semiconductor layer and the third conductive layer on the substrate, and the organic layer fills the plurality of grooves.
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