A method, apparatus, device and storage medium for calculating direction of arrival
By using parallel computation between the logic and system terminals of the FPGA on-chip system, the problem of long direction-of-arrival (DOA) calculation time in 4D radar imaging is solved, and efficient multi-core DOA calculation is achieved.
Patent Information
- Application Number
- CN202211384717.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-11-07
- Publication Date
- 2025-10-24
- Estimated Expiration
- 2042-11-07
AI Technical Summary
In 4D radar imaging design, the direction of arrival calculation time is long, resulting in low computational efficiency, especially when the number of targets is large, the calculation time increases exponentially.
The ZYNQ FPGA-based system-on-a-chip utilizes the interaction between its logic side (PL side) and system side (PS side) to perform independent parallel computation on elevation and azimuth array metadata through parallel computing technology. It also leverages the high-efficiency computing characteristics of the IP cores on the PL side to distribute the computation results to multiple cores for angle calculation and matching.
It significantly shortens the direction-of-arrival (DOA) calculation time and improves computational efficiency, enabling the calculation of DOA for complex targets to be completed in a short time through multi-core computing technology.
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Figure CN115685126B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of radar imaging, in particular to a method and device for calculating direction of arrival, equipment and storage medium. BACKGROUND
[0002] When designing a 4D radar imaging, the direction of arrival estimation often needs to consume a long time of operation. When the number of targets is too large, the time of direction of arrival calculation also increases exponentially, resulting in long calculation time and low running efficiency. Therefore, there is an urgent need for a method that can improve the efficiency of direction of arrival calculation. SUMMARY
[0003] In order to solve at least one of the above technical problems, shorten the time of direction of arrival calculation, and improve the running efficiency, the present application provides a method and device for calculating direction of arrival, equipment and storage medium. The present application uses a ZYNQ type of system on chip of FPGA. The system on chip has a PL end (logic end) and a PS end (system end).
[0004] According to one aspect of the present application, a method for calculating direction of arrival is provided. The method is applied to the logic end of a system on chip. The method comprises:
[0005] In the case of obtaining a first interrupt signal, reading array element data from the system end, the array element data comprising azimuth array element data and elevation array element data, the system end being configured to reconstruct position information data of at least one target object into array elements and obtain the array element data and the first interrupt signal, the first interrupt signal indicating that the logic end is allowed to read the array element data;
[0006] Independently and in parallel, the azimuth array element data and the elevation array element data are operated to obtain independent and parallel operation results and a second interrupt signal, the second interrupt signal indicating that the system end is allowed to read the independent and parallel operation results;
[0007] The independent and parallel operation results are stored in a first memory for reading by the system end, and the system end is further configured to perform multi-core direction of arrival calculation based on the independent and parallel operation results.
[0008] In some possible implementations, the first interrupt signal comprises a first azimuth interrupt signal and a first elevation interrupt signal, and the method comprises:
[0009] In the case of obtaining the first interrupt signal, reading array element data from the system end, comprising:
[0010] In the case of obtaining the first azimuth interrupt signal, reading the azimuth array element data;
[0011] In a case where the first pitch interrupt signal is acquired, the pitch array element data is read.
[0012] In some possible implementation manners, the independent parallel operation result includes an azimuth operation result and a pitch operation result, the second interrupt signal includes a second azimuth interrupt signal and a second pitch interrupt signal, and the method includes:
[0013] The independent parallel operation on the azimuth array element data and the pitch array element data includes:
[0014] In a case where the azimuth array element data is read, the azimuth independent parallel operation is performed on the azimuth array element data to obtain the azimuth operation result and the second azimuth interrupt signal.
[0015] In a case where the pitch array element data is read, the pitch independent parallel operation is performed on the pitch array element data to obtain the pitch operation result and the second pitch interrupt signal.
[0016] In some possible implementation manners, the logic end includes at least two operation cores, and the independent parallel operation on the azimuth array element data and the pitch array element data includes:
[0017] The array element data is distributed to different operation cores for independent parallel operation based on the type of the array element data and the number of the operation cores.
[0018] According to a second aspect of the present disclosure, a direction of arrival calculation method is provided, which is applied to a system end of a system on chip, and includes:
[0019] The position information data of at least one target object is subjected to array element reconstruction to obtain array element data and a first interrupt signal, and the first interrupt signal indicates that the logic end is allowed to read the array element data.
[0020] The array element data is stored in a second memory for reading by the logic end, the logic end is configured to perform independent parallel operation on the array element data, and obtain an independent parallel operation result and a second interrupt signal, and the second interrupt signal indicates that the system end is allowed to read the independent parallel operation result.
[0021] In a case where the second interrupt signal is acquired, the independent parallel operation result is read.
[0022] The independent parallel operation result is subjected to multi-core direction of arrival calculation to obtain a point cloud image representing the direction of arrival.
[0023] In some possible implementation manners, the system end includes at least two operation cores, and the multi-core DOA calculation on the independent parallel operation results includes:
[0024] According to the number of operation cores, the independent parallel operation results are distributed to different operation cores for the multi-core DOA calculation.
[0025] In some possible implementation manners, the second interrupt signal includes a second azimuth interrupt signal and a second elevation interrupt signal, the independent parallel operation results include an azimuth operation result and an elevation operation result, and the method includes:
[0026] The reading of the independent parallel operation results in the case where the second interrupt signal is acquired includes:
[0027] The azimuth operation result is read in the case where the second azimuth interrupt signal is acquired.
[0028] The elevation operation result is read in the case where the second elevation interrupt signal is acquired.
[0029] In some possible implementation manners, the multi-core DOA calculation on the independent parallel operation results obtains a point cloud image representing a DOA, and the method includes:
[0030] In the case where the azimuth operation result is read, at least one azimuth angle is calculated based on the azimuth operation result.
[0031] In the case where the elevation operation result is read, at least one elevation angle is calculated based on the elevation operation result.
[0032] Angle matching is performed based on the azimuth angle and the elevation angle to obtain the point cloud image.
[0033] In some possible implementation manners, the angle matching based on the azimuth angle and the elevation angle to obtain the point cloud image includes:
[0034] The azimuth angle and the elevation angle corresponding to each target object are determined.
[0035] The point cloud image of the corresponding target object is obtained based on the azimuth angle and the elevation angle.
[0036] According to a third aspect of the present disclosure, a DOA calculation device is provided, which is applied to a logic end of a system on chip, and includes:
[0037] An array element reading module is configured to read array element data from a system end in a case where a first interrupt signal is acquired, the array element data including azimuth array element data and elevation array element data, the system end being configured to perform array element reconstruction on position information data of at least one target object and obtain the array element data and the first interrupt signal, the first interrupt signal indicating that the logic end is allowed to read the array element data.
[0038] An independent parallel operation module is configured to perform independent parallel operation on the azimuth array element data and the elevation array element data, and obtain independent parallel operation results and a second interrupt signal, the second interrupt signal indicating that the system end is allowed to read the independent parallel operation results.
[0039] A first storage module is configured to store the independent parallel operation results in a first storage for reading by the system end, and the system end is further configured to perform multi-core DOA calculation based on the independent parallel operation results.
[0040] According to a fourth aspect of the present disclosure, a DOA calculation device is provided, the device being applied to a system end of a system on chip, and the device comprising:
[0041] An array element reconstruction module is configured to perform array element reconstruction on position information data of at least one target object, and obtain array element data and a first interrupt signal, the first interrupt signal indicating that the logic end is allowed to read the array element data.
[0042] A second storage module is configured to store the array element data in a second storage for reading by the logic end, and the logic end is configured to perform independent parallel operation on the array element data, and obtain independent parallel operation results and a second interrupt signal, the second interrupt signal indicating that the system end is allowed to read the independent parallel operation results.
[0043] An operation result reading module is configured to read the independent parallel operation results in a case where the second interrupt signal is acquired.
[0044] A multi-core DOA calculation module is configured to perform multi-core DOA calculation on the independent parallel operation results, and obtain a point cloud image representing a DOA.
[0045] According to a fifth aspect of the present disclosure, a DOA calculation device is provided, the device comprising a processor and a memory, the memory storing at least one instruction or at least one program, the at least one instruction or the at least one program being loaded and executed by the processor to implement the DOA calculation method.
[0046] According to a sixth aspect of the present disclosure, a non-volatile computer readable storage medium is provided, and computer program instructions are stored on the medium. When the computer program instructions are executed by a processor, the above-mentioned method for calculating the direction of arrival is implemented.
[0047] It should be understood that the above general description and the following detailed description are exemplary and explanatory, but not limiting.
[0048] The present application has the following beneficial effects:
[0049] When using the FPGA system-on-chip for 4D radar imaging design, the direction of arrival estimation module is usually in the PS end, i.e., the system end of the present application, and is in a completely serial manner. The array element data in the elevation dimension and the array element data in the azimuth dimension cannot be operated simultaneously, which leads to low efficiency of direction of arrival calculation. The present application uses the PS end (system end) and the PL end (logic end) of the FPGA system-on-chip to interact, uses the parallel operation characteristics of the IP core in the PL end to perform parallel operation on the elevation array element data and the azimuth array element data, so that the elevation array element data and the azimuth array element data can be operated simultaneously, and the operation efficiency of the PL end IP core is higher than that of the PS end, which greatly shortens the data operation time.
[0050] And because there are multiple operation cores in the PS end, the PL end can write the results generated after parallel operation into the memory, which are read by the PS end. By using the multi-core characteristics, the parallel operation results are divided into different cores for angle calculation and angle matching at the same time, improving the operation efficiency of direction of arrival calculation and shortening the calculation time. BRIEF DESCRIPTION OF DRAWINGS
[0051] In order to more clearly illustrate the technical solutions of the present application, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.
[0052] Figure 1 The logic end direction of arrival calculation method flowchart of the embodiment of the present application is shown;
[0053] Figure 2 The first interrupt signal reading situation schematic diagram of the embodiment of the present application is shown;
[0054] Figure 3 The independent parallel operation schematic diagram of the embodiment of the present application is shown;
[0055] Figure 4A schematic diagram of the logic end multi-target independent parallel operation of the embodiment of the present application is shown.
[0056] Figure 5 A schematic diagram of the system end wave direction calculation method flow of the embodiment of the present application is shown.
[0057] Figure 6 A schematic diagram of the logic end reading data state machine flow of the embodiment of the present application is shown.
[0058] Figure 7 A schematic diagram of the system end wave direction calculation of the embodiment of the present application is shown.
[0059] Figure 8 A schematic diagram of the second interrupt signal reading condition of the embodiment of the present application is shown.
[0060] Figure 9 A schematic diagram of the multi-core wave direction calculation of the embodiment of the present application is shown.
[0061] Figure 10 A schematic diagram of the angle matching method flow of the embodiment of the present application is shown.
[0062] Figure 11 A block diagram of the logic end wave direction calculation device of the embodiment of the present application is shown.
[0063] Figure 12 A block diagram of the system end wave direction calculation device of the embodiment of the present application is shown.
[0064] Figure 13 A structural block of an electronic device of the embodiment of the present application is shown. Figure 1
[0065] Figure 14 A structural block of an electronic device of the embodiment of the present application is shown. Figure 2 DETAILED DESCRIPTION
[0066] The technical solutions in the embodiments of the present application will be described clearly and completely in the following with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of the present application.
[0067] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.
[0068] Various exemplary embodiments, features, and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.
[0069] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.
[0070] The term "and / or" herein simply describes an association relationship between associated objects, indicating that three relationships can exist. For example, "A and / or B" can represent the existence of three situations: A alone, A and B simultaneously, and B alone. Furthermore, the term "at least one" herein refers to any combination of at least two of any one or more of a plurality of items. For example, "at least one of A, B, and C" can represent any one or more elements selected from the set consisting of A, B, and C.
[0071] In addition, numerous specific details are provided in the following detailed description to better illustrate the present application. Those skilled in the art will appreciate that the present application can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art are not described in detail in order to highlight the main purpose of the present application.
[0072] According to one aspect of the present application, a method for calculating the direction of arrival is provided. Figure 1 , Figure 2 A flow chart of a method for calculating a direction of arrival at a logical end in accordance with an embodiment of the present application is shown. The method is applied to a logical end of a system on a chip and includes:
[0073] Step S101: In the case of obtaining the first interrupt signal, read the cell data from the system end, the cell data including azimuth cell data and elevation cell data, the system end being configured to perform cell reconstruction on position information data of at least one target object and obtain the cell data and the first interrupt signal, the first interrupt signal indicating that the logic end is allowed to read the cell data;
[0074] Step S102: independently and in parallel, operate on the azimuth cell data and the elevation cell data to obtain independent and parallel operation results and a second interrupt signal, the second interrupt signal indicating that the system end is allowed to read the independent and parallel operation results;
[0075] Step S103: store the independent and parallel operation results to a first memory for reading by the system end, the system end further being configured to perform multi-core direction finding based on the independent and parallel operation results.
[0076] In an embodiment of the present application, when the PL end (logic end) reads the first interrupt signal in the memory, the cell data is continuously read from the memory, wherein the cell data includes two-dimensional cell data, which is usually obtained by performing cell reconstruction on the two-dimensional constant false alarm rate collected by the radar, and is azimuth cell data and elevation cell data respectively. After reading the two kinds of data, independent and parallel operation is performed on the two kinds of cell data, that is, the elevation cell data and the azimuth cell data can be simultaneously subjected to FFT (Fourier transform operation) to synthesize digital beams.
[0077] In a specific embodiment, in the conventional way, the PS end (system end) is usually used to perform FFT on the elevation cell data and the azimuth cell data. However, the PS end can only perform serial operation, and the elevation cell data and the azimuth cell data cannot be subjected to FFT at the same time. In the conventional way, for example, the time required for FFT on the azimuth cell data of a target is T11, and the time required for FFT on the elevation cell data of the target is T12. Therefore, the time required for FFT on the two kinds of data of the target using the conventional way is T11+T12.
[0078] In another specific embodiment, the PL end (logical end) is used in the application to perform FFT on the elevation array data and the azimuth array data, and the advantage is that the IP core in the PL end can perform parallel operation. If the time required for performing FFT on the azimuth array data of a target in the PL end is T21, and the time required for performing FFT on the elevation array data of the target in the PL end is T22, because the number of points of the elevation array data is smaller, the operation time is also shorter. Compared with the traditional mode, T11>T12, T21>T22, and T11>T21 because the operation efficiency of the PL end is higher than that of the PS end. Because the PL end can perform parallel operation, the FFT operation time of the elevation array data can be completely covered by the FFT operation time of the azimuth array data. Therefore, the shortest time for completing FFT of both types of data is T21, which is obviously much shorter than the time in the traditional mode.
[0079] In one embodiment, refer to Figure 3 , Figure 3 A first interrupt signal reading case schematic diagram of an embodiment of the application is shown. The first interrupt signal includes a first azimuth interrupt signal and a first elevation interrupt signal. The method includes the following steps.
[0080] In the case of obtaining the first interrupt signal, the array data from the system end is read, including the following steps.
[0081] In the case of obtaining the first azimuth interrupt signal, the azimuth array data is read.
[0082] In the case of obtaining the first elevation interrupt signal, the elevation array data is read.
[0083] In the embodiment of the application, different dimensions of array data correspond to different interrupt signals. When the PL end reads the interrupt signal corresponding to one type of array data, the corresponding array data can be directly read for subsequent operation, so as to save the time of DOA calculation and maximize the efficiency of shortening the time of DOA calculation.
[0084] It can be understood that the first interrupt signal indicates that the PL end can read the array data from the memory, and also indicates that the PS end has completed the corresponding array reconstruction of data and written the corresponding array data into the memory for the PL end to read.
[0085] In one specific embodiment, if the PL end reads the first azimuth interrupt signal but does not read the first elevation interrupt signal, it means that the PS end has completed the element reconstruction of the azimuth element data and written it into the memory, but has not completed the element reconstruction of the elevation element data, at this time, the PL end can read the azimuth element data first for subsequent FFT. Similarly, if the PL end reads the first elevation interrupt signal but does not read the first azimuth interrupt signal, the PL end can read the elevation element data first for subsequent FFT.
[0086] In another specific embodiment, the PL end includes two modules, an azimuth module and an elevation module, the azimuth module is responsible for reading the first azimuth interrupt signal, and in the case of reading the first azimuth interrupt signal, reading the azimuth element data for subsequent operation; the elevation module is responsible for reading the first elevation interrupt signal, and in the case of reading the first elevation interrupt signal, reading the elevation element data for subsequent operation.
[0087] In one embodiment, please refer to Figure 4 , Figure 4 The independent parallel operation schematic diagram of the embodiment of the application is shown, the independent parallel operation result includes the azimuth operation result and the elevation operation result, the second interrupt signal includes the second azimuth interrupt signal and the second elevation interrupt signal, and the method includes:
[0088] The independent parallel operation on the azimuth element data and the elevation element data to obtain the independent parallel operation result and the second interrupt signal includes:
[0089] In the case of reading the azimuth element data, performing azimuth independent parallel operation on the azimuth element data to obtain the azimuth operation result and the second azimuth interrupt signal;
[0090] In the case of reading the elevation element data, performing elevation independent parallel operation on the elevation element data to obtain the elevation operation result and the second elevation interrupt signal.
[0091] In the embodiment of the application, the FFT of the azimuth element data and the FFT of the elevation element data are two independent operation processes, and they do not affect each other. In order to minimize the time in each step of the direction of arrival calculation, if the PL end reads only one kind of element data, the FFT of the element data can be performed first, and the time of waiting for the other kind of element data is saved.
[0092] In one specific embodiment, if the PL end only reads the azimuth element data but not the elevation element data, the PL end directly performs FFT on the azimuth element data; similarly, if the PL end only reads the elevation element data but not the azimuth element data, the PL end directly performs FFT on the elevation element data; if the PL end reads both the azimuth element data and the elevation element data, the PL end simultaneously performs FFT on both.
[0093] In another specific embodiment, the PL end includes two modules, i.e., an azimuth module and an elevation module, and the reading and operation of the azimuth element data are completed in the azimuth module, for example, after the azimuth module reads the first azimuth interrupt signal, the azimuth module continues to read the azimuth element data and performs FFT on the azimuth element data; similarly, the reading and operation of the elevation element data are completed in the elevation module.
[0094] In one embodiment, please refer to Figure 4 , Figure 4 FIG. 1 shows a schematic diagram of the independent parallel operation of the logic end of the embodiment of the present application, the logic end includes at least two operation cores, and the independent parallel operation of the azimuth element data and the elevation element data includes:
[0095] Based on the types of the element data and the number of the operation cores, the element data is distributed to different operation cores for independent parallel operation.
[0096] In the embodiment of the present application, Figure 4 DDR_WR represents writing data into the memory, and DDR_RD represents reading data from the memory. Because there are at least two types of element data and the two types of element data are independently and in parallel operated, at least two operation cores are needed to complete the parallel operation of the two types of element data. In the calculation of the DOA of multiple target objects, more operation cores can be set to calculate the DOA of different target objects, which can shorten the calculation time.
[0097] In one specific embodiment, the PL end includes two operation cores, which are respectively responsible for the FFT of the azimuth element data and the FFT of the elevation element data, and the two operation cores are independently operated and do not affect each other. Please refer to Figure 5 , Figure 6 FIG. 2 shows a schematic diagram of the independent parallel operation of the logic end of the embodiment of the present application, in the case of multiple target objects, each target object has corresponding azimuth element data and elevation element data, and two operation cores simultaneously perform parallel FFT on the azimuth element data and the elevation element data of target 1, and then sequentially perform FFT on the azimuth element data and the elevation element data of target 2, target 3, and target 4.
[0098] In another specific embodiment, the PL end includes 4 operation cores, in the case of multiple target objects, for example, 4 target objects, the target object array element data can be allocated first, for example, the azimuth array element data of target 1 and target 2 is allocated to operation core 1, the elevation array element data of target 1 and target 2 is allocated to operation core 2, the azimuth array element data of target 3 and target 4 is allocated to operation core 3, and the elevation array element data of target 3 and target 4 is allocated to operation core 4. Operation first stage: operation core 1 performs FFT on the azimuth array element data of target 1, operation core 2 performs FFT on the elevation array element data of target 1, operation core 3 performs FFT on the azimuth array element data of target 3, and operation core 4 performs FFT on the elevation array element data of target 3; operation second stage: operation core 1 performs FFT on the azimuth array element data of target 2, operation core 2 performs FFT on the elevation array element data of target 2, operation core 3 performs FFT on the azimuth array element data of target 4, and operation core 4 performs FFT on the elevation array element data of target 4; each operation core corresponds to two operation stages, if a certain operation core completes the first operation stage, it can directly perform the second operation stage, for example, operation core 1 completes the FFT of the azimuth array element data of target 1, regardless of whether the other operation cores are completed, operation core 1 starts the FFT of the azimuth array element data of target 2.
[0099] According to a second aspect of the present application, a wave direction calculation method is provided. Referring to Figure 7 、 Figure 5 and Figure 6 , Figure 7 a system end wave direction calculation method flow diagram of an embodiment of the present application is shown, Figure 6 a logic end reading data state machine flow diagram of an embodiment of the present application is shown, Figure 6 a system end wave direction calculation diagram of an embodiment of the present application is shown, the above method is applied to the system end of a system on chip, and the above method includes:
[0100] Step S501: array element reconstruction is performed on position information data of at least one target object to obtain array element data and a first interrupt signal, the first interrupt signal indicating that the logic end is allowed to read the array element data;
[0101] Step S502: the array element data is stored in a second memory for reading by the logic end, the logic end is used to perform independent parallel operation on the array element data and obtain independent parallel operation results and a second interrupt signal, the second interrupt signal indicating that the system end is allowed to read the independent parallel operation results;
[0102] In the embodiments of the present application, the system end reconstructs the position information data of the target object into array elements to obtain azimuth array element data and elevation array element data, and generates a first interrupt signal, wherein the first interrupt signal includes a first azimuth interrupt signal and a first elevation interrupt signal. After the system end completes the reconstruction of the azimuth array elements, whether the reconstruction of the elevation array elements is completed or not, the first azimuth interrupt signal and the azimuth array element data are written into the memory for reading by the logic end. Similarly, after the system end completes the reconstruction of the elevation array elements, whether the reconstruction of the azimuth array elements is completed or not, the first elevation interrupt signal and the elevation array element data are written into the memory for reading by the logic end.
[0103] Step S503: In the case where the second interrupt signal is acquired, the independent parallel operation result is read.
[0104] Step S504: The independent parallel operation result is subjected to multi-core DOA calculation to obtain a point cloud image representing the DOA.
[0105] In the embodiments of the present application, the system end subjects the independent parallel operation result to multi-core DOA calculation through multiple operation cores, which can simultaneously perform operation through the multiple operation cores to save the DOA calculation time.
[0106] In a specific embodiment, please refer to Figure 7 , Figure 7 The logic end reading data state machine flowchart of the embodiments of the present application is shown. When the first interrupt signal is written into the memory, the state machine jumps from the initial state to the start, and then the array element data is written. After the second interrupt signal is written, the state machine starts to read the independent parallel operation result, and then returns to the initial state.
[0107] In a specific embodiment, please refer to Figure 7 , Figure 7 The system end DOA calculation schematic diagram of the embodiments of the present application is shown. Figure 72D-CFAR represents two-dimensional constant false alarm rate, a method of radar sampling; Core0 represents operation core 0, Core1 represents operation core 1, Core2 represents operation core 2, and Core3 represents operation core 3. The ZYNQ type of system on chip of the FPGA is used in the embodiment of the application, and the PS end includes four operation cores. The four operation cores simultaneously perform array element reconstruction and direction of arrival calculation on independent operation results of different target objects. The dashed box represents the part of the PS end interacting with the PL end. In the traditional operation mode, single-core operation can only perform direction of arrival calculation on the independent operation results of one target object at a time. If there are four target objects in total, the time for the traditional operation mode to perform direction of arrival calculation on target 1, target 2, target 3, and target 4 in turn is T. In the application, the system end includes four operation cores, and the four operation cores can simultaneously perform operation on four targets. Therefore, the time for the system end to perform direction of arrival calculation in the application is T / 4. As can be seen, the multi-core operation used in the application can greatly improve the operation efficiency.
[0108] In another specific embodiment, each operation core of the PS end further performs distance calculation on each target object according to the position information data of each target object before performing array element reconstruction on the position information data of the target object, to calculate the distance between the transmitting source and the receiving radar; and each operation core of the PS end further includes velocity deblurring of the array element data after performing array element reconstruction on the position information data of the target object, to improve the detection range.
[0109] In one embodiment, refer to Figure 8 , Figure 8 FIG. 1 shows a system end direction of arrival calculation schematic diagram of the embodiment of the application. The system end includes at least two operation cores. The multi-core direction of arrival calculation on the independent parallel operation results includes:
[0110] According to the number of operation cores, the independent parallel operation results are distributed to different operation cores for simultaneous multi-core direction of arrival calculation.
[0111] In the embodiment of the application, the system end includes at least two operation cores for direction of arrival calculation. Different operation cores are responsible for direction of arrival calculation of different target objects, solving the problem of low operation efficiency caused by sequential direction of arrival calculation on target objects.
[0112] In one specific embodiment, the PS end has four operation cores, and there are four target objects in the calculation of the wave direction, the four operation cores respectively reconstruct the position information data of the four target objects, and after the array element reconstruction is completed, the corresponding array element data and the first interrupt signal are written into the memory, the PL end reads the array element data of each target in turn to perform FFT, and writes the independent parallel operation results into the memory, and the independent parallel operation results of different target objects are distributed to different operation cores for wave direction calculation.
[0113] In another specific embodiment, if the PS end has four operation cores and the number of target objects is greater than four, the distribution of the target objects can be that the target objects are automatically grouped by the computer, and are divided into four groups, and each operation core is responsible for the wave direction calculation of a group of target objects. The distribution method can also be that the target objects are numbered in turn, and the data of the first four target objects are distributed to the four operation cores respectively, and when an operation core completes the operation, the position information data or the independent parallel operation results of the target objects are sequentially obtained according to the numbering order for corresponding processing. It can be understood that the specific distribution method is not limited in the present application.
[0114] In one embodiment, please refer to Figure 9 , Figure 9 The second interrupt signal reading situation diagram of the embodiment of the present application is shown, the second interrupt signal includes a second azimuth interrupt signal and a second elevation interrupt signal, the independent parallel operation result includes an azimuth operation result and an elevation operation result, and the method includes:
[0115] The reading of the independent parallel operation result in the case of obtaining the second interrupt signal includes:
[0116] The reading of the azimuth operation result in the case of obtaining the second azimuth interrupt signal;
[0117] The reading of the elevation operation result in the case of obtaining the second elevation interrupt signal.
[0118] In the embodiment of the present application, the second interrupt signal indicates that the PL end has completed the independent parallel operation and written the independent parallel operation result into the memory, and if the PS end reads the second interrupt signal, the independent parallel operation result can be read, wherein the second interrupt signal includes a second azimuth interrupt signal and a second elevation interrupt signal, and the PS end can directly read the corresponding independent parallel operation result for corresponding angle calculation in the case of obtaining a certain second interrupt signal, without waiting for another interrupt signal, thereby improving the operation efficiency of the PS end.
[0119] In one specific embodiment, when the PS end only reads the second azimuth interrupt signal and does not read the second pitch interrupt signal, the PS directly reads the azimuth operation result and calculates the azimuth angle of the target object.
[0120] In another specific embodiment, when there are multiple target objects, for example, two target objects, the PL end sequentially performs independent parallel operations of target 1 and target 2. If the PS end has two operation cores, when the PL end completes the independent parallel operation of target 1, the PS end assigns it to operation core 1 and reads the independent parallel operation result of target 1 to perform angle calculation. When the PL end completes the independent parallel operation of target 2, the PS end assigns it to operation core 2 regardless of whether operation core 1 has completed angle calculation. It can be understood that for target 1, if the azimuth parallel operation result is read first, operation core 1 calculates the azimuth angle first, and when the pitch parallel operation result can be read, operation core 1 calculates the pitch angle. The operation content of operation core 1 and the operation content of operation core 2 are relatively independent.
[0121] In one embodiment, please refer to Figure 10 , Figure 10 The above independent parallel operation results are subjected to multi-core direction finding calculation to obtain a point cloud image representing the direction of arrival, including:
[0122] Step S911: Based on the azimuth operation result, at least one azimuth angle is calculated when the azimuth operation result is read.
[0123] Step S912: Based on the pitch operation result, at least one pitch angle is calculated when the pitch operation result is read.
[0124] Step S920: Angle matching is performed based on the azimuth angle and the pitch angle to obtain the point cloud image.
[0125] In the embodiments of the present application, the multi-core direction finding calculation of the PS end includes angle calculation and angle matching, and finally outputs the point cloud. The PS end first performs angle calculation based on the read independent parallel operation result, and when the calculation of the azimuth angle and the pitch angle is completed, the matching of the azimuth angle and the pitch angle is started to restore the position of the target object, and finally the output is in the form of a point cloud.
[0126] In one specific embodiment, the multi-core direction finding calculation of each target object is completed in different operation cores. Since there is at least one target object, when the PS end performs angle calculation, at least one pitch angle and at least one azimuth angle are calculated, and each target object corresponds to one azimuth angle and one pitch angle.
[0127] In another specific embodiment, the azimuth angle is an angle in the horizontal plane, and the pitch angle is an angle in a plane perpendicular to the horizontal plane. Then, the position and distance of the target object can be restored based on the azimuth angle and the pitch angle.
[0128] In one embodiment, see Figure 11 , Figure 11 A schematic flow chart of a multi-core direction of arrival calculation method according to an embodiment of the present application is shown. The method includes performing angle matching based on the azimuth angle and the elevation angle to obtain the point cloud image, including:
[0129] Step S1001: determining the azimuth and elevation angles corresponding to each of the target objects;
[0130] Step S1002: obtaining a point cloud image of the corresponding target object based on the azimuth angle and the pitch angle.
[0131] In an embodiment of the present application, the azimuth and elevation angles corresponding to each target object are determined, the position and distance of the target object are restored through the corresponding azimuth and elevation angles, and then the direction of arrival of the target object is determined to complete the calculation of the direction of arrival of the transmitting source.
[0132] In a specific embodiment, after each computing core completes the calculation of the azimuth and elevation angles of a target object, the two angles are matched to determine the direction of arrival of the target object.
[0133] In another specific embodiment, when the number of target objects is greater than the number of computing cores, each computing core performs angle calculation and angle matching on one target object at a time and outputs the corresponding result. After outputting the result, it performs angle calculation and angle matching on other target objects.
[0134] According to the third aspect disclosed in the present application, a direction of arrival calculation device is provided, see Figure 12 , Figure 12 A block diagram of a logical end direction of arrival calculation device according to an embodiment of the present application is shown. The device is applied to the logical end of a system on a chip, and includes:
[0135] The array element reading module 1110 is configured to read array element data from the system end upon receiving the first interrupt signal, the array element data including azimuth array element data and elevation array element data. The system end is configured to perform array element reconstruction on position information data of at least one target object and obtain the array element data and the first interrupt signal, wherein the first interrupt signal indicates that the logic end is permitted to read the array element data.
[0136] In one specific embodiment, the array element reading module 1110 is configured to read the first interrupt signal and the array element data from the memory.
[0137] In one specific embodiment, the array element reading module is further divided into an azimuth dimension array element reading unit and an elevation dimension array element reading unit, wherein the azimuth dimension array element reading unit is configured to read the first azimuth interrupt signal and the azimuth dimension array element data, and the elevation dimension array element reading unit is configured to read the first elevation interrupt signal and the elevation dimension array element data.
[0138] The independent parallel operation module 1120 is configured to perform independent parallel operation on the azimuth dimension array element data and the elevation dimension array element data to obtain independent parallel operation results and a second interrupt signal, wherein the second interrupt signal indicates that the system end is allowed to read the independent parallel operation results.
[0139] In one specific embodiment, the independent parallel operation module 1120 includes an azimuth parallel operation module and an elevation parallel operation module, wherein the azimuth parallel operation module is configured to perform FFT on the azimuth dimension array element data, and the elevation parallel operation module is configured to perform FFT on the elevation dimension array element data.
[0140] The first storage module 1130 is configured to store the independent parallel operation results in a first memory for reading by the system end, and the system end is further configured to perform multi-core DOA calculation based on the independent parallel operation results.
[0141] In one specific embodiment, the first storage module 1130 is configured to store the independent parallel operation results after FFT and the second interrupt signal.
[0142] In one specific embodiment, the first storage module 1130 includes a first azimuth storage module and a first elevation storage module, wherein the first azimuth storage module is configured to store the azimuth parallel operation results and the second azimuth interrupt signal, and the first elevation storage module is configured to store the elevation parallel operation results and the second elevation interrupt signal.
[0143] According to a fourth aspect of the present disclosure, a DOA calculation device is provided, which can be used in a system end of a system on chip, and includes: Figure 13 , Figure 1 A block diagram of a system end DOA calculation device of an embodiment of the present disclosure is shown, which can be used in a system end of a system on chip, and includes:
[0144] The array element reconstruction module 1210 is configured to perform array element reconstruction on the position information data of at least one target object to obtain array element data and a first interrupt signal, wherein the first interrupt signal indicates that the logic end is allowed to read the array element data.
[0145] In one specific embodiment, the array element reconstruction module 1210 is configured to reconstruct array elements from raw data, which can be data representing position information of a transmitting source collected by a radar operating in two dimensions constant false alarm rate.
[0146] In one specific embodiment, the array element reconstruction module 1210 includes an azimuth dimension array element reconstruction module and an elevation dimension array element reconstruction module, wherein the azimuth dimension array element reconstruction module is configured to reconstruct array elements from raw data in the azimuth dimension and generate a first azimuth interrupt signal, and the elevation dimension array element reconstruction module is configured to reconstruct array elements from raw data in the elevation dimension and generate a first elevation interrupt signal.
[0147] The second storage module 1220 is configured to store the array element data to a second memory for reading by a logic end, wherein the logic end is configured to perform independent parallel operations on the array element data and obtain independent parallel operation results and a second interrupt signal, and the second interrupt signal indicates that the system end is allowed to read the independent parallel operation results.
[0148] In one specific embodiment, the second storage module 1220 is configured to store the array element data and the first interrupt signal.
[0149] In one specific embodiment, the second storage module 1220 includes a second azimuth storage module and a second elevation storage module, wherein the second azimuth storage module is configured to store azimuth dimension array element data and the first azimuth interrupt signal, and the second elevation storage module is configured to store elevation dimension array element data and the first elevation interrupt signal.
[0150] The operation result reading module 1230 is configured to read the independent parallel operation results when the second interrupt signal is obtained.
[0151] In one specific embodiment, the operation result reading module 1230 includes an azimuth operation result reading module and an elevation operation result reading module, wherein the azimuth operation result reading module is configured to read the second azimuth interrupt signal and the azimuth parallel operation results, and the elevation operation result reading module is configured to read the second elevation interrupt signal and the elevation parallel operation results.
[0152] The multi-core direction of arrival calculation module 1240 is configured to perform multi-core direction of arrival calculation on the independent parallel operation results to obtain a point cloud image representing a direction of arrival.
[0153] In one specific embodiment, the multi-core direction of arrival calculation module 1240 is configured to read the azimuth parallel operation results and the elevation parallel operation results, calculate azimuth angles and elevation angles, and determine a direction of arrival of a target object.
[0154] Please refer to Figure 13 which shows a structure block of an electronic device provided by one embodiment of the present applicationFigure 14 The electronic device can be a terminal. The electronic device is configured to implement the method of calculating the direction of arrival provided in the above embodiments. Specifically:
[0155] The electronic device 1300 includes a processor 1301 and a memory 1302.
[0156] The processor 1301 can include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 1301 can be implemented in the form of at least one of a DSP (Digital Signal Processing), an FPGA (Field Programmable Gate Array), a PLA (Programmable Logic Array). The processor 1301 can also include a main processor and a coprocessor. The main processor is a processor for processing data in an awake state, also known as a CPU (Central Processing Unit). The coprocessor is a low-power processor for processing data in a standby state. In some embodiments, the processor 1301 can be integrated with a GPU (Graphics Processing Unit) that is responsible for rendering and drawing the content required to be displayed on the display screen. In some embodiments, the processor 1301 can also include an AI (Artificial Intelligence) processor for processing machine learning-related computing operations.
[0157] The memory 1302 can include one or more computer-readable storage media, which can be non-transitory. The memory 1302 can also include a high-speed random access memory, and a non-volatile memory such as one or more disk storage devices, flash storage devices. In some embodiments, the non-transitory computer-readable storage medium in the memory 1302 is configured to store at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, at least one program, a code set or an instruction set is configured to be executed by one or more processors to implement the above-mentioned method of calculating the direction of arrival.
[0158] In some embodiments, the electronic device 1300 can further include a peripheral device interface 1303 and at least one peripheral device. The processor 1301, the memory 1302, and the peripheral device interface 1303 can be connected through a bus or a signal line. Each peripheral device can be connected to the peripheral device interface 1303 through a bus, a signal line, or a circuit board. Specifically, the peripheral device includes at least one of a radio frequency circuit 1304, a touch display screen 1305, a camera component 1306, an audio circuit 1307, a positioning component 1308, and a power supply 1309.
[0159] Those skilled in the art can understand that Figure 2 The structure shown in FIG. 13 is not a limitation on the electronic device 1300, and the electronic device 1300 can include more or fewer components than those shown in the figure, or combine certain components, or use a different arrangement of components.
[0160] Please refer to which shows the structure of an electronic device provided by another embodiment of the present application . The electronic device can be a server for performing the above-mentioned direction of arrival calculation method. Specifically:
[0161] The electronic device 1400 includes a central processing unit (CPU) 1401, a system memory 1404 including a random access memory (RAM) 1402 and a read-only memory (ROM) 1403, and a system bus 1405 connecting the system memory 1404 and the central processing unit 1401. The electronic device 1400 also includes a basic input / output system (I / O) 1406 that helps transfer information between the various devices within the computer, and a mass storage device 1407 for storing an operating system 1413, application programs 1414, and other program modules 1411.
[0162] The basic input / output system 1406 includes a display 1408 for displaying information and an input device 1409 such as a mouse, a keyboard, or the like for inputting information by a user. The display 1408 and the input device 1409 are both connected to the central processing unit 1401 through an input / output controller 1410 connected to the system bus 1405. The basic input / output system 1406 can also include an input / output controller 1410 for receiving and processing input from a keyboard, a mouse, or an electronic stylus, and the like. Similarly, the input / output controller 1410 also provides output to a display screen, a printer, or other types of output devices.
[0163] A mass storage device 1407 is provided and coupled to the central processing unit 1401 through a mass storage controller (not shown) connected to the system bus 1405. The mass storage device 1407 and its associated computer readable media provide nonvolatile storage for the electronic device 1400. That is, in some embodiments, the mass storage device 1407 can include a computer readable medium (not shown) such as a hard drive or a CD-ROM drive.
[0164] Without loss of generality, computer readable media can include computer storage media and communication media. Computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media includes RAM, ROM, EPROM (Erasable Programmable Read Only Memory), EEPROM (Electrically Erasable Programmable Read Only Memory), flash memory or other solid state memory technology, CD-ROM, digital video disc (DVD), or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices. Computer storage media would not, however, include communication media. The system memory 1404 and mass storage device 1407 described above can collectively be referred to as memory.
[0165] According to various embodiments of the present application, the computer device 1400 can also operate in a networking environment via the network 1412 and one or more remote computers. The computer device 1400 connects to the network 1412 through a network interface unit 1411 connected to the system bus 1405. It is noted that the network interface unit 1411 can also be utilized to connect the computer device 1400 to other types of networks and remote computer systems (not shown).
[0166] The above-described memory also includes a computer program that is stored in the memory and configured to be executed by one or more processors to implement the above-described DOA calculation method.
[0167] In an example embodiment, a computer readable storage medium is also provided, and the storage medium stores at least one instruction, at least one program, a code set or an instruction set. The at least one instruction, the at least one program, the code set or the instruction set, when executed by a processor, implements the above-described DOA calculation method.
[0168] Optionally, the computer readable storage medium can include ROM (Read Only Memory), RAM (Random Access Memory), SSD (Solid State Drives), or optical disc, etc. Among them, the random access memory can include ReRAM (Resistance Random Access Memory) and DRAM (Dynamic Random Access Memory).
[0169] In an exemplary embodiment, a computer readable storage medium including a program code, such as a memory including a program code, is also provided, and the program code can be executed by a processor to complete the above-mentioned video display method. Optionally, the computer readable storage medium can be a read-only memory (ROM), a random access memory (RAM), a compact-disc read-only memory (CD-ROM), a magnetic tape, a floppy disk, and an optical data storage device, etc.
[0170] In an exemplary embodiment, a computer program product is also provided, including a computer program which is executed by a processor to implement the above-mentioned direction of arrival calculation method.
[0171] Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. It is intended that the specification and examples be considered as exemplary only, with the true scope and spirit of the application being indicated by the following claims.
[0172] It should be understood that the application is not limited to the precise construction that has been described above and shown in the accompanying drawings, and that various modifications and changes can be made by those skilled in the art without departing from the scope of the application. The scope of the application is limited only by the appended claims.
Claims
1. A method of calculating direction of arrival, characterized in that, The method is applied to a logic end of a system on chip, and the method comprises: In a case where a first azimuth interrupt signal in a first interrupt signal is acquired, azimuth array element data in array element data is read; In a case where a first elevation interrupt signal in the first interrupt signal is acquired, elevation array element data in the array element data is read, the system end is configured to perform array element reconstruction on position information data of at least one target object, and the array element data and the first interrupt signal are obtained, the first interrupt signal indicating that the logic end is allowed to read the array element data; In a case where the azimuth array element data is read, azimuth independent parallel operation is performed on the azimuth array element data, and azimuth operation results in independent parallel operation results and a second azimuth interrupt signal in a second interrupt signal are obtained; In a case where the elevation array element data is read, elevation independent parallel operation is performed on the elevation array element data, and elevation operation results in the independent parallel operation results and a second elevation interrupt signal in the second interrupt signal are obtained, the second interrupt signal indicating that the system end is allowed to read the independent parallel operation results; The independent parallel operation results are stored in a first memory for reading by the system end, and the system end is further configured to perform multi-core direction finding calculation based on the independent parallel operation results.
2. The method of claim 1, wherein, The logic end comprises at least two operation cores, and the independent parallel operation on the azimuth array element data and the elevation array element data comprises: The array element data is distributed to different operation cores for independent parallel operation based on a type of the array element data and a number of the operation cores.
3. A method of calculating direction of arrival, characterized in that The method is applied to a system end of a system on chip, and the method comprises: Array element reconstruction is performed on position information data of at least one target object, and array element data and a first interrupt signal are obtained, the first interrupt signal indicating that a logic end is allowed to read the array element data; The array element data is stored in a second memory for reading by the logic end, the logic end is configured to perform independent parallel operation on the array element data, and independent parallel operation results and a second interrupt signal are obtained, the second interrupt signal indicating that the system end is allowed to read the independent parallel operation results; In a case where a second azimuth interrupt signal in the second interrupt signal is acquired, azimuth operation results in the independent parallel operation results are read; In a case where a second elevation interrupt signal in the second interrupt signal is acquired, elevation operation results in the independent parallel operation results are read; In a case where the azimuth operation results are read, at least one azimuth angle is calculated based on the azimuth operation results; In a case where the elevation operation results are read, at least one elevation angle is calculated based on the elevation operation results; Angle matching is performed based on the azimuth angle and the elevation angle, and a point cloud image is obtained.
4. The method of claim 3, wherein, The system end comprises at least two operation cores, and the multi-core direction finding calculation on the independent parallel operation results comprises: The independent parallel operation results are distributed to different operation cores for multi-core direction finding calculation simultaneously according to the number of the operation cores.
5. The method of claim 3, wherein, The angle matching based on the azimuth angle and the elevation angle obtains the point cloud image, and the method comprises the following steps: Determine the azimuth angle and the elevation angle corresponding to each target object respectively; Obtain the point cloud image of the corresponding target object based on the azimuth angle and the elevation angle.
6. A direction of arrival calculation device, characterized in that The device is applied to the logic end of a system on chip, and the device comprises: An array element reading module is configured to read azimuth array element data in array element data when a first azimuth interrupt signal in a first interrupt signal is acquired, and read elevation array element data in the array element data when a first elevation interrupt signal in the first interrupt signal is acquired, the system end is configured to perform array element reconstruction on position information data of at least one target object, and obtain the array element data and the first interrupt signal, the first interrupt signal indicating that the logic end is allowed to read the array element data; An independent parallel operation module is configured to perform azimuth independent parallel operation on the azimuth array element data to obtain azimuth operation results in independent parallel operation results and a second azimuth interrupt signal in a second interrupt signal when the azimuth array element data is read, and perform elevation independent parallel operation on the elevation array element data to obtain elevation operation results in the independent parallel operation results and a second elevation interrupt signal in the second interrupt signal when the elevation array element data is read, the second interrupt signal indicating that the system end is allowed to read the independent parallel operation results; A first storage module is configured to store the independent parallel operation results to a first storage for reading by the system end, and the system end is further configured to perform multi-core arrival calculation based on the independent parallel operation results.
7. A direction of arrival calculation device, characterized in that The device is applied to the system end of a system on chip, and the device comprises: An array element reconstruction module is configured to perform array element reconstruction on position information data of at least one target object to obtain array element data and a first interrupt signal, the first interrupt signal indicating that the logic end is allowed to read the array element data; A second storage module is configured to store the array element data to a second storage for reading by the logic end, and the logic end is configured to perform independent parallel operation on the array element data to obtain independent parallel operation results and a second interrupt signal, the second interrupt signal indicating that the system end is allowed to read the independent parallel operation results; An operation result reading module is configured to read azimuth operation results in the independent parallel operation results when a second azimuth interrupt signal in the second interrupt signal is acquired, and read elevation operation results in the independent parallel operation results when a second elevation interrupt signal in the second interrupt signal is acquired; A multi-core arrival calculation module is configured to calculate at least one azimuth angle based on the azimuth operation results when the azimuth operation results are read, calculate at least one elevation angle based on the elevation operation results when the elevation operation results are read, and perform angle matching based on the azimuth angle and the elevation angle to obtain a point cloud image.
8. A device for computing direction of arrival, the device comprising a processor and a memory, the memory having stored therein at least one instruction or at least one program, the at least one instruction or the at least one program being loaded and executed by the processor to implement a method for computing direction of arrival as claimed in any one of claims 1 to 2 or a method for computing direction of arrival as claimed in any one of claims 3 to 5.
9. A non-transitory computer readable storage medium having stored thereon computer program instructions, wherein, The computer program instructions, when executed by a processor, implement a method for computing direction of arrival as claimed in any one of claims 1 to 2 or a method for computing direction of arrival as claimed in any one of claims 3 to 5.
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