Silica flower structure and method of manufacture, method of manufacturing field emission devices and photovoltaic devices

Abstract

The application discloses a silicon flower structure and a manufacturing method thereof, a field emission device and a manufacturing method of a photovoltaic device, and the manufacturing method of the silicon flower structure comprises the following steps: placing a silicon wafer to be formed with a silicon flower structure on a base of a reaction chamber; under preset process conditions, etching gas containing carbon and fluorine elements is introduced into the reaction chamber; the etching gas is ionized to form plasma, and the plasma etches the surface of the silicon wafer for a preset process time, the preset process time is not less than 60 min, so as to form a plurality of silicon flower structures with a spacing of 1-100 mu m on the surface of the silicon wafer. The silicon flower structure manufactured by the method of the application has a simple process, and the coverage of the silicon flower structure can be controlled by controlling the process time.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, and more specifically, to a silicon flower structure and its manufacturing method, a field emission device, and a photovoltaic device manufacturing method. Background Technology

[0002] Silicon wafers have a rough, irregular surface structure, and due to their strong light absorption over a wide spectral range, they are also known as black silicon. Black silicon can improve photoelectric conversion efficiency in the photovoltaic field. Furthermore, black silicon can be applied in water purification, electrocatalysis, and capacitors; for example, its structure can be used to study the etching mechanism of silicon wafer surfaces. If black silicon exists in a discrete, discontinuous structural state, its irregular structure will become ordered within a short range. Continuously piecing together this short-range ordered structure to form a complete black silicon wafer will yield better spectral absorption. Current technologies can prepare carbon flower structures from the bottom up using the sol-gel method. However, carbon materials are less stable than silicon materials, and there is no absorption spectral data to prove their suitability as good light-absorbing materials. Existing technologies can only create black silicon nanotextured surfaces and obtain dot-like or continuous black silicon structures, but cannot obtain short-range ordered silicon flower structures.

[0003] Currently, the electron emission layer of field emission devices mostly uses carbon nanotubes. Carbon nanotubes have a relatively small diameter and appropriate density because the diameter of the carbon nanotube is determined by the size of the catalyst metal on the tube. This requires the formation and control of catalyst particles with small sizes to form carbon nanotubes with smaller diameters. Silica flowers have a structure similar to carbon nanotubes and can be used to fabricate field emission devices.

[0004] Therefore, a method is expected to be developed to fabricate silicon flower structures with a wide range of absorption spectra and the potential to prepare field emission devices. Summary of the Invention

[0005] The purpose of this invention is to provide a silicon flower structure and its manufacturing method, as well as a method for manufacturing a field emission device and a photovoltaic device, so that the manufactured silicon flower structure has a wide absorption spectrum range and also has the potential to be used to prepare field emission devices. The method for preparing the silicon flower structure includes:

[0006] The silicon wafer to be formed into a silicon flower structure is placed on the base of the reaction chamber;

[0007] Under preset process conditions, an etching gas containing carbon and fluorine is introduced into the reaction chamber;

[0008] The etching gas is ionized to form plasma, and the plasma is used to etch the surface of the silicon wafer for a preset process time of not less than 60 minutes, so as to form multiple silicon flower structures with a spacing of 1-100 μm on the surface of the silicon wafer.

[0009] In an optional embodiment, the etching gas includes at least one of CF4, C4F8, or CHF3.

[0010] In the optional embodiment, the etching gas is CF4, and the preset process conditions are as follows: the pressure range of the reaction chamber is 5-500 mTorr, the power range of the upper electrode center is 500-5000 W, the power range of the upper electrode edge is 500-3000 W, the power range of the lower electrode is 5-500 W, the CF4 flow rate is 10-1000 sccm, the argon flow rate is 10-1000 sccm, the temperature of the base is -150 to +300 degrees Celsius, and the preset process time is 100-200 min.

[0011] In the optional embodiment, the etching gas is C4F8, and the preset process conditions are as follows: the pressure range of the reaction chamber is 1-100 mTorr, the power range of the upper electrode center is 500-5000 W, the power range of the upper electrode edge is 500-3000 W, the power range of the lower electrode is 5-500 W, the C4F8 flow rate is 5-1000 sccm, the argon flow rate is 5-1000 sccm, the temperature of the base is -150 to +300 degrees Celsius, and the preset process time is 100-400 min.

[0012] The present invention also provides a silicon flower structure, which is manufactured using the above-described method, wherein a single silicon flower structure is hemispherical and has multiple protrusions formed on its surface.

[0013] In an optional embodiment, the silicon flower structure includes multiple cone-shaped structures of different heights, with the lower ends of the cone-shaped structures forming a base and the top ends of the cone-shaped structures forming the protrusions.

[0014] In an optional configuration, the height of the protrusion is 1-10 μm, and the diameter of the base is 5-30 μm.

[0015] The present invention also provides a method for manufacturing a field emission device, including the step of forming an electron emission layer, wherein the step of forming the electron emission layer includes: providing a silicon wafer, and manufacturing the silicon flower structure using the method of any one of claims 1-4, wherein the silicon flower structure serves as the electron emission layer.

[0016] In an alternative embodiment, the density of the silicon flower structure on the surface of the silicon wafer is less than 50%.

[0017] The present invention also provides a method for manufacturing a photovoltaic device, including the step of forming an electron emission layer, wherein the step of forming the electron emission layer includes: providing a silicon wafer, and manufacturing the silicon flower structure using the above method, wherein the silicon flower structure serves as the electron emission layer.

[0018] In an alternative embodiment, the density of the silicon flower structure on the surface of the silicon wafer is greater than 50%.

[0019] The beneficial effects of this invention are as follows:

[0020] The silicon flower structure manufactured using the method of the present invention has a simple process and the coverage of the silicon flower structure can be controlled by controlling the process time.

[0021] The manufacturing method of the field emission device / photovoltaic device of the present invention adopts a silicon flower structure as its electron emission layer, which provides a new approach. In addition, since the boundary of the silicon flower structure is a complete shape, the electron emission layer of each field emission device / photovoltaic device is complete during cutting, which can improve the performance of the field emission device / photovoltaic device (if a black silicon structure is used as the electron emission layer, the boundary integrity of the electron emission layer will inevitably be destroyed during cutting).

[0022] The method of the present invention has other features and advantages that will be apparent from or will be set forth in detail in the accompanying drawings and following detailed description, which together serve to explain the particular principles of the invention. Attached Figure Description

[0023] The above and other objects, features and advantages of the present invention will become more apparent from the more detailed description of exemplary embodiments of the invention in conjunction with the accompanying drawings.

[0024] Figure 1 A flowchart illustrating a method for manufacturing a silicon flower structure according to an embodiment of the present invention is shown.

[0025] Figure 2 The SEM characterization image of the continuous black silicon structure is shown.

[0026] Figure 3 The image shows a SEM characterization of the intermediate dot-like structure during the fabrication process of the black silicon structure.

[0027] Figures 4A-4C The top-view SEM characterization images of the silicon flower structure at different magnifications according to an embodiment of the present invention are shown.

[0028] Figure 5 A graph showing the relationship between the coverage of a silicon flower structure and etching time is illustrated in a method for manufacturing a silicon flower structure according to an embodiment of the present invention.

[0029] Figures 6-10 The diagram shows structural schematics corresponding to different steps in a field emission device manufacturing method according to an embodiment of the present invention.

[0030] Figures 11-15 A schematic diagram of the structure corresponding to different steps in a field emission device manufacturing method according to another embodiment of the present invention is shown.

[0031] Figures 16-20 The diagram shows structural schematics corresponding to different steps in a photovoltaic device manufacturing method according to an embodiment of the present invention.

[0032] Icon labels:

[0033] 10-Silicon wafer; 11-Metal electrode; 12-Electron emission layer; 13-Dielectric layer; 14-Metal layer; 20-Cavity; 30-Fluorescent material; 31-Indium tin oxide; 32-Glass; 101-Indium tin oxide; 102-Glass; 10-Silicon wafer; 41-Electron emission layer; 401-N-region; 402-P-region; 42-Metal electrode; 43-Graphene transparent electrode. Detailed Implementation

[0034] The invention will now be described in more detail. While preferred embodiments are provided, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that the invention will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0035] One embodiment of the present invention provides a method for fabricating silicon flower structures on a silicon surface. Figure 1 A flowchart illustrating a method for fabricating silicon flower structures on a silicon surface according to an embodiment of the present invention is shown. Please refer to... Figure 1 The method includes:

[0036] Step 1: Place the silicon wafer to be formed into a silicon flower structure onto the base of the reaction chamber;

[0037] Step 2: Under preset process conditions, an etching gas containing carbon and fluorine elements is introduced into the reaction chamber.

[0038] Step 3: Ionize the etching gas to form plasma, and use the plasma to etch the surface of the silicon wafer for a preset process time of not less than 60 minutes, so as to form multiple silicon flower structures with a spacing of 1-100 μm on the surface of the silicon wafer.

[0039] Specifically, the silicon flower structure is a structure formed by etching the surface of silicon material using a plasma etching machine. The manufacturing method involves first placing the silicon wafer to which the silicon flower structure needs to be formed onto the base of the reaction chamber of the plasma etching machine. The base temperature is adjusted to the required process temperature, and the process chamber is evacuated to the required vacuum level. Then, the etching process is performed, where the etching gas contains carbon and fluorine elements, such as CF4 or C4F8, or a combination of both, or other carbon-fluorine gases such as CHF3. After the etching gas ionizes to form plasma, the preset process time for plasma etching of the silicon wafer surface is controlled to form multiple silicon flower structures on the silicon wafer surface. The spacing between two adjacent silicon flower structures is 1-100 μm. The spacing between two adjacent silicon flower structures is related to the preset process time; the longer the preset process time, the smaller the spacing between two adjacent silicon flower structures. Figures 4A-4C The silicon flower structure is hemispherical with multiple protrusions on its surface. In a specific example, the silicon flower structure includes multiple cone-shaped structures of different heights, with the lower ends of the cones connecting to form a base and the apexes forming protrusions. It should be noted that in existing technologies, SF4 is used as the etching gas to form black silicon on the surface of a silicon wafer. SF4 can form a black silicon structure on the silicon wafer surface in a relatively short time. CF4 or C4F8 is mainly used for etching silicon oxide. CF4 or C4F8 is not used as the etching gas in the fabrication of black silicon. The inventors discovered that when CF4 or C4F8 is used as the etching gas to etch the surface of a silicon wafer, a black silicon structure can be formed on the silicon wafer surface, but the formation rate of the black silicon structure is slow. Before a continuous black silicon structure is formed, a short-range ordered structure is formed. Because this structure is clumped, it is defined as a silicon flower structure. The silicon flower structures are independent of each other and have their own boundaries. (Reference) Figures 2 to 4C , Figure 2 This is a schematic diagram of a continuous black silicon structure. Figures 4A-4C The images show top-view SEM representations of the silicon flower structure at different magnifications. Figure 3 This is a SEM image showing the intermediate morphology of a dot-like structure during the fabrication process of a black silicon structure in the prior art.

[0040] As can be seen, existing technologies do not form silicon flower structures during the manufacturing of black silicon. The method of this invention can form silicon flower structures. By controlling the etching time, the coverage of the silicon flower structure on the silicon wafer surface can be controlled. (Reference) Figure 5 , Figure 5The graph shows the relationship between silicon flower structure coverage and etching time. The horizontal axis represents etching time, and the vertical axis represents silicon flower structure coverage. Silicon flower structures begin to form around 50 minutes. The formation rate of silicon flower structures with CF4 etching gas is greater than that with C4F8 etching gas. Furthermore, as the etching time continues to increase, continuous black silicon structures (100% coverage) can be formed. This means that the method of this invention can manufacture both silicon flower structures and black silicon structures. The etching gas used in this method produces silicon flower structures at a slower rate, thus the silicon flower structure coverage is easier to control. Compared to existing technologies that use SF4 for rapid black silicon fabrication, this method provides greater feasibility and controllability in manufacturing silicon flower structures. The silicon flower structures manufactured using the method of this embodiment are simple to produce, and the coverage of the silicon flower structures can be controlled by adjusting the process time.

[0041] In an optional embodiment, the etching gas is CF4, and the process conditions for steps 2 and 3 are as follows: the pressure range of the reaction chamber is 5–500 mTorr, such as 30 mTorr, 100 mTorr, 200 mTorr, etc.; the power range of the upper electrode center is 500–5000 W, such as 700 W, 1000 W, 2000 W, etc.; the power range of the upper electrode edge is 500–3000 W, such as 600 W, 800 W, 1500 W, etc.; the power range of the lower electrode is 5–500 W, such as 50 W, 100 W, 200 W, etc.; the CF4 flow rate is 10–1000 sccm, such as 20 sccm, 80 sccm, 500 sccm, etc.; the argon flow rate is 10–1000 sccm, such as 50 sccm, 100 sccm, 600 sccm, etc.; and the temperature of the base is -150 to +300 degrees Celsius. Set the time to 100-200 minutes, such as 120 minutes or 180 minutes, depending on the required coverage of the silicon flower structure.

[0042] In another embodiment, the etching gas is C4F8, and the process conditions for step 3 are as follows: the pressure range of the reaction chamber is 1–100 mTorr, such as 5 mTorr, 40 mTorr, or 70 mTorr; the power range of the upper electrode center is 500–5000 W, such as 600 W, 800 W, or 3000 W; the power range of the upper electrode edge is 500–3000 W, such as 700 W, 1600 W, or 2000 W; the power range of the lower electrode is 5–500 W, such as 20 W, 120 W, or 300 W; the C4F8 flow rate is 5–1000 sccm, such as 15 sccm, 100 sccm, or 600 sccm; the argon flow rate is 5–1000 sccm, such as 25 sccm, 200 sccm, or 800 sccm; and the temperature of the base is -150 to 300 degrees Celsius. Depending on the required coverage of the silicon flower structure, set the time to 100-400 minutes, such as 200 minutes, 300 minutes, etc.

[0043] The following is a specific embodiment describing the manufacturing method of the silicon flower structure: First, the reaction chamber is evacuated to a vacuum state with a pressure of approximately 1 mTorr for an adsorption step, which takes approximately 5 seconds. Next, a gas stabilization step is performed, adjusting the chamber pressure to 10 mTorr. Etching gases CF4 and argon (Ar) are introduced into the reaction chamber at a flow rate of 40 sccm and 80 sccm, respectively, for approximately 5 seconds. Then, a ignition process is performed, maintaining the chamber pressure at 10 mTorr, the CF4 flow rate at 40 sccm, and the Ar flow rate at 80 sccm. The power at the center of the upper electrode is set to 750 W, and the power at the edge of the upper electrode is also set to 750 W. No power is applied to the lower electrode. This process step is maintained for approximately 5 seconds. Then, the main etching step is performed, with the chamber pressure maintained at 10 mTorr, the CF4 flow rate maintained at 40 sccm, the Ar flow rate maintained at 80 sccm, the upper electrode center power set at 750 W, the upper electrode edge power set at 750 W, and the lower electrode power set at 100 W. This process step is maintained for approximately 7200 s. Finally, the desorption step is performed, with the chamber pressure adjusted to 50 mTorr, the CF4 gas supply stopped, the Ar flow rate adjusted to 100 sccm, the upper electrode center power set to 500 W, the upper electrode edge power set to 500 W, and the power applied to the lower electrode stopped. This process step is maintained for approximately 10 s.

[0044] refer to Figures 4A-4C An embodiment of the present invention also provides a silicon flower structure, which is manufactured using the above-described method. Each silicon flower structure is hemispherical and has multiple protrusions on its surface. In a specific example, the silicon flower structure includes multiple cone-shaped structures of different heights. The lower ends of the cone-shaped structures are connected to form a base, and the top ends of the cone-shaped structures form protrusions. The height of the protrusions is 1-10 μm, and the diameter of the base is 5-30 μm. It should be noted that the morphology of the silicon flower structure changes with the extension of the processing time. For example, two or more independent small silicon flower structures may connect to form a larger silicon flower structure. The definition of a silicon flower structure refers to a silicon flower structure with a gap region on its outer periphery. Cutting at this gap region can obtain a complete silicon flower structure, maintaining the boundary integrity of the silicon flower structure. However, black silicon is a continuous, monolithic structure, and cutting it inevitably destroys the boundary integrity of the black silicon.

[0045] One embodiment of the present invention provides a method for manufacturing a field emission device, including the step of forming an electron emission layer. The step of forming the electron emission layer includes: providing a silicon wafer, fabricating a silicon flower structure using the above method, and using the silicon flower structure as the electron emission layer. It should be noted that the electron emission layer needs to have multiple vertically upward-pointing needle-like structures. Existing technologies often use carbon nanotubes, which have a relatively small diameter and appropriate density. Since the silicon flower structure has a needle-like structure similar to carbon nanotubes, it provides a new option for the electron emission layer. In one embodiment, the density of the silicon flower structure on the surface of the silicon wafer is less than 50%, such as 40% or 20%.

[0046] refer to Figures 6-10 as well as Figures 11-15 In one specific embodiment, the method includes:

[0047] S01: Provide a silicon wafer 10, form a substrate on the lower surface of the silicon wafer 10, and form an electron emission layer 12 on the upper surface of the silicon wafer 10;

[0048] S02: A ring-shaped support wall is formed on the surface of the electron emission layer 12;

[0049] S03: A counter electrode is formed on the annular support wall; the counter electrode, the annular support wall, and the electron emission layer 12 form a sealed cavity 20.

[0050] Specifically, the silicon wafer 10 is thinned (e.g., to P-type silicon), and the oxide layer on the lower surface is removed, and then a substrate is prepared, wherein the substrate can be a metal electrode 11. Figures 6-10 (This is a schematic diagram of different structures for manufacturing field emission devices with metal electrodes on the substrate). It can also be indium tin oxide 31 (ITO) and glass 32 (the main characteristic of indium tin oxide is the combination of its electrical conductivity and optical transparency). Figures 11-15(This is a schematic diagram of different structures for manufacturing field emission devices with indium tin oxide 31 and glass 32 as the substrate). Following the method described above, a silicon flower structure (as electron emission layer 12) is prepared on the side of the silicon wafer 10 away from the substrate. Alternatively, ion implantation can be used for P-type heavy doping to reduce the device operating voltage. A dielectric layer 13 is formed on the upper surface of the silicon flower structure. The dielectric layer 13 is formed by depositing a dielectric film on the upper surface of the silicon flower structure using a deposition process (such as atomic layer deposition). The dielectric film material can be silicon oxide, hafnium oxide, or other dielectric materials. Then, the desired dielectric layer pattern is formed through processes such as exposure, development, and etching. A metal layer 14 is then formed on the dielectric layer 13. For example, thermal evaporation or magnetron sputtering of metal can be used; the material can be aluminum or gold. The metal layer 14 and the dielectric layer 13 are etched to form a closed annular support wall, which encloses a cavity 20. The counter electrode is prepared by means of transparent indium tin oxide 101 and glass 102. The transparent electrode can also be graphene. A fluorescent material 30 is coated on the bottom so that it can emit fluorescence when bombarded by electrons. The counter electrode is bonded to the annular support wall so that the counter electrode, the annular support wall and the electron emission layer 12 form a sealed cavity 20. Finally, the cavity 20 is evacuated. Finally, the silicon wafer 10 is cut to form a single field emission device.

[0051] The field emission device of this invention employs a silicon flower structure as its electron emission layer 12, providing a novel approach. Because the outer periphery of the silicon flower structure has interspersed regions, cutting at these regions yields a complete silicon flower structure, preserving its boundary integrity. Since the silicon flower structure has a complete boundary, each electron emission layer 12 of the field emission device remains intact during cutting, improving the device's performance (unlike black silicon, which is a continuous, monolithic structure; cutting inevitably disrupts its boundary integrity. Using a black silicon structure as the electron emission layer 12 would also disrupt its boundary integrity during cutting, affecting device performance).

[0052] An embodiment of the present invention provides a method for manufacturing a photovoltaic device, including the step of forming an electron emission layer, wherein the step of forming the electron emission layer includes: providing a silicon wafer and manufacturing a silicon flower structure using the above-described method, the silicon flower structure serving as the electron emission layer.

[0053] refer to Figures 16-20 In one specific embodiment, the method includes:

[0054] The first step is to fabricate a silicon flower structure 41 on a silicon wafer 40 using the method described above, wherein the silicon wafer 40 is a P-type single crystal silicon.

[0055] The second step is to perform N-type doping on the silicon wafer to obtain a PN junction, with the P-region 402 at the bottom and the N-region 401 at the top. Doping can be performed using PECVD or ion implantation.

[0056] The third step involves dry etching to remove the oxide layer on the silicon wafer surface. The process conditions that can be used are: cavity pressure range of 1–30 mTorr, upper electrode power range of 600–3000 W, lower electrode power range of 50–500 W, argon flow rate range of 10–100 sccm, CF4 flow rate range of 10–100 sccm (other carbon-fluorine gases such as C4F8 and CHF3 can also be used), and base coolant temperature range of -15–10℃.

[0057] The fourth step is to prepare a metal electrode 42 on the surface of P region 402. The metal electrode 42 can be prepared by methods such as thermal evaporation or magnetron sputtering. The thickness of the metal electrode 42 is preferably 1 micrometer, and can be selected from 50 nm to 500 micrometers. The material can be metals such as gold and aluminum.

[0058] The fifth step is to attach graphene transparent electrodes 43 to the surface of the silicon flower structure 41, and then cut and encapsulate them.

[0059] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A method for manufacturing a silicon surface to make a silicon flower structure, characterized by, The application relates to a method for manufacturing silicon flower structures on a silicon wafer. The method comprises the following steps: placing a silicon wafer to be formed with silicon flower structures on a base of a reaction chamber; introducing etching gas into the reaction chamber under preset process conditions, wherein the etching gas contains carbon and fluorine elements; the etching gas comprises at least one of CF4, C4F8 or CHF3; ionizing the etching gas to form a plasma, and etching the surface of the silicon wafer with the plasma for a preset process time, wherein the preset process time is not less than 60 min, so as to form a plurality of silicon flower structures with a spacing of 1-100 mu m on the surface of the silicon wafer, wherein the silicon flower structures are in a cluster shape, and the silicon flower structures are independent of each other and have respective boundaries.

2. The method of claim 1, wherein The etching gas is CF4, and the preset process conditions are as follows: the pressure of the reaction chamber ranges from 5 to 500 mTorr, the center power of the upper electrode ranges from 500 to 5000 W, the edge power of the upper electrode ranges from 500 to 3000 W, the power of the lower electrode ranges from 5 to 500 W, the flow rate of CF4 ranges from 10 to 1000 sccm, the flow rate of argon ranges from 10 to 1000 sccm, the temperature of the base ranges from minus 150 to plus 300 degrees, and the preset process time ranges from 100 to 200 min.

3. The method of claim 1, wherein The etching gas is C4F8, and the preset process conditions are as follows: the pressure of the reaction chamber ranges from 1 to 100 mTorr, the center power of the upper electrode ranges from 500 to 5000 W, the edge power of the upper electrode ranges from 500 to 3000 W, the power of the lower electrode ranges from 5 to 500 W, the flow rate of C4F8 ranges from 5 to 1000 sccm, the flow rate of argon ranges from 5 to 1000 sccm, the temperature of the base ranges from minus 150 to plus 300 degrees, and the preset process time ranges from 100 to 400 min.

4. A silicon flower structure, characterized by, The silicon flower structures are manufactured by the method in any one of claims 1-3, wherein each of the silicon flower structures is in a hemispherical shape and has a plurality of protruding parts on the surface.

5. The silicon flower structure of claim 4, wherein, The silicon flower structures comprise a plurality of conical structures with different heights, the lower ends of the conical structures are connected to form a base, and the top ends of the conical structures form the protruding parts.

6. The silicon flower structure of claim 5, wherein, The height of each of the protruding parts is 1-10 mu m, and the diameter of the base is 5-30 mu m.

7. A method of manufacturing a field emission device, characterized by, The method comprises the following steps: providing a silicon wafer, and manufacturing the silicon flower structures by the method in any one of claims 1-3, so as to form an electron emission layer.

8. The manufacturing method according to claim 7, wherein The density of the silicon flower structures on the surface of the silicon wafer is less than 50%.

9. A method of manufacturing a photovoltaic device, characterized by, The method comprises the following steps: providing a silicon wafer, and manufacturing the silicon flower structures by the method in any one of claims 1-3, so as to form an electron emission layer.

10. The manufacturing method according to claim 9, wherein The density of the silicon flower structures on the surface of the silicon wafer is greater than 50%.

Images