Radio frequency unit and corresponding data processing method and apparatus
By setting a dynamic spectrum sharing unit in the radio frequency unit and using a combination of a buffer read/write controller and a switch, dynamic spectrum sharing of 4G and 5G signals is realized. This solves the problem of low signal processing efficiency in the existing technology, reduces the performance requirements of the carrier signal processing unit, and improves the sharing efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- 四川恒湾科技有限公司
- Filing Date
- 2022-11-02
- Publication Date
- 2026-07-03
AI Technical Summary
In existing technologies, dynamic spectrum sharing in 4G LTE and 5G NR requires each to occupy a carrier signal processing unit, resulting in low signal processing efficiency and high requirements for the data processing capabilities of the carrier signal processing unit.
A dynamic spectrum sharing unit is set in the radio frequency unit, including a buffer read/write controller, multiple switches and multiple buffer units. The target buffer unit is determined by the symbol number of the target data, and the switch is controlled to perform read/write operations. Dynamic spectrum sharing of 4G and 5G signals is realized using a carrier signal processing unit.
This reduces the performance requirements of the carrier signal processing unit and improves the efficiency of dynamic spectrum sharing.
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Figure CN115696346B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data processing technology, and in particular to a radio frequency unit and its corresponding data processing method and apparatus. Background Technology
[0002] Dynamic Spectrum Sharing (DSS) allows 4G LTE (4G Long Term Evolution) and 5G NR (5G New Radio) to share the same spectrum, dynamically allocating time and frequency resources to 4G and 5G users through baseband scheduling.
[0003] Current technologies typically achieve spectrum sharing by having 4G LTE and 5G NR each occupy a carrier ID, establishing their own 4G and 5G carrier signals with the same center frequency. The 4G and 5G data are modulated to different positions on the carrier frequency domain. However, this approach requires each of the 4G LTE and 5G NR signals to occupy a separate carrier signal processing unit, resulting in relatively low signal processing efficiency and high requirements for the data processing capabilities of these units. Summary of the Invention
[0004] In view of this, the purpose of this invention is to provide a radio frequency unit and its corresponding data processing method and apparatus, which can reduce the performance requirements of the carrier signal processing unit and improve the efficiency of dynamic spectrum sharing.
[0005] In a first aspect, embodiments of the present invention provide a data processing method applicable to a radio frequency (RF) unit, the RF unit comprising a dynamic spectrum sharing unit and a carrier signal processing unit, the dynamic spectrum sharing unit comprising a buffer read / write controller, multiple switches, and multiple buffer units, the method comprising:
[0006] Determine the target data, which is the data to be read or written;
[0007] The target cache unit is determined from the plurality of cache units based on the symbol number of the target data; and
[0008] The target cache unit controls the multiple switches to perform read and write operations on the target data.
[0009] In some embodiments, the target data is downlink data to be written, and determining the target data includes:
[0010] Receive data packets through the first interface and / or the second interface; and
[0011] The target data is determined according to the time sequence in which the data packets are received.
[0012] The first interface is a fourth-generation mobile communication technology data transmission interface, and the second interface is a fifth-generation mobile communication technology data transmission interface.
[0013] In some embodiments, the target data is downlink data to be read, and determining the target data specifically involves:
[0014] The target data is determined according to predetermined rules.
[0015] In some embodiments, the plurality of cache units include a first cache unit and a second cache unit;
[0016] The step of determining the target cache unit among the plurality of cache units based on the symbol number of the target data includes:
[0017] In response to the symbol number being odd, the first cache unit is determined as the target cache unit; and
[0018] In response to the symbol number being even, the second cache unit is determined as the target cache unit.
[0019] In some embodiments, the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch;
[0020] The step of controlling the plurality of switches according to the target cache unit to perform read and write operations on the target data includes:
[0021] Control the first switch to connect to the target interface, where the target interface is an interface for receiving the target data; and
[0022] The second switch is controlled to connect to the target cache unit so that the target data is written from the target interface to the target cache unit through the first switch and the second switch.
[0023] In some embodiments, the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch;
[0024] The step of controlling the plurality of switches according to the target cache unit to perform read and write operations on the target data includes:
[0025] Control the fourth switch to connect to the target buffer unit, thereby connecting the carrier signal processing unit to the target buffer unit; and
[0026] The third switch is controlled to connect to the target cache unit, thereby connecting the cache read / write controller to the target cache unit, so that the cache read / write controller controls the target cache unit to output the target data to the carrier signal processing unit via the fourth switch.
[0027] In some embodiments, the target data is downlink data to be written, and determining the target data specifically involves:
[0028] The target data is received from the carrier signal processing unit.
[0029] In some embodiments, the target data is downlink data to be read, and determining the target data includes:
[0030] Receive data acquisition requests; and
[0031] The target data is determined based on the data acquisition request.
[0032] In some embodiments, the plurality of cache units include a third cache unit and a fourth cache unit;
[0033] The step of determining the target cache unit among the plurality of cache units based on the symbol number of the target data includes:
[0034] In response to the symbol number being odd, the third cache unit is determined as the target cache unit; and
[0035] In response to the symbol number being even, the fourth cache unit is determined as the target cache unit.
[0036] In some embodiments, the plurality of switches includes a fifth switch, a sixth switch, a seventh switch, and an eighth switch;
[0037] The step of controlling the plurality of switches according to the target cache unit to perform read and write operations on the target data includes:
[0038] The eighth switch is controlled to connect with the target buffer unit, thereby connecting the carrier signal processing unit with the target buffer unit, so that the target data is written from the carrier signal processing unit to the target buffer unit via the eighth switch.
[0039] In some embodiments, the plurality of switches includes a fifth switch, a sixth switch, a seventh switch, and an eighth switch;
[0040] The step of controlling the plurality of switches according to the target cache unit to perform read and write operations on the target data includes:
[0041] The fifth switch is controlled to connect to the target interface, which is an interface corresponding to the data type of the target data.
[0042] Control the sixth switch to connect to the target cache unit, so that the target cache unit is connected to the target interface via the fifth and sixth switches; and
[0043] The seventh switch is controlled to connect to the target cache unit, thereby connecting the cache read / write controller to the target cache unit, so that the cache read / write controller controls the target cache unit to output the target data to the target interface via the fifth and sixth switches.
[0044] In some embodiments, the method further includes:
[0045] The carrier signal processing unit performs inverse fast Fourier transform, cyclic prefix insertion, channel filtering, digital up-conversion, peak clipping, digital predistortion, RF front-end transmission, and power amplification on the target data.
[0046] In some embodiments, the method further includes:
[0047] The target data is obtained by performing radio frequency front-end reception, digital downconversion, automatic gain control, channel filtering, cyclic prefix removal, and fast Fourier transform through the carrier signal processing unit.
[0048] In some embodiments, the method further includes:
[0049] Send a reverse pressure signal, wherein the reverse pressure signal is used to instruct another interface not to transmit data to avoid write conflicts between the first interface and the second interface.
[0050] Secondly, embodiments of the present invention provide a radio frequency unit, the radio frequency unit comprising:
[0051] The dynamic spectrum sharing unit includes a cache read / write controller, multiple switches, and multiple cache units;
[0052] A carrier signal processing unit is used for data transmission and reception; and
[0053] The control unit is used to determine target data, which is data to be read or written, to determine a target cache unit among a plurality of cache units according to the symbol number of the target data, and to control the plurality of switches according to the target cache unit to perform read and write operations on the target data.
[0054] In some embodiments, the cache unit includes:
[0055] The first cache unit is used to cache downlink data; and
[0056] The second cache unit is used to cache downlink data.
[0057] In some embodiments, the switch includes:
[0058] A first switch is connected between the dynamic spectrum sharing unit and the first interface and the second interface, for connecting the dynamic spectrum sharing unit to one of the first interface and the second interface;
[0059] A second switch is connected between the first switch and the cache unit, and is used to connect the first switch to one of the plurality of cache units;
[0060] A third switch, connected between the cache read / write controller and the cache unit, is used to connect the cache read / write controller to one of the plurality of cache units; and
[0061] A fourth switch is connected between the carrier signal processing unit and the buffer unit, for connecting the carrier signal processing unit to one of the plurality of buffer units;
[0062] The first interface is a fourth-generation mobile communication technology data transmission interface, and the second interface is a fifth-generation mobile communication technology data transmission interface.
[0063] In some embodiments, the cache unit includes:
[0064] The third cache unit is used to cache upstream data; and
[0065] The fourth cache unit is used to cache upstream data.
[0066] In some embodiments, the switch includes:
[0067] The fifth switch is connected between the dynamic spectrum sharing unit and the first interface and the second interface, for connecting the dynamic spectrum sharing unit to one of the first interface and the second interface;
[0068] A sixth switch is connected between the fifth switch and the buffer unit, for connecting the fifth switch to one of the plurality of buffer units;
[0069] A seventh switch, connected between the cache read / write controller and the cache unit, is used to connect the cache read / write controller to one of the plurality of cache units; and
[0070] The eighth switch is connected between the carrier signal processing unit and the buffer unit, and is used to connect the carrier signal processing unit to one of the plurality of buffer units;
[0071] The first interface is a fourth-generation mobile communication technology data transmission interface, and the second interface is a fifth-generation mobile communication technology data transmission interface.
[0072] Thirdly, embodiments of the present invention provide a data processing apparatus suitable for a radio frequency (RF) unit, wherein the RF unit includes a dynamic spectrum sharing unit and a carrier signal processing unit, the dynamic spectrum sharing unit includes a buffer read / write controller, multiple switches, and multiple buffer units, and the apparatus includes:
[0073] A target data determination unit is used to determine target data, which is data to be read or written.
[0074] Target cache unit determining unit, configured to determine a target cache unit among the plurality of cache units based on the symbol number of the target data; and
[0075] A switch control unit is used to control the plurality of switches according to the target cache unit to perform read and write operations on the target data.
[0076] Fourthly, embodiments of the present invention provide an electronic device, including a memory and a processor, wherein the memory is used to store one or more computer program instructions, wherein the one or more computer program instructions are executed by the processor to implement the method as described in the first aspect.
[0077] Fifthly, embodiments of the present invention provide a computer-readable storage medium having computer program instructions stored thereon, which, when executed by a processor, implement the method described in the first aspect.
[0078] The technical solution of this invention sets up a dynamic spectrum sharing unit and a carrier signal processing unit in the radio frequency unit. The dynamic spectrum sharing unit includes a buffer read / write controller, multiple switches, and multiple buffer units. A target buffer unit is determined from among the multiple buffer units based on the symbol number of the target data to be read / written. The multiple switches are then controlled based on the target buffer unit to perform read / write operations on the target data. Therefore, dynamic spectrum sharing for both 4G and 5G signals can be achieved through a single carrier signal processing unit, reducing the performance requirements of the carrier signal processing unit and improving the efficiency of dynamic spectrum sharing. Attached Figure Description
[0079] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:
[0080] Figure 1 This is a flowchart of the data processing for downlink signals in existing technology;
[0081] Figure 2This is a flowchart of the uplink signal data processing in existing technology;
[0082] Figure 3 This is a schematic diagram of the communication system according to an embodiment of the present invention;
[0083] Figure 4 This is a schematic diagram of the structure of the radio frequency unit according to an embodiment of the present invention;
[0084] Figure 5 This is a schematic diagram of the structure of a dynamic spectrum sharing unit according to an embodiment of the present invention;
[0085] Figure 6 This is a schematic diagram of the structure of a dynamic spectrum sharing unit according to another embodiment of the present invention;
[0086] Figure 7 This is a flowchart of the data processing method according to an embodiment of the present invention;
[0087] Figure 8 This is a flowchart of downlink data processing according to an embodiment of the present invention;
[0088] Figure 9 This is a flowchart of the uplink data processing according to an embodiment of the present invention;
[0089] Figure 10 This is a schematic diagram of a data processing device according to an embodiment of the present invention;
[0090] Figure 11 This is a schematic diagram of an electronic device according to an embodiment of the present invention. Detailed Implementation
[0091] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.
[0092] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.
[0093] Furthermore, it should be understood that in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by electrical or electromagnetic connections. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to another element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.
[0094] Unless the context explicitly requires it, words such as "including" or "contains" in the instruction manual should be interpreted as including rather than exclusive or exhaustive; that is, meaning "including but not limited to".
[0095] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.
[0096] Dynamic Spectrum Sharing (DSS) allows 4G LTE and 5G NR to share the same spectrum, dynamically allocating time-frequency resources to 4G and 5G users through baseband scheduling. Spectrum sharing is divided into static and dynamic spectrum sharing. Static spectrum sharing allocates spectrum to LTE and NR carriers in a fixed ratio. This method requires no resource scheduling and is relatively simple to implement, but its spectrum utilization efficiency is low. Dynamic spectrum sharing dynamically allocates spectrum between 4G and 5G users according to the granularity of time-frequency resources. It is more complex to implement but can effectively improve spectrum utilization efficiency.
[0097] Similar to the 3GPP (3rd Generation Partnership Project) protocol, the ORAN (Open RAN) fronthaul interface CUS (Controls, Users, Synchronization) protocol specification (O-RAN.WG4.CUS.0-v06.00) also supports dynamic spectrum sharing. The ORAN radio access network architecture consists of distributed units (ORAN Distributed Units, O-DUs) and radio units (ORAN Radio Units, O-RUs). The ORAN fronthaul interface connects the O-DUs and O-RUs. Compared to the traditional CPRI (Common Public Radio Interface) fronthaul interface protocol, the ORAN fronthaul interface protocol is more open and standardized, supporting interconnection of equipment from different manufacturers. It has received strong support from numerous operators and equipment manufacturers worldwide and has experienced rapid development.
[0098] In ORAN networks, dynamic spectrum sharing requires collaboration between the O-DU and O-RU. The O-DU dynamically allocates spectrum based on 4G and 5G user demands, defining which time-frequency resources are allocated to 4G and 5G users respectively, and configures the O-RU via management plane or control plane messages. The O-RU, in turn, modulates 4G and 5G user data onto their corresponding time-frequency resources according to the O-DU's instructions, thus achieving spectrum sharing. The ORAN interface protocol defines two spectrum sharing methods: independent carrier spectrum sharing and dynamic spectrum sharing based on extension type 9. Independent carrier spectrum sharing means that 4G LTE and 5G NR each occupy a carrier ID (eAxC_ID), establishing their own 4G and 5G carriers with the same center frequency. 4G and 5G data are modulated to different positions on the carrier frequency domain to achieve spectrum sharing. Dynamic spectrum sharing based on extended type 9 involves 4G LTE and 5G NR sharing a single carrier ID (eAxC_ID). The O-DU informs the O-RU whether the current data packet belongs to 4G LTE or 5G NR through extended type 9 messages in the control plane. On the O-RU side, the implementation method of spectrum sharing is determined independently based on the control plane messages.
[0099] Figure 1 This is a flowchart of the data processing for downlink signals in existing technology. For example... Figure 1 As shown, the data processing of downlink signals in the prior art includes the following steps:
[0100] Step S101: Receive 4G data packets.
[0101] Step S102: Fast Fourier Transform.
[0102] Step S103: Data caching and insertion of a circular prefix.
[0103] Step S104: Channel filtering.
[0104] Step S105: Digital upconversion.
[0105] Step S106: Receive 5G data packets.
[0106] Step S107: Phase compensation.
[0107] Step S108: Fast Inverse Fourier Transform.
[0108] Step S109: Data caching and insertion of a circular prefix.
[0109] Step S110: Channel filtering.
[0110] Step S111: Digital upconversion.
[0111] Step S112: Carrier combining.
[0112] Step S113, peak clipping and digital predistortion.
[0113] Step S114: Radio frequency front-end transmission and power amplification.
[0114] exist Figure 1 In 4G, the downlink processing flow for data packets includes inverse Fast Fourier Transform (IFFT), data buffering and cyclic prefix insertion, channel filtering, digital up-conversion, carrier combining, peak clipping and digital predistortion, RF front-end transmission, and power amplification. For 5G, the downlink processing flow includes phase compensation, IFFT, data buffering and cyclic prefix insertion, channel filtering, digital up-conversion, carrier combining, peak clipping and digital predistortion, RF front-end transmission, and power amplification. The IFFT, data buffering and cyclic prefix insertion, channel filtering, and digital up-conversion for 4G and 5G are performed on different carrier signal processing units. During carrier combining, the center frequency of the 4G and 5G carriers is set to the same frequency, sharing a single carrier spectrum.
[0115] Figure 2 This is a flowchart of uplink signal data processing in existing technology. For example... Figure 2 As shown, the data processing of uplink signals in the prior art includes the following steps:
[0116] Step S201: RF front-end reception.
[0117] Step S202: Automatic gain control.
[0118] Step S203: Carrier separation.
[0119] Step S204: Digital downconversion.
[0120] Step S205: Channel filtering.
[0121] Step S206: Remove the cyclic prefix and data cache.
[0122] Step S207: Fast Fourier Transform.
[0123] Step S208, 4G data packet.
[0124] Step S209: Digital downconversion.
[0125] Step S210: Channel filtering.
[0126] Step S211: Remove the cyclic prefix and data cache.
[0127] Step S212: Fast Fourier Transform.
[0128] Step S213, Phase compensation.
[0129] Step S214, 5G data packet.
[0130] exist Figure 2 In 4G, the downlink processing flow for data packets includes RF front-end reception, automatic gain control, carrier separation, digital downconversion, channel filtering, cyclic prefix removal, data buffering, and fast Fourier transform. For 5G, the downlink processing flow also includes RF front-end reception, automatic gain control, carrier separation, digital downconversion, channel filtering, cyclic prefix removal, data buffering, fast Fourier transform, and phase compensation. During carrier separation, the center frequencies of the 4G and 5G carriers are set to the same frequency, sharing a single carrier spectrum.
[0131] Among them, digital downconversion, channel filtering, cyclic prefix removal and data buffering, fast Fourier transform, etc. in 4G and 5G need to be performed on different carrier signal processing units.
[0132] Therefore, in existing technologies, 4G LTE and 5G NR each require a separate carrier signal processing unit for processing, resulting in relatively low signal processing efficiency and high requirements for the data processing capabilities of the carrier signal processing unit. Accordingly, this invention provides a radio frequency (RF) unit and its corresponding data processing method to improve the data processing efficiency of the RF unit and reduce the requirements on the RF unit.
[0133] Specifically, Figure 3 This is a schematic diagram of the communication system according to an embodiment of the present invention. Figure 3In the illustrated embodiment, the communication system includes a first terminal 1, a second terminal 2, and a wireless access network 3. The first terminal 1, the second terminal 2, and the wireless access network 3 are communicatively connected.
[0134] In this embodiment, the first terminal 1 is a 4G (4th generation mobile communication technology) terminal. There may be one or more first terminals 1. Figure 3 Let's take one example to illustrate.
[0135] In this embodiment, the second terminal 2 is a 5G (5th generation mobile communication technology) terminal. There can be one or more second terminals 2. Figure 3 Let's take one example to illustrate.
[0136] In this embodiment, the wireless access network 3 is ORAN (Open wireless access network), which is a public wireless access network such as 4G / 5G provided by telecommunications operators, providing a means for the first terminal 1 and the second terminal 2 to connect to the network via radio electromagnetic waves.
[0137] When the first terminal 1 and / or the second terminal 2 send data to the radio access network 3, the data is uplink data; when the radio access network 3 sends data to the first terminal 1 and / or the second terminal 2, the data is downlink data.
[0138] Furthermore, the radio access network 3 includes a distributed unit 31 and a radio frequency unit 32. The distributed unit 31 is an O-DU (ORAN Distributed Unit), and the radio frequency unit 32 is an O-RU (ORAN Radio Unit). The distributed unit 31 and the radio frequency unit 32 are connected via an ORAN fronthaul interface.
[0139] The distributed unit 31 is used to dynamically allocate spectrum according to the needs of 4G and 5G users, define which time and frequency resources are occupied by 4G and 5G users respectively, and set the radio frequency unit 32 through management plane or control plane messages.
[0140] The radio frequency unit 32 is used to modulate 4G and 5G user data on the corresponding time and frequency resources according to the message instruction of O-DU, thereby realizing spectrum sharing.
[0141] Furthermore, Figure 4 This is a schematic diagram of the structure of the radio frequency unit according to an embodiment of the present invention. Figure 4 In the illustrated embodiment, the radio frequency unit includes a dynamic spectrum sharing unit 321, a carrier signal processing unit 322, and a control unit 323.
[0142] In this embodiment, the dynamic spectrum sharing unit 323 is used for data caching.
[0143] Furthermore, the dynamic spectrum sharing unit 323 is connected between the carrier signal processing unit 322 and the first interface 33 and the second interface 34. The first interface 33 and the second interface 34 are ORAN fronthaul interfaces. One of the first interface 33 and the second interface 34 is used to transmit 4G data, and the other is used to transmit 5G data. This embodiment of the invention uses the first interface 33 transmitting 4G data and the second interface 34 transmitting 5G data as an example for illustration.
[0144] It should be noted that, Figure 4 The illustrated radio frequency (RF) unit structure includes two parts for each module: one part for performing uplink data processing and the other part for performing downlink data processing. However, this embodiment of the invention does not limit the structure of the RF unit; for example, the RF unit may include... Figure 4 There are two structures, one for executing the uplink data processing flow and the other for executing the downlink data processing flow.
[0145] Furthermore, Figure 5 This is a schematic diagram of the structure of a dynamic spectrum sharing unit according to an embodiment of the present invention. Figure 5 A schematic diagram of the structure of a dynamic spectrum sharing unit in the downlink data transmission direction is shown. The dynamic spectrum sharing unit 321 includes a cache read / write controller 321a, multiple switches, and multiple cache units.
[0146] In the downlink transmission direction, the dynamic spectrum sharing unit 321 includes multiple switches, including a first switch K1, a second switch K2, a third switch K3, and a fourth switch K4, and multiple buffer units, including a first buffer unit 321b and a second buffer unit 321c. The first switch K1 is connected between the dynamic spectrum sharing unit 321 and the first interface 33 and the second interface 34, for connecting the dynamic spectrum sharing unit 321 to one of the first interface 33 and the second interface 34. The second switch K2 is connected between the first switch K1 and the multiple buffer units, for connecting the first switch K1 to one of the multiple buffer units. The third switch K3 is connected between the buffer read / write controller 321a and the buffer units, for connecting the buffer read / write controller 321a to one of the multiple buffer units. The fourth switch K4 is connected between the carrier signal processing unit 322 and the buffer units, for connecting the carrier signal processing unit 322 to one of the multiple buffer units. The first interface 33 is a fourth-generation mobile communication technology data transmission interface, and the second interface 34 is a fifth-generation mobile communication technology data transmission interface.
[0147] In the downlink transmission direction, one of the first buffer unit 321b and the second buffer unit 321c is a ping buffer and the other is a pong buffer, together forming the downlink ping-pong buffer. The first buffer unit and the second buffer unit are always in a write state and the other is in a read state to avoid read-write conflicts. This embodiment of the invention uses the first buffer unit as a ping buffer and the second buffer unit as a pong buffer as an example for explanation.
[0148] This invention, through the inclusion of a dynamic spectrum sharing unit and a carrier signal processing unit within the radio frequency unit, achieves dynamic spectrum sharing by setting up a buffer read / write controller, multiple switches, and multiple buffer units. The target buffer unit is determined from among the multiple buffer units based on the symbol number of the target data to be read / written. The multiple switches are then controlled according to the target buffer unit to perform read / write operations on the target data. Thus, dynamic spectrum sharing for both 4G and 5G signals can be achieved using a single carrier signal processing unit, reducing the performance requirements of the carrier signal processing unit and improving the efficiency of dynamic spectrum sharing.
[0149] Furthermore, Figure 6 This is a schematic diagram of the structure of a dynamic spectrum sharing unit according to another embodiment of the present invention. Figure 6 A schematic diagram of the structure of the dynamic spectrum sharing unit in the uplink data transmission direction is shown. The dynamic spectrum sharing unit 321 includes a cache read / write controller 321a, multiple switches, and multiple cache units.
[0150] In the uplink transmission direction, the dynamic spectrum sharing unit 321 includes multiple switches, including a fifth switch K5, a sixth switch K6, a seventh switch K7, and an eighth switch K8, and multiple buffer units, including a third buffer unit 321d and a fourth buffer unit 321e. The fifth switch K5 is connected between the dynamic spectrum sharing unit 321 and the first interface 33 and the second interface 34, for connecting the dynamic spectrum sharing unit 321 to one of the first interface 33 and the second interface 34. The sixth switch K6 is connected between the fifth switch K5 and the buffer unit, for connecting the fifth switch K5 to one of the multiple buffer units. The seventh switch K7 is connected between the buffer read / write controller 321a and the buffer unit, for connecting the buffer read / write controller 321a to one of the multiple buffer units. The eighth switch K8 is connected between the carrier signal processing unit 322 and the buffer unit, for connecting the carrier signal processing unit 322 to one of the multiple buffer units. The first interface 33 is a fourth-generation mobile communication technology data transmission interface, and the second interface 34 is a fifth-generation mobile communication technology data transmission interface.
[0151] In the uplink transmission direction, the dynamic spectrum sharing unit 321 includes a third buffer unit 321d and a fourth buffer unit 321e. One of the third and fourth buffer units is a ping buffer, and the other is a pong buffer, together forming the uplink ping-pong buffer. The third and fourth buffer units are always in a write state and a read state, avoiding read-write conflicts. This embodiment of the invention uses the third buffer unit as a ping buffer and the fourth buffer unit as a pong buffer as an example for explanation.
[0152] It's important to note that the ping-pong buffer serves as a data cache, improving data transmission efficiency. If adjacent modules in the system operate at different speeds, with the preceding module running faster than the following one, the results from the preceding module cannot be immediately used by the next. In this case, a buffer is needed to temporarily store the results from the preceding module, allowing the two modules to operate independently without the preceding module being slowed down by the following one. The ping-pong buffer has two buffer units that alternate between reading and writing. During the same phase, one module reads and the other writes, then switch read and write functions after completion.
[0153] In this embodiment, the carrier signal processing unit 322 is used to process downlink data and / or uplink data.
[0154] For downlink data, the carrier signal processing unit 322 performs inverse fast Fourier transform, inserts cyclic prefix, performs channel filtering, digital upconversion, peak clipping, digital predistortion, RF front-end transmission, and power amplification.
[0155] For uplink data, the carrier signal processing unit 322 performs radio frequency front-end reception, digital downconversion, automatic gain control, channel filtering, cyclic prefix removal, and fast Fourier transform to obtain the target data.
[0156] In this embodiment, the control unit 323 is used to control multiple switches in the dynamic spectrum sharing unit 321 to achieve data reading and writing.
[0157] It should be noted that, Figure 5 and Figure 6 The diagrams shown are structural schematics of the uplink dynamic spectrum sharing unit and the downlink dynamic spectrum sharing unit, respectively. For ease of explanation, this embodiment only distinguishes between the switching and buffering units of the uplink and downlink dynamic spectrum sharing units. However, in the actual structure, the carrier signal processing unit, buffer read / write controller, first interface, and second interface in both the uplink and downlink dynamic spectrum sharing units are their own. That is, it can be understood that the uplink dynamic spectrum sharing unit includes a first carrier signal processing unit, a first buffer read / write controller, a first interface, and a second interface, while the downlink dynamic spectrum sharing unit includes a second carrier signal processing unit, a second buffer read / write controller, a third interface, and a fourth interface.
[0158] This invention, through the inclusion of a dynamic spectrum sharing unit and a carrier signal processing unit within the radio frequency unit, achieves dynamic spectrum sharing by setting up a buffer read / write controller, multiple switches, and multiple buffer units. The target buffer unit is determined from among the multiple buffer units based on the symbol number of the target data to be read / written. The multiple switches are then controlled according to the target buffer unit to perform read / write operations on the target data. Thus, dynamic spectrum sharing for both 4G and 5G signals can be achieved using a single carrier signal processing unit, reducing the performance requirements of the carrier signal processing unit and improving the efficiency of dynamic spectrum sharing.
[0159] Figure 7 This is a flowchart of a data processing method according to an embodiment of the present invention. Figure 7 In the illustrated embodiment, the data processing method includes the following steps:
[0160] Step S310: Determine the target data, which is the data to be read or written.
[0161] Step S320: Determine the target cache unit among the plurality of cache units according to the symbol number of the target data.
[0162] Step S330: Control the plurality of switches according to the target cache unit to perform read and write operations on the target data.
[0163] In this embodiment, the target data can be determined based on the data transmission direction and the type of read / write operation. The target data is the data to be read or written, that is, data to be read or data to be written.
[0164] When the target data is downlink data to be written, the determination of the target data involves receiving data packets through a first interface and / or a second interface, and determining the target data based on the time sequence of the received data packets. The first interface is a fourth-generation mobile communication technology (4G) data transmission interface, and the second interface is a fifth-generation mobile communication technology (5G) data transmission interface. The symbol number of the target data is determined; in response to an odd symbol number, a first buffer unit is determined as the target buffer unit; in response to an even symbol number, a second buffer unit is determined as the target buffer unit. The first switch is connected to the target interface (the interface for receiving the target data), and the second switch is connected to the target buffer unit, so that the target data is written from the target interface to the target buffer unit through the first and second switches.
[0165] It should be noted that when writing data, the cache read / write controller controls the writing to different addresses, each corresponding to a different RE (Resource Element) number. Correspondingly, when reading data, the target data is determined in the cache unit based on the RE number.
[0166] When the target data is downlink data to be read, determining the target data specifically involves determining the target data according to predetermined rules. These predetermined rules can be set according to different scenarios. For example, the predetermined rule could be an FFT (Fast Fourier Transform) reverse order algorithm, where the input and output of the FFT reverse order algorithm are in reverse order. Here, reverse order refers to binary reversal; for example, if the input order is 000, 100, 010, 110, then the corresponding output is 000, 001, 010, 011. The input order is the chronological order of the data packets received through the first interface and / or the second interface. The symbol number of the target data is determined; in response to an odd symbol number, the first cache unit is determined as the target cache unit; in response to an even symbol number, the second cache unit is determined as the target cache unit. The fourth switch is controlled to connect to the target buffer unit, thereby connecting the carrier signal processing unit to the target buffer unit. The third switch is controlled to connect to the target buffer unit, thereby connecting the buffer read / write controller to the target buffer unit, so that the buffer read / write controller controls the target buffer unit to output the target data to the carrier signal processing unit via the fourth switch.
[0167] When the target data is uplink data to be written, the target data is received from the carrier signal processing unit. The symbol number of the target data is determined; in response to an odd symbol number, a third buffer unit is designated as the target buffer unit; in response to an even symbol number, a fourth buffer unit is designated as the target buffer unit. The eighth switch is connected to the target buffer unit to connect the carrier signal processing unit to the target buffer unit, so that the target data is written from the carrier signal processing unit to the target buffer unit via the eighth switch.
[0168] When the target data is uplink data to be read, a data acquisition request is received, and the target data is determined based on the data acquisition request. The symbol number of the target data is determined; in response to an odd symbol number, a third cache unit is determined as the target cache unit; in response to an even symbol number, a fourth cache unit is determined as the target cache unit. The fifth switch is controlled to connect to the target interface, which is an interface corresponding to the data type of the target data. The sixth switch is controlled to connect to the target cache unit, so that the target cache unit is connected to the target interface via the fifth and sixth switches. The seventh switch is controlled to connect to the target cache unit, so that the cache read / write controller is connected to the target cache unit, causing the cache read / write controller to control the target cache unit to output the target data to the target interface via the fifth and sixth switches.
[0169] In this embodiment, in the downlink direction, the target data is subjected to inverse fast Fourier transform, cyclic prefix insertion, channel filtering, digital upconversion, peak clipping, digital predistortion, radio frequency front-end transmission, and power amplification by the carrier signal processing unit.
[0170] In the uplink direction, the target data is obtained by performing radio frequency front-end reception, digital downconversion, automatic gain control, channel filtering, cyclic prefix removal, and fast Fourier transform through the carrier signal processing unit.
[0171] This invention, through the inclusion of a dynamic spectrum sharing unit and a carrier signal processing unit within the radio frequency unit, achieves dynamic spectrum sharing by setting up a buffer read / write controller, multiple switches, and multiple buffer units. The target buffer unit is determined from among the multiple buffer units based on the symbol number of the target data to be read / written. The multiple switches are then controlled according to the target buffer unit to perform read / write operations on the target data. Thus, dynamic spectrum sharing for both 4G and 5G signals can be achieved using a single carrier signal processing unit, reducing the performance requirements of the carrier signal processing unit and improving the efficiency of dynamic spectrum sharing.
[0172] Figure 8 This is a flowchart of downlink data processing according to an embodiment of the present invention. Figure 8 In the illustrated embodiment, the processing of downlink data includes the following steps:
[0173] Step S401: Obtain 4G data packets.
[0174] In this embodiment, 4G data packets are acquired through a first interface. The first interface is a fourth-generation mobile communication technology data transmission interface.
[0175] Step S402: Obtain 5G data packets.
[0176] In this embodiment, 5G data packets are obtained through a second interface. The second interface is a fifth-generation mobile communication technology data transmission interface.
[0177] It should be noted that the first and second interfaces in this embodiment of the invention are logical interface concepts. If 4G LTE and 5G NR each occupy a carrier ID in the ORAN interface, then the LTE data path and the NR data path each correspond to a data interface entity. If 4G LTE and 5G NR share a carrier ID in the ORAN interface, i.e., adopt dynamic spectrum sharing based on extension type 9, then the LTE data path and the NR data path are two logical interfaces sharing the same data interface entity.
[0178] Step S403, Phase compensation.
[0179] In this embodiment, unlike 4G, 5G NR supports various variable carrier bandwidths and intra-carrier BWP (Bandwidth Part) allocation. Therefore, the center frequencies of the transmitting and receiving ends may be inconsistent. Without proper phase compensation, the receiver may be unable to demodulate the signal correctly. Therefore, phase compensation (Phase Comp) is required for the 5G signal to resolve the phase rotation problem caused by the inconsistency between the center frequencies of the transmitting and receiving ends.
[0180] Step S404: Data caching.
[0181] In this embodiment, when exchanging data between two modules, the result processed by the previous level cannot be immediately processed by the next level. This forces the previous level to wait for the next level to finish before sending new data, resulting in significant performance loss. Therefore, this embodiment of the invention utilizes a ping-pong buffer to avoid waiting for the next level to finish processing. Instead, the result is stored in the pong path's buffer. When the pong path data is ready, the ping path data is also processed, allowing the previous level to process the pong path data directly without waiting, and the previous level also doesn't need to wait, instead storing the result in the ping path. This improves processing efficiency.
[0182] Further, the target data is determined based on the time sequence of receiving 4G and 5G data packets. The symbol number of the target data is determined; in response to an odd symbol number, a first cache unit is designated as the target cache unit; in response to an even symbol number, a second cache unit is designated as the target cache unit. The first switch is connected to the target interface (the interface for receiving the target data), and the second switch is connected to the target cache unit, so that the target data is written from the target interface to the target cache unit via the first and second switches. Simultaneously, the target data to be read is determined according to predetermined rules, and the symbol number of the target data is determined; in response to an odd symbol number, the first cache unit is designated as the target cache unit; in response to an even symbol number, the second cache unit is designated as the target cache unit. The fourth switch is controlled to connect to the target buffer unit, thereby connecting the carrier signal processing unit to the target buffer unit. The third switch is controlled to connect to the target buffer unit, thereby connecting the buffer read / write controller to the target buffer unit, so that the buffer read / write controller controls the target buffer unit to output the target data to the carrier signal processing unit via the fourth switch.
[0183] Furthermore, based on the time sequence of data packets received from the first interface and the second interface, the interface with the earlier time is determined as the target interface. The first switch K1 is then connected to the target interface, and a reverse pressure signal is sent to another interface to prevent write conflicts between the first and second interfaces. This other interface is the other interface between the first and second interfaces besides the target interface.
[0184] In other words, based on the arrival time of 4G LTE and 5G NR data packets from the ORAN interface, the first switch K1 is controlled to connect to the interface where the data arrives first, while simultaneously sending a backpressure signal to the other interface to avoid write conflicts between the first and second interfaces. The connection of the second switch K2 is determined by the parity of the symbol number of the arriving data packets. Even-numbered data packets are written to the Ping Buffer via the second switch K2, while odd-numbered data packets are written to the Pong Buffer via the second switch K2. Simultaneously, 4G and 5G data packets are distinguished by different addresses stored in the buffer, determined by the RE number of the data. 4G and 5G data occupy different RE numbers and storage addresses, thus achieving dynamic sharing of spectrum resources. Reading from the Ping-Pong Buffer is path-controlled via the parity of the symbol number through the third switch K3 and the fourth switch K4. When the symbol number is odd, the buffer read / write controller controls data reading through the third switch K3 connected to the Pong Buffer and processes it through the fourth switch K4 connected to the downlink carrier signal processing unit. When the symbol number is even, the buffer read / write controller is connected to the Ping Buffer via the third switch 3 to control data reading, and connected to the downlink carrier signal processing unit via the fourth switch K4 for processing. Normally, one Ping-Pong is always in a write state while the other is in a read state to avoid read / write conflicts.
[0185] Step S405: Fast Inverse Fourier Transform.
[0186] In this embodiment, after reading data from the cache unit, an Inverse Fast Fourier Transform (IFFT) is performed on the data. The IFFT extracts the conjugate complex number from the frequency domain data, and then performs an FFT (Fast Fourier Transform) to convert the frequency domain signal to the time domain. Because the result of the FFT is a complex number, the result of the FFT from the frequency domain is also a complex number. At this point, only the real part of the complex number needs to be taken to obtain the original time domain signal.
[0187] Step S406: Insert a cyclic prefix.
[0188] In this embodiment, a cyclic prefix (CP) is inserted into the data. The cyclic prefix is formed by copying the signal from the tail of an OFDM (Orthogonal Frequency Division Multiplexing) symbol to the head. The cyclic prefix can be correlated with other multipath component information to obtain complete information. Furthermore, the cyclic prefix can achieve time pre-estimation and frequency synchronization. The CP is a cyclic structure formed by copying a segment of data from the end of a data symbol to the beginning of that symbol, thus ensuring that the OFDM signal with time delay always has an integer multiple of the period within the FFT integration period.
[0189] Step S407: Channel filtering.
[0190] In this embodiment, channel filtering is used to filter out specific frequency bands in the signal in order to suppress and prevent interference.
[0191] Step S408: Digital upconversion.
[0192] In this embodiment, the digital up-conversion unit is a key digital signal processing unit located between the baseband signal processing unit and the high-speed D / A (digital-to-analog converter) in the radio transmission link. It modulates the baseband signal to the mid-to-high frequency range digitally.
[0193] Step S409, peak clipping and digital predistortion.
[0194] Currently, various wireless communication systems employ high-efficiency modulation schemes such as BPSK, QPSK, 8PSK, and 16QAM to improve spectrum utilization efficiency. These modulation schemes modulate both the phase and amplitude of the carrier wave, resulting in non-constant envelope modulation signals with a large peak-to-average power ratio (PAPR). While these modulation schemes aim for linear signal amplification, the non-constant amplitude envelope signal leads to a high PAPR, placing higher linearity requirements on the semiconductor devices in the system. Therefore, peak clipping techniques can reduce the PAPR to improve device efficiency.
[0195] Digital predistortion is a distorted signal formed by special processing of the signal data in the digital domain before it reaches the PA (Power Amplifier). The characteristics of this signal are exactly the opposite of those of the PA, thus making the signal linearly amplified after passing through the PA, achieving the purpose of power amplifier linearization.
[0196] By combining peak clipping technology with digital predistortion, the predistortion improvement can be greatly improved by reducing the peak-to-average power ratio under the same output power conditions.
[0197] Step S410: Radio frequency front-end transmission and power amplification.
[0198] In this embodiment, the processed signal is amplified by the PA (Power Amplifier) of the radio frequency front-end and then transmitted by the transmitter.
[0199] This invention, through the inclusion of a dynamic spectrum sharing unit and a carrier signal processing unit within the radio frequency unit, achieves dynamic spectrum sharing by setting up a buffer read / write controller, multiple switches, and multiple buffer units. The target buffer unit is determined from among the multiple buffer units based on the symbol number of the target data to be read / written. The multiple switches are then controlled according to the target buffer unit to perform read / write operations on the target data. Thus, dynamic spectrum sharing for both 4G and 5G signals can be achieved using a single carrier signal processing unit, reducing the performance requirements of the carrier signal processing unit and improving the efficiency of dynamic spectrum sharing.
[0200] Figure 9 This is a flowchart of the uplink data processing according to an embodiment of the present invention. Figure 9 In the illustrated embodiment, the processing of uplink data includes the following steps:
[0201] Step S501: RF front-end reception.
[0202] In this embodiment, the signal is received via the radio frequency front-end.
[0203] Step S502: Digital downconversion.
[0204] In this embodiment, the received intermediate frequency signal is converted into a low frequency signal by digital downconversion.
[0205] Step S503: Automatic gain control.
[0206] In this embodiment, Automatic Gain Control (AGC) is used. Automatic gain control refers to an automatic control method that adjusts the gain of an amplifier circuit automatically according to the signal strength. The circuit that implements this function is called an AGC loop. The AGC loop is a closed-loop electronic circuit, a negative feedback system, which can be divided into a gain-controlled amplifier circuit and a control voltage forming circuit. The gain-controlled amplifier circuit is located in the forward amplification path, and its gain changes with the control voltage. The basic components of the control voltage forming circuit are an AGC detector and a low-pass smoothing filter, and sometimes it also includes gate circuits and DC amplifiers. The output signal of the amplifier circuit is detected and filtered to remove low-frequency modulation components and noise, generating a voltage to control the gain-controlled amplifier. When the input signal increases, the output signal and the voltage of the gain-controlled amplifier also increase. The increase in the voltage of the gain-controlled amplifier causes the gain of the amplifier circuit to decrease, thus making the change in the output signal significantly smaller than the change in the input signal, achieving the purpose of automatic gain control.
[0207] Step S504, Channel Filtering
[0208] In this embodiment, channel filtering is used to filter out specific frequency bands in the signal in order to suppress and prevent interference.
[0209] Step S505: Remove cyclic prefix and perform Fast Fourier Transform
[0210] In this embodiment, the inserted cyclic prefix is removed and a Fast Fourier Transform (FFT) is performed. The FFT transforms a signal to the frequency domain.
[0211] Step S506: Data caching.
[0212] In this embodiment, when exchanging data between two modules, the result processed by the previous level cannot be immediately processed by the next level. This forces the previous level to wait for the next level to finish before sending new data, resulting in significant performance loss. Therefore, this embodiment of the invention utilizes a ping-pong buffer to avoid waiting for the next level to finish processing. Instead, the result is stored in the pong path's buffer. When the pong path data is ready, the ping path data is also processed, allowing the previous level to process the pong path data directly without waiting, and the previous level also doesn't need to wait, instead storing the result in the ping path. This improves processing efficiency.
[0213] Further, the processed signal is identified as target data. The target data is parsed to determine its symbol number. In response to an odd symbol number, a third buffer unit is identified as the target buffer unit; in response to an even symbol number, a fourth buffer unit is identified as the target buffer unit. The eighth switch is connected to the target buffer unit to connect the carrier signal processing unit to the target buffer unit, allowing the target data to be written from the carrier signal processing unit to the target buffer unit via the eighth switch. Simultaneously, a data acquisition request is received, and the target data is determined based on the data acquisition request. The symbol number of the target data is determined. In response to an odd symbol number, a third buffer unit is identified as the target buffer unit; in response to an even symbol number, a fourth buffer unit is identified as the target buffer unit. The fifth switch is connected to a target interface, which is an interface corresponding to the data type of the target data. The sixth switch is connected to the target buffer unit, allowing the target buffer unit to be connected to the target interface via the fifth and sixth switches. The seventh switch is controlled to connect to the target cache unit, thereby connecting the cache read / write controller to the target cache unit, so that the cache read / write controller controls the target cache unit to output the target data to the target interface via the fifth and sixth switches.
[0214] Furthermore, based on the type of target data, the interface that matches the type of target data among the first and second interfaces is determined as the target interface. The fifth switch K5 is then connected to the target interface. Simultaneously, a reverse pressure signal is sent to another interface to avoid data read conflicts between the first and second interfaces. This other interface is the other interface between the first and second interfaces besides the target interface.
[0215] In other words, the uplink signal, as a single carrier, first undergoes uplink RF reception, automatic gain control, digital down-conversion, channel filtering, FFT transformation, and CP removal. Uplink data is written to the uplink Ping-Pong Buffer via the eighth switch K8. The buffer read / write controller is connected to the Ping Buffer or Pong Buffer via the seventh switch K7, controlling the writing of even-numbered uplink symbols to the Ping Buffer and odd-numbered uplink symbols to the Pong Buffer. Because 4G and 5G data have different frequency domain positions, they are written to different addresses by the buffer read / write controller, with each address corresponding to a different RE number. After receiving a 4G or 5G data request signal on the ORAN interface side, the dynamic spectrum sharing device sends the corresponding data packet to one of the 4G or 5G data interfaces according to the order in which the request signals are received, and simultaneously sends a Not ready indicator (ready signal pulled low) to the other interface as needed. The packet request of the ORAN interface contains the symbol number and RE number. The dynamic spectrum sharing device controls the switching of the fifth switch K5 and the sixth switch K6 according to the parity of the symbol number, and controls the read address of the buffer according to the RE number to read the correct data.
[0216] Step S507, 4G data packet
[0217] In this embodiment, if the target data is 4G data, the 4G data is sent through the ORAN interface.
[0218] Step S508, Phase Compensation
[0219] In this embodiment, if the target data is 5G data, phase compensation is performed on the 5G data.
[0220] Step S509, 5G data packet
[0221] In this embodiment, the 5G data is sent via the ORAN interface.
[0222] This invention, through the inclusion of a dynamic spectrum sharing unit and a carrier signal processing unit within the radio frequency unit, achieves dynamic spectrum sharing by setting up a buffer read / write controller, multiple switches, and multiple buffer units. The target buffer unit is determined from among the multiple buffer units based on the symbol number of the target data to be read / written. The multiple switches are then controlled according to the target buffer unit to perform read / write operations on the target data. Thus, dynamic spectrum sharing for both 4G and 5G signals can be achieved using a single carrier signal processing unit, reducing the performance requirements of the carrier signal processing unit and improving the efficiency of dynamic spectrum sharing.
[0223] Figure 10This is a schematic diagram of a data processing apparatus according to an embodiment of the present invention. Figure 10 In the illustrated embodiment, the data processing device is adapted to a radio frequency (RF) unit, which includes a dynamic spectrum sharing unit and a carrier signal processing unit. The dynamic spectrum sharing unit includes a buffer read / write controller, multiple switches, and multiple buffer units. The data processing device includes a target data determination unit 101, a target buffer unit determination unit 102, and a switch control unit 103. The target data determination unit 101 determines target data, which is data to be read or written. The target buffer unit determination unit 102 determines a target buffer unit from the multiple buffer units based on the symbol number of the target data. The switch control unit 103 controls the multiple switches according to the target buffer unit to perform read / write operations on the target data.
[0224] In some embodiments, the target data is downlink data to be written, and the target data determining unit includes:
[0225] A data packet receiving subunit, configured to receive data packets via a first interface and / or a second interface; and
[0226] The target data determination subunit is used to determine the target data according to the time sequence of receiving the data packets;
[0227] The first interface is a fourth-generation mobile communication technology data transmission interface, and the second interface is a fifth-generation mobile communication technology data transmission interface.
[0228] In some embodiments, the target data is downlink data to be read, and the target data determining unit is used for:
[0229] The target data is determined according to predetermined rules.
[0230] In some embodiments, the plurality of cache units include a first cache unit and a second cache unit;
[0231] The target cache unit determination unit includes:
[0232] A first determining subunit is configured to determine the first cache unit as the target cache unit in response to the symbol number being odd; and
[0233] The second determining subunit is used to determine the second cache unit as the target cache unit in response to the symbol number being even.
[0234] In some embodiments, the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch;
[0235] The switch control unit includes:
[0236] A first control subunit is configured to control the connection of the first switch to a target interface, wherein the target interface is an interface for receiving target data; and
[0237] The second control subunit is used to control the second switch to connect with the target cache unit, so that the target data is written from the target interface to the target cache unit through the first switch and the second switch.
[0238] In some embodiments, the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch;
[0239] The switch control unit includes:
[0240] The third control subunit is used to control the fourth switch to connect with the target buffer unit, thereby connecting the carrier signal processing unit with the target buffer unit; and
[0241] The fourth control subunit is used to control the connection between the third switch and the target cache unit, so as to connect the cache read / write controller to the target cache unit, and the cache read / write controller controls the target cache unit to output the target data to the carrier signal processing unit via the fourth switch.
[0242] In some embodiments, the target data is downlink data to be written, and the target data determining unit is used for:
[0243] The target data is received from the carrier signal processing unit.
[0244] In some embodiments, the target data is downlink data to be read, and the target data determining unit includes:
[0245] The request receiving subunit is used to receive data acquisition requests; and
[0246] The request processing subunit is used to determine the target data based on the data acquisition request.
[0247] In some embodiments, the plurality of cache units include a third cache unit and a fourth cache unit;
[0248] The target cache unit determination unit includes:
[0249] A third determining subunit is configured to determine the third cache unit as the target cache unit in response to the symbol number being odd; and
[0250] The fourth determining subunit is used to determine the fourth cache unit as the target cache unit in response to the symbol number being even.
[0251] In some embodiments, the plurality of switches includes a fifth switch, a sixth switch, a seventh switch, and an eighth switch;
[0252] The switch control unit is used for:
[0253] The eighth switch is controlled to connect with the target buffer unit, thereby connecting the carrier signal processing unit with the target buffer unit, so that the target data is written from the carrier signal processing unit to the target buffer unit via the eighth switch.
[0254] In some embodiments, the plurality of switches includes a fifth switch, a sixth switch, a seventh switch, and an eighth switch;
[0255] The switch control unit includes:
[0256] The fifth control subunit is used to control the connection between the fifth switch and the target interface, wherein the target interface is an interface corresponding to the data type of the target data;
[0257] The sixth control subunit is used to control the connection of the sixth switch to the target buffer unit, so that the target buffer unit is connected to the target interface via the fifth and sixth switches; and
[0258] The seventh control subunit is used to control the seventh switch to connect with the target cache unit, so as to connect the cache read / write controller with the target cache unit, so that the cache read / write controller controls the target cache unit to output the target data to the target interface via the fifth switch and the sixth switch.
[0259] In some embodiments, the apparatus further includes:
[0260] The downlink data processing unit is used to perform inverse fast Fourier transform, cyclic prefix insertion, channel filtering, digital upconversion, peak clipping, digital predistortion, radio frequency front-end transmission, and power amplification on the target data through the carrier signal processing unit.
[0261] In some embodiments, the apparatus further includes:
[0262] The uplink data processing unit is used to perform radio frequency front-end reception, digital downconversion, automatic gain control, channel filtering, cyclic prefix removal, and fast Fourier transform through the carrier signal processing unit to obtain the target data.
[0263] In some embodiments, the apparatus further includes:
[0264] A reverse pressure signal transmitting unit is used to transmit a reverse pressure signal, wherein the reverse pressure signal is used to instruct another interface not to transmit data, so as to avoid write conflicts between the first interface and the second interface.
[0265] This invention, through the inclusion of a dynamic spectrum sharing unit and a carrier signal processing unit within the radio frequency unit, achieves dynamic spectrum sharing by setting up a buffer read / write controller, multiple switches, and multiple buffer units. The target buffer unit is determined from among the multiple buffer units based on the symbol number of the target data to be read / written. The multiple switches are then controlled according to the target buffer unit to perform read / write operations on the target data. Thus, dynamic spectrum sharing for both 4G and 5G signals can be achieved using a single carrier signal processing unit, reducing the performance requirements of the carrier signal processing unit and improving the efficiency of dynamic spectrum sharing.
[0266] Figure 11 This is a schematic diagram of an electronic device according to an embodiment of the present invention. Figure 11 The illustrated electronic device is a general-purpose data processing device, comprising a general-purpose computer hardware architecture, including at least a processor 111 and a memory 112. The processor 111 and memory 112 are connected via a bus 113. The memory 112 is adapted to store instructions or programs executable by the processor 111. The processor 111 can be a standalone microprocessor or a collection of one or more microprocessors. Thus, the processor 111 executes the instructions stored in the memory 112, thereby performing the method flow of the embodiments of the present invention as described above to process data and control other devices. The bus 113 connects the aforementioned components together, and also connects these components to a display controller 114, a display device, and an input / output (I / O) device 115. The input / output (I / O) device 115 can be a mouse, keyboard, modem, network interface, touch input device, motion-sensing input device, printer, and other devices known in the art. Typically, the input / output device 115 is connected to the system via an input / output (I / O) controller 116.
[0267] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus (devices), or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can be implemented as a computer program product on one or more computer-readable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0268] This invention is described with reference to flowchart illustrations of methods, apparatus (devices), and computer program products according to embodiments of this application. It should be understood that each step in the flowchart can be implemented by computer program instructions.
[0269] These computer program instructions may be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including an instruction means, the implementation process of which is described in the instruction means. Figure 1 The function specified in one or more processes.
[0270] These computer program instructions may also be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing device, produce instructions for implementing processes. Figure 1 A device for a function specified in one or more processes.
[0271] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can be modified and varied in various ways. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of protection of the present invention.
Claims
1. A data processing method, applicable to a radio frequency unit, characterized in that, The radio frequency unit includes a dynamic spectrum sharing unit and a carrier signal processing unit. The dynamic spectrum sharing unit includes a buffer read / write controller, multiple switches, and multiple buffer units. The multiple switches are configured to selectively connect any one of the multiple buffer units to a fourth-generation mobile communication technology data transmission interface, a fifth-generation mobile communication technology data transmission interface, and one of the carrier signal processing units, respectively. 4G data packets and 5G data packets are distinguished by different addresses stored in the buffer units. The storage address is determined by the data's RE number, and 4G data and 5G data occupy different RE numbers and storage addresses, respectively. The method includes: Determine the target data, which is the data to be read or written; The target cache unit is determined from the plurality of cache units based on the symbol number of the target data; and Based on the target cache unit, the connection status of the plurality of switches is controlled to connect the interface corresponding to the target data to the target cache unit, or to connect the target cache unit to the carrier signal processing unit, so as to perform read and write operations on the target data.
2. The method according to claim 1, characterized in that, The target data is the downlink data to be written, and the determination of the target data includes: Receive data packets through the first interface and / or the second interface; and The target data is determined according to the time sequence in which the data packets are received. The first interface is a fourth-generation mobile communication technology data transmission interface, and the second interface is a fifth-generation mobile communication technology data transmission interface.
3. The method according to claim 1, characterized in that, The target data is the downlink data to be read, and the determination of the target data specifically refers to: The target data is determined according to predetermined rules.
4. The method according to claim 2 or 3, characterized in that, The plurality of cache units includes a first cache unit and a second cache unit; The step of determining the target cache unit among the plurality of cache units based on the symbol number of the target data includes: In response to the symbol number being odd, the first cache unit is determined as the target cache unit; and In response to the symbol number being even, the second cache unit is determined as the target cache unit.
5. The method according to claim 2, characterized in that, The plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch; The step of controlling the plurality of switches according to the target cache unit to perform read and write operations on the target data includes: Control the first switch to connect to the target interface, where the target interface is an interface for receiving the target data; and The second switch is controlled to connect to the target cache unit so that the target data is written from the target interface to the target cache unit through the first switch and the second switch.
6. The method according to claim 3, characterized in that, The plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch; The step of controlling the plurality of switches according to the target cache unit to perform read and write operations on the target data includes: Control the fourth switch to connect to the target buffer unit, thereby connecting the carrier signal processing unit to the target buffer unit; and The third switch is controlled to connect to the target cache unit, thereby connecting the cache read / write controller to the target cache unit, so that the cache read / write controller controls the target cache unit to output the target data to the carrier signal processing unit via the fourth switch.
7. The method according to claim 1, characterized in that, The target data is the downlink data to be written, and the specific determination of the target data is as follows: The target data is received from the carrier signal processing unit.
8. The method according to claim 1, characterized in that, The target data is the downlink data to be read, and the determination of the target data includes: Receive data acquisition requests; and The target data is determined based on the data acquisition request.
9. The method according to claim 7 or 8, characterized in that, The plurality of cache units includes a third cache unit and a fourth cache unit; The step of determining the target cache unit among the plurality of cache units based on the symbol number of the target data includes: In response to the symbol number being odd, the third cache unit is determined as the target cache unit; and In response to the symbol number being even, the fourth cache unit is determined as the target cache unit.
10. The method according to claim 7, characterized in that, The plurality of switches includes a fifth switch, a sixth switch, a seventh switch, and an eighth switch; The step of controlling the plurality of switches according to the target cache unit to perform read and write operations on the target data includes: The eighth switch is controlled to connect with the target buffer unit, thereby connecting the carrier signal processing unit with the target buffer unit, so that the target data is written from the carrier signal processing unit to the target buffer unit via the eighth switch.
11. The method according to claim 8, characterized in that, The plurality of switches includes a fifth switch, a sixth switch, a seventh switch, and an eighth switch; The step of controlling the plurality of switches according to the target cache unit to perform read and write operations on the target data includes: The fifth switch is controlled to connect to the target interface, which is an interface corresponding to the data type of the target data. Control the sixth switch to connect to the target cache unit, so that the target cache unit is connected to the target interface via the fifth and sixth switches; and The seventh switch is connected to the target cache unit to connect the cache read / write controller to the target cache unit, so that the cache read / write controller controls the target cache unit to output the target data to the target interface via the fifth and sixth switches.
12. The method according to claim 2 or 3, characterized in that, The method further includes: The carrier signal processing unit performs inverse fast Fourier transform, cyclic prefix insertion, channel filtering, digital up-conversion, peak clipping, digital predistortion, RF front-end transmission, and power amplification on the target data.
13. The method according to claim 7 or 8, characterized in that, The method further includes: The target data is obtained by performing radio frequency front-end reception, digital downconversion, automatic gain control, channel filtering, cyclic prefix removal, and fast Fourier transform through the carrier signal processing unit.
14. The method according to claim 5 or 11, characterized in that, The method further includes: Send a backpressure signal, wherein the backpressure signal is used to indicate that the other interface is not transmitting data.
15. A radio frequency unit, characterized in that, The radio frequency unit includes: The carrier signal processing unit is used for data transmission and reception. The dynamic spectrum sharing unit includes a cache read / write controller, multiple switches, and multiple cache units. The multiple switches are configured to selectively connect any one of the cache units to a fourth-generation mobile communication (4G) data transmission interface, a fifth-generation mobile communication (5G) data transmission interface, and a carrier signal processing unit, respectively. 4G and 5G data packets are distinguished by different addresses stored in the cache units, with the storage address determined by the data's RE number. 4G and 5G data occupy different RE numbers and storage addresses, respectively. The control unit is used to determine target data, which is data to be read or written. Based on the symbol number of the target data, the control unit determines the target cache unit among the multiple cache units. Based on the target cache unit, the control unit controls the connection state of the multiple switches to connect the interface corresponding to the target data to the target cache unit or connect the target cache unit to the carrier signal processing unit to perform read and write operations on the target data.
16. The radio frequency unit according to claim 15, characterized in that, The cache unit includes: The first cache unit is used to cache downlink data; and The second cache unit is used to cache downlink data.
17. The radio frequency unit according to claim 16, characterized in that, The switch includes: A first switch is connected between the dynamic spectrum sharing unit and the first interface and the second interface, for connecting the dynamic spectrum sharing unit to one of the first interface and the second interface; A second switch is connected between the first switch and the cache unit, for connecting the first switch to one of the plurality of cache units; A third switch, connected between the cache read / write controller and the cache unit, is used to connect the cache read / write controller to one of the plurality of cache units; and A fourth switch is connected between the carrier signal processing unit and the buffer unit, for connecting the carrier signal processing unit to one of the plurality of buffer units; The first interface is a fourth-generation mobile communication technology data transmission interface, and the second interface is a fifth-generation mobile communication technology data transmission interface.
18. The radio frequency unit according to claim 15, characterized in that, The cache unit includes: The third cache unit is used to cache upstream data; and The fourth cache unit is used to cache upstream data.
19. The radio frequency unit according to claim 18, characterized in that, The switch includes: The fifth switch is connected between the dynamic spectrum sharing unit and the first interface and the second interface, for connecting the dynamic spectrum sharing unit to one of the first interface and the second interface; A sixth switch is connected between the fifth switch and the buffer unit, for connecting the fifth switch to one of the plurality of buffer units; A seventh switch, connected between the cache read / write controller and the cache unit, is used to connect the cache read / write controller to one of the plurality of cache units; and The eighth switch is connected between the carrier signal processing unit and the buffer unit, and is used to connect the carrier signal processing unit to one of the plurality of buffer units; The first interface is a fourth-generation mobile communication technology data transmission interface, and the second interface is a fifth-generation mobile communication technology data transmission interface.
20. A data processing apparatus, suitable for a radio frequency unit, characterized in that, The radio frequency unit includes a dynamic spectrum sharing unit and a carrier signal processing unit. The dynamic spectrum sharing unit includes a buffer read / write controller, multiple switches, and multiple buffer units. The multiple switches are configured to selectively connect any one of the multiple buffer units to a fourth-generation mobile communication technology data transmission interface, a fifth-generation mobile communication technology data transmission interface, and one of the carrier signal processing units, respectively. 4G data packets and 5G data packets are distinguished by different addresses stored in the buffer units. The storage address is determined by the data's RE number, and 4G data and 5G data occupy different RE numbers and storage addresses. The device includes: A target data determination unit is used to determine target data, which is data to be read or written. Target cache unit determining unit, configured to determine a target cache unit among the plurality of cache units based on the symbol number of the target data; and A switch control unit is used to control the connection state of the plurality of switches according to the target cache unit, so as to connect the interface corresponding to the target data to the target cache unit, or connect the target cache unit to the carrier signal processing unit, so as to perform read and write operations on the target data.
21. An electronic device comprising a memory and a processor, characterized in that, The memory is used to store one or more computer program instructions, wherein the one or more computer program instructions are executed by the processor to implement the method as described in any one of claims 1-14.
22. A computer-readable storage medium storing computer program instructions thereon, characterized in that, The computer program instructions, when executed by a processor, implement the method as described in any one of claims 1-14.