Driving signal detection method, device and display device

Abstract

The present application provides a driving signal detection method, device and display device, the driving signal detection method includes: receiving a driving signal and a target characteristic value, wherein the driving signal is an analog signal; converting the driving signal into a high / low level signal based on the voltage value of a preset reference voltage signal; performing analog-to-digital conversion on the high / low level signal to obtain a corresponding digital driving signal; detecting the characteristic value of the digital driving signal to obtain a measured characteristic value; wherein the measured characteristic value includes at least one of a measured period, a measured duty cycle and a measured phase; comparing the measured characteristic value of the digital driving signal with the target characteristic value, and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value. The method provided by the present application can automatically complete the detection and comparison of the characteristic value of the driving signal, and has high detection efficiency.

Description

Technical Field

[0001] The present application relates to the field of display panels, and in particular to a driving signal detection method, device and display device. Background Art

[0002] At present, LCD (Liquid Crystal Display) is a mainstream display widely used in various industries. LCD displays have the advantages of thin appearance and light weight.

[0003] In order to reduce production costs, existing liquid crystal display panels usually adopt GDL (Gate Driver less) circuit driving technology, that is, the gate driving circuit of the horizontal scan line is made outside the display area of ​​the display panel through the original array process, so that it replaces the external integrated circuit board (IC) to realize the driving of the horizontal scan line. This type of display panel has a large number of input signals, for example, including pulse waveform signals such as frame start signal STV, clock signal CK, low-frequency signal LC, etc. During the debugging process, engineers need to check whether the waveform of the debugged signal meets the debugging requirements. In the prior art, an oscilloscope is usually used to display the waveform of the signal, and then the engineer observes the signal by eye to determine whether the waveform meets the requirements. This inspection method is time-consuming, labor-intensive and inefficient. Summary of the invention

[0004] In view of this, the main purpose of the present application is to propose a driving signal detection method, device and display device, aiming to solve the problem that the existing driving signal waveform detection method is time-consuming, labor-intensive and inefficient.

[0005] The present application proposes a drive signal detection method, which includes: receiving a drive signal and a target characteristic value, wherein the drive signal is an analog signal; converting the drive signal into a high / low level signal based on the voltage value of a preset reference voltage signal; performing analog-to-digital conversion on the high / low level signal to obtain a corresponding digital drive signal; detecting the characteristic value of the digital drive signal to obtain a measured characteristic value; wherein the measured characteristic value includes at least one of a measured period, a measured duty cycle, and a measured phase, and the target characteristic value correspondingly includes at least one of a target period, a target duty cycle, and a target phase; and comparing the measured characteristic value of the digital drive signal with the target characteristic value, and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value.

[0006] The detection method of the driving signal provided by the present application can automatically complete the detection and comparison of the driving signal characteristic value by converting the driving signal into a high / low level signal, then converting the high / low level signal into a digital driving signal, detecting the characteristic value of the digital driving signal to obtain the measured characteristic value, and comparing the measured characteristic value of the digital driving signal with the target characteristic value and outputting the corresponding comparison result, so as to achieve high detection efficiency. In addition, since the driving signal is first converted into a high / low level signal before the analog-to-digital conversion of the driving signal, that is, the analog signal is converted into a standard square wave signal, the influence of the burrs and jitter in the analog signal on the detection result can be removed, and the detection result is more accurate.

[0007] Optionally, the digital drive signal is a binary sequence arranged in time sequence, and the measured characteristic value of the digital drive signal includes a measured period. The detection of the characteristic value of the digital drive signal to obtain the measured characteristic value includes: judging whether there is an m-bit cyclic data segment with a cycle number reaching a preset number in the digital drive signal; wherein the m-bit cyclic data segment includes m-bit binary data arranged continuously in the digital drive signal; if it is determined that there is an m-bit cyclic data segment with a cycle number reaching a preset number in the digital drive signal, then determining the measured period of the digital drive signal according to the number of bits m of the m-bit cyclic data segment; and, if it is determined that there is no m-bit cyclic data segment with a cycle number reaching a preset number in the digital drive signal, then taking m=m+1, and returning to the step of judging whether there is an m-bit cyclic data segment with a cycle number reaching a preset number in the digital drive signal; wherein the starting value of m is 2.

[0008] Optionally, the target characteristic value includes a target period. The step of comparing the measured characteristic value of the digital drive signal with the target characteristic value and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value comprises: determining whether the difference between the measured period of the digital drive signal and the target period corresponding thereto is less than or equal to a preset period error threshold; if it is determined that the difference between the measured period of the digital drive signal and the target period corresponding thereto is less than or equal to the preset period error threshold, outputting a first indication signal to indicate that the measured period of the drive signal meets the requirement; and, if it is determined that the difference between the measured period of the digital drive signal and the target period corresponding thereto is greater than the preset period error threshold, outputting a second indication signal to indicate that the measured period of the drive signal does not meet the requirement.

[0009] Optionally, the measured characteristic value of the digital drive signal also includes a measured duty cycle. The detecting the characteristic value of the digital drive signal to obtain the measured characteristic value further includes: if it is determined that there is an m-bit cyclic data segment with a cycle number reaching a preset number in the digital drive signal, dividing the cumulative number of bits with a value of 1 in the m-bit cyclic data segment by the number of bits m, to obtain the measured duty cycle of the digital drive signal.

[0010] Optionally, the target characteristic value also includes a target duty cycle. The step of comparing the measured characteristic value of the digital drive signal with the target characteristic value and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value includes: determining whether the difference between the measured duty cycle of the digital drive signal and the target duty cycle corresponding thereto is less than or equal to a preset duty cycle error threshold; if it is determined that the difference between the measured duty cycle of the digital drive signal and the target duty cycle corresponding thereto is less than or equal to the preset duty cycle error threshold, outputting a third indication signal to indicate that the measured duty cycle of the drive signal meets the requirement; and, if it is determined that the difference between the measured duty cycle of the digital drive signal and the target duty cycle corresponding thereto is greater than the preset duty cycle error threshold, outputting a fourth indication signal to indicate that the measured duty cycle of the drive signal does not meet the requirement.

[0011] Optionally, the driving signal is used to drive a display panel, and the driving signal includes a frame start signal, N clock signals, and at least one of two low-frequency signals; wherein N≥1.

[0012] Optionally, the driving signal includes a frame start signal and N clock signals, the digital driving signal is a binary sequence arranged in time sequence, and the measured characteristic value of the digital driving signal includes a measured phase. The detecting of the characteristic value of the digital driving signal to obtain the measured characteristic value includes: determining the time corresponding to the first data bit with a value of 1 in the digital frame start signal corresponding to the frame start signal as the starting time; and determining the time length from the time corresponding to the first data bit with a value of 1 in the digital clock signal corresponding to each clock signal to the starting time as the measured phase of each clock signal.

[0013] Optionally, the target characteristic value includes a target phase, and each clock signal corresponds to a target phase. The step of comparing the measured characteristic value of the digital drive signal with the target characteristic value and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value includes: for each clock signal: determining whether the difference between the measured phase of the clock signal and the target phase corresponding to it is less than or equal to a preset phase error threshold; if it is determined that the difference between the measured phase of the clock signal and the target phase corresponding to it is less than or equal to the preset phase error threshold, outputting a fifth indication signal to indicate that the measured phase of the drive signal meets the requirements; and, if it is determined that the difference between the measured phase of the clock signal and the target phase corresponding to it is greater than the preset phase error threshold, outputting a sixth indication signal to indicate that the measured phase of the drive signal does not meet the requirements.

[0014] The present application also provides a driving signal detection device, the driving signal detection device comprising: a processing unit and a plurality of signal conversion units. Each signal conversion unit is used to receive a driving signal, and convert the driving signal into a high / low level signal based on the voltage value of a preset reference voltage signal, and perform analog-to-digital conversion on the high / low level signal to obtain and output a corresponding digital driving signal. The processing unit is electrically connected to the plurality of signal conversion units, respectively, and the processing unit is used to receive the target characteristic value corresponding to each driving signal and the digital driving signal output by the plurality of signal conversion units, and detect the characteristic value of each digital driving signal to obtain a corresponding measured characteristic value, and compare the measured characteristic value of the digital driving signal with the corresponding target characteristic value, and output a corresponding comparison result to indicate the difference between the measured characteristic value and the corresponding target characteristic value; the measured characteristic value of each digital driving signal includes at least one of a measured period, a measured duty cycle, and a measured phase, and the target characteristic value of the digital driving signal correspondingly includes at least one of a target period, a target duty cycle, and a target phase.

[0015] The present application also provides a display device, which includes a display panel, a timing control unit, a signal optimization component and the above-mentioned drive signal detection device. The timing control unit is electrically connected to the drive signal detection device and the signal optimization component, respectively, and the signal optimization component is also electrically connected to the display panel. The drive signal detection device is used to feed back the difference between the measured characteristic value of the digital drive signal and the target characteristic value to the timing control unit when a difference is detected between the measured characteristic value and the target characteristic value of the digital drive signal; the timing control unit is used to output the difference value and its corresponding drive signal to the signal optimization component; the signal optimization component is used to compensate and optimize the drive signal according to the difference value to obtain an optimized drive signal, and output the optimized drive signal to the display panel.

[0016] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a timing waveform diagram of the driving signal provided in an embodiment of the present application.

[0018] Figure 2 It is a structural schematic diagram of a driving signal detection device provided in an embodiment of the present application.

[0019] Figure 3 Schematic diagram of the circuit structure of the signal conversion unit provided in the embodiment of the present application.

[0020] Figure 4 It is a flow chart of the driving signal detection method provided in an embodiment of the present application.

[0021] Figure 5 yes Figure 4 A first detailed flowchart of step 640 and step 650 in FIG.

[0022] Figure 6 yes Figure 4 A second detailed flowchart of steps 640 and 650 in FIG.

[0023] Figure 7 yes Figure 4 A third detailed flowchart of steps 640 and 650.

[0024] Figure 8 It is a schematic diagram of the structure of the display device provided in an embodiment of the present application.

[0025] Description of main component symbols:

[0026] Display device 1

[0027] Driving signal detection device 10

[0028] Signal conversion unit 100

[0029] Processing unit 200

[0030] Human-computer interaction unit 300

[0031] Timing control unit 20

[0032] Signal optimization component 30

[0033] Display panel 40

[0034] Comparator U1

[0035] Analog-to-digital conversion unit 120

[0036] Crystal Oscillator Module SJT

[0037] Analog-to-digital converter 121

[0038] Steps 610-650, 641-646, 651-659

[0039] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0041] In the description of the present application, it should be noted that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0042] A GOA (Gate driver on array) type display panel generally includes a timing control unit and a GDL (Gate Driver less) unit. The GDL units are disposed on both sides of the display panel, and the timing control unit is used to output a driving signal to each GDL unit, so that each GDL unit turns on the scan lines in the display panel row by row, thereby driving the display panel to display.

[0043] like Figure 1As shown, the driving signal output by the timing control unit includes a frame start signal (Start Vertical, STV), clock signals CK1-CKN, and low-frequency signals LC1 and LC2. During the debugging process of the display panel, the engineer needs to check whether the waveform of the debugged signal meets the debugging requirements. In the prior art, an oscilloscope is usually used to display the waveform of the driving signal, and then the engineer observes the waveform of the driving signal by eye to determine whether it meets the requirements, that is, to check whether the characteristic values ​​of the driving signal such as the period, duty cycle, and phase meet the requirements. This inspection method is time-consuming, labor-intensive, and inefficient.

[0044] Please also read Figure 2-Figure 3 In order to solve the problem that the existing drive signal waveform detection method is time-consuming, labor-intensive and inefficient. The embodiment of the present application provides a drive signal detection device 10. The drive signal detection device 10 is used to detect whether the characteristic value of the signal meets the requirements, for example, it can detect the drive signal output by the timing control unit 20. Specifically, the drive signal detection device 10 includes a plurality of signal conversion units 100, a processing unit 200 and a human-computer interaction unit 300.

[0045] Each signal conversion unit 100 is used to receive a driving signal, convert the driving signal into a high / low level signal based on the voltage value of a preset reference voltage signal, and perform analog-to-digital conversion on the high / low level signal to obtain and output a corresponding digital driving signal. The driving signal includes a frame start signal, N clock signals, and at least one of two low-frequency signals, wherein N≥1.

[0046] Specifically, Figure 3 As shown, each signal conversion unit 100 includes a comparator U1 and an analog-to-digital conversion unit 120 .

[0047] Among them, the non-inverting input terminal of the comparator U1 is used to receive a driving signal, and the inverting input terminal of the comparator U1 is used to receive the preset reference voltage signal, for example, electrically connected to the ground terminal GND through a resistor, at this time, the voltage value of the preset reference voltage signal is zero. The positive power supply terminal of the comparator U1 is used to receive a high level VDD, and the positive power supply terminal of the comparator U1 is used to receive a low level VGND. The comparator is used to compare the voltage value of the driving signal with the voltage value of the preset reference voltage signal to obtain and output a high / low level signal. It can be understood that the driving signal is an analog signal, and the waveform may have burrs and jitters, that is, it is not a standard square wave signal. If the analog signal is directly converted into a digital signal by analog to digital, it will also be irregular. In this way, the detection error of the characteristic value will be large, and the characteristic value may not even be detected. The high / low level signal output by the comparator U1 after comparing the driving signal with the preset reference voltage signal is a signal composed of two levels, a high level VDD and a low level VGND, that is, a standard square wave signal. Obviously, when the characteristic value of the standard square wave signal is detected, the detection effect is more accurate.

[0048] The analog-to-digital conversion unit 120 is electrically connected to the output end of the comparator U1, and the analog-to-digital conversion unit 120 is used to perform analog-to-digital conversion on the high / low level signal output by the comparator U1 to obtain and output a corresponding digital drive signal. Specifically, the analog-to-digital conversion unit 120 includes a crystal oscillator module SJT and an analog-to-digital converter 121. The crystal oscillator module SJT is used to generate a pulse signal CLK and output it to the analog-to-digital converter 121. The sampling frequency of the analog-to-digital converter 121 is the frequency of the pulse signal CLK. In order to ensure the accuracy of the detection result of the characteristic value of the drive signal, the frequency of the pulse signal CLK is preferably more than 10 times the frequency of the signal to be detected, such as the clock signals CK1 to CKN. The digital drive signal is a binary sequence arranged in time sequence.

[0049] The processing unit 200 is electrically connected to the plurality of signal conversion units 100 and the human-computer interaction unit 300, respectively. The processing unit 200 is used to receive the target characteristic values ​​corresponding to the respective drive signals output by the human-computer interaction unit 300 and the digital drive signals output by the plurality of signal conversion units 100, and detect the characteristic value of each digital drive signal to obtain the corresponding measured characteristic value, and compare the measured characteristic value of the digital drive signal with the corresponding target characteristic value, and output the corresponding comparison result to the human-computer interaction unit 300 to indicate the difference between the measured characteristic value and the corresponding target characteristic value. The measured characteristic value of each digital drive signal includes at least one of a measured period, a measured duty cycle, and a measured phase, and the target characteristic value of the digital drive signal correspondingly includes at least one of a target period, a target duty cycle, and a target phase.

[0050] The human-computer interaction unit 300 includes an input unit and an output unit. The output unit is used to receive the target characteristic values ​​corresponding to each drive signal input by the user (for example, the target period, target duty cycle and target phase of each clock signal) and output them to the processing unit 200. The output unit is used to receive the comparison result output by the processing unit 200 to show the user the difference between the measured characteristic values ​​of each drive signal and the corresponding target characteristic value. Exemplarily, the input unit may include but is not limited to one or more of a touch panel, a physical keyboard, a function key, a trackball, a mouse, a joystick, etc. The output unit may include but is not limited to one or more of a touch panel, a display, a speaker, etc.

[0051] See also Figure 4 Based on the same inventive concept, the embodiment of the present application further provides a driving signal detection method, which can be applied to the above-mentioned driving signal detection device 10. The driving signal detection method specifically includes the following steps:

[0052] Step 610: Receive a driving signal and a target characteristic value, wherein the driving signal is an analog signal.

[0053] Step 620: Convert the driving signal into a high / low level signal based on the voltage value of the preset reference voltage signal.

[0054] Step 630: Perform analog-to-digital conversion on the high / low level signal to obtain a corresponding digital driving signal.

[0055] Step 640: Detect the characteristic value of the digital drive signal to obtain a measured characteristic value, wherein the measured characteristic value includes at least one of a measured period, a measured duty cycle, and a measured phase, and the target characteristic value correspondingly includes at least one of a target period, a target duty cycle, and a target phase.

[0056] Step 650 : comparing the measured characteristic value of the digital driving signal with the target characteristic value, and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value.

[0057] See also Figure 5 , Figure 5 yes Figure 4 The first detailed flow chart of step 640 and step 650 in FIG. Figure 5 Steps 641 to 643 in Figure 4 The detailed process of step 640 in Figure 5 Steps 651 to 653 in Figure 4 The detailed process of step 650 in FIG.

[0058] Step 641, determining whether there is an m-bit cyclic data segment whose number of cycles reaches a preset number in the digital drive signal. The m-bit cyclic data segment includes m-bit binary data arranged continuously in the digital drive signal. The starting value of m is 2. If it is determined that there is an m-bit cyclic data segment whose number of cycles reaches a preset number (for example, 100 times) in the digital drive signal, then executing step 642, otherwise executing step 643. Exemplarily, the drive signal is Figure 1 Taking the clock signal Ck1 in as an example, assuming that the voltage value of the high level VDD in the high / low level signal is 1, and the voltage value of the low level VGND is 0, the digital driving signal corresponding to the clock signal Ck1 is 00000001111100000…1111100000…1111100000…, then the cyclic data segment is 1111100000, that is, m=10.

[0059] Step 642, determining the measured period of the digital drive signal according to the number of bits m of the m-bit cyclic data segment. Specifically, the measured period of the digital drive signal can be determined according to the sampling period of the analog-to-digital converter and the number of bits m of the cyclic data segment. For example, assuming that the sampling period of the analog-to-digital converter is 1 ms, the measured period T1 of the clock signal Ck1 is 10×1 ms=10 ms.

[0060] Step 643, taking m=m+1, and returning to step 641, and again determining whether there is an m-bit cyclic data segment whose number of cycles reaches a preset number in the digital drive signal. It can be understood that in the embodiment of the present application, 2 is used as the starting value of m, that is, it is determined in sequence whether there is a 2-bit cyclic data segment, a 3-bit cyclic data segment, a 4-bit cyclic data segment, etc. whose number of cycles reaches a preset number in the digital drive signal, until it is determined that there is an m-bit cyclic data segment whose number of cycles reaches a preset number in the digital drive signal, and step 643 is no longer executed.

[0061] Step 651, determining whether the difference between the measured period of the digital drive signal and the corresponding target period is less than or equal to a preset period error threshold. If it is determined that the difference between the measured period of the digital drive signal and the corresponding target period is less than or equal to the preset period error threshold, executing step 652, otherwise, executing step 653. The preset period error threshold is determined according to the detection accuracy of the drive signal detection device 10.

[0062] Step 652: Output a first indication signal, wherein the first indication signal is used to indicate that the measured period of the driving signal meets the requirement.

[0063] Step 653: output a second indication signal. The second indication signal is used to indicate that the measured period of the drive signal does not meet the requirements. Optionally, the second indication signal may also include the measured period value of the drive signal, so that the engineer can adjust the period of the drive signal accordingly according to the measured period value.

[0064] See also Figure 6 , Figure 6 yes Figure 4 The second detailed flow chart of step 640 and step 650 in FIG. Figure 6 Step 641, step 643 and step 644 in Figure 4 The detailed process of step 640 in Figure 6 Steps 654 to 656 in Figure 4 The detailed process of step 650 in FIG.

[0065] Step 641, determining whether there is an m-bit cyclic data segment whose number of cycles reaches a preset number in the digital drive signal. The m-bit cyclic data segment includes m-bit binary data arranged continuously in the digital drive signal. The starting value of m is 2. If it is determined that there is an m-bit cyclic data segment whose number of cycles reaches a preset number in the digital drive signal, then executing step 642, otherwise executing step 643.

[0066] Step 644: Divide the cumulative number of bits with a value of 1 in the m-bit cyclic data segment by the number of bits m to obtain the measured duty cycle of the digital drive signal. Figure 1 Taking the clock signal Ck1 in as an example, assuming that the voltage value of the high level VDD in the high / low level signal is 1, the voltage value of the low level VGND is 0, the sampling period of the analog-to-digital converter is 1ms, and the digital drive signal corresponding to the clock signal Ck1 is 00000001111100000…1111100000…1111100000…, then, the cyclic data segment is 1111100000, that is, m=10, the measured period T1 of the clock signal Ck1 is T1=10×1ms=10ms, and the number of bits with a value of 1 in the cyclic data segment 1111100000 is 5, that is, d1=10×1ms=10ms, so the measured duty cycle of the clock signal Ck1 is 50%.

[0067] Step 643, taking m=m+1, and returning to step 641, it is determined again whether there is an m-bit cyclic data segment with a cycle number reaching a preset number in the digital driving signal.

[0068] Step 654, determining whether the difference between the measured duty cycle of the digital drive signal and the corresponding target duty cycle is less than or equal to a preset duty cycle error threshold. If it is determined that the difference between the measured duty cycle of the digital drive signal and the corresponding target duty cycle is less than or equal to the preset duty cycle error threshold, executing step 655, otherwise, executing step 656. The preset duty cycle error threshold is determined according to the detection accuracy of the drive signal detection device 10.

[0069] Step 655: output a third indication signal, wherein the third indication signal is used to indicate that the measured duty cycle of the driving signal meets the requirement.

[0070] Step 656: output a fourth indication signal. The fourth indication signal is used to indicate that the measured duty cycle of the drive signal does not meet the requirement. Optionally, the fourth indication signal may also include the measured duty cycle value of the drive signal, so that the engineer adjusts the duty cycle of the drive signal accordingly according to the measured duty cycle value.

[0071] See also Figure 7 , Figure 7 yes Figure 4 The third detailed flow chart of step 640 and step 650 in FIG. Figure 7 Steps 645 to 646 in Figure 4 The detailed process of step 640 in Figure 7 Steps 657 to 659 in Figure 4The detailed process of step 650 in FIG. 1 is as follows. In this embodiment, the driving signal includes a frame start signal and N clock signals.

[0072] Step 645: determine the time corresponding to the first data bit with a value of 1 in the digital frame start signal corresponding to the frame start signal as the start time.

[0073] Step 646, determine the time length from the time corresponding to the first data bit with a value of 1 in the digital clock signal corresponding to each clock signal to the starting time as the measured phase of each clock signal. Figure 1 As shown, the measured phase of the clock signal Ck1 is a1.

[0074] Step 657: for each clock signal, determine whether the difference between the measured phase of the clock signal and the corresponding target phase is less than or equal to a preset phase error threshold. If it is determined that the difference between the measured phase of the clock signal and the corresponding target phase is less than or equal to the preset phase error threshold, execute step 658; otherwise, execute step 659.

[0075] Step 658: Output a fifth indication signal, wherein the fifth indication signal is used to indicate that the measured phase of the drive signal meets the requirement.

[0076] Step 659: output a sixth indication signal. The sixth indication signal is used to indicate that the measured phase of the drive signal does not meet the requirements. Optionally, the sixth indication signal may also include the measured phase value of the drive signal, so that the engineer adjusts the phase of the drive signal accordingly according to the measured phase value.

[0077] It should be noted that, in other embodiments, the driving signal detection method provided in the present application can simultaneously detect and compare two or three characteristic values ​​of the period, duty cycle and phase of the frame start signal (Start Vertical, STV), clock signals CK1~CKN, and low-frequency signals LC1 and LC2. In this way, the detection of all driving signals of the display panel can be completed at one time, and the detection efficiency is higher.

[0078] The detection method of the driving signal provided by the present application can automatically complete the detection and comparison of the driving signal characteristic value by converting the driving signal into a high / low level signal, then converting the high / low level signal into a digital driving signal, detecting the characteristic value of the digital driving signal to obtain the measured characteristic value, and comparing the measured characteristic value of the digital driving signal with the target characteristic value and outputting the corresponding comparison result, so as to achieve high detection efficiency. In addition, since the driving signal is first converted into a high / low level signal before the analog-to-digital conversion of the driving signal, that is, the analog signal is converted into a standard square wave signal, the influence of the burrs and jitter in the analog signal on the detection result can be removed, and the detection result is more accurate.

[0079] See also Figure 8 The embodiment of the present application further provides a display device 1 , which includes the above-mentioned driving signal detection device 10 , a timing control unit 20 , a display panel 30 and a display panel 40 .

[0080] The timing control unit 20 is electrically connected to the driving signal detection device 10 and the signal optimization component 30, respectively, and the signal optimization component 30 is also electrically connected to the display panel 40. The driving signal detection device 10 is used to detect the measured characteristic value of the digital driving signal corresponding to the driving signal, and detect whether there is a difference between the measured characteristic value of the digital driving signal and the target characteristic value, and when a difference is detected between the measured characteristic value of the digital driving signal and the target characteristic value, the difference value between the measured characteristic value of the digital driving signal and the target characteristic value is fed back to the timing control unit 20. The timing control unit 20 is used to output the difference value and the corresponding driving signal to the signal optimization component 30. The signal optimization component 30 is used to compensate and optimize the driving signal according to the difference value to obtain an optimized driving signal, and output the optimized driving signal to the display panel 40. Exemplarily, the display panel 40 can also serve as the human-computer interaction unit 300 in the driving signal detection device 10.

[0081] Further, the signal optimization component 30 includes an analog-to-digital converter (not shown) and a microprocessor (not shown) electrically connected to each other, the analog-to-digital converter is electrically connected to the timing control unit 20, and the microprocessor is electrically connected to the display panel 40. The analog-to-digital converter is used to convert the drive signal into a digital signal and output it to the microprocessor. The microprocessor is used to perform an addition operation on the digital signal and the difference value to obtain a new digital signal, and perform digital-to-analog conversion on the new digital signal to obtain the optimized drive signal and output it to the display panel 40, so as to drive the display panel 40 to display.

[0082] The display device 1 can not only realize automatic detection of the characteristic value of the driving signal and determine whether the characteristic value of the driving signal meets the requirements, but also can automatically optimize and correct the driving signal according to the detection result when the characteristic value of the driving signal does not meet the requirements, which is more efficient.

[0083] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A driving signal detection method, characterized in that: include: receiving a driving signal and a target characteristic value, wherein the driving signal is an analog signal; Converting the driving signal into a high / low level signal based on a voltage value of a preset reference voltage signal; Performing analog-to-digital conversion on the high / low level signal to obtain a corresponding digital drive signal; Detecting the characteristic value of the digital drive signal to obtain a measured characteristic value; wherein the measured characteristic value includes at least one of a measured period, a measured duty cycle, and a measured phase, and the target characteristic value correspondingly includes at least one of a target period, a target duty cycle, and a target phase; and Comparing the measured characteristic value of the digital drive signal with the target characteristic value, and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value; Wherein, the digital drive signal is a binary sequence arranged in time sequence, and the measured characteristic value of the digital drive signal includes a measured period; The detecting the characteristic value of the digital driving signal to obtain the measured characteristic value includes: Determine whether there is an m-bit cyclic data segment whose number of cycles reaches a preset number in the digital drive signal; wherein the m-bit cyclic data segment includes m-bit binary data arranged continuously in the digital drive signal; If it is determined that there is an m-bit cyclic data segment whose number of cycles reaches a preset number in the digital driving signal, determining the measured period of the digital driving signal according to the number of bits m of the m-bit cyclic data segment; and If it is determined that there is no m-bit cyclic data segment with a preset number of cycles in the digital driving signal, m=m+1 is taken, and the process of determining whether there is an m-bit cyclic data segment with a preset number of cycles in the digital driving signal is returned; wherein the starting value of m is 2.

2. The driving signal detection method according to claim 1, characterized in that: The target characteristic value includes a target period; The comparing the measured characteristic value of the digital drive signal with the target characteristic value and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value includes: Determine whether the difference between the measured period of the digital drive signal and its corresponding target period is less than or equal to a preset period error threshold; If it is determined that the difference between the actual measured period of the digital drive signal and its corresponding target period is less than or equal to the preset period error threshold, outputting a first indication signal to indicate that the actual measured period of the drive signal meets the requirement; and If it is determined that the difference between the actual measured period of the digital driving signal and its corresponding target period is greater than the preset period error threshold, a second indication signal is output to indicate that the actual measured period of the driving signal does not meet the requirement.

3. The driving signal detection method according to claim 1, characterized in that: The measured characteristic value of the digital drive signal also includes a measured duty cycle; The detecting the characteristic value of the digital driving signal to obtain the measured characteristic value also includes: If it is determined that there is an m-bit cyclic data segment with a cycle number reaching a preset number in the digital drive signal, the accumulated number of bits with a value of 1 in the m-bit cyclic data segment is divided by the number of bits m to obtain the measured duty cycle of the digital drive signal.

4. The driving signal detection method according to claim 3, characterized in that: The target characteristic value also includes a target duty cycle; The comparing the measured characteristic value of the digital drive signal with the target characteristic value and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value includes: Determining whether a difference between a measured duty cycle of the digital drive signal and a corresponding target duty cycle is less than or equal to a preset duty cycle error threshold; If it is determined that the difference between the measured duty cycle of the digital drive signal and the corresponding target duty cycle is less than or equal to the preset duty cycle error threshold, outputting a third indication signal to indicate that the measured duty cycle of the drive signal meets the requirement; and If it is determined that the difference between the actual measured duty cycle of the digital drive signal and the corresponding target duty cycle is greater than the preset duty cycle error threshold, a fourth indication signal is output to indicate that the actual measured duty cycle of the drive signal does not meet the requirement.

5. The driving signal detection method according to any one of claims 1 to 4, characterized in that: The driving signal is used to drive the display panel, and the driving signal includes a frame start signal, N clock signals, and at least one of two low-frequency signals; wherein N≥1.

6. The driving signal detection method according to claim 5, characterized in that: The driving signal includes a frame start signal and N clock signals, the digital driving signal is a binary sequence arranged in time sequence, and the measured characteristic value of the digital driving signal includes a measured phase; The detecting the characteristic value of the digital driving signal to obtain the measured characteristic value includes: Determine the time corresponding to the first data bit with a value of 1 in the digital frame start signal corresponding to the frame start signal as the start time; as well as The duration from the time corresponding to the first data bit with a value of 1 in the digital clock signal corresponding to each clock signal to the starting time is determined as the measured phase of each clock signal.

7. The driving signal detection method according to claim 6, characterized in that: The target characteristic value includes a target phase, and each clock signal corresponds to a target phase; The comparing the measured characteristic value of the digital drive signal with the target characteristic value and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the target characteristic value includes: For each clock signal: Determine whether the difference between the measured phase of the clock signal and its corresponding target phase is less than or equal to a preset phase error threshold; If it is determined that the difference between the measured phase of the clock signal and its corresponding target phase is less than or equal to the preset phase error threshold, outputting a fifth indication signal to indicate that the measured phase of the drive signal meets the requirement; and If it is determined that the difference between the measured phase of the clock signal and its corresponding target phase is greater than the preset phase error threshold, a sixth indication signal is output to indicate that the measured phase of the drive signal does not meet the requirement.

8. A driving signal detection device, characterized in that: include: A plurality of signal conversion units, each of which is used to receive a driving signal, and convert the driving signal into a high / low level signal based on a voltage value of a preset reference voltage signal, and perform analog-to-digital conversion on the high / low level signal to obtain and output a corresponding digital driving signal; a processing unit, electrically connected to the plurality of signal conversion units, respectively, the processing unit being used to receive the target characteristic values ​​corresponding to the respective drive signals and the digital drive signals output by the plurality of signal conversion units, and detecting the characteristic value of each digital drive signal to obtain a corresponding measured characteristic value, and comparing the measured characteristic value of the digital drive signal with the corresponding target characteristic value, and outputting a corresponding comparison result to indicate the difference between the measured characteristic value and the corresponding target characteristic value; the measured characteristic value of each digital drive signal includes at least one of a measured period, a measured duty cycle, and a measured phase, and the target characteristic value of the digital drive signal correspondingly includes at least one of a target period, a target duty cycle, and a target phase; Wherein, the digital drive signal is a binary sequence arranged in time sequence, and the measured characteristic value of the digital drive signal includes a measured period; The processing unit is specifically used to determine whether there is an m-bit cyclic data segment with a preset number of cycles in the digital drive signal, and when it is determined that there is an m-bit cyclic data segment with a preset number of cycles in the digital drive signal, determine the measured period of the digital drive signal according to the number of bits m of the m-bit cyclic data segment, and when it is determined that there is no m-bit cyclic data segment with a preset number of cycles in the digital drive signal, take m=m+1, and return to the determination of whether there is an m-bit cyclic data segment with a preset number of cycles in the digital drive signal; wherein the m-bit cyclic data segment includes m-bit binary data arranged continuously in the digital drive signal; and the starting value of m is 2.

9. A display device, comprising a display panel and a timing control unit, characterized in that: The display device further includes: The driving signal detection device as claimed in claim 8; and A signal optimization component, wherein the timing control unit is electrically connected to the driving signal detection device and the signal optimization component, and the signal optimization component is also electrically connected to the display panel; The driving signal detection device is used to feed back the difference value between the measured characteristic value of the digital driving signal and the target characteristic value to the timing control unit when a difference is detected between the measured characteristic value of the digital driving signal and the target characteristic value; the timing control unit is used to output the difference value and its corresponding driving signal to the signal optimization component; the signal optimization component is used to compensate and optimize the driving signal according to the difference value to obtain an optimized driving signal, and output the optimized driving signal to the display panel.

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