A chip connecting structure and a chip packaging structure
By establishing a conductive connection structure and a communication connection with the device support, along with sealing treatment, the problems of pin short circuits and solder joint oxidation are solved, thereby improving the reliability and stability of the chip package.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHINA AUTOMOTIVE INNOVATION CORP
- Filing Date
- 2022-11-28
- Publication Date
- 2026-06-26
AI Technical Summary
Existing chip packaging solutions cannot effectively handle situations with a large number of pins and small distances between adjacent pins, leading to the risk of pin short circuits. Furthermore, solder joints exposed to air are prone to oxidation, affecting solder strength.
The conductive connection structure is used to communicate with the device support. By setting conductive connection lines on the substrate and connecting them to the corresponding signal output terminals, the influence of adjacent signal output terminals is isolated. The connection channel is filled with connection material to enhance stability. At the same time, a sealant is used to cover the chip and the substrate to reduce oxidation.
It improves the reliability and robustness of chip packaging, reduces the risk of pin short circuits and solder joint oxidation, and enhances signal transmission stability and packaging efficiency.
Smart Images

Figure CN115763417B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of chip packaging technology, and in particular to a chip connection structure and a chip packaging structure. Background Technology
[0002] Surface mount technology (SMT) is a technique that mounts leadless or short-lead surface-mount components onto the surface of a substrate, achieving circuit interconnection through methods such as reflow soldering. Existing chip packaging solutions cannot handle chips with a large number of pins or close proximity between pins. When a chip has many pins and close proximity between pins increases the risk of short circuits. Furthermore, the solder joints from reflow soldering are exposed to air for extended periods, which can lead to solder oxidation and affect solder strength.
[0003] Therefore, an improved chip packaging technology is needed to solve problems such as short circuits between adjacent pins and solder joints being exposed to air, which leads to solder oxidation, as existing packaging methods exist in the current technology. Summary of the Invention
[0004] To address the problems of the prior art, this application provides a technical solution for a chip interconnection structure and a chip packaging structure, the technical solution of which is described below:
[0005] On one hand, a chip connection structure is provided, including a substrate; the substrate is provided with a chip carrier portion for carrying a chip and a conductive connection structure, one end of the conductive connection structure is used for communication connection with the chip, and the other end of the conductive connection structure is used for communication connection with a device support portion.
[0006] Furthermore, the substrate is provided with a connection channel, one end of which is an inlet end for allowing connecting material to pass through, and the other end of which can be fixedly connected to the device support part through a connector.
[0007] Furthermore, the conductive connection structure includes at least one conductive connection line, one end of which is used for communication connection with the signal output terminal of the chip, and the other end of which is used for communication connection with the device support portion.
[0008] Furthermore, the other end of the conductive connection line is exposed in the connection channel, and the other end of the conductive connection line can be communicatively connected to the device support through a conductive connector.
[0009] On the other hand, a chip packaging structure is provided, including a chip connection structure and a device support portion;
[0010] The device support portion is provided with a support structure for supporting the chip connection structure, and the chip connection structure is disposed in the support structure.
[0011] Furthermore, the device support portion is provided with a conductive carrier, which is used for communication connection with the chip connection structure.
[0012] Furthermore, the device support portion is provided with at least one connecting portion, and the device support portion is fixedly connected to the chip connection structure through the connecting portion.
[0013] Furthermore, the conductive carrier is exposed to the connection portion, and the conductive carrier is communicatively connected to the conductive connection structure via a conductive connector.
[0014] Furthermore, the conductive connection structure is communicatively connected to the chip via a conductive connector.
[0015] Furthermore, it also includes a seal for covering the chip and at least a portion of the substrate.
[0016] The chip interconnection structure and chip packaging structure provided in this application have the following technical advantages:
[0017] 1. This application provides a conductive connection structure on the substrate so that the chip can transmit signals through the conductive connection structure on the substrate. During the signal transmission process, multiple conductive connection lines in the conductive connection structure are connected to the corresponding signal output terminals of the chip to isolate the mutual influence between adjacent signal output terminals of the chip, avoid the occurrence of chip short circuits, and thus improve the reliability of chip packaging.
[0018] 2. This application increases the stability between the chip connection structure and the device support by setting a connection channel on the substrate of the chip connection structure and then using the connector in the connection channel. At the same time, it can also realize the communication connection between the chip connection structure and the device support, thereby improving the stability of signal transmission between the chip connection structure and the device support.
[0019] 3. This application sets up a chip connection structure so that the connector formed by the connecting material used to connect the chip and the device support is built into the chip connection structure, so that the connection port between the chip and the device support is embedded inside the chip connection structure, thereby reducing the contact area between the connector and oxygen in the air, thereby reducing the oxidation of the connector, and thus enhancing the reliability of the connection between the chip and the device support.
[0020] 4. This application provides a seal for covering the chip and at least part of the substrate to seal and protect the chip, thereby reducing damage to the chip.
[0021] 5. The chip packaging structure disclosed in this application is simple in structure and easy to seal, thereby reducing the chip packaging manufacturing process and improving the efficiency and yield of chip packaging. Attached Figure Description
[0022] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0023] Figure 1 This is a schematic diagram of a chip packaging structure provided in an embodiment of this application;
[0024] Figure 2 This is a schematic diagram of a chip packaging structure with a connector provided in an embodiment of this application;
[0025] Figure 3 This is a schematic diagram of the chip connection structure provided in the embodiments of this application;
[0026] Figure 4 This is a schematic diagram of the structure of the device support portion provided in an embodiment of this application;
[0027] Figure 5 This is a schematic diagram of the chip structure provided in an embodiment of this application;
[0028] The corresponding reference numerals in the attached drawings are as follows: 100-substrate; 101-sealing element; 102-chip carrier; 103-conductive connector; 1031-conductive particle; 1032-insulating material; 104-connection channel; 105-conductive connection structure; 106-connector; 200-device support; 201-carrier structure; 202-conductive carrier; 203-connection; 300-chip; 301-signal output terminal. Detailed Implementation
[0029] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0030] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in sequences other than those illustrated or described herein.
[0031] Please see Figures 1-5 The following is combined with Figures 1-5 The technical solution of this application is described in detail.
[0032] This application provides a chip connection structure, which specifically includes a substrate 100, wherein the substrate 100 is provided with a chip carrier portion 102 for carrying a chip 300 and a conductive connection structure 105, one end of the conductive connection structure 105 is used for communication connection with the chip 300, and the other end of the conductive connection structure 105 is used for communication connection with a device support portion 200.
[0033] Specifically, the chip carrier 102 can be a carrier groove so that the chip 300 can be housed in the carrier groove. This application reduces the exposure of the chip's signal output terminals 301 to the outside by housing multiple signal output terminals 301 of the chip 300 in the chip carrier 102, thereby achieving the inward retraction of the chip's signal output terminals 301 and effectively preventing the chip's signal output terminals 301 from being damaged by external forces.
[0034] In one embodiment, a conductive connection structure 105 is provided on the substrate 100 so that the chip 300 can communicate with the device support 200 through the conductive connection structure 105 on the substrate 100, thereby realizing signal transmission between the chip 300 and the device support 200. Specifically, the conductive connection structure 105 is made of a conductive material. For example, the material of the conductive connection structure 105 can be a metallic material or a conductive non-metallic material. The metallic material can include gold, silver, copper, aluminum, and platinum, etc., and the conductive non-metallic material can include graphite, semiconductor elements, and conductive rubber, etc. Preferably, the material of the conductive connection structure 105 is a metallic material to enhance the signal transmission between the chip 300 and the device support 200.
[0035] In an optional embodiment, the conductive connection structure 105 includes at least one conductive connection line, one end of which is used for communication connection with the signal output terminal 301 of the chip 300, and the other end of which is used for communication connection with the device support portion 200.
[0036] Specifically, the number of conductive connection lines is equal to the number of signal output terminals 301 of chip 300, so that the conductive connection lines are connected to the corresponding signal output terminals 301 of chip 300, enabling the signal output terminals 301 of chip 300 to transmit signals independently, thus isolating the mutual interference between adjacent signal output terminals 301 of chip 300 during signal transmission, effectively avoiding short circuits in chip 300, and thereby improving the reliability of chip 300 packaging.
[0037] In one embodiment, one end of the conductive connection line is provided with a chip connection portion, which is used to communicate with the signal output terminal 301 of the chip 300. The layout of the chip connection portion corresponds to that of the signal output terminal 301 of the chip 300 so as to receive the signal output by the signal output terminal 301 of the chip 300. Preferably, the cross-sectional dimensions of the chip connection portion are the same as those of the cross-sectional dimensions of the signal output terminal 301 of the chip 300 so as to improve the stability of signal transmission.
[0038] In an optional embodiment, the substrate 100 is provided with a connection channel 104, one end of which is an inlet end for allowing connection material to pass through, and the other end of the connection channel 104 can be fixedly connected to the device support portion 200 via a connector 106.
[0039] Specifically, the connection channel 104 can accommodate a connector 106 made of a connection material so that the substrate 100 can be fixedly connected to the device support 200 through the connector 106 in the connection channel 104, thereby increasing the stability between the chip connection structure and the device support 200.
[0040] It should be noted that the connector 106 includes a connecting material, which is made of the connecting material. The connecting material can be a high-temperature treated connecting material, that is, the high-temperature treated connecting material enters the connecting channel 104 through the inlet end of the connecting channel 104 to fill the connecting channel 104, thereby achieving a fixed connection between the chip connecting structure and the device support 200. Alternatively, the connecting material can be placed in the connecting channel 104 first, and then the connecting material can be formed into the connector 106 in the connecting channel 104 through thermal curing or other operations, so as to achieve a fixed connection between the chip connecting structure and the device support 200.
[0041] In one embodiment, the connecting material can be solder. Specifically, the solder can include any one of copper-zinc solder, silver-copper solder, and solder. In addition, the connecting material can also be other materials, as long as the material can enhance the stability between the chip connection structure and the device support 200. No specific limitation is made here.
[0042] In an alternative embodiment, the other end of the conductive connection line is exposed to the connection channel 104, and the other end of the conductive connection line can be communicatively connected to the device support portion 200 via the conductive connector 106.
[0043] Specifically, the connector 106 not only has stability but also conductivity, so that the conductive connection line can communicate with the device support 200 through the connector 106, thereby improving the stability of signal transmission between the chip connection structure and the device support 200.
[0044] This application also provides a chip packaging structure, including the above-mentioned chip connection structure and device support 200, wherein the device support 200 is provided with a support structure 201 for supporting the chip connection structure, and the chip connection structure is disposed in the support structure 201.
[0045] In this embodiment, by setting a chip connection structure, a connector 106 formed by the connection material used to connect the chip 300 and the device support 200 is built into the chip connection structure, so that the connection port between the chip 300 and the device support 200 is embedded inside the chip connection structure, thereby reducing the contact area between the connector 106 and oxygen in the air, thereby reducing the oxidation of the connector 106, and thus enhancing the reliability of the connection between the chip 300 and the device support 200.
[0046] In one embodiment, the support structure 201 can be a support groove. The support structure 201 is used to support the chip connection structure so that the chip connection structure and the device support 200 can be fixedly connected, thereby increasing the stability between the chip connection structure and the device support 200.
[0047] In an optional embodiment, the device support 200 is provided with a conductive carrier 202, which is used for communication connection with the chip connection structure.
[0048] In this embodiment, a conductive carrier 202 is provided in the device support portion 200 so that the device support portion 200 can communicate with the chip connection structure through the conductive carrier 202, thereby realizing signal transmission between the device support portion 200 and the chip connection structure. Specifically, the conductive carrier 202 can be made of a conductive material. For example, the material of the conductive carrier 202 can be a metallic material or a conductive non-metallic material. The metallic material can include gold, silver, copper, aluminum, and platinum, etc., and the conductive non-metallic material can include graphite, semiconductor elements, and conductive rubber, etc. Preferably, the material of the conductive carrier 202 is a metallic material to enhance the signal transmission between the chip connection structure and the device support portion 200.
[0049] In another alternative embodiment, the device support 200 is further provided with at least one connecting part 203, and the device support 200 is fixedly connected to the chip connection structure through the connecting part 203.
[0050] Specifically, the connecting portion 203 is connected to the connecting channel 104 so that the connecting portion 203 can accommodate the connector 106 made of connecting material. This allows the device support portion 200 to be fixedly connected to the chip connection structure via the connector 106 in the connecting portion 203, thereby enhancing the stability of the connection between the device support portion 200 and the chip connection structure. In one embodiment, the connecting portion 203 can be a channel, the cross-sectional size of which is equal to the cross-sectional size of the connecting channel 104, to prevent the connector 106 from overflowing.
[0051] In another alternative embodiment, the conductive carrier 202 is exposed to the connection portion 203, and the conductive carrier 202 is communicatively connected to the conductive connection structure 105 via the conductive connector 106.
[0052] Specifically, by exposing the conductive carrier 202 to the connection portion 203, the port of the conductive carrier 202 is built in, thereby preventing the connector 106 connected to the conductive carrier 202 from contacting the air, thereby reducing the oxidation of the connector 106 and enhancing the stability between the chip connection structure and the device support portion 200.
[0053] In an optional implementation, the conductive connection structure 105 is communicatively connected to the chip 300 via the conductive connector 103.
[0054] In this embodiment, the conductive connector 103 includes conductive particles 1031 and insulating material 1032. The conductive particles 1031 are located in the insulating material 1032. The conductive connection structure 105 transmits signals to the signal output terminal 301 of the chip 300 through the conductive particles 1031. Specifically, the conductive particles 1031 become conductive after being pressed by the signal output terminal 301 of the chip 300, so that the conductive connection structure 105 transmits signals to the chip 300 through the conductive particles 1031. Furthermore, when the conductive connection structure 105 transmits signals to the chip 300, the signal output terminal 301 of the chip 300 is located in the conductive connector 103 between the conductive connection structure 105 and the chip 300. This not only ensures the stability of signal transmission between the conductive connection structure 105 and the chip 300, but also avoids damage to the signal output terminal 301 of the chip 300 caused by external forces, thereby improving the service life of the chip packaging structure.
[0055] For example, the conductive connector 103 can be anisotropic conductive adhesive, which can be used for communication connection between the signal output terminal 301 of the chip 300 and the chip connection portion on the conductive connector 103, thereby increasing the stability of the communication connection between the conductive connector 103 and the chip 300, and thus improving the reliability of signal transmission in the chip packaging structure.
[0056] In an alternative embodiment, a seal 101 is also included, which is used to cover the chip 300 and at least a portion of the substrate 100.
[0057] Specifically, the seal 101 is used to seal the chip 300, isolating it from oxygen in the air and preventing it from being compressed by external forces, thus reducing damage and ensuring the reliability of signal transmission. It should be noted that the seal 101 does not cover the entrance end of the connection channel 104 in the substrate 100, allowing the connecting material to enter from the entrance end of the connection channel 104, thereby achieving a fixed connection and communication connection between the chip connection structure and the device support 200. For example, the seal 101 can be a polymer; in one embodiment, the polymer can be polyimide.
[0058] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A chip interconnection structure, characterized in that, include: Substrate (100); the substrate (100) is provided with a chip carrier (102) for carrying the chip (300) and a conductive connection structure (105); The conductive connection structure (105) includes at least one conductive connection line. One end of the conductive connection line is communicatively connected to the chip (300) through a conductive connector (103). The conductive connector (103) includes conductive particles (1031) and insulating material (1032). The conductive particles (1031) are located in the insulating material (1032). The conductive connector (103) is anisotropic conductive adhesive. The substrate (100) is provided with a connection channel (104), one end of which is an inlet end for allowing connecting material to pass through, and the other end of which can be fixedly connected to the device support (200) via a connector (106). The connection channel (104) can accommodate the connector (106) made of connecting material, and the connector (106) includes connecting material that has been treated at high temperature. The other end of the conductive connection line is exposed in the connection channel (104), and the other end of the conductive connection line can be communicatively connected to the device support (200) through a conductive connector (106).
2. A chip packaging structure, characterized in that, Includes the chip connection structure and device support portion (200) as described in claim 1; The device support (200) is provided with a support structure (201) for supporting the chip connection structure, and the chip connection structure is disposed in the support structure (201).
3. The chip packaging structure according to claim 2, characterized in that, The device support (200) is provided with a conductive carrier (202), which is used for communication connection with the chip connection structure.
4. The chip packaging structure according to claim 3, characterized in that, The device support (200) is provided with at least one connecting part (203), and the device support (200) is fixedly connected to the chip connection structure through the connecting part (203).
5. The chip packaging structure according to claim 4, characterized in that, The conductive carrier (202) is exposed to the connection portion (203), and the conductive carrier (202) is communicatively connected to the conductive connection structure (105) via a conductive connector (106).
6. The chip packaging structure according to claim 2, characterized in that, It also includes a seal (101) for covering the chip (300) and at least a portion of the substrate (100).