Display Panel and Display Device

Abstract

A display panel and a display device, comprising: a substrate substrate (10), a first electrode layer, a pixel defining layer, a support layer (100), the support layer (100) including multiple columns of first spacers (PS-1) and multiple columns of second spacers (PS-2); the first spacers (PS-1) and the second spacers (PS-2) are located in different columns; an anode (YG1) of at least one sub-pixel (spx1) in the sub-pixels (spx1) corresponding to the first spacers (PS-1) extends along a first direction (F1), and the first spacers (PS-1) and the second spacers (PS-2) respectively extend along a second direction (F2); in the column direction, the first spacers (PS-1) and the sub-pixels (spx1) are alternately and repeatedly arranged in the column direction and correspond one by one; a positive projection of the first spacers (PS-1) in the column direction does not overlap with a positive projection of the anodes (YG1) in the sub-pixels (spx1) in the column direction; there is a first ratio between the area of the first spacers (PS-1) and the area of the opening of the corresponding sub-pixels (spx1), and there is a second ratio between the area of the second spacers (PS-2) and the sum of the areas of the openings of all the sub-pixels (spx2) between two adjacent second spacers (PS-2) in the column direction, and the first ratio is different from the second ratio.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims the priority of an international patent application filed with the China Patent Office on September 29, 2020, with application number PCT / CN2020 / 119087 and application name “Display Panel and Display Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The embodiments of the present disclosure relate to the field of display technology, and in particular to a display panel and a display device. Background Art

[0004] With the continuous development of display technology, organic light emitting diode (OLED) display panels have been increasingly used in various electronic devices due to their advantages such as self-luminescence, wide viewing angle, high contrast, low power consumption, and high response speed. With the increasing requirements for OLED display panels, in order to achieve high-resolution design in display panels, OLED display panels usually adopt SPR pixel arrangement, that is, pixel borrowing method. Summary of the invention

[0005] The display panel provided by the embodiment of the present disclosure includes:

[0006] A substrate substrate, comprising a plurality of sub-pixels;

[0007] A first electrode layer, located on the base substrate, the first electrode layer comprising an anode located in each of the sub-pixels; the anode comprising a main body portion and a via portion electrically connected to each other;

[0008] A pixel defining layer is located on a side of the first electrode layer away from the base substrate; the pixel defining layer includes an opening located in each of the sub-pixels, and in the same sub-pixel, the orthographic projection of the opening on the base substrate is located within the orthographic projection of the main body on the base substrate;

[0009] A supporting layer, located on a side of the pixel defining layer away from the base substrate;

[0010] Wherein, the support layer includes multiple columns of first spacers and multiple columns of second spacers; the first spacers and the second spacers are located in different columns; one column of first spacers corresponds to one column of sub-pixels, and one column of second spacers corresponds to another column of sub-pixels; and the number of sub-pixels in the column where the first spacers are located is different from the number of sub-pixels in the column where the second spacers are located;

[0011] The anode of at least one sub-pixel in the sub-pixels corresponding to the first spacer extends in a first direction, and the first spacer and the second spacer extend in a second direction respectively;

[0012] For the first spacer and the corresponding sub-pixels, in the column direction, the first spacer and the sub-pixels are alternately arranged in a repeating manner and are in one-to-one correspondence;

[0013] The positive projection of the first spacer in the column direction does not overlap with the positive projection of the anodes in each sub-pixel in the column direction;

[0014] There is a first ratio between the area of the first spacer and the area of the opening of the corresponding sub-pixel, and there is a second ratio between the area of the second spacer and the sum of the areas of the openings of all sub-pixels between two adjacent second spacers in the column direction, and the first ratio is different from the second ratio.

[0015] In some examples, the first ratio is greater than the second ratio.

[0016] In some examples, the area ratio of adjacent first spacers in the column direction is 0.8 to 1.2.

[0017] In some examples, there is a first spacing distance between adjacent first spacers in the column direction, and there is a second spacing distance between adjacent second spacers in the column direction, and the second spacing distance is greater than the first spacing distance.

[0018] In some examples, the width of the first spacer in the column direction is greater than the width of the second spacer in the column direction;

[0019] The width of the first spacer in the row direction is not less than the width of the second spacer in the row direction.

[0020] In some examples, the sub-pixels corresponding to the second spacer include a first color sub-pixel and a second color sub-pixel; wherein, between adjacent second spacers in the column direction, there is an anode of one first color sub-pixel and an anode of one second color sub-pixel arranged;

[0021] The sub-pixels corresponding to the first spacer include a third color sub-pixel; wherein, between adjacent first spacers in the column direction, there is an anode of one third color sub-pixel arranged.

[0022] In some examples, the columns where the first spacers are located and the columns where the second spacers are located are alternately arranged in the row direction;

[0023] The first spacer and the second spacer are alternately arranged on a straight line in the row direction.

[0024] In some examples, the width of the first spacer in the row direction has a third ratio to the width of the main body of the anode in the corresponding sub-pixel in the row direction;

[0025] The width of the second spacer in the row direction has a fourth ratio to the width of the main body of the anode in a sub-pixel between two adjacent second spacers in the column direction in the row direction;

[0026] The third ratio is greater than the fourth ratio.

[0027] In some examples, the support layer further includes a plurality of third spacers spaced apart from the first spacer and the second spacer; the area of the third spacer is different from the area of the first spacer;

[0028] The positive projection of the third spacer in the column direction does not overlap with the positive projections of the first spacer and the second spacer in the column direction.

[0029] In some examples, the second spacers and the third spacers are alternately arranged in a column, and a main body of the anode of one of the first color sub-pixels or the second color sub-pixels is provided between adjacent second spacers and third spacers.

[0030] In some examples, there is a fifth ratio between the area of the third spacer and the area of the second spacer, and the fifth ratio is 0.8 to 1.2.

[0031] In some examples, the positive projection of the third spacer on the substrate has at least an overlapping area with the positive projection of the via portion in the first color sub-pixel on the substrate.

[0032] In some examples, there is a sixth ratio between the width of the third spacer in the column direction and the width of the opening in the first color sub-pixel in the column direction, and the sixth ratio is 0.4 to 0.8;

[0033] There is a seventh ratio between the width of the second spacer in the column direction and the width of the opening in the second color sub-pixel in the column direction, and the seventh ratio is 0.4 to 0.8.

[0034] In some examples, in the column direction, there is a first spacing between the first spacer and the opening of the adjacent third color sub-pixel;

[0035] In the column direction, there is a second spacing between the second spacer and the opening of the nearest second color sub-pixel, and there is a third spacing between the second spacer and the opening of the nearest first color sub-pixel;

[0036] In the column direction, there is a fourth spacing between the third spacer and the opening of the nearest second color sub-pixel, and there is a fifth spacing between the third spacer and the opening of the nearest first color sub-pixel;

[0037] The second spacing, the third spacing, the fourth spacing, and the fifth spacing are all smaller than the first spacing.

[0038] In some examples, the ratio between the second spacing and the third spacing is 0.8 to 1.2;

[0039] The ratio between the fourth spacing and the fifth spacing is 0.8 to 1.2.

[0040] In some examples, in the first color sub-pixel, the distance in the row direction between the boundary of the projection of the opening on the substrate and the nearest neighbor boundary of the projection of the main body portion in the first color sub-pixel on the substrate is 1.5 to 3.0 μm; and / or,

[0041] In the first color sub-pixel, the distance in the column direction between the boundary of the projection of the opening on the substrate and the nearest neighbor boundary of the projection of the main body portion in the first color sub-pixel on the substrate is 1.5 to 3.0 μm.

[0042] In some examples, in the second color sub-pixel, the distance in the row direction between the boundary of the projection of the opening on the substrate and the nearest neighbor boundary of the projection of the main body portion in the second color sub-pixel on the substrate is 1.5 to 3.0 μm; and / or,

[0043] In the second color sub-pixel, the distance in the column direction between the boundary of the projection of the opening on the substrate and the nearest neighbor boundary of the projection of the main body portion in the second color sub-pixel on the substrate is 1.5 to 3.0 μm.

[0044] In some examples, in the third color sub-pixel, the distance in the row direction between the boundary of the projection of the opening on the substrate and the nearest neighbor boundary of the projection of the main body portion in the third color sub-pixel on the substrate is 1.5 to 3.0 μm; and / or,

[0045] In the third color sub-pixel, the distance in the column direction between the boundary of the projection of the opening on the substrate and the nearest neighbor boundary of the projection of the main body portion in the third color sub-pixel on the substrate is 1.5 to 3.0 μm.

[0046] In some examples, the display panel includes a plurality of repeating units, and the repeating unit includes the first color sub-pixel, the second color sub-pixel, and the third color sub-pixel; and in the same repeating unit, the anodes in the first color sub-pixel and the anodes in the second color sub-pixel are arranged along the column direction;

[0047] In the same repeating unit, the distance between the opening in the first color sub-pixel and the opening in the second color sub-pixel in the first direction is 15 to 20 μm.

[0048] In some examples, in the same repeating unit, the connection lines between the anodes in the first color sub-pixel, the second color sub-pixel, and the third color sub-pixel form a triangle;

[0049] In the same repeating unit, the distance between the opening in the first color sub-pixel and the opening in the third color sub-pixel in the second direction is 15 to 20 μm.

[0050] In some examples, one side of the anode in the second color sub-pixel has a first recess on the side of the positive projection of the anode in the first color sub-pixel on the substrate substrate; and the first recess is arranged towards the center of the main body of the second color sub-pixel;

[0051] The positive projections of the second spacer and the third spacer arranged along the column direction in the row direction cover the positive projection of the first recess in the row direction.

[0052] In some examples, the positive projection of the third spacer in the column direction and the positive projection of the via portion in the second color sub-pixel in the column direction have an overlapping area.

[0053] In some examples, the main body of the third color sub-pixel has a second recess on the side of the positive projection of the via portion in the second color sub-pixel on the substrate substrate;

[0054] The positive projection of the third spacer in the column direction is located within the positive projection of the second recess in the column direction.

[0055] In some examples, in the row direction, the third spacer, the via portion in the first color sub-pixel, the via portion in the second color sub-pixel, and the via portion in the third color sub-pixel are arranged on the same straight line.

[0056] The display device provided by the embodiment of the present disclosure includes the above display panel. Description of the Drawings

[0057] Figure 1 Schematic diagram of the structure of the display panel provided by the embodiment of the present disclosure;

[0058] Figure 2a Schematic diagram of the structure of the pixel circuit provided by the embodiment of the present disclosure;

[0059] Figure 2b Signal timing diagram provided by the embodiment of the present disclosure;

[0060] Figure 3 Schematic diagram of the layout structure of the display panel provided by the embodiment of the present disclosure;

[0061] Figure 4a Schematic diagrams of some active semiconductor layers provided by the embodiment of the present disclosure;

[0062] Figure 4b Schematic diagrams of some gate conductive layers provided by the embodiment of the present disclosure;

[0063] Figure 4c Schematic diagrams of some reference conductive layers provided by the embodiment of the present disclosure;

[0064] Figure 4d Schematic diagrams of some source-drain metal layers provided by the embodiment of the present disclosure;

[0065] Figure 4e Schematic diagrams of some first electrode layers provided by the embodiment of the present disclosure;

[0066] Figure 4f Schematic diagrams of some first electrode layers and support layers provided by the embodiment of the present disclosure;

[0067] Figure 4g Schematic diagrams of some support layers provided by the embodiment of the present disclosure;

[0068] Figure 5a Some stacked schematic diagrams of the active semiconductor layer and the gate conductive layer provided by the embodiment of the present disclosure;

[0069] Figure 5b Some stacked schematic diagrams of the active semiconductor layer, the gate conductive layer, and the reference conductive layer provided by the embodiment of the present disclosure;

[0070] Figure 5c Some stacked schematic diagrams of the active semiconductor layer, the gate conductive layer, the reference conductive layer, and the source-drain metal layer provided by the embodiment of the present disclosure;

[0071] Figure 5d Some stacked schematic diagrams of the active semiconductor layer, the gate conductive layer, the reference conductive layer, the source-drain metal layer, and the support layer provided by the embodiment of the present disclosure;

[0072] Figure 6Schematic diagrams of some other first electrode layers provided by the embodiments of the present disclosure. Detailed implementation manners

[0073] To make the objectives, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present disclosure. Apparently, the described embodiments are some but not all of the embodiments of the present disclosure. And, without conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other. All other embodiments obtained by those of ordinary skill in the art based on the described embodiments of the present disclosure without creative efforts shall fall within the scope of protection of the present disclosure.

[0074] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure shall have the ordinary meanings understood by those of ordinary skill in the art to which the present disclosure pertains. The "first", "second" and similar terms used in the present disclosure do not denote any order, quantity or importance, but are only used to distinguish different components. The terms such as "include" or "comprise" mean that the elements or items appearing before this term cover the elements or items listed after this term and their equivalents, without excluding other elements or items. The terms such as "connect" or "couple" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0075] It should be noted that the sizes and shapes of the various figures in the drawings do not reflect the true proportions, and the purpose is only to schematically illustrate the content of the present invention. And the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions throughout.

[0076] As Figure 1 shown, the display panel provided by the embodiments of the present disclosure may include: a substrate 10. A plurality of sub-pixels located on the substrate 10. Exemplarily, the plurality of sub-pixels may include red sub-pixels, green sub-pixels, and blue sub-pixels. In this way, the display panel can use the red sub-pixels, green sub-pixels, and blue sub-pixels for mixing light to achieve color display. Of course, the embodiments of the present disclosure include but are not limited to this.

[0077] Exemplarily, in combination with Figure 1 and Figure 2aAs shown, at least one of the multiple sub-pixels (e.g., each sub-pixel) may include: a pixel circuit 0121 and a light-emitting element 0120. Among them, the pixel circuit 0121 has transistors and capacitors, and generates an electrical signal through the interaction of the transistors and capacitors. The generated electrical signal is input into the anode of the light-emitting element 0120. And by applying a corresponding voltage to the cathode of the light-emitting element 0120, the light-emitting element 0120 can be driven to emit light.

[0078] Combined with Figure 2a As shown, the pixel circuit 0121 may include: a driving control circuit 0122, a first light-emitting control circuit 0123, a second light-emitting control circuit 0124, a data writing circuit 0126, a storage circuit 0127, a threshold compensation circuit 0128, and a reset circuit 0129.

[0079] The driving control circuit 0122 may include a control terminal, a first terminal, and a second terminal. And the driving control circuit 0122 is configured to provide a driving current for driving the light-emitting element 0120 to emit light. For example, the first light-emitting control circuit 0123 is connected to the first terminal of the driving control circuit 0122 and the first voltage terminal VDD. And the first light-emitting control circuit 0123 is configured to connect or disconnect the connection between the driving control circuit 0122 and the first voltage terminal VDD.

[0080] The second light-emitting control circuit 0124 is electrically connected to the second terminal of the driving control circuit 0122 and the anode of the light-emitting element 0120. And the second light-emitting control circuit 0124 is configured to connect or disconnect the connection between the driving control circuit 0122 and the light-emitting element 0120.

[0081] The data writing circuit 0126 is electrically connected to the first terminal of the driving control circuit 0122. And the data writing circuit 0126 is configured to write the signal on the data line VD into the storage circuit 0127.

[0082] The storage circuit 0127 is electrically connected to the control terminal of the driving control circuit 0122 and the first voltage terminal VDD. And the storage circuit 0127 is configured to store data signals and information of the driving control circuit 0122.

[0083] The threshold compensation circuit 0128 is electrically connected to the control terminal and the second terminal of the driving control circuit 0122 respectively. And the threshold compensation circuit 0128 is configured to perform threshold compensation on the driving control circuit 0122.

[0084] The reset circuit 0129 is also electrically connected to the control terminal of the driving control circuit 0122 and the anode of the light-emitting element 0120 respectively. And the reset circuit 0129 is configured to reset the anode of the light-emitting element 0120 and the control terminal of the driving control circuit 0122.

[0085] Among them, the light-emitting element 0120 can be set as an electroluminescent diode, such as at least one of OLED, QLED, micro LED, and mini OLED. Among them, the light-emitting element 0120 can include an anode, a light-emitting layer, and a cathode which are stacked. Further, the light-emitting layer can also include film layers such as a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer. Of course, in practical applications, the light-emitting element 0120 can be designed and determined according to the requirements of the actual application environment, and is not limited herein.

[0086] Exemplarily, in combination with Figure 2a As shown, the drive control circuit 0122 includes: a drive transistor T1. The control end of the drive control circuit 0122 includes the gate of the drive transistor T1. The first end of the drive control circuit 0122 includes the first pole of the drive transistor T1. The second end of the drive control circuit 0122 includes the second pole of the drive transistor T1.

[0087] Exemplarily, in combination with Figure 2a As shown, the data writing circuit 0126 includes a data writing transistor T2. The storage circuit 0127 includes a storage capacitor CST. The threshold compensation circuit 0128 includes a threshold compensation transistor T3. The first light emission control circuit 0123 includes a light emission control transistor T4. The second light emission control circuit 0124 includes a conduction control transistor T5. The reset circuit 0129 includes an initialization transistor T6 and a reset transistor T7.

[0088] Specifically, the first pole of the data writing transistor T2 is electrically connected to the first pole of the drive transistor T1. The second pole of the data writing transistor T2 is configured to be electrically connected to the data line VD to receive a data signal. The gate of the data writing transistor T2 is configured to be electrically connected to the scan line GA to receive a signal.

[0089] The first pole of the storage capacitor CST is electrically connected to the first power supply terminal VDD. The second pole of the storage capacitor CST is electrically connected to the gate of the drive transistor T1.

[0090] The first pole of the threshold compensation transistor T3 is electrically connected to the second pole of the drive transistor T1. The second pole of the threshold compensation transistor T3 is electrically connected to the gate of the drive transistor T1. The gate of the threshold compensation transistor T3 is configured to be electrically connected to the scan line GA to receive a signal.

[0091] The first pole of the initialization transistor T6 is configured to be electrically connected to the initialization line VINIT to receive a reset signal. The second pole of the initialization transistor T6 is electrically connected to the gate of the drive transistor T1. The gate of the initialization transistor T6 is configured to be electrically connected to the reset line RST to receive a signal.

[0092] The first pole of the reset transistor T7 is configured to be electrically connected to the initialization line VINIT to receive a reset signal. The second pole of the reset transistor T7 is electrically connected to the anode of the light-emitting element 0120. The gate of the reset transistor T7 is configured to be electrically connected to the reset line RST to receive a signal.

[0093] The first pole of the light-emission control transistor T4 is electrically connected to the first power supply terminal VDD. The second pole of the light-emission control transistor T4 is electrically connected to the first pole of the driving transistor T1. The gate of the light-emission control transistor T4 is configured to be electrically connected to the light-emission control line EM to receive a light-emission control signal.

[0094] The first pole of the conduction control transistor T5 is electrically connected to the second pole of the driving transistor T1. The second pole of the conduction control transistor T5 is electrically connected to the anode of the light-emitting element 0120. The gate of the conduction control transistor T5 is configured to be electrically connected to the light-emission control line EM to receive a light-emission control signal.

[0095] The cathode of the light-emitting element 0120 is electrically connected to the second power supply terminal VSS. Among them, the first pole and the second pole of the above transistors can be determined as the source or the drain according to the actual application, which is not limited here.

[0096] Exemplarily, one of the first power supply terminal VDD and the second power supply terminal VSS is a high-voltage terminal, and the other is a low-voltage terminal. For example, in the embodiment shown in Figure 2a the first power supply terminal VDD is a voltage source to output a constant first voltage. For example, the first voltage is a positive voltage; and the second power supply terminal VSS can be a voltage source to output a constant second voltage. For example, the second voltage is 0 or a negative voltage, etc. For example, in some examples, the second power supply terminal VSS can be grounded.

[0097] Figure 2a The corresponding signal timing diagram of the pixel circuit shown in Figure 2b is shown. During one frame display time, the working process of the pixel circuit has three stages: the T10 stage, the T20 stage, and the T30 stage. Among them, rst represents the signal transmitted on the reset line RST, ga represents the signal transmitted on the scan line GA, and em represents the signal transmitted on the light-emission control line EM.

[0098] In the T10 stage, the signal rst controls the initialization transistor T6 to conduct, so that the signal transmitted on the initialization line VINIT can be provided to the gate of the driving transistor T1 to reset the gate of the driving transistor T1. The signal rst controls the reset transistor T7 to conduct, so that the signal transmitted on the initialization line VINIT can be provided to the anode of the light-emitting element 0120 to reset the anode of the light-emitting element 0120. And in this stage, the signal ga controls both the data writing transistor T2 and the threshold compensation transistor T3 to be cut off. The signal em controls both the light-emitting control transistor T4 and the conduction control transistor T5 to be cut off.

[0099] In the T20 stage, the signal ga controls the data writing transistor T2 and the threshold compensation transistor T3 to conduct. The conducting data writing transistor T2 charges the gate of the driving transistor T1 with the data signal transmitted on the data line VD, so that the voltage of the gate of the driving transistor T1 becomes: Vdata + Vth. Wherein, Vth represents the threshold voltage of the driving transistor T1, and Vdata represents the voltage of the data signal. And in this stage, the signal rst controls both the initialization transistor T6 and the reset transistor T7 to be cut off. The signal em controls both the light-emitting control transistor T4 and the conduction control transistor T5 to be cut off.

[0100] In the T30 stage, the signal em controls both the light-emitting control transistor T4 and the conduction control transistor T5 to conduct. The conducting light-emitting control transistor T4 provides the voltage Vdd of the first power supply terminal VDD to the first pole of the driving transistor T1, so that the voltage of the first pole of the driving transistor T1 is Vdd. The driving transistor T1 generates a driving current according to its gate voltage Vdata + |Vth| and the voltage Vdd of the first pole. This driving current is provided to the light-emitting element 0120 through the conducting conduction control transistor T5 to drive the light-emitting element 0120 to emit light. And in this stage, the signal rst controls the initialization transistor T6 and the reset transistor T7 to be cut off. The signal ga controls the data writing transistor T2 and the threshold compensation transistor T3 to be cut off.

[0101] It should be noted that in the embodiments of the present disclosure, the first pole of the above transistor may be its source electrode, and the second pole may be its drain electrode; or the first pole may be its drain electrode, and the second pole may be its source electrode, which can be designed and determined according to the requirements of actual applications. And the pixel circuit in the sub-pixel can be Figure 2a and Figure 2b In addition to the structures shown, it can also be a structure including other numbers of transistors, which is not limited in the embodiments of the present disclosure. The following takes the structure shown in Figure 2a as an example for illustration.

[0102] Exemplarily, the display panel includes a substrate 10, a transistor array layer disposed on the substrate 10, a first planarization layer on a side of the transistor array layer away from the substrate 10, a first electrode layer on a side of the first planarization layer away from the substrate 10, a pixel defining layer on a side of the first electrode layer away from the substrate 10, a support layer 100 formed on a side of the pixel defining layer away from the substrate 10, a light-emitting layer on a side of the pixel defining layer away from the substrate 10, and a cathode on a side of the light-emitting layer away from the substrate 10. Among them, the transistor array layer can be used to form transistors and capacitors in the pixel circuit, as well as to form scan lines, reset lines, light emission control lines EM, initialization lines VINIT, a first power supply signal line VDD electrically connected to the first power supply terminal VDD, etc. Exemplarily, the transistor array layer may include an active semiconductor layer 0310, a gate conductive layer 0320, a reference conductive layer 0330, and a source-drain metal layer 0340.

[0103] Exemplarily, as Figure 3 shown in Figure 4a FIG. shows the active semiconductor layer 0310 of the pixel circuit 0121. The active semiconductor layer 0310 can be formed by patterning a semiconductor material. The active semiconductor layer 0310 can be used to fabricate the driving active layer T1-A of the driving transistor T1, the active layer T2-A of the data writing transistor T2, the active layer T3-A of the threshold compensation transistor T3, the active layer T4-A of the light emission control transistor T4, the active layer T5-A of the conduction control transistor T5, the active layer T6-A of the initialization transistor T6, and the active layer T7-A of the reset transistor T7. Each active layer may include a source region, a drain region, and a channel region between the source region and the drain region. For example, the active layers of the respective transistors are integrally provided.

[0104] Exemplarily, the active semiconductor layer 0310 can be fabricated using amorphous silicon, polycrystalline silicon, oxide semiconductor materials, etc. It should be noted that the above-mentioned source region and drain region can be regions doped with n-type impurities or p-type impurities.

[0105] Exemplarily, a gate insulating layer is formed on the above-mentioned active semiconductor layer 0310 to protect the above-mentioned active semiconductor layer 0310. As Figure 3 shown in Figure 4b FIG., Figure 5aAs shown, the gate conductive layer 0320 of the pixel circuit 0121 is shown. The gate conductive layer 0320 is disposed on the side of the gate insulating layer away from the substrate 10, so as to be insulated from the active semiconductor layer 0310. The gate conductive layer 0320 may include the second pole cc2 of the storage capacitor CST, the scan line GA, the reset line RST, the light emission control line EM, the protrusion TB, and the gates T2-G of the data writing transistor T2, the gate T3-G of the threshold compensation transistor T3, the gate T4-G of the light emission control transistor T4, the gate T5-G of the conduction control transistor T5, the gate T6-G of the initialization transistor T6, and the gate T7-G of the reset transistor T7. Among them, the protruding part of the scan line GA forms the protrusion TB. Among them, one repeating unit corresponds to at least one scan line GA, at least one reset line RST, and at least one light emission control line EM. For example, one repeating unit may correspond to one scan line GA, one reset line RST, and one light emission control line EM.

[0106] For example, as Figure 4b shown, the gate T2-G of the data writing transistor T2 may be the overlapping part of the scan line GA and the active semiconductor layer 0310, the gate T4-G of the light emission control transistor T4 may be the first overlapping part of the light emission control line EM and the active semiconductor layer 0310, the gate T5-G of the conduction control transistor T5 may be the second overlapping part of the light emission control line EM and the active semiconductor layer 0310, the gate T6-G of the initialization transistor T6 is the first overlapping part of the reset line RST and the active semiconductor layer 0310, the gate T7-G of the reset transistor T7 is the second overlapping part of the reset line RST and the active semiconductor layer 0310, the threshold compensation transistor T3 may be a thin film transistor with a double gate structure, the first gate of the threshold compensation transistor T3 may be the overlapping part of the scan line GA and the active semiconductor layer 0310, and the second gate of the threshold compensation transistor T3 may be the overlapping part of the protrusion TB protruding from the scan line GA and the active semiconductor layer 0310. As Figure 3 With Figure 4b shown, the second pole cc2 of the storage capacitor CST is multiplexed as the gate of the driving transistor T1.

[0107] It should be noted that Figure 5a each of the dotted lines in

[0108] Exemplarily, as Figure 3 With Figure 4bAs shown, the scan line GA, the reset line RST, and the emission control line EM are arranged along the first direction F1. And the scan line GA, the reset line RST, and the emission control line EM extend substantially along the second direction F2. Exemplarily, the orthographic projection of the scan line GA on the substrate 10 is located between the orthographic projection of the reset line RST on the substrate 10 and the orthographic projection of the emission control line EM on the substrate 10. Exemplarily, Figure 3 Only the first direction F1 is taken as the column direction and the second direction F2 is taken as the row direction for illustration. In specific implementation, the first direction F1 can also be the row direction, and the second direction F2 can also be the column direction, which is not limited herein.

[0109] Exemplarily, in the first direction F1, the second pole cc2 of the storage capacitor CST is located between the scan line GA and the emission control line EM. And, the protrusion TB protruding from the scan line GA is located on the side of the scan line GA away from the emission control line EM. The protrusion TB protrudes from the scan line GA in a direction opposite to the arrow of the first direction F1.

[0110] Exemplarily, an interlayer dielectric layer is formed on the above-mentioned gate conductive layer 0320 to protect the above-mentioned gate conductive layer 0320. As Figure 3 、 Figure 4c And Figure 5b As shown, the reference conductive layer 0330 of the pixel circuit 120a is shown. The reference conductive layer 0330 includes the first pole cc1 of the storage capacitor CST, the initialization line VINIT, and the light shielding layer ZG. Among them, the first pole cc1 of the storage capacitor CST and the second pole cc2 of the storage capacitor CST at least partially overlap to form the storage capacitor CST. Exemplarily, the first pole cc1 of the storage capacitor CST has a hollow area LQ, and the orthographic projection of the hollow area LQ on the substrate 10 may overlap with the orthographic projection of the second pole cc2 of the storage capacitor CST on the substrate 10.

[0111] Exemplarily, as Figure 3 、 Figure 4c And Figure 5b As shown, the orthographic projection of the light shielding layer ZG on the substrate 10 overlaps with the orthographic projection of the drain region of the initialization transistor T6 in the active semiconductor layer 0310 (that is, the side where the drain region of the initialization transistor T6 is electrically connected to the gate of the driving transistor T1) on the substrate 10. This can reduce the influence of light on the initialization transistor T6 and improve the reset accuracy.

[0112] Exemplarily, as Figure 3 、 Figure 4c And Figure 5bAs shown, the threshold compensation transistor T3 is a double-gate transistor. For example, the light-shielding layer ZG shields the active layer portion between the two gates of the threshold compensation transistor T3. Since the threshold compensation transistor T3 is directly connected to the driving transistor T1, it can play a role in stabilizing the operating state of the driving transistor T1.

[0113] Exemplarily, an interlayer insulating layer is formed on the above-mentioned reference conductive layer 0330 to protect the above-mentioned reference conductive layer 0330. As Figure 3 , Figure 4d and Figure 5c shown, the source-drain metal layer 0340 of the pixel circuit 0121 is shown. The source-drain metal layer 0340 is located on the side of the interlayer insulating layer away from the substrate 10. Among them, the source-drain metal layer 0340 may include a first power supply signal line VDD, a data line VD, a first transfer portion ZB1, a second transfer portion ZB2, and an anode transfer portion YZ. Exemplarily, each sub-pixel spx includes a first transfer portion ZB1, a second transfer portion ZB2, and an anode transfer portion YZ.

[0114] Exemplarily, as Figure 3 , Figure 4d and Figure 5c shown, in the same sub-pixel, the anode transfer portion YZ is electrically connected to the conductive region of the active layer of the conduction control transistor through a second via hole GK2. Among them, the second via hole GK2 penetrates the interlayer insulating layer, the interlayer dielectric layer, and the gate insulating layer.

[0115] Exemplarily, as Figure 3 , Figure 4d and Figure 5c shown, the first end of the first transfer portion ZB1 is electrically connected to the initialization line VINIT through a via hole TK01, and the second end of the first transfer portion ZB1 is electrically connected to the source region of the initialization transistor T6 in the active semiconductor layer 0310 (such as the source region of the initialization transistor T6 in the active semiconductor layer 0310 and the source region of the reset transistor T7 are an integrated structure) through a via hole TK02. Among them, the via hole TK01 penetrates the interlayer insulating layer. The via hole TK02 penetrates the interlayer insulating layer, the interlayer dielectric layer, and the gate insulating layer.

[0116] Exemplarily, as Figure 3 , Figure 4d and Figure 5cAs shown, the first end of the second transfer portion ZB2 is electrically connected through the through hole TK03 to the drain region of the initialization transistor T6 in the active semiconductor layer 0310 (the drain region of the initialization transistor T6 is electrically connected to the gate of the driving transistor), and the second end of the second transfer portion ZB2 is electrically connected through the through hole TK04 to the second pole cc2 of the storage capacitor CST (i.e., the gate of the driving transistor). Among them, the through hole TK03 penetrates the interlayer insulating layer, the interlayer dielectric layer, and the gate insulating layer. The through hole TK04 penetrates the interlayer insulating layer and the interlayer dielectric layer.

[0117] Exemplarily, as Figure 3 、 Figure 4d and Figure 5c shown, the anode transfer portion YZ is electrically connected through the second via hole GK2 to the drain region of the second light emission control circuit 0124 in the active semiconductor layer 0310. Among them, the second via hole GK2 penetrates the interlayer insulating layer, the interlayer dielectric layer, and the gate insulating layer.

[0118] Exemplarily, as Figure 3 、 Figure 4d and Figure 5c shown, the data line VD is electrically connected through the through hole TK05 to the source region of the data writing transistor T2 in the active semiconductor layer 0310. Among them, the through hole TK05 penetrates the interlayer insulating layer, the interlayer dielectric layer, and the gate insulating layer.

[0119] Exemplarily, as Figure 3 、 Figure 4d and Figure 5c shown, the first power supply signal line VDD is electrically connected through the through hole TK06 to the source region of the light emission control transistor T4 in the active semiconductor layer 0310. Among them, the through hole TK06 penetrates the interlayer insulating layer, the interlayer dielectric layer, and the gate insulating layer.

[0120] Exemplarily, as Figure 3 、 Figure 4d and Figure 5c shown, the first power supply signal line VDD and the data line VD are arranged along the second direction F2, and the first power supply signal line VDD and the data line VD extend substantially along the first direction F1. It should be noted that in the actual process, due to process conditions or other factors such as wiring or via hole settings, as long as the extension directions of the first power supply signal line VDD and the data line VD substantially meet the above conditions, they all fall within the protection scope of the present invention.

[0121] Exemplarily, an auxiliary insulating layer may be formed on the source-drain metal layer 0340 described above to protect the source-drain metal layer 0340. An auxiliary conductive layer may also be formed on the side of the auxiliary insulating layer away from the substrate 10, so that the auxiliary conductive layer can be electrically connected to the first power supply signal line VDD to reduce the resistance of the first power supply signal line VDD.

[0122] Exemplarily, a first flat layer is formed on the source-drain metal layer 0340 above to protect the source-drain metal layer 0340 above. Exemplarily, as Figure 3 and Figure 4e and Figure 5d shown, a first electrode layer is formed on the side away from the first flat layer. Among them, the first electrode layer includes anodes located in each sub-pixel. Among them, the anodes in each sub-pixel are electrically connected to the anode transfer part YZ through the first via hole GK1. And, the first via hole GK1 penetrates the first flat layer.

[0123] Exemplarily, as Figure 1 and Figure 4e shown, a plurality of sub-pixels include a first color sub-pixel spx1 and a second color sub-pixel spx2 adjacent along the first direction F1; among them, the first color sub-pixel spx1 includes an anode YG1, and the second color sub-pixel spx2 includes an anode YG2. The orthographic projection of the first via hole GK1 in the first color sub-pixel spx1 on the substrate 10 is located between the orthographic projections of the main body part ZT1 in the first color sub-pixel spx1 and the main body part ZT2 in the second color sub-pixel spx2 on the substrate 10. Exemplarily, for the first color sub-pixel spx1 and the second color sub-pixel spx2 adjacent along the first direction F1, one side of the anode in the second color sub-pixel spx2 has a first recess AX1 on the side facing the orthographic projection of the anode in the first color sub-pixel spx1 on the substrate 10. And the first recess AX1 is arranged towards the center of the main body part ZT2 of the second color sub-pixel spx2. Further, the display panel includes a plurality of repeating units PX; each repeating unit PX includes at least one first color sub-pixel spx1 and at least one second color sub-pixel spx2. For example, each repeating unit PX includes a first color sub-pixel spx1 and a second color sub-pixel spx2 adjacent along the first direction F1, and two adjacent repeating units have two first recesses AX1 and two first via holes GK1; and, in the first direction F1, at least two adjacent repeating units have two first recesses AX1 and two first via holes GK1 arranged on the same straight line. For example, if the first color sub-pixel spx1 is a red sub-pixel and the second color sub-pixel spx2 is a green sub-pixel, then the red sub-pixel and the green sub-pixel are adjacent along the first direction F1. And, for the red sub-pixel and the green sub-pixel adjacent along the first direction F1, the orthographic projection of the anode in the green sub-pixel on the substrate 10 has a first recess AX1 on the side facing the orthographic projection of the anode in the red sub-pixel on the substrate 10.

[0124] Exemplarily, as Figure 1 and Figure 4eAs shown, the layout structure diagrams of the pixel circuits included in each sub-pixel are arranged in an array in the first direction and the second direction. That is to say, the layout structures of the pixel circuits included in each sub-pixel are periodically arranged in the row direction and the column direction. Further, a plurality of repeating units PX are arranged in the second direction F2 to form a repeating unit group PXZ, and the repeating unit group PXZ is arranged in the first direction F1. And the repeating unit includes a first color sub-pixel spx1 and a second color sub-pixel spx2 arranged in sequence in the first direction F1. The anode in the second color sub-pixel spx2 has a first recess AX1 on the side of the positive projection of the anode in the first color sub-pixel spx1 on the substrate 10, that is to say, the first recess AX1 is provided in the main body ZT2 of the second color sub-pixel spx2. For example, the first color sub-pixel spx1 is a red sub-pixel, and the second color sub-pixel spx2 is a green sub-pixel. In the same repeating unit, the anode in the green sub-pixel has a first recess AX1 on the side of the positive projection of the anode in the red sub-pixel on the substrate 10. For example, one repeating unit group PXZ can correspond to a scan line GA, a reset line RST, and an emission control line EM.

[0125] Exemplarily, as Figure 1 With Figure 4e shown, the repeating unit further includes at least one third color sub-pixel spx3. For example, the repeating unit can include one third color sub-pixel spx3. Among them, the connection lines between the anodes of the adjacent first color sub-pixel spx1, second color sub-pixel spx2, and third color sub-pixel spx3 form a triangle. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the connection lines between the anodes of the red sub-pixel, green sub-pixel, and blue sub-pixel form a triangle.

[0126] Exemplarily, as Figure 3 With Figure 4eAs shown, the anode may include a main body portion and a via portion that are electrically connected to each other; wherein, the positive projection of the via portion on the substrate 10 covers the positive projection of the first via GK1 on the substrate 10, and in each sub-pixel, the via portion is electrically connected to the anode transfer portion YZ through the first via GK1. Exemplarily, the anode YG1 in the first color sub-pixel spx1 may further include a first connection portion LB1 electrically connected between the main body portion ZT1 and the via portion GB1, that is, the main body portion ZT1 in the first color sub-pixel spx1 is electrically connected to the via portion GB1 through the first connection portion LB1. The anode YZ2 in the second color sub-pixel spx2 further includes a second connection portion LB2 electrically connected between the main body portion ZT2 and the via portion GB2, that is, the main body portion ZT2 in the second color sub-pixel spx2 is electrically connected to the via portion GB2 through the second connection portion LB2. The main body portion ZT3 and the via portion GB3 in the third color sub-pixel spx3 are directly electrically connected. For example, if the first color sub-pixel spx1 is a red sub-pixel, the main body portion in the red sub-pixel is electrically connected to the via portion through the first connection portion. If the second color sub-pixel spx2 is a green sub-pixel, the main body portion in the green sub-pixel is electrically connected to the via portion through the second connection portion. If the third color sub-pixel spx3 is a blue sub-pixel, the main body portion in the blue sub-pixel is directly electrically connected to the via portion.

[0127] Exemplarily, as Figure 3 and Figure 4e shown, the first connection portion extends along the first direction F1. The second connection portion extends along the third direction F3. Wherein, the third direction F3 is different from both the first direction F1 and the second direction F2. For example, the third direction F3 has an angle with the first direction F1 and the second direction F2 respectively, so that the second connection portion can extend in an obliquely upward direction.

[0128] Exemplarily, as Figure 3 and Figure 4e shown, in the same repeating unit, the positive projection of the main body portion in the third color sub-pixel spx3 on the substrate 10 has a second depression AX2 on one side facing the positive projection of the first via GK1 in the second color sub-pixel spx2 on the substrate 10. For example, in the same repeating unit, the positive projection of the main body portion in the third color sub-pixel spx3 on the substrate 10 has a second depression AX2 on one side facing the positive projection of the via portion GB2 in the second color sub-pixel spx2 on the substrate 10. For example, if the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel, in the same repeating unit, the positive projection of the main body portion in the blue sub-pixel on the substrate 10 has a second depression AX2 on one side facing the positive projection of the first via GK1 in the green sub-pixel on the substrate 10.

[0129] Exemplarily, asFigure 3 and Figure 4e As shown, in the same repeating unit, the orthographic projection of the first via GK1 in the first color sub-pixel spx1 on the substrate 10 is located between the orthographic projections of the anode YZ1 in the first color sub-pixel spx1 and the anode YZ2 in the second color sub-pixel spx2 on the substrate 10.

[0130] Exemplarily, as Figure 3 and Figure 4e As shown, in the same repeating unit, the orthographic projection of the first via GK1 in the second color sub-pixel spx2 on the substrate 10 is located between the orthographic projection of the via portion GB1 in the first color sub-pixel spx1 and the main body portion ZT3 in the third color sub-pixel spx3 on the substrate 10. And the orthographic projections of the first via GK1 in the second color sub-pixel spx2, the via portion GB1 in the first color sub-pixel spx1, and the main body portion ZT3 in the third color sub-pixel spx3 on the substrate 10 are located on the same straight line, and this straight line can be substantially parallel to the first direction F1.

[0131] Exemplarily, as Figure 3 and Figure 4e As shown, in the same repeating unit, the orthographic projection of the first via GK1 in the third color sub-pixel spx3 on the substrate 10 is located on the side of the orthographic projection of the second recess AX2 on the substrate 10 away from the orthographic projection of the via portion GB2 in the second color sub-pixel spx2 on the substrate 10. For example, the second color sub-pixel spx2 is a green sub-pixel, the first color sub-pixel spx1 is a red sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the orthographic projection of the first via GK1 in the red sub-pixel on the substrate 10 is located between the orthographic projections of the anode in the red sub-pixel and the anode in the green sub-pixel on the substrate 10. The orthographic projection of the first via GK1 in the green sub-pixel on the substrate 10 is located between the orthographic projections of the via portion in the red sub-pixel and the main body portion in the blue sub-pixel on the substrate 10. The orthographic projection of the first via GK1 in the blue sub-pixel on the substrate 10 is located on the side of the orthographic projection of the second recess AX2 on the substrate 10 away from the orthographic projection of the via portion in the green sub-pixel on the substrate 10.

[0132] Exemplarily, as Figure 3 and Figure 4eAs shown, in the same repeating unit, the positive projection of the first recess AX1 of the anode in the second color sub-pixel spx2 in the second direction F2 and the positive projection of the first via GK1 in the first color sub-pixel spx1 in the second direction F2 have at least an overlapping area; wherein, the first direction F1 is different from the second direction F2. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the positive projection of the first recess AX1 of the anode in the green sub-pixel in the second direction F2 and the positive projection of the first via GK1 in the red sub-pixel in the second direction F2 have at least an overlapping area. It should be noted that the positive projection in the second direction F2 refers to the line projection of the first recess AX1 of the anode of the green sub-pixel and the first via GK1 in the red sub-pixel on the straight line in the second direction F2, and the line projection lengths of the two have an overlap. In this application, the positive projection in the first or second direction refers to the line projection on the straight line in the first direction or the second direction.

[0133] Exemplarily, as Figure 3 with Figure 4e shown, in the same repeating unit, the positive projection of the second recess AX2 of the main body in the third color sub-pixel spx3 in the first direction F1 and the positive projection of the first via GK1 in the second color sub-pixel spx2 in the first direction F1 have at least an overlapping area. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the positive projection of the second recess AX2 of the main body in the blue sub-pixel in the first direction F1 and the positive projection of the first via GK1 in the green sub-pixel in the first direction F1 have at least an overlapping area.

[0134] Exemplarily, as Figure 3 with Figure 4e shown, in the same repeating unit, the positive projection of the first recess AX1 of the anode in the second color sub-pixel spx2 in the second direction F2 covers the positive projection of the first via GK1 in the first color sub-pixel spx1 in the second direction F2. The positive projection of the first recess AX1 of the anode in the second color sub-pixel spx2 in the second direction F2 covers the positive projection of the via portion GB1 in the first color sub-pixel spx1 in the second direction F2. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the positive projection of the first recess AX1 of the anode in the green sub-pixel in the second direction F2 covers the positive projection of the first via GK1 in the red sub-pixel in the second direction F2.

[0135] Exemplarily, as Figure 3 and Figure 4e shown, in the same repeating unit, the positive projection of the second recess AX2 of the main body ZT3 in the third color sub-pixel spx3 in the first direction F1 covers the positive projection of the first via GK1 in the second color sub-pixel spx2 in the first direction F1. The first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the positive projection of the second recess AX2 of the main body in the blue sub-pixel in the first direction F1 covers the positive projection of the first via GK1 in the green sub-pixel in the first direction F1.

[0136] Exemplarily, as Figure 3 and Figure 4e shown, in the same repeating unit, the positive projection of the second recess AX2 of the main body ZT3 in the third color sub-pixel spx3 in the first direction F1 covers the positive projection of the via portion GB2 in the second color sub-pixel spx2 in the first direction F1. The first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the positive projection of the second recess AX2 of the main body in the blue sub-pixel in the first direction F1 covers the positive projection of the via portion GB2 in the green sub-pixel in the first direction F1.

[0137] Exemplarily, as Figure 3 and Figure 4e shown, the main body ZT2 in the second color sub-pixel spx2 has a first recess AX1, and in the same repeating unit, the positive projection of the first recess AX1 in the second direction F2 covers the positive projection of the via portion in the first color sub-pixel spx1 in the second direction F2. For example, if the second color sub-pixel spx2 is a green sub-pixel, the first color sub-pixel spx1 is a red sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel, then the main body in the green sub-pixel has a first recess AX1, and in the same repeating unit, the positive projection of the first recess AX1 in the second direction F2 covers the positive projection of the via portion in the red sub-pixel in the second direction F2.

[0138] Exemplarily, as Figure 3 and Figure 4eAs shown, in the same repeating unit, the orthographic projection of the second recess AX2 of the main body ZT3 in the third color sub-pixel spx3 in the first direction F1 covers the orthographic projection of the via ZT2 in the second color sub-pixel spx2 in the first direction F1. For example, the second color sub-pixel spx2 is a green sub-pixel, the first color sub-pixel spx1 is a red sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel, then in the same repeating unit, the orthographic projection of the second recess AX2 of the main body in the blue sub-pixel in the first direction F1 covers the orthographic projection of the via in the green sub-pixel in the first direction F1.

[0139] For example, Figure 3 and Figure 4e As shown, the edge of the orthographic projection of the first recess AX1 on the substrate 10 is roughly parallel to the edge of the orthographic projection of the via portion GB1 in the first color sub-pixel spx1 on the substrate 10. For example, the second color sub-pixel spx2 is a green sub-pixel, the first color sub-pixel spx1 is a red sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the edge of the orthographic projection of the first recess AX1 on the substrate 10 is roughly parallel to the edge of the orthographic projection of the via portion in the red sub-pixel on the substrate 10. It should be noted that in actual processes, due to limitations of process conditions or other factors such as the setting of wiring or vias, the above-mentioned parallel relationship only needs to roughly meet the above conditions and is within the protection scope of the present invention.

[0140] For example, Figure 3 and Figure 4e As shown, the edge of the orthographic projection of the second recess AX2 on the substrate 10 is roughly parallel to the edge of the orthographic projection of the main part ZT2 in the second color sub-pixel spx2 on the substrate 10. For example, the second color sub-pixel spx2 is a green sub-pixel, the first color sub-pixel spx1 is a red sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the edge of the orthographic projection of the second recess AX2 on the substrate 10 is roughly parallel to the edge of the orthographic projection of the main part in the green sub-pixel on the substrate 10. It should be noted that in actual processes, due to the limitations of process conditions or other factors such as the setting of wiring or vias, the above-mentioned parallel relationship only needs to roughly meet the above conditions and is within the protection scope of the present invention.

[0141] For example, Figure 3 and Figure 4eAs shown, the first distance between the edge of the orthographic projection of the first recess AX1 on the substrate 10 and the edge of the orthographic projection of the via portion ZT1 in the first color sub-pixel spx1 on the substrate 10 is not less than 2.5 μm. For example, the second color sub-pixel spx2 is a green sub-pixel, the first color sub-pixel spx1 is a red sub-pixel, the third color sub-pixel spx3 is a blue sub-pixel, and the first distance between the edge of the orthographic projection of the first recess AX1 on the substrate 10 and the edge of the orthographic projection of the via portion in the red sub-pixel on the substrate 10 is not less than 2.5 μm. For example, the first distance between the edge of the orthographic projection of the first recess AX1 on the substrate 10 and the edge of the orthographic projection of the via portion in the red sub-pixel on the substrate 10 is 2.5 - 20 μm. For example, the first distance can be set to 2.5 μm. Alternatively, the first distance can be set to 3.5 μm, or the first distance can be set to 5.5 μm, or the first distance can be set to 10 μm, or the first distance can be set to 20 μm. In practical applications, in combination with the preparation process and the accuracy of the equipment, when mass-producing a display panel, the first distance can be set to 3.5 μm. Of course, in practical applications, the value of the first distance can be set according to actual application requirements, which is not limited here.

[0142] Exemplarily, as Figure 3 With Figure 4e As shown, the second distance between the edge of the orthographic projection of the second recess AX2 on the substrate 10 and the edge of the orthographic projection of the main body portion ZT2 in the second color sub-pixel spx2 on the substrate 10 is not less than 2.5 μm. For example, the second distance between the edge of the orthographic projection of the second recess AX2 on the substrate 10 and the edge of the orthographic projection of the main body portion ZT2 in the second color sub-pixel spx2 on the substrate 10 is 2.5 - 20 μm. For example, the second color sub-pixel spx2 is a green sub-pixel, the first color sub-pixel spx1 is a red sub-pixel, the third color sub-pixel spx3 is a blue sub-pixel, and the second distance between the edge of the orthographic projection of the second recess AX2 on the substrate 10 and the edge of the orthographic projection of the via portion in the green sub-pixel on the substrate 10 is not less than 2.5 μm. Further, the second distance is 2.5 - 20 μm, and the second distance can be set to 2.5 μm. Alternatively, the second distance can be set to 3.5 μm, or the second distance can be set to 5.5 μm, or the second distance can be set to 10 μm, or the second distance can be set to 20 μm. In practical applications, in combination with the preparation process and the accuracy of the equipment, when mass-producing a display panel, the second distance can be set to 3.5 μm. Of course, in practical applications, the value of the second distance can be set according to actual application requirements, which is not limited here.

[0143] For example, Figure 3 and Figure 4e As shown, the transistor array layer includes a driving transistor located in each sub-pixel. The first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. The positive projection of the anode in the green sub-pixel on the substrate substrate 10 and the positive projection of the channel region of the driving transistor in the red sub-pixel on the substrate substrate 10 have an overlapping area. The positive projection of the anode in the red sub-pixel on the substrate substrate 10 does not overlap with the positive projection of the channel region of each driving transistor on the substrate substrate 10. Exemplarily, the positive projection of the anode in the red sub-pixel on the substrate substrate 10 and the positive projection of the pixel circuit in the red sub-pixel on the substrate substrate 10 have an overlapping area.

[0144] For example, Figure 1 , Figure 3 and Figure 4e As shown, one repeating unit corresponds to one scan line GA, one reset line RST, and one light-emitting control line EM. Further, one repeating unit group PXZ corresponds to one scan line GA, one reset line RST, and one light-emitting control line EM, that is, the pixel circuits in one repeating unit group PXZ are electrically connected to the same scan line GA, the same reset line RST, and the same light-emitting control line EM. Among them, for the scan line GA, the reset line RST, and the light-emitting control line EM corresponding to the same repeating unit, the orthographic projection of the scan line GA on the substrate substrate 10 is located between the orthographic projections of the reset line RST and the light-emitting control line EM on the substrate substrate 10. For example, for the scan line GA, the reset line RST, and the light-emitting control line EM corresponding to the same repeating unit group, the orthographic projection of the scan line GA on the substrate substrate 10 is located between the orthographic projections of the reset line RST and the light-emitting control line EM on the substrate substrate 10.

[0145] For example, Figure 1 , Figure 3 and Figure 4eAs shown, in a repeating unit, the orthographic projection of the reset line RST on the substrate 10 does not overlap with the orthographic projection of the anode in the red sub-pixel controlled by the reset line RST on the substrate 10. The orthographic projection of the emission control line EM on the substrate 10 has an overlapping area with the orthographic projection of the anode in the green sub-pixel controlled by the emission control line EM on the substrate 10. The orthographic projection of the scan line GA on the substrate 10 does not overlap with the orthographic projections of the respective anodes controlled by the scan line GA on the substrate 10. Further, in a repeating unit group PXZ, the orthographic projection of the reset line RST on the substrate 10 does not overlap with the orthographic projection of the anode in the red sub-pixel controlled by the reset line RST on the substrate 10. The orthographic projection of the emission control line EM on the substrate 10 has an overlapping area with the orthographic projection of the anode in the green sub-pixel controlled by the emission control line EM on the substrate 10. The orthographic projection of the scan line GA on the substrate 10 does not overlap with the orthographic projections of the respective anodes controlled by the scan line GA on the substrate 10. Further, for a repeating unit, the orthographic projection of the emission control line EM controlling the repeating unit on the substrate 10 has overlapping areas with the orthographic projections of the anodes in the blue sub-pixel and the green sub-pixel on the substrate 10 respectively. The orthographic projections of the reset line RST and the scan line GA controlling the repeating unit on the substrate 10 do not overlap with the orthographic projections of the respective anodes on the substrate 10. It should be noted that the reset line RST is a signal line for controlling the initialization transistor T6 and the reset transistor T7 in a repeating unit. The emission control line EM is a signal line for controlling the emission control transistor T4 and the conduction control transistor T5 in a repeating unit. The scan line GA is a signal line for controlling the data writing transistor T2 and the threshold compensation transistor T3 in a repeating unit. For example, for a repeating unit group PXZ, the orthographic projection of the emission control line EM controlling the repeating unit group PXZ on the substrate 10 has overlapping areas with the orthographic projections of the anodes in the blue sub-pixel and the green sub-pixel on the substrate 10 respectively. The orthographic projections of the reset line RST and the scan line GA of the repeating unit group PXZ on the substrate 10 do not overlap with the orthographic projections of the respective anodes on the substrate 10. It should be noted that the reset line RST is a signal line for controlling the initialization transistor T6 and the reset transistor T7 in a repeating unit group. The emission control line EM is a signal line for controlling the emission control transistor T4 and the conduction control transistor T5 in a repeating unit group. The scan line GA is a signal line for controlling the data writing transistor T2 and the threshold compensation transistor T3 in a repeating unit group.

[0146] Exemplarily, as Figure 1 、 Figure 3 and Figure 4eAs shown, the orthographic projection of the reset line on the substrate 10 and the orthographic projection of the anode in the red sub-pixel on the substrate 10 have an overlapping area. The orthographic projection of the light-emitting control line on the substrate 10 and the orthographic projection of the anode in the green sub-pixel on the substrate 10 have an overlapping area. The orthographic projection of the scanning line on the substrate 10 and the orthographic projection of each anode on the substrate 10 do not overlap.

[0147] Exemplarily, as Figure 3 with Figure 4e shown, in the same repeating unit, the orthographic projection of the anode in the third-color sub-pixel spx3 on the substrate 10 and the orthographic projections of the reset line and the light-emitting control line that control the pixel circuit in the third-color sub-pixel spx3 on the substrate 10 have overlapping areas. For example, the first-color sub-pixel spx1 is a red sub-pixel, the second-color sub-pixel spx2 is a green sub-pixel, and the third-color sub-pixel spx3 is a blue sub-pixel. In the same repeating unit, the orthographic projection of the anode in the blue sub-pixel on the substrate 10 and the orthographic projections of the reset line and the light-emitting control line on the substrate 10 have overlapping areas.

[0148] Exemplarily, as Figure 3 with Figure 4e shown, the orthographic projections of the first via GK1 and the second via GK2 in the red sub-pixel on the substrate 10 have a first overlapping area. The orthographic projections of the first via GK1 and the second via GK2 in the green sub-pixel on the substrate 10 have a second overlapping area. The orthographic projections of the first via GK1 and the second via GK2 in the blue sub-pixel on the substrate 10 have a third overlapping area. Among them, the area of the first overlapping area is not greater than the area of the second overlapping area. The area of the first overlapping area is not greater than the area of the third overlapping area. Further, the area of the third overlapping area can be made to be approximately equal to less than the area of the second overlapping area. It should be noted that in actual processes, due to process condition limitations or other factors such as wiring or via settings, as long as the above equal relationship generally meets the above conditions, it falls within the protection scope of the present invention.

[0149] Exemplarily, the area of the first overlapping area is 0 to 0.9 μm. For example, the area of the first overlapping area can also be 0.5 μm, or the area of the first overlapping area can also be 0.9 μm. Or, the area of the first overlapping area can be 0, so that the orthographic projections of the first via GK1 and the second via GK2 in the red sub-pixel on the substrate 10 do not overlap.

[0150] Exemplarily, the area of ​​the second overlapping region is 0 to 0.9 μm. For example, the area of ​​the second overlapping region may also be 0.5 μm, or the area of ​​the second overlapping region may also be 0.9 μm. Alternatively, the area of ​​the second overlapping region may be 0, so that the orthographic projections of the first via hole GK1 and the second via hole GK2 in the green sub-pixel on the base substrate 10 do not overlap.

[0151] Exemplarily, the area of ​​the third overlapping region is 0-0.9 μm. For example, the area of ​​the third overlapping region may also be 0.5 μm, or the area of ​​the third overlapping region may also be 0.9 μm. Alternatively, the area of ​​the third overlapping region may be 0, so that the orthographic projections of the first via hole GK1 and the second via hole GK2 in the blue sub-pixel on the base substrate 10 do not overlap.

[0152] Exemplarily, when the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel, the second overlapping area can be set larger to ensure the distance between the anodes in the blue sub-pixel and the green sub-pixel to avoid color mixing.

[0153] For example, Figure 3 and Figure 4e As shown, the first vias GK1 in the repeating units adjacent along the second direction F2 are arranged in sequence approximately along the second direction F2. For example, the first vias GK1 in the repeating unit group are arranged in sequence approximately along the second direction F2. Exemplarily, the orthographic projections of the first vias GK1 in the repeating units adjacent along the second direction F2 in the first direction F1 overlap. For example, the orthographic projections of the first vias GK1 in the repeating unit group in the first direction F1 overlap. It should be noted that in actual processes, due to limitations of process conditions or other factors such as wiring or via setting, the arrangement relationship of the first vias GK1 only needs to roughly meet the above conditions and all belong to the protection scope of the present invention.

[0154] For example, Figure 3 , Figure 4e and Figure 4f As shown, a pixel defining layer is formed on the side of the first electrode layer away from the base substrate 10, and the pixel defining layer includes an opening located in each sub-pixel, and in the same sub-pixel, the orthographic projection of the opening on the base substrate 10 is located within the orthographic projection of the anode on the base substrate 10. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. The red sub-pixel has an opening KK1, the green sub-pixel has an opening KK2, and the blue sub-pixel has an opening KK3. It should be noted that the area where the opening in each sub-pixel is located is equivalent to the light-emitting area of ​​the sub-pixel.

[0155] Exemplarily, as Figure 3 , Figure 4e and Figure 4f show, in at least one of the first color sub-pixel spx1 and the second color sub-pixel spx2, the orthographic projection of the opening on the substrate 10 is a rectangle. For example, the orthographic projections of the openings in the first color sub-pixel spx1 and the second color sub-pixel spx2 on the substrate 10 are both rectangles. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. The orthographic projections of the openings KK1 in the red sub-pixel and the openings KK2 in the green sub-pixel on the substrate 10 are both rectangles.

[0156] Exemplarily, as Figure 3 , Figure 4e and Figure 4f show, the area of the opening in the third color sub-pixel spx3 is larger than the area of the opening in the second color sub-pixel spx2, and the area of the opening in the second color sub-pixel spx2 is larger than the area of the opening in the first color sub-pixel spx1. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. The area of the opening KK3 in the blue sub-pixel is larger than the area of the opening KK2 in the green sub-pixel, and the area of the opening KK2 in the green sub-pixel is larger than the area of the opening KK1 in the red sub-pixel. In practical applications, the opening area in each sub-pixel can be inversely proportional to the luminous lifetime of the sub-pixel. For example, if the luminous lifetime of the red sub-pixel is greater than the luminous lifetime of the green sub-pixel which is greater than the luminous lifetime of the blue sub-pixel, then the area of the opening in the blue sub-pixel can be larger than the area of the opening in the green sub-pixel, and the area of the opening in the green sub-pixel can be larger than the area of the opening in the red sub-pixel.

[0157] Exemplarily, as Figure 3 , Figure 4e and Figure 4f show, in the third color sub-pixel spx3, the orthographic projection of the opening on the substrate 10 has an opening depression AX0 on one side facing the orthographic projection of the first via GK1 in the third color sub-pixel spx3 on the substrate 10. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the blue sub-pixel, the orthographic projection of the opening KK3 on the substrate 10 has an opening depression AX0 on one side facing the orthographic projection of the first via GK1 on the substrate 10. By setting the opening depression AX0, the area required for the fan-out of the first via GK1 can be provided, so that the flatness of the anode in the opening KK3 can be ensured to be relatively high, improving the display effect.

[0158] Exemplarily, as Figure 3 , Figure 4e and Figure 4f shown, in the third color sub-pixel spx3, the positive projection of the opening recess AX0 in the first direction F1 covers the positive projection of the first via GK1 in the first direction F1. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the blue sub-pixel, the positive projection of the opening recess AX0 in the first direction F1 covers the positive projection of the first via GK1 in the first direction F1.

[0159] Exemplarily, as Figure 3 , Figure 4e and Figure 4f shown, in the third color sub-pixel spx3, the edge of the positive projection of the opening recess AX0 on the substrate 10 is substantially parallel to the edge of the positive projection of the first via GK1 on the substrate 10. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the blue sub-pixel, the edge of the positive projection of the opening recess AX0 on the substrate 10 is substantially parallel to the edge of the positive projection of the first via GK1 on the substrate 10. It should be noted that in the actual process, due to process conditions or other factors such as wiring or via setting, as long as the above parallel relationship substantially meets the above conditions, it belongs to the protection scope of the present invention.

[0160] Exemplarily, as Figure 3 , Figure 4e and Figure 4f shown, in the third color sub-pixel spx3, the third distance between the edge of the positive projection of the opening recess AX0 on the substrate 10 and the edge of the positive projection of the first via GK1 on the substrate 10 is not less than 2.25 μm. Further, the third distance is 2.25 - 20 μm. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the blue sub-pixel, the third distance between the edge of the positive projection of the opening recess AX0 on the substrate 10 and the edge of the positive projection of the first via GK1 on the substrate 10 is not less than 2.25 μm. Exemplarily, the third distance can be set to 2.25 μm. Or, the third distance can also be set to 2.5 μm. Or, the third distance can also be set to 20 μm. In actual applications, in combination with the preparation process and the accuracy of the equipment, when mass-producing the display panel, the third distance can be set to 2.5 μm. Of course, in actual applications, the value of the third distance can be set according to actual application requirements, which is not limited herein.

[0161] Exemplarily, as Figure 3 , Figure 4e and Figure 4f show, in the third color sub-pixel spx3, the main body ZT3 of the anode YG3 has a third recess AX3 on one side of the orthographic projection of the first via GK1 of the anode YG3 of the third color sub-pixel spx3 on the substrate 10, and the third recess AX3 is substantially parallel to the opening recess AX0. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the blue sub-pixel, the main body ZT3 of the anode YG3 has a third recess AX3 on one side of the orthographic projection of the first via GK1 of the anode YG3 of the third color sub-pixel spx3 on the substrate 10, and the third recess AX3 is substantially parallel to the opening recess AX0.

[0162] Exemplarily, as Figure 3 , Figure 4e and Figure 4f show, in the third color sub-pixel spx3, the edge of the orthographic projection of the third recess AX3 on the substrate 10 overlaps with the edge of the orthographic projection of the opening recess AX0 on the substrate 10. For example, the first color sub-pixel spx1 is a red sub-pixel, the second color sub-pixel spx2 is a green sub-pixel, and the third color sub-pixel spx3 is a blue sub-pixel. In the blue sub-pixel, the edge of the orthographic projection of the third recess AX3 on the substrate 10 overlaps with the edge of the orthographic projection of the opening recess AX0 on the substrate 10.

[0163] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g show, the support layer 100 may include multiple columns of first spacers PS-1 and multiple columns of second spacers PS-2; the first spacers PS-1 and the second spacers PS-2 are located in different columns; one column of first spacers PS-1 corresponds to one column of sub-pixels, and one column of second spacers PS-2 corresponds to another column of sub-pixels. The number of sub-pixels in the column where the first spacers PS-1 are located is different from the number of sub-pixels in the column where the second spacers PS-2 are located. Exemplarily, one column of first spacers PS-1 corresponds to the anodes in one column of sub-pixels, and one column of second spacers PS-2 corresponds to the anodes in another column of sub-pixels. Also, the number of anodes in the column where the first spacers PS-1 are located is different from the number of anodes in the column where the second spacers PS-2 are located.

[0164] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, the anodes of at least one sub-pixel among the sub-pixels corresponding to the first spacer PS-1 extend along the first direction F1 (e.g., the column direction), and the first spacer PS-1 and the second spacer PS-2 extend along the second direction F2 (e.g., the row direction) respectively. Exemplarily, the anodes of at least one sub-pixel among the sub-pixels corresponding to the first spacer PS-1 extend along the column direction (i.e., the first direction F1), and the first spacer PS-1 and the second spacer PS-2 extend along the row direction (i.e., the second direction F2) respectively. Moreover, for the first spacer PS-1 and the corresponding sub-pixels, in the column direction, the first spacer PS-1 and the sub-pixels are alternately and repeatedly arranged in the column direction (i.e., the first direction F1) and are in one-to-one correspondence.

[0165] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, the positive projection of the first spacer PS-1 in the column direction (i.e., the first direction F1) does not overlap with the positive projection of the anodes in the column direction (i.e., the first direction F1) in each sub-pixel.

[0166] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, there is a first ratio between the area of the first spacer PS-1 (e.g., the area of the positive projection of the first spacer PS-1 on the substrate 10) and the area of the opening of the corresponding sub-pixel (e.g., the area of the positive projection of the opening of the sub-pixel on the substrate 10). And there is a second ratio between the area of the second spacer PS-2 (e.g., the area of the positive projection of the second spacer PS-2 on the substrate 10) and the sum of the areas of the openings of all sub-pixels between two adjacent second spacers PS-2 in the column direction (e.g., the sum of the areas of the positive projections of the openings of all sub-pixels between two adjacent second spacers PS-2 in the column direction on the substrate 10). The first ratio and the second ratio can be made different. Exemplarily, the first ratio can be made greater than the second ratio. Wherein, the first ratio is the value obtained by dividing the area of the first spacer PS-1 by the area of the opening of the corresponding sub-pixel. The second ratio is the value obtained by dividing the area of the second spacer PS-2 by the sum of the areas of the openings of all sub-pixels between two adjacent second spacers PS-2 in the column direction.

[0167] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, there is a first ratio between the area of the first spacer PS-1 and the area of the opening KK3 in the third color sub-pixel spx3. That is, the first ratio is the value obtained by dividing the area of the first spacer PS-1 by the area of the opening KK3 in the third color sub-pixel spx3.

[0168] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, there is a second ratio between the area of the second spacer PS-2 and the sum of the areas of the openings in the first color sub-pixel spx1 and the second color sub-pixel spx2. That is, the second ratio is the value obtained by dividing the area of the second spacer PS-2 by the sum of the areas of the openings in the first color sub-pixel spx1 and the second color sub-pixel spx2.

[0169] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, the area ratio of the first spacers PS-1 adjacent in the column direction (i.e., the first direction F1) is 0.8 to 1.2. For example, the area ratio of the first spacers PS-1 adjacent in the column direction (i.e., the first direction F1) in the orthographic projection on the substrate substrate 10 can be 0.8 to 1.2. Exemplarily, the area ratio of the first spacers PS-1 adjacent in the column direction (i.e., the first direction F1) is 0.9 to 1.1. For example, the area ratio of the first spacers PS-1 adjacent in the column direction (i.e., the first direction F1) can be 0.8. The area ratio of the first spacers PS-1 adjacent in the column direction (i.e., the first direction F1) can also be 0.9. The area ratio of the first spacers PS-1 adjacent in the column direction (i.e., the first direction F1) can also be 1.0. The area ratio of the first spacers PS-1 adjacent in the column direction (i.e., the first direction F1) can also be 1.1. The area ratio of the first spacers PS-1 adjacent in the column direction (i.e., the first direction F1) can also be 1.2. Of course, in practical applications, it can be designed and determined according to the actual application requirements, and is not limited here.

[0170] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, there is a first spacer distance HG1 between adjacent first spacers PS-1 along the column direction (i.e., the first direction F1), and a second spacer distance HG2 between adjacent second spacers PS-2 along the column direction (i.e., the first direction F1). The second spacer distance HG2 is greater than the first spacer distance HG1. Exemplarily, the first spacer distance HG1 can be the minimum distance between the boundaries of adjacent first spacers PS-1 along the column direction (i.e., the first direction F1). The second spacer distance HG2 can be the minimum distance between the boundaries of adjacent second spacers PS-2 along the column direction (i.e., the first direction F1).

[0171] Exemplarily, as Figure 3 、 Figure 4e 、 Figure 4f and Figure 4g shown, the width of the first spacer PS-1 in the column direction (i.e., the first direction F1) is greater than the width of the second spacer PS-2 in the column direction (i.e., the first direction F1); and the width of the first spacer PS-1 in the row direction (i.e., the second direction F21) is not less than the width of the second spacer PS-2 in the row direction (i.e., the second direction F2). This can make the area of the orthographic projection of the first spacer PS-1 on the substrate 10 greater than the area of the orthographic projection of the second spacer PS-2 on the substrate 10.

[0172] Exemplarily, as Figure 3 、 Figure 4e 、 Figure 4f and Figure 4g shown, the sub-pixels corresponding to the second spacer PS-2 can include a first color sub-pixel spx1 and a second color sub-pixel spx2; wherein, between adjacent second spacers PS-2 along the column direction (i.e., the first direction F1), there is an anode YG1 of a first color sub-pixel spx1 and an anode YG2 of a second color sub-pixel spx2. This can make adjacent second spacers PS-2 along the column direction (i.e., the first direction F1) be spaced apart by an anode YG1 of a first color sub-pixel spx1 and an anode YG2 of a second color sub-pixel spx2.

[0173] Exemplarily, as Figure 3 、 Figure 4e 、 Figure 4f and Figure 4g shown, the sub-pixels corresponding to the first spacer PS-1 include a third color sub-pixel spx3; wherein, between adjacent first spacers PS-1 along the column direction (i.e., the first direction F1), there is an anode YG3 of a third color sub-pixel spx3. This can make adjacent first spacers PS-1 along the column direction (i.e., the first direction F1) be spaced apart by an anode YG3 of a third color sub-pixel spx3.

[0174] Exemplarily, asFigure 3 , Figure 4e , Figure 4f and Figure 4g As shown in Figure 4f and Figure 4g , the columns where the first spacer PS-1 is located and the columns where the second spacer PS-2 is located are arranged alternately in the row direction (i.e., the second direction F2); and the first spacer PS-1 and the second spacer PS-2 are arranged alternately in a straight line in the row direction (i.e., the second direction F2). In this way, the first spacer PS-1 and the second spacer PS-2 can be arranged alternately in the row direction (i.e., the second direction F2) and the column direction (i.e., the first direction F1), so as to be arranged as evenly as possible.

[0175] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, the width of the first spacer PS-1 in the row direction (i.e., the second direction F2) has a third ratio to the width of the main body of the anode in the corresponding sub-pixel in the row direction. For example, the width of the first spacer PS-1 in the row direction has a third ratio to the width of the main body ZT3 of the anode YG3 in the third color sub-pixel spx3 in the row direction (i.e., the second direction F2).

[0176] And the width of the second spacer PS-2 in the row direction (i.e., the second direction F2) has a fourth ratio to the width of the main body of the anode in a sub-pixel between two adjacent second spacers PS-2 in the column direction in the row direction. For example, the width of the second spacer PS-2 in the row direction (i.e., the second direction F2) has a fourth ratio to the width of the main body ZT1 of the anode YG1 in the first color sub-pixel spx1 in the row direction (i.e., the second direction F2), or the width of the second spacer PS-2 in the row direction has a fourth ratio to the width of the main body ZT2 of the anode YG2 in the second color sub-pixel spx2 in the row direction (i.e., the second direction F2). Exemplarily, the third ratio can be made greater than the fourth ratio. Wherein, the third ratio can be the value obtained by dividing the width of the first spacer PS-1 in the row direction by the width of the main body of the anode in the corresponding sub-pixel in the row direction. The fourth ratio can be the value obtained by dividing the width of the second spacer PS-2 in the row direction by the width of the main body of the anode in the corresponding sub-pixel in the row direction.

[0177] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, the support layer 100 may further include a plurality of third spacers PS-3 spaced apart from the first spacer PS-1 and the second spacer PS-2; the area of the third spacer PS-3 is different from the area of the first spacer PS-1; and the positive projection of the third spacer PS-3 in the column direction (i.e., the first direction F1) does not overlap with the positive projections of the first spacer PS-1 and the second spacer PS-2 in the column direction (i.e., the first direction F1).

[0178] Exemplarily, as Figure 3 、 Figure 4e 、 Figure 4f and Figure 4g shown, the second spacer PS-2 and the third spacer PS-3 are alternately arranged in a column, and a main body portion of one sub-pixel is provided between adjacent second spacers PS-2 and third spacers PS-3. Exemplarily, in the column direction, one third spacer PS-3 has two adjacent second spacers PS-2, and one of the two second spacers PS-2 is located above the third spacer PS-3, and the other second spacer PS-2 is located below the third spacer PS-3. And, a main body portion ZT1 of a first color sub-pixel spx1 is provided between the third spacer PS-3 and the second spacer PS-2 located above it, and a main body portion ZT2 of a second color sub-pixel spx2 is provided between the third spacer PS-3 and the second spacer PS-2 located below it.

[0179] Exemplarily, as Figure 3 、 Figure 4e 、 Figure 4f and Figure 4g shown, there is a fifth ratio between the area of the third spacer PS-3 and the area of the second spacer PS-2, and the fifth ratio may be 0.8 to 1.2. Exemplarily, the fifth ratio may also be 0.9 to 1.1. For example, the fifth ratio may be 0.8. The fifth ratio may also be 0.9. The fifth ratio may also be 1.0. The fifth ratio may also be 1.1. The fifth ratio may also be 1.2. Of course, in practical applications, it can be designed and determined according to the actual application requirements, and is not limited here.

[0180] Exemplarily, as Figure 3 、 Figure 4e 、 Figure 4f and Figure 4g shown, the positive projection of the third spacer PS-3 on the substrate 10 and the positive projection of the via portion GB1 in the first color sub-pixel spx1 on the substrate 10 have at least an overlapping area. Exemplarily, the positive projection of the third spacer PS-3 on the substrate 10 may cover the positive projection of the via portion GB1 in the first color sub-pixel spx1 on the substrate 10.

[0181] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, there is a sixth ratio between the width of the third spacer PS-3 in the column direction and the width of the opening of the first color sub-pixel spx1 in the column direction. That is, the sixth ratio can be the value obtained by dividing the width of the third spacer PS-3 in the column direction by the width of the opening of the first color sub-pixel spx1 in the column direction. Exemplarily, the sixth ratio can be 0.4 to 0.8. Exemplarily, the sixth ratio can also be 0.5 to 0.7. For example, the sixth ratio can be 0.4. The sixth ratio can also be 0.5. The sixth ratio can also be 0.6. The sixth ratio can also be 0.7. The sixth ratio can also be 0.8. Of course, in practical applications, it can be designed and determined according to the actual application requirements, and is not limited here.

[0182] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, there is a seventh ratio between the width of the second spacer PS-2 in the column direction and the width of the opening in the second color sub-pixel spx2 in the column direction. That is, the seventh ratio can be the value obtained by dividing the width of the second spacer PS-2 in the column direction by the width of the opening in the second color sub-pixel spx2 in the column direction. Exemplarily, the seventh ratio can be 0.4 to 0.8. For example, the seventh ratio can be 0.5 to 0.7. Exemplarily, the seventh ratio can be 0.4. The seventh ratio can also be 0.5. The seventh ratio can also be 0.6. The seventh ratio can also be 0.7. The seventh ratio can also be 0.8. Of course, in practical applications, it can be designed and determined according to the actual application requirements, and is not limited here.

[0183] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, in the column direction, there is a first spacing HW1 between the first spacer PS-1 and the opening KK3 of the adjacent third color sub-pixel spx3. In the column direction, there is a second spacing HW2 between the second spacer PS-2 and the opening KK2 of the nearest second color sub-pixel spx2, and there is a third spacing HW3 between the second spacer PS-2 and the opening KK1 of the nearest first color sub-pixel spx1. In the column direction, there is a fourth spacing HW4 between the third spacer PS-3 and the opening KK2 of the nearest second color sub-pixel spx2, and there is a fifth spacing HW5 between the third spacer PS-3 and the opening KK1 of the nearest first color sub-pixel spx1; wherein, the second spacing HW2, the third spacing HW3, the fourth spacing HW4, and the fifth spacing HW5 are all smaller than the first spacing HW1.

[0184] Exemplarily, the ratio between the second spacing HW2 and the third spacing HW3 can be made to be 0.8 to 1.2. Exemplarily, the ratio between the second spacing HW2 and the third spacing HW3 can also be made to be 0.9 to 1.1. For example, the ratio between the second spacing HW2 and the third spacing HW3 can be made to be 0.8. The ratio between the second spacing HW2 and the third spacing HW3 can also be made to be 0.9. The ratio between the second spacing HW2 and the third spacing HW3 can also be made to be 1.0. The ratio between the second spacing HW2 and the third spacing HW3 can also be made to be 1.1. The ratio between the second spacing HW2 and the third spacing HW3 can also be made to be 1.2. Of course, in practical applications, it can be designed and determined according to the requirements of the actual application, and no limitation is made here.

[0185] Exemplarily, the ratio between the fourth spacing HW4 and the fifth spacing HW5 can be made to be 0.8 to 1.2. Exemplarily, the ratio between the fourth spacing HW4 and the fifth spacing HW5 can also be made to be 0.9 to 1.1. For example, the ratio between the fourth spacing HW4 and the fifth spacing HW5 can be made to be 0.8. The ratio between the fourth spacing HW4 and the fifth spacing HW5 can also be made to be 0.9. The ratio between the fourth spacing HW4 and the fifth spacing HW5 can also be made to be 1.0. The ratio between the fourth spacing HW4 and the fifth spacing HW5 can also be made to be 1.1. The ratio between the fourth spacing HW4 and the fifth spacing HW5 can also be made to be 1.2. Of course, in practical applications, it can be designed and determined according to the requirements of the actual application, and no limitation is made here.

[0186] Exemplarily, such as Figure 3 、 Figure 4e 、 Figure 4f and Figure 4gAs shown, in the first color sub-pixel spx1, the distance HR1 in the row direction between the boundary of the orthographic projection of the opening KK1 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate 10 is 1.5 to 3.0 μm. Exemplarily, in the first color sub-pixel spx1, the distance HR1 in the row direction between the boundary of the orthographic projection of the opening KK1 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate 10 is 1.6 to 2.9 μm. For example, in the first color sub-pixel spx1, the distance HR1 in the row direction between the boundary of the orthographic projection of the opening KK1 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate 10 can be 1.5 μm. In the first color sub-pixel spx1, the distance HR1 in the row direction between the boundary of the orthographic projection of the opening KK1 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate 10 can also be 1.6 μm. In the first color sub-pixel spx1, the distance HR1 in the row direction between the boundary of the orthographic projection of the opening KK1 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate 10 can also be 1.9 μm. In the first color sub-pixel spx1, the distance HR1 in the row direction between the boundary of the orthographic projection of the opening KK1 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate 10 can also be 2.0 μm. In the first color sub-pixel spx1, the distance HR1 in the row direction between the boundary of the orthographic projection of the opening KK1 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate 10 can also be 2.9 μm. In the first color sub-pixel spx1, the distance HR1 in the row direction between the boundary of the orthographic projection of the opening KK1 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate 10 can also be 3.0 μm. Of course, in practical applications, it can be designed and determined according to the requirements of practical applications, and no limitation is made here.

[0187] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, in the first color sub-pixel spx1, the distance HR2 in the column direction between the boundary of the projection of the opening KK1 on the substrate substrate 10 and the nearest neighbor boundary of the projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate substrate 10 can be 1.5 to 3.0 μm. Exemplarily, in the first color sub-pixel spx1, the distance HR2 in the column direction between the boundary of the projection of the opening KK1 on the substrate substrate 10 and the nearest neighbor boundary of the projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate substrate 10 can also be 1.6 to 2.9 μm. For example, in the first color sub-pixel spx1, the distance HR2 in the column direction between the boundary of the projection of the opening KK1 on the substrate substrate 10 and the nearest neighbor boundary of the projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate substrate 10 can also be 1.5 μm. In the first color sub-pixel spx1, the distance HR2 in the column direction between the boundary of the projection of the opening KK1 on the substrate substrate 10 and the nearest neighbor boundary of the projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate substrate 10 can also be 1.6 μm. In the first color sub-pixel spx1, the distance HR2 in the column direction between the boundary of the projection of the opening KK1 on the substrate substrate 10 and the nearest neighbor boundary of the projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate substrate 10 can also be 1.9 μm. In the first color sub-pixel spx1, the distance HR2 in the column direction between the boundary of the projection of the opening KK1 on the substrate substrate 10 and the nearest neighbor boundary of the projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate substrate 10 can also be 2.0 μm. In the first color sub-pixel spx1, the distance HR2 in the column direction between the boundary of the projection of the opening KK1 on the substrate substrate 10 and the nearest neighbor boundary of the projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate substrate 10 can also be 2.9 μm. In the first color sub-pixel spx1, the distance HR2 in the column direction between the boundary of the projection of the opening KK1 on the substrate substrate 10 and the nearest neighbor boundary of the projection of the main body ZT1 in the first color sub-pixel spx1 on the substrate substrate 10 can also be 3.0 μm. Of course, in practical applications, it can be designed and determined according to the actual application requirements, and no limitation is made here.

[0188] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, in the second color sub-pixel spx2, the distance HR3 in the row direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can be 1.5 to 3.0 μm. Exemplarily, in the second color sub-pixel spx2, the distance HR3 in the row direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 1.6 to 2.9 μm. For example, in the second color sub-pixel spx2, the distance HR3 in the row direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 1.5 μm. In the second color sub-pixel spx2, the distance HR3 in the row direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 1.6 μm. In the second color sub-pixel spx2, the distance HR3 in the row direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 1.9 μm. In the second color sub-pixel spx2, the distance HR3 in the row direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 2.0 μm. In the second color sub-pixel spx2, the distance HR3 in the row direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 2.9 μm. In the second color sub-pixel spx2, the distance HR3 in the row direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 3.0 μm. Of course, in practical applications, it can be designed and determined according to the requirements of practical applications, and no limitation is made here.

[0189] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, in the second color sub-pixel spx2, the distance HR4 in the column direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can be 1.5 to 3.0 μm. Exemplarily, in the second color sub-pixel spx2, the distance HR4 in the column direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 1.6 to 2.9 μm. For example, in the second color sub-pixel spx2, the distance HR4 in the column direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 1.5 μm. In the second color sub-pixel spx2, the distance HR4 in the column direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 1.6 μm. In the second color sub-pixel spx2, the distance HR4 in the column direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 1.9 μm. In the second color sub-pixel spx2, the distance HR4 in the column direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 2.0 μm. In the second color sub-pixel spx2, the distance HR4 in the column direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 2.9 μm. In the second color sub-pixel spx2, the distance HR4 in the column direction between the boundary of the orthographic projection of the opening KK2 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT2 in the second color sub-pixel spx2 on the substrate 10 can also be 3.0 μm. Of course, in actual applications, it can be designed and determined according to the requirements of actual applications, and no limitation is made here.

[0190] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, in the third color sub-pixel spx3, the distance HR5 in the row direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can be 1.5 to 3.0 μm. Exemplarily, in the third color sub-pixel spx3, the distance HR5 in the row direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 1.6 to 2.9 μm. For example, in the third color sub-pixel spx3, the distance HR5 in the row direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 1.5 μm. In the third color sub-pixel spx3, the distance HR5 in the row direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 1.6 μm. In the third color sub-pixel spx3, the distance HR5 in the row direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 1.9 μm. In the third color sub-pixel spx3, the distance HR5 in the row direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 2.0 μm. In the third color sub-pixel spx3, the distance HR5 in the row direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 2.9 μm. In the third color sub-pixel spx3, the distance HR5 in the row direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 3.0 μm. Of course, in practical applications, it can be designed and determined according to the requirements of practical applications, and no limitation is made here.

[0191] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, in the third color sub-pixel spx3, the distance HR6 in the column direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can be 1.5 to 3.0 μm. Exemplarily, in the third color sub-pixel spx3, the distance HR6 in the column direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 1.6 to 2.9 μm. For example, in the third color sub-pixel spx3, the distance HR6 in the column direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 1.5 μm. In the third color sub-pixel spx3, the distance HR6 in the column direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 1.6 μm. In the third color sub-pixel spx3, the distance HR6 in the column direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 1.9 μm. In the third color sub-pixel spx3, the distance HR6 in the column direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 2.0 μm. In the third color sub-pixel spx3, the distance HR6 in the column direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 2.9 μm. In the third color sub-pixel spx3, the distance HR6 in the column direction between the boundary of the orthographic projection of the opening KK3 on the substrate 10 and the nearest neighbor boundary of the orthographic projection of the main body ZT3 in the third color sub-pixel spx3 on the substrate 10 can also be 3.0 μm. Of course, in actual applications, it can be determined according to the requirements of actual applications, and no limitation is made here.

[0192] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, in the same repeating unit, the anodes YG1 in the first color sub-pixel spx1 and the anodes YG2 in the second color sub-pixel spx2 are arranged along the column direction. Also, in the same repeating unit, the distance HK1 in the column direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK2 in the second color sub-pixel spx2 can be 15 to 20 μm. Exemplarily, in the same repeating unit, the distance HK1 in the column direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK2 in the second color sub-pixel spx2 can also be 16 to 19 μm. For example, in the same repeating unit, the distance HK1 in the column direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK2 in the second color sub-pixel spx2 can be 15 μm. In the same repeating unit, the distance HK1 in the column direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK2 in the second color sub-pixel spx2 can also be 16 μm. In the same repeating unit, the distance HK1 in the column direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK2 in the second color sub-pixel spx2 can also be 18 μm. In the same repeating unit, the distance HK1 in the column direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK2 in the second color sub-pixel spx2 can also be 19 μm. In the same repeating unit, the distance HK1 in the column direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK2 in the second color sub-pixel spx2 can also be 20 μm. Of course, in practical applications, it can be designed and determined according to the requirements of practical applications, and no limitation is made here.

[0193] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4gAs shown, in the same repeating unit, the distance HK2 in the second direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK3 in the third color sub-pixel spx3 can be 15 to 20 μm. Exemplarily, in the same repeating unit, the distance HK2 in the second direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK3 in the third color sub-pixel spx3 can also be 16 to 19 μm. For example, in the same repeating unit, the distance HK2 in the second direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK3 in the third color sub-pixel spx3 can be 15 μm. In the same repeating unit, the distance HK2 in the second direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK3 in the third color sub-pixel spx3 can also be 16 μm. In the same repeating unit, the distance HK2 in the second direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK3 in the third color sub-pixel spx3 can also be 18 μm. In the same repeating unit, the distance HK2 in the second direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK3 in the third color sub-pixel spx3 can also be 19 μm. In the same repeating unit, the distance HK2 in the second direction between the opening KK1 in the first color sub-pixel spx1 and the opening KK3 in the third color sub-pixel spx3 can also be 20 μm. Of course, in practical applications, it can be designed and determined according to the requirements of practical applications, and is not limited herein.

[0194] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, the positive projection of the second spacer PS-2 and the third spacer PS-3 arranged in the column direction in the row direction covers the positive projection of the first recess AX1 in the row direction.

[0195] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, the positive projection of the third spacer PS-3 in the column direction and the positive projection of the via portion GB2 in the second color sub-pixel spx2 in the column direction have an overlapping area. Exemplarily, the positive projection of the third spacer PS-3 in the column direction covers the positive projection of the via portion GB2 in the second color sub-pixel spx2 in the column direction.

[0196] Exemplarily, as Figure 3 , Figure 4e , Figure 4f and Figure 4g shown, the positive projection of the third spacer PS-3 in the column direction is located within the positive projection of the second recess AX2 in the column direction.

[0197] Exemplarily, as Figure 3 , [[ID=28 , ​ and ​ shown, in the row direction, the third spacer PS-3, the via hole GB1 in the first color sub-pixel spx1, the via hole GB2 in the second color sub-pixel spx2, and the via hole GB3 in the third color sub-pixel spx3 are arranged on the same straight line.

[0198] It should be noted that the formation of the above-mentioned vias and through holes can be circular, square, octagonal, etc., which can be designed according to the actual application requirements and are not limited herein.

[0199] In some examples, as ​ shown, it is also possible to make the first color sub-pixel spx1 a green sub-pixel and the second color sub-pixel spx2 a blue sub-pixel. At this time, the first direction F1 can be the row direction of the sub-pixels, and the second direction F2 can be the column direction of the sub-pixels. The repeating unit includes a green sub-pixel and a blue sub-pixel arranged in sequence along the first direction F1. And the repeating unit can also include a red sub-pixel; wherein, the red sub-pixel and the green sub-pixel are arranged along the second direction F2. Among them, the positive projection of the anode in the blue sub-pixel on the substrate 10 faces the side of the positive projection of the anode in the green sub-pixel on the substrate 10 and has a first recess AX1.

[0200] In some examples, when the first color sub-pixel spx1 is a green sub-pixel and the second color sub-pixel spx2 is a blue sub-pixel, as ​ shown, in the same repeating unit, the positive projection of the first via hole GK1 in the green sub-pixel on the substrate 10 is located between the positive projections of the anode in the green sub-pixel and the anode in the blue sub-pixel on the substrate 10.

[0201] In some examples, when the first color sub-pixel spx1 is a green sub-pixel and the second color sub-pixel spx2 is a blue sub-pixel, as ​ shown, in the same repeating unit, the positive projection of the first recess AX1 of the anode in the blue sub-pixel in the second direction F2 and the positive projection of the first via hole GK1 in the green sub-pixel in the second direction F2 have at least an overlapping area.

[0202] In some examples, when the first color sub-pixel spx1 is a green sub-pixel and the second color sub-pixel spx2 is a blue sub-pixel, as ​ shown, in the same repeating unit, the positive projection of the first recess AX1 of the anode in the blue sub-pixel in the second direction F2 covers the positive projection of the first via hole GK1 in the green sub-pixel in the second direction F2.

[0203] In some examples, when the first color sub-pixel spx1 is a green sub-pixel and the second color sub-pixel spx2 is a blue sub-pixel, as ​ shown, the main body portion in the blue sub-pixel has a first recess AX1, and in the same repeating unit, the positive projection of the first recess AX1 in the second direction F2 covers the positive projection of the via portion in the green sub-pixel in the second direction F2.

[0204] In some examples, when the first color sub-pixel spx1 is a green sub-pixel and the second color sub-pixel spx2 is a blue sub-pixel, as ​ shown, the edge of the positive projection of the first recess AX1 on the substrate 10 is substantially parallel to the edge of the positive projection of the via portion in the green sub-pixel on the substrate 10. It should be noted that in the actual process, due to process conditions or other factors such as wiring or via settings, as long as the above parallel relationship substantially meets the above conditions, it belongs to the protection scope of the present invention.

[0205] In some examples, when the first color sub-pixel spx1 is a green sub-pixel and the second color sub-pixel spx2 is a blue sub-pixel, as ​ shown, the first distance between the edge of the positive projection of the first recess AX1 on the substrate 10 and the edge of the positive projection of the via portion in the green sub-pixel on the substrate 10 is not less than 2.5 μm. Further, the first distance can be 2.5 - 20 μm. For example, the first distance can be 2.5 μm. Or, the first distance can also be 3.5 μm. Or, the first distance can also be 20 μm, which is not limited herein.

[0206] It should be noted that when the first color sub-pixel spx1 is a green sub-pixel and the second color sub-pixel spx2 is a blue sub-pixel, the setting method of the red sub-pixel in the repeating unit can refer to the above setting method of the red sub-pixel, which will not be elaborated herein.

[0207] Exemplarily, the support layer can be integrally formed with the pixel defining layer. For example, openings, first spacers, second spacers, and third spacers are prepared in the same mask process. Of course, in actual applications, it can also be determined according to the actual application requirements, which is not limited herein.

[0208] It should be noted that the positive projection in the first direction (e.g., column direction) in this application refers to the line projection on the straight line in the first direction (e.g., column direction). The positive projection in the second direction (e.g., row direction) in this application refers to the line projection on the straight line in the second direction (e.g., row direction).

[0209] Based on the same inventive concept, embodiments of the present disclosure further provide a display device, including the above-mentioned display panel provided by the embodiments of the present disclosure. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television set, a monitor, a laptop computer, a digital photo frame, a navigator, etc. Other essential components of the display device are understood to be possessed by those of ordinary skill in the art, and will not be elaborated herein, nor should they be regarded as a limitation to the present disclosure. The implementation of the display device may refer to the embodiments of the above-mentioned display panel, and the repeated parts will not be elaborated.

[0210] Although the preferred embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications once they learn the basic creative concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications falling within the scope of the present invention.

[0211] Obviously, those skilled in the art can make various changes and modifications to the embodiments of the present invention without departing from the spirit and scope of the embodiments of the present invention. Thus, if these modifications and variations of the embodiments of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these changes and modifications.

Claims

1. A display panel, wherein, include: A substrate substrate, comprising a plurality of sub-pixels; A first electrode layer, located on the base substrate, the first electrode layer comprising an anode located in each of the sub-pixels; the anode comprising a main body portion and a via portion electrically connected to each other; A pixel defining layer is located on a side of the first electrode layer away from the base substrate; the pixel defining layer includes an opening located in each of the sub-pixels, and in the same sub-pixel, the orthographic projection of the opening on the base substrate is located within the orthographic projection of the main body on the base substrate; A supporting layer, located on a side of the pixel defining layer away from the base substrate; Wherein, the support layer includes multiple columns of first spacers and multiple columns of second spacers; the first spacers and the second spacers are located in different columns; one column of first spacers corresponds to one column of sub-pixels, and one column of second spacers corresponds to another column of sub-pixels; and the number of sub-pixels in the column where the first spacers are located is different from the number of sub-pixels in the column where the second spacers are located; The anode of at least one sub-pixel in the sub-pixels corresponding to the first spacer extends along the first direction, and the first spacer and the second spacer extend along the second direction respectively; With respect to the first spacers and the corresponding sub-pixels, the first spacers and the sub-pixels are alternately and repeatedly arranged along the column direction and correspond one to one; The orthographic projection of the first spacer in the column direction does not overlap with the orthographic projection of the anode in each sub-pixel in the column direction; There is a first ratio between the area of ​​the first spacer and the area of ​​the opening of the corresponding sub-pixel, and there is a second ratio between the area of ​​the second spacer and the sum of the areas of the openings of all sub-pixels between two second spacers adjacent to each other in the column direction, and the first ratio is different from the second ratio; wherein the area ratio of the adjacent first spacers along the column direction is 0.8~1.

2.

2. The display panel according to claim 1, wherein, The first ratio is greater than the second ratio.

3. The display panel according to claim 2, wherein, There is a first spacing distance between adjacent first spacers along the column direction, and there is a second spacing distance between adjacent second spacers along the column direction, and the second spacing distance is greater than the first spacing distance.

4. The display panel according to claim 3, wherein, The width of the first spacer in the column direction is greater than the width of the second spacer in the column direction; The width of the first spacer in the row direction is not less than the width of the second spacer in the row direction.

5. The display panel according to any one of claims 1-4, wherein, The sub-pixels corresponding to the second spacers include a first color sub-pixel and a second color sub-pixel; wherein an anode of the first color sub-pixel and an anode of the second color sub-pixel are arranged between the second spacers adjacent to each other along the column direction; The sub-pixels corresponding to the first spacers include third color sub-pixels; wherein an anode of the third color sub-pixel is disposed between adjacent first spacers along the column direction.

6. The display panel according to claim 5, wherein, The column where the first spacers are located and the column where the second spacers are located are alternately arranged along the row direction; The first spacers and the second spacers are alternately arranged on a straight line along the row direction.

7. The display panel according to claim 6, wherein, The width of the first spacer in the row direction and the width of the main body of the anode in the corresponding sub-pixel in the row direction have a third ratio; The width of the second spacer in the row direction has a fourth ratio to the width of the main body of the anode in one sub-pixel between two adjacent second spacers in the column direction in the row direction; The third ratio is greater than the fourth ratio.

8. The display panel according to claim 6, wherein, The support layer further includes a plurality of third spacers spaced apart from the first spacer and the second spacer; the area of the third spacer is different from the area of the first spacer; The orthographic projection of the third spacer in the column direction does not overlap with the orthographic projections of the first spacer and the second spacer in the column direction.

9. The display panel according to claim 8, wherein, The second spacers and the third spacers are alternately arranged in a column, and the main body of the anode of one of the first color sub-pixels or the second color sub-pixels is provided between adjacent second spacers and third spacers.

10. The display panel according to claim 8, wherein There is a fifth ratio between the area of the third spacer and the area of the second spacer, and the fifth ratio is 0.8 to 1.

2.

11. The display panel according to claim 10, wherein, The orthographic projection of the third spacer on the substrate has at least an overlapping area with the orthographic projection of the via portion in the first color sub-pixel on the substrate.

12. The display panel according to claim 11, wherein, There is a sixth ratio between the width of the third spacer in the column direction and the width of the opening in the first color sub-pixel in the column direction, and the sixth ratio is 0.4 to 0.8; There is a seventh ratio between the width of the second spacer in the column direction and the width of the opening in the second color sub-pixel in the column direction, and the seventh ratio is 0.4 to 0.

8.

13. The display panel according to claim 12, wherein In the column direction, there is a first distance between the first spacer and the opening of the adjacent third color sub-pixel; In the column direction, there is a second distance between the second spacer and the opening of the nearest second color sub-pixel, and there is a third distance between the second spacer and the opening of the nearest first color sub-pixel; In the column direction, there is a fourth distance between the third spacer and the opening of the nearest second color sub-pixel, and there is a fifth distance between the third spacer and the opening of the nearest first color sub-pixel; The second distance, the third distance, the fourth distance, and the fifth distance are all smaller than the first distance.

14. The display panel according to claim 13, wherein, The ratio between the second distance and the third distance is 0.8 to 1.2; The ratio between the fourth distance and the fifth distance is 0.8 to 1.

2.

15. The display panel according to claim 14, wherein, In the first color sub-pixel, the distance in the row direction between the boundary of the orthographic projection of the opening on the substrate and the nearest neighbor boundary of the main body portion in the orthographic projection of the first color sub-pixel on the substrate is 1.5 to 3.0 μm; and / or In the first color sub-pixel, the distance in the column direction between the boundary of the orthographic projection of the opening on the substrate and the nearest neighbor boundary of the main body portion in the orthographic projection of the first color sub-pixel on the substrate is 1.5 to 3.0 μm.

16. The display panel according to claim 15, wherein, In the second color sub-pixel, the distance in the row direction between the boundary of the projection of the opening on the substrate substrate and the nearest neighbor boundary of the projection of the main body portion in the second color sub-pixel on the substrate substrate is 1.5 to 3.0 μm; and / or, In the second color sub-pixel, the distance in the column direction between the boundary of the projection of the opening on the substrate substrate and the nearest neighbor boundary of the projection of the main body portion in the second color sub-pixel on the substrate substrate is 1.5 to 3.0 μm.

17. The display panel according to claim 16, wherein, In the third color sub-pixel, the distance in the row direction between the boundary of the projection of the opening on the substrate substrate and the nearest neighbor boundary of the projection of the main body portion in the third color sub-pixel on the substrate substrate is 1.5 to 3.0 μm; and / or, In the third color sub-pixel, the distance in the column direction between the boundary of the projection of the opening on the substrate substrate and the nearest neighbor boundary of the projection of the main body portion in the third color sub-pixel on the substrate substrate is 1.5 to 3.0 μm.

18. The display panel according to claim 17, wherein, The display panel includes a plurality of repeating units, and the repeating unit includes the first color sub-pixel, the second color sub-pixel, and the third color sub-pixel; and in the same repeating unit, the anodes in the first color sub-pixel and the anodes in the second color sub-pixel are arranged along the column direction; In the same repeating unit, the distance in the first direction between the opening in the first color sub-pixel and the opening in the second color sub-pixel is 15 to 20 μm.

19. The display panel according to claim 18, wherein, In the same repeating unit, the connection lines between the anodes in the first color sub-pixel, the second color sub-pixel, and the third color sub-pixel form a triangle; In the same repeating unit, the distance in the second direction between the opening in the first color sub-pixel and the opening in the third color sub-pixel is 15 to 20 μm.

20. The display panel according to claim 19, wherein, One side of the anode in the second color sub-pixel has a first recess on the side of the projection of the anode in the first color sub-pixel on the substrate substrate facing the projection of the anode in the first color sub-pixel on the substrate substrate; and the first recess is arranged toward the center of the main body portion of the second color sub-pixel; The projections of the second spacer and the third spacer arranged along the column direction in the row direction cover the projection of the first recess in the row direction.

21. The display panel according to claim 20, wherein, The projection of the third spacer in the column direction and the projection of the via portion in the second color sub-pixel in the column direction have an overlapping area.

22. The display panel according to claim 21, wherein, The main body portion in the third color sub-pixel has a second recess on the side of the projection of the via portion in the second color sub-pixel on the substrate substrate facing the projection of the via portion in the second color sub-pixel on the substrate substrate; The projection of the third spacer in the column direction is located within the projection of the second recess in the column direction.

23. The display panel according to claim 22, wherein, In the row direction, the third spacer, the via portion in the first color sub-pixel, the via portion in the second color sub-pixel, and the via portion in the third color sub-pixel are arranged on the same straight line.

24. A display device, wherein, Including the display panel according to any one of claims 1-23.

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