Fuse correction judging circuit, method and e-fuse read / write circuit

Abstract

The application discloses a Fuse correction judgment circuit, a method and an E-Fuse read-write circuit. The circuit comprises a current source unit, a Fuse unit and a signal output unit. The current source unit comprises a first current source for providing a first current and a second current source for providing a second current. The Fuse unit comprises a first Fuse for correction and a second Fuse with a fixed resistance. The current source unit comprises a first MOS tube electrically connected between the first current source and the first Fuse and a second MOS tube electrically connected between the second current source and the second Fuse. The first MOS tube and the second MOS tube are connected in common gate. The signal output unit is used for outputting a correction signal according to the voltage of a node between the second current source and the second MOS tube. The application can provide more adjustment space compared with direct comparison with the Fuse through the high-gain current mirror and the Fuse resistance. The gain is improved to reduce the possibility of misjudgment, reduce the sensitivity to the power supply or noise, and greatly improve the success rate of read-write judgment.

Description

Technical Field

[0001] This invention belongs to the field of chip design technology, specifically relating to a fuse correction judgment circuit, method, and E-Fuse read / write circuit. Background Technology

[0002] Trimming is one of the methods for adjusting output results in chip design. Its application is not limited to adjusting voltage or current, but can also be used to adjust various chip functions or distinguish different versions of chips. Because the actual process, voltage, and temperature cause changes in the chip design results, especially in analog circuit design, the manufactured chip often differs from the simulation results due to the above reasons. Therefore, an adjustment circuit or device is needed to correct the deviation results to an acceptable range. This invention is aimed at E-Fuse (one-time programmable memory).

[0003] E-Fuse, as the core device for adjusting output results, is characterized by its convenience and ease of use. Adjustment is determined by whether the fuse itself is burned out or whether its resistance is open or short-circuited. The read / write circuit transmits the results to other circuits, which then use the values ​​to determine whether to adjust circuit values ​​or functions. However, a major drawback is its single-use nature and susceptibility to accidental burning or failure. If the fuse cannot be fully assessed by the read / write circuit, it can cause overall chip specification errors or functional failures, and in severe cases, even chip burnout. Therefore, the practical application of the read / write circuit is crucial, as it plays a vital role in the success of trimming. Existing technologies mostly rely on basic comparison principles, whether comparing voltage or current, primarily comparing the open or short circuit of the fuse resistance to determine successful trimming. Because the method is so basic and simple, there are theoretically feasible but practical discrepancies, often resulting in unsatisfactory results. In short, incomplete trimming can lead to unsatisfactory read / write results due to insufficient gain or sensitivity of the read / write circuit. Of course, the fuse itself may have some undesirable characteristics, but these are not within the scope of this invention. This invention focuses on improving the characteristics of the read / write circuit.

[0004] Therefore, to address the aforementioned technical problems, it is necessary to provide a Fuse correction judgment circuit, a method, and an E-Fuse read / write circuit. Summary of the Invention

[0005] In view of this, the purpose of the present invention is to provide a Fuse correction judgment circuit, method and E-Fuse read / write circuit to improve the success rate of read / write judgment.

[0006] To achieve the above objectives, an embodiment of the present invention provides the following technical solution:

[0007] A Fuse correction and judgment circuit, the circuit comprising:

[0008] The current source unit includes a first current source for providing a first current and a second current source for providing a second current;

[0009] The Fuse unit includes a first Fuse for correction and a second Fuse with a fixed resistance value;

[0010] The current source unit includes a first MOS transistor electrically connected between a first current source and a first fuse, and a second MOS transistor electrically connected between a second current source and a second fuse, wherein the first MOS transistor and the second MOS transistor are connected in a common gate configuration.

[0011] The signal output unit is used to output a correction signal based on the voltage at the node between the second current source and the second MOS transistor.

[0012] In one embodiment, the first terminal of the first current source and the first terminal of the second current source are respectively connected to the power supply voltage;

[0013] The gate of the first MOSFET is connected to the gate of the second MOSFET, and the gate of the first MOSFET is connected to the drain. The drain of the first MOSFET is connected to the second terminal of the first current source, and the drain of the second MOSFET is connected to the second terminal of the second current source. The source of the first MOSFET is connected to the first terminal of the first fuse, and the source of the second MOSFET is connected to the first terminal of the second fuse.

[0014] The second end of the first fuse and the second end of the second fuse are respectively connected to ground potential.

[0015] In one embodiment, both the first MOS transistor and the second MOS transistor are NMOS transistors.

[0016] In one embodiment, the gain of the current mirror unit is greater than 1.

[0017] In one embodiment, the signal output unit includes an inverter, the input of which is connected to the node between the second current source and the second MOS transistor, and the output is used to output a correction signal.

[0018] In one embodiment, in the first state, RFuse < RFuse_th, the voltage at the input terminal of the inverter is greater than the voltage threshold of the inverter, and the inverter outputs a first signal to determine that Fuse has not been corrected. The first signal is a low-level signal.

[0019] In the second state, when RFuse > RFuse_th, the voltage at the input terminal of the inverter is less than the voltage threshold of the inverter, and the inverter outputs a second signal to determine that Fuse has been corrected. The second signal is a high-level signal.

[0020] Wherein, RFuse is the resistance value of the first Fuse, and RFuse_th is the judgment threshold of the first Fuse.

[0021] In one embodiment, the judgment threshold of the first Fuse is RFuse_th = I2 / I1*RFuseD, where I1 and I2 are the magnitudes of the first current and the second current, respectively, and RFuseD is the resistance value of the second Fuse.

[0022] Another embodiment of the present invention provides the following technical solution:

[0023] A method for determining Fuse correction, the method comprising:

[0024] The first current source and the second current source provide the first current and the second current, respectively;

[0025] The output voltage is obtained through a current mirror unit;

[0026] The correction signal output by the signal output unit is obtained based on the output voltage;

[0027] The correction of the Fuse is determined based on the correction signal output by the output unit.

[0028] In one embodiment, the signal output unit includes an inverter, and the determination of Fuse correction based on the correction signal output by the output unit specifically involves:

[0029] If the input voltage of the inverter is greater than the voltage threshold of the inverter, the inverter outputs the first signal. The first signal is a low-level signal. Then RFuse < RFuse_th, and it is determined that Fuse is not corrected.

[0030] If the input voltage of the inverter is less than the voltage threshold of the inverter, the inverter outputs a second signal. The second signal is a high-level signal. Then RFuse > RFuse_th, and it is determined that Fuse has been corrected.

[0031] Wherein, RFuse is the resistance value of the first Fuse, RFuse_th is the judgment threshold of the first Fuse, RFuse_th = I2 / I1*RFuseD, I1 and I2 are the magnitudes of the first current and the second current respectively, and RFuseD is the resistance value of the second Fuse.

[0032] Another embodiment of the present invention provides the following technical solution:

[0033] An E-Fuse read / write circuit, the E-Fuse read / write circuit including the aforementioned Fuse correction and judgment circuit.

[0034] The present invention has the following beneficial effects:

[0035] This invention uses a high-gain current mirror in conjunction with a fuse resistor, which provides more adjustment flexibility compared to direct comparison with the fuse. Increasing the gain reduces the possibility of false judgments and reduces sensitivity to power supply or noise, thus significantly improving the success rate of read / write judgments. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a circuit diagram of the Fuse correction and judgment circuit in a pair of ratios of the present invention;

[0038] Figure 2 This is a circuit diagram of the Fuse correction and judgment circuit in one embodiment of the present invention;

[0039] Figure 3 This is a flowchart of a Fuse correction judgment method in one embodiment of the present invention. Detailed Implementation

[0040] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0041] To facilitate understanding of the embodiments of the present invention, several elements that will be introduced in the description of the embodiments of the present invention will be introduced first.

[0042] E-Fuse: One-time programmable memory.

[0043] Fuse: A fuse used for programming in E-Fuse.

[0044] Trimming: A method of adjusting output, not limited to adjusting voltage or current, but also used to adjust various chip functions or distinguish different versions of chips.

[0045] Gain: The ratio of the output signal to the input signal.

[0046] Sensitivity: The degree of response of an object to a signal.

[0047] Current mirror: A structure that copies a current to the other side. The current can be the same, or amplified or reduced.

[0048] Parameter Figure 1 The following is the circuit diagram of the Fuse correction judgment circuit in a comparative example of the present invention, which includes:

[0049] A current source for providing a first current I1;

[0050] A Fuse, whose resistance value is RFuse, one end of which is connected to the power supply voltage V1 through the current source, and the other end is connected to the ground potential (GND);

[0051] A signal output unit, which is an inverter and is used to output a correction signal according to the voltage V2 at the node between the current source and the Fuse.

[0052] In this comparative example, when the corresponding Fuse is not corrected, it is in a state close to a short circuit. At this time, the voltage V2 will be close to 0V. Therefore, the inverter can make a correct judgment. After the Fuse is corrected, it is in a state where the resistance value increases. When the voltage V2 is higher than the comparison threshold of the inverter, the output is reversed successfully, and it can be judged as successfully corrected. However, the above assumes that the Fuse and the inverter are in an ideal state. In fact, the inverter is not ideal, and if the Fuse has a large error range or interference, the current source and the Fuse also need to be specially matched to make a judgment, so the result is prone to misjudgment.

[0053] In this comparative example, the method of using E-Fuse for Trimming can mostly solve the problem of mismatch between simulation and actual results. However, for the back-end cooperating read / write circuit, due to its insufficient gain and sensitivity, the final result is often not ideal. For example, insufficient gain causes the read / write circuit to misjudge the Trimming signal, or the circuit is sensitive to the power supply or noise, and misoperation will also occur. This comparative example may also affect the response speed, etc.

[0054] Considering the above-mentioned disadvantages, it is necessary to propose a precise, stable and easily modified Fuse correction judgment, aiming to improve the read / write success rate of the E-Fuse architecture in the case of incomplete Trimming of the resistance, so as to solve the yield problem in actual chip mass production.

[0055] Parameter Figure 2 The following is the circuit diagram of the Fuse correction judgment circuit in an embodiment of the present invention, which includes:

[0056] The current source unit includes a first current source for providing a first current I1 and a second current source for providing a second current I2;

[0057] The Fuse unit includes a first Fuse for correction and a second Fuse with a fixed resistance value;

[0058] The current source unit includes a first MOS transistor M1 electrically connected between a first current source and a first fuse, and a second MOS transistor M2 electrically connected between a second current source and a second fuse, wherein the first MOS transistor M1 and the second MOS transistor M2 are connected in a common gate configuration.

[0059] The signal output unit is used to output a correction signal based on the voltage V2 at the node between the second current source and the second MOS transistor.

[0060] Specifically, the first terminal of the first current source and the first terminal of the second current source are respectively connected to the power supply voltage V1;

[0061] The gate of the first MOSFET M1 is connected to the gate of the second MOSFET M2, and the gate of the first MOSFET M1 is connected to the drain. The drain of the first MOSFET M1 is connected to the second terminal of the first current source, the drain of the second MOSFET M2 is connected to the second terminal of the second current source, the source of the first MOSFET M1 is connected to the first terminal of the first fuse, and the source of the second MOSFET M2 is connected to the first terminal of the second fuse.

[0062] The second terminal of the first fuse and the second terminal of the second fuse are respectively connected to the ground potential.

[0063] Preferably, in this embodiment, both the first MOS transistor M1 and the second MOS transistor M2 are NMOS transistors.

[0064] In this embodiment, the signal output unit is an inverter. The input terminal of the inverter is connected to the node between the second current source and the second MOS transistor M2, and the output terminal is used to output a correction signal.

[0065] In the first state, when the Fuse correction circuit is in the Fuse < RFuse_th, the voltage at the input terminal of the inverter is greater than d, which is greater than the voltage threshold of the inverter. The inverter outputs a first signal to determine that Fuse is not corrected. The first signal is a low-level signal.

[0066] In the second state, when the Fuse correction circuit is in the Fuse > RFuse_th, the voltage at the input of the inverter is less than the voltage threshold of the inverter, and the inverter outputs a second signal to determine that Fuse has been corrected. The second signal is a high-level signal.

[0067] Wherein, RFuse is the resistance value of the first Fuse, and RFuse_th is the judgment threshold of the first Fuse.

[0068] In this embodiment, the judgment threshold of the first Fuse, RFuse_th = I2 / I1 * RFuseD, where I1 and I2 are the magnitudes of the first current and the second current respectively, and RFuseD is the resistance value of the second Fuse.

[0069] Refer Figure 3 As shown, the Fuse correction judgment method in this embodiment includes the following steps:

[0070] The first current source and the second current source respectively provide the first current I1 and the second current I2;

[0071] Obtain the output voltage through the current mirror unit;

[0072] Obtain the correction signal output by the signal output unit according to the output voltage;

[0073] Judge the Fuse correction according to the correction signal output by the output unit.

[0074] Specifically, judging the Fuse correction according to the correction signal output by the output unit is specifically:

[0075] If the input voltage of the inverter is greater than the voltage threshold of the inverter, the inverter outputs a first signal, and the first signal is a low-level signal, then RFuse < RFuse_th, and it is determined that the Fuse is not corrected;

[0076] If the input voltage of the inverter is less than the voltage threshold of the inverter, the inverter outputs a second signal, and the second signal is a high-level signal, then RFuse > RFuse_th, and it is determined that the Fuse is corrected.

[0077] Among them, RFuse is the resistance value of the first Fuse, RFuse_th is the judgment threshold of the first Fuse, RFuse_th = I2 / I1 * RFuseD, I1 and I2 are the magnitudes of the first current and the second current respectively, and RFuseD is the resistance value of the second Fuse.

[0078] Compared with the comparative example, the Fuse correction judgment circuit in this embodiment replaces the Fuse, that is, the resistor part, with a group of high-gain current mirrors (the gain of the current mirror unit is greater than 1), aiming to improve the aforementioned disadvantages of insufficient gain and sensitivity.

[0079] The Fuse correction judgment circuit in this embodiment has a set of symmetrical current mirrors. Because the NMOS is biased by the common gate voltage V3, the two sets of voltages V4 and V5 at its source are almost the same under normal operation. The expression can be I1*RFuse=V4=I2*RFuseD=V5. The RFuse Trimming judgment threshold can be expressed as RFuse_th=I2 / I1*RFuseD. After I1, I2, and RfuseD are designed with corresponding multipliers, V2 can be determined by the high-gain current mirror to be close to V1 or 0V. Therefore, the inverter can easily determine whether RFuse has been Trimmed, which greatly improves the success rate of read and write judgment.

[0080] In addition, the present invention also discloses an E-Fuse read / write circuit, which includes the aforementioned Fuse correction and judgment circuit and a back-end read / write unit.

[0081] As can be seen from the above technical solutions, the present invention has the following advantages:

[0082] This invention uses a high-gain current mirror in conjunction with a fuse resistor, which provides more adjustment flexibility compared to direct comparison with the fuse. Increasing the gain reduces the possibility of false judgments and reduces sensitivity to power supply or noise, thus significantly improving the success rate of read / write judgments.

[0083] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0084] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for determining Fuse correction based on a Fuse correction judgment circuit, characterized in that, The circuit includes: The current source unit includes a first current source for providing a first current and a second current source for providing a second current; The Fuse unit includes a first Fuse for correction and a second Fuse with a fixed resistance value; The current mirror unit includes a first MOS transistor electrically connected between a first current source and a first fuse, and a second MOS transistor electrically connected between a second current source and a second fuse, wherein the first MOS transistor and the second MOS transistor are connected in a common gate configuration. The signal output unit is used to output a correction signal based on the voltage of the node between the second current source and the second MOS transistor. The signal output unit includes an inverter, the input terminal of which is connected to the node between the second current source and the second MOS transistor, and the output terminal is used to output a correction signal. The method includes: The first current source and the second current source provide the first current and the second current, respectively; The output voltage is obtained through a current mirror unit; The correction signal output by the signal output unit is obtained based on the output voltage; The correction of the first Fuse is determined based on the correction signal output by the output unit; The signal output unit includes an inverter, and the determination of the first Fuse correction based on the correction signal output by the output unit is specifically as follows: If the input voltage of the inverter is greater than the voltage threshold of the inverter, the inverter outputs a first signal. If the first signal is a low-level signal, then RFuse < RFuse_th, and it is determined that the first Fuse has not been corrected. If the input voltage of the inverter is less than the voltage threshold of the inverter, the inverter outputs a second signal. The second signal is a high-level signal. Then RFuse > RFuse_th, and it is determined that the first Fuse has been corrected. Wherein, RFuse is the resistance value of the first Fuse, RFuse_th is the judgment threshold of the first Fuse, RFuse_th=I2 / I1*RFuseD, I1 and I2 are the magnitudes of the first current and the second current respectively, and RFuseD is the resistance value of the second Fuse.

2. The Fuse correction judgment method according to claim 1, characterized in that, The first terminal of the first current source and the first terminal of the second current source are respectively connected to the power supply voltage; The gate of the first MOSFET is connected to the gate of the second MOSFET, and the gate of the first MOSFET is connected to the drain. The drain of the first MOSFET is connected to the second terminal of the first current source, and the drain of the second MOSFET is connected to the second terminal of the second current source. The source of the first MOSFET is connected to the first terminal of the first fuse, and the source of the second MOSFET is connected to the first terminal of the second fuse. The second end of the first fuse and the second end of the second fuse are respectively connected to ground potential.

3. The Fuse correction judgment method according to claim 2, characterized in that, Both the first MOS transistor and the second MOS transistor are NMOS transistors.

4. The Fuse correction judgment method according to claim 1, characterized in that, The gain of the current mirror unit is greater than 1.

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