Display control device, control method and display device

Abstract

The present application specifically relates to a display control device, a control method and a display device, wherein the display control device comprises a first circuit board, a second circuit board and a debugging device, wherein in the pre-storage stage, the timing control chip can obtain the voltage value stored in the first storage unit and store the voltage value in the second storage unit; the gamma chip can receive the voltage value output by the timing control chip and transmit the voltage value to the display panel; the debugging device can debug the voltage to be output by the timing control chip based on the debugging instruction, adjust the voltage to be output to the target voltage corresponding to the debugging instruction, and store the target voltage in the second storage unit; in the verification stage, the timing control chip obtains the voltage value again and compares it with the voltage value stored in the second storage unit in the pre-storage stage, and when the comparison result is consistent, the gamma chip outputs the target voltage. The above scheme is used to achieve an optimized display effect.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and specifically relates to a display control device, a control method and a display device. Background Art

[0002] With the rapid development of the display industry, users are pursuing higher and higher display effects. Due to differences in panel manufacturing processes, a fixed common voltage cannot meet the needs of all display panels. Therefore, manufacturers often need to automatically debug (AutoPgamma) the common voltage (Vcom) in the circuit board and store the debugged data in the memory of the circuit board.

[0003] Each time the computer is turned on, the client's system-level chip will directly call the data stored in the circuit board memory, and the client cannot adjust the data in the circuit board memory. Due to differences in the backlights and system-level chips of different clients, different clients will have different display effects when using the circuit board. Summary of the invention

[0004] The purpose of the present application is to provide a display control device, a control method and a display device, which can improve the display effect.

[0005] A first aspect of the present application provides a display control device, comprising:

[0006] A first circuit board, wherein a first storage unit is provided on the first circuit board, and the first storage unit is capable of storing a voltage value;

[0007] a second circuit board, the second circuit board comprising a timing control chip, a second storage unit, a gamma chip and a debugging component, the timing control chip being electrically connected to the first storage unit and the second storage unit, and the timing control chip being electrically connected to the gamma chip;

[0008] In the pre-storage stage, the timing control chip can obtain the voltage value in the first storage unit, and store the obtained voltage value in the second storage unit, and the debugging component can debug the voltage to be output by the timing control chip based on the debugging instruction, adjust the voltage to be output to a target voltage corresponding to the debugging instruction, and store the target voltage in the second storage unit;

[0009] During the verification phase, the timing control chip can obtain the voltage value in the first storage unit again and compare it with the voltage value stored in the second storage unit in the pre-storage phase; when the comparison results are the same, the timing control chip inputs the target voltage to the gamma chip; when the comparison results are different, the timing control chip inputs the voltage value obtained by the timing control chip during the verification phase to the gamma chip.

[0010] In an exemplary embodiment of the present application, the timing control chip, the second storage unit, the gamma chip and the debugging component are integrated on the same system-level chip.

[0011] In an exemplary embodiment of the present application, the debugging component is a connection port of the second circuit board, and the connection port is connected to a debugging device. The connection port can receive debugging instructions transmitted by the debugging device in the pre-storage stage, and debug the voltage to be output by the timing control chip according to the debugging instructions.

[0012] In an exemplary embodiment of the present application, the timing control chip obtains the preset voltage value in the first storage unit through a serial peripheral interface.

[0013] In an exemplary embodiment of the present application, the system-level chip corresponds to the first circuit board in a one-to-one manner.

[0014] In an exemplary embodiment of the present application, the system-level chip is connected to the first circuit board through a flexible circuit board.

[0015] In an exemplary embodiment of the present application, the timing control chip is connected to a power supply for detecting a power-on signal.

[0016] A second aspect of the present application provides a control method for a display control device, comprising:

[0017] In the pre-storage stage, the voltage value stored in the first storage unit in the first circuit board is obtained, and the obtained voltage value is stored in the second storage unit in the second circuit board. In the pre-storage stage, it is also used to respond to the debugging instruction of the debugging component so that the voltage to be output is debugged to the target voltage corresponding to the debugging instruction, and the target voltage is stored in the second storage unit in the second circuit board; in the verification stage, the voltage value stored in the first circuit board is obtained again, and compared with the voltage value stored in the second storage unit in the pre-storage stage;

[0018] If the comparison results are the same, inputting the target voltage into the gamma chip;

[0019] If the comparison results are different, the voltage value obtained during the verification phase is input into the gamma chip.

[0020] In another exemplary embodiment of the present application, during the verification phase, comparing the voltage value stored in the pre-storage phase with the voltage value acquired in the verification phase includes:

[0021] The voltage value stored in the second storage unit during the pre-storage stage is automatically acquired.

[0022] A third aspect of the present application provides a display device, comprising a display panel and any one of the above-mentioned display control devices, wherein the display panel is electrically connected to the display control device. .

[0023] This application scheme has the following beneficial effects:

[0024] The present application scheme includes a display control device, a control method and a display device. In the pre-storage stage, the voltage to be output by the timing control chip can be debugged online through the debugging component, the voltage to be output is debugged to the target voltage corresponding to the debugging instruction, and the target voltage is stored in the second storage unit to avoid overwriting the target voltage when the power is turned on again; in the verification stage, the timing control chip again obtains the voltage value in the first storage unit in the first circuit board, and compares it with the voltage value stored in the second storage unit in the pre-storage stage. If the comparison result is consistent, the gamma chip is controlled to output the target voltage, thereby achieving the purpose of optimizing the display effect.

[0025] In addition, the above structure can also avoid the difference between the first circuit board and the second circuit board, thereby achieving a better display effect.

[0026] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by the practice of the present application.

[0027] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0029] Figure 1 A schematic diagram showing the structure of a display control device provided in Embodiment 1, Embodiment 2 or Embodiment 3 of the present application is shown;

[0030] Figure 2A flow chart of a control method of a display control device provided in Embodiment 2 of the present application is shown;

[0031] Figure 3 A schematic diagram of the structure of a display device provided in Embodiment 3 of the present application is shown.

[0032] Description of reference numerals:

[0033] 1. Display control device; 10. First circuit board; 101. First storage unit; 20. Second circuit board; 201. Timing control chip; 202. Second storage unit; 203. Gamma chip; 204. Debugging component; 30. Debugging equipment; 40. System-level chip; 50. Flexible circuit board; 60. Serial peripheral interface; 70. IIC bus; 2. Display panel. DETAILED DESCRIPTION

[0034] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be more comprehensive and complete and fully convey the concept of the example embodiments to those skilled in the art.

[0035] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0036] In this application, unless otherwise clearly specified and limited, the terms "assembly", "connection" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0037] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present application. However, those skilled in the art will appreciate that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps, etc. can be adopted. In other cases, known methods, devices, realizations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0038] Embodiment 1

[0039] This embodiment provides a display control device 1, see Figure 1 As shown, it includes a first circuit board 10 and a second circuit board 20 .

[0040] The first circuit board 10 is provided with a first storage unit 101, and the first storage unit 101 stores a voltage value. The voltage value is the automatic debugging data of the voltage of the first circuit board 10 before leaving the factory. The first circuit board 10 can be a horizontal circuit board (X-board, abbreviated as XB) of the display panel 2, which can be electrically connected to the data line of the display panel 2 through the source driver chip.

[0041] The second circuit board 20 includes a timing control chip 201 (Timing Control, referred to as TCON), a second storage unit 202 , a gamma chip 203 and a debugging component 204 .

[0042] In order to save design space, the timing control chip 201, the second storage unit 202, the gamma chip 203 and the debugging component 204 are integrated on the same system-on-chip 40 (System On Chip, SOC for short) and used as a control circuit board. The system-on-chip 40 is connected to the first circuit board 10 through a flexible circuit board 50, and the flexible circuit board 50 can adopt FFC (Flexible Flat Cable); the connection stability between the system-on-chip 40 and the first circuit board 10 can be ensured by the flexible circuit board 50.

[0043] In the pre-storage stage, the timing control chip 201 is electrically connected to the first storage unit 101 in the first circuit board 10 through the serial peripheral interface 60 (SPI, SerialPeripheral interface) to read the voltage value in the first storage unit 101. In addition, the timing control chip 201 is connected to the second storage unit 202 through the IIC bus 70 (Inter-Integrated Circuit, integrated circuit bus) to store the voltage value read from the first storage unit in the second storage unit 202.

[0044] It should be noted that the serial peripheral interface 60 (SPI) has the advantages of supporting full-duplex operation, simple operation, and high data transmission efficiency. Therefore, when the timing control chip 201 reads the first voltage stored in the first storage unit 101 through the interface, the interface used in this embodiment is the serial peripheral interface 60 (SPI).

[0045] In addition, the IIC bus 70 has the advantages of fewer signal lines and smaller size.

[0046] It is worth mentioning that both the first storage unit 101 and the second storage unit 202 are flash memories, which are a form of electronically erasable programmable read-only memory that allows multiple erasing or writing during operation.

[0047] Furthermore, the gamma chip 203 is electrically connected to the timing control chip 201 via the IIC bus 70. The gamma chip 203 can receive the voltage value transmitted by the timing control chip 201 via the IIC bus 70, and transmit the voltage value to the display panel to control the opening of the thin film transistor in the display panel so that the display panel can display.

[0048] It should be noted that there is a gamma voltage value inside the gamma chip 203. When the timing control chip 201 transmits a voltage value to the gamma chip 203, the transmitted voltage value will be outputted before the gamma voltage value. That is, when the timing control chip 201 has a voltage input into the gamma chip 203, the gamma voltage in the gamma chip 203 will not be outputted.

[0049] In addition, under normal circumstances, the horizontal circuit board and the control circuit board are manufactured and sold separately. Due to the differences between the backlights and control circuit boards of different display devices, there may be a difference between the voltage stored in the horizontal circuit board and the voltage required by the control circuit board, which may cause poor display effects.

[0050] Furthermore, in order to ensure the display effect, the second circuit board also includes a debugging component 204, which can modify the voltage value input by the gamma chip 203 online through the external debugging device 30 to adjust the display effect of the display panel. The debugging component 204 receives the debugging instruction of the debugging device 30, and the debugging component 204 is connected between the timing control chip 201 and the gamma chip 203 through the IIC bus to perform online debugging on the voltage to be output by the timing control chip 201, and adjust the voltage value to be output to the target voltage corresponding to the debugging instruction.

[0051] In this embodiment, the target voltage may be a target voltage that enables the display panel to achieve the best display effect.

[0052] It is worth mentioning that the pre-storage stage can be the stage when the display panel is powered on for the first time. When the display panel is powered on again, the timing control chip 201 will again give priority to the voltage value in the first storage unit 101, and overwrite the voltage value modified by the debugging component 204 based on the debugging instruction of the debugging device 30; therefore, in order to avoid the target voltage being overwritten by the voltage value in the first storage unit 101 after power-on again, the debugging device 30 is connected between the timing control chip 201 and the second storage unit 202 via the IIC bus 70, so as to store the target voltage in the second storage unit 202 via the IIC bus 70.

[0053] The verification phase may also be referred to as when the display panel is powered on again.

[0054] It can be understood that the pre-storage stage and the verification stage are two adjacent stages. In the verification stage, the timing control chip 201 obtains the voltage value in the first storage unit 101 again through the serial peripheral interface 60 (SPI), and the timing control chip 201 can also automatically obtain the voltage value stored in the second storage unit 202 in the pre-storage stage through the IIC bus 70 to perform CRC verification.

[0055] The CRC verification includes comparing the voltage value stored in the pre-storage phase with the second voltage value acquired by the timing control chip 201 in the verification phase, and can also be applied to other data comparisons, which are not specifically limited here.

[0056] Then, the timing control chip 201 outputs the corresponding voltage value according to the comparison result. For example, if the comparison result is consistent, the timing control chip 201 calls the target voltage stored in the second storage unit 202 in the pre-storage stage, and inputs the target voltage to the gamma chip 203 through the IIC bus 70, so that the display panel can achieve the best display effect, improve the display effect, and thus achieve the purpose of optimizing the display effect, and reduce the difference between the first circuit board 10 and the second circuit board 20; when the voltage value obtained by the timing control chip 201 in the verification stage is inconsistent with the voltage value stored in the second storage unit in the pre-storage stage, the timing control chip 201 outputs the second voltage value obtained in the verification stage.

[0057] For example, in the pre-storage stage, the timing control chip 201 obtains the 5V voltage value of the first storage unit 101 in the first circuit board 10, and stores the 5V voltage value in the second storage unit 202. In the pre-storage stage, the debugging component 204 is connected to the debugging device 30, and the debugging component 204 receives the debugging instruction of the debugging device 30 to debug the voltage to be output by the timing control chip 201, and debugs the voltage to be output to the target voltage 6V corresponding to the debugging instruction; it can be understood that the target voltage 6V can be a voltage value that makes the display panel display effect the best, or it can be other voltage values, which are not specifically limited. In the verification stage, the timing control chip 201 again obtains the 5V voltage value of the first storage unit 101 in the first circuit board 10, and compares the obtained 5V voltage value with the 5V voltage value stored in the second storage unit 202 in the pre-storage stage. It can be seen that the voltage values ​​in the two stages are the same. At this time, the timing control chip 201 inputs the target voltage stored in the second storage unit 202 into the gamma chip 203 to optimize the display effect. If in the verification stage, the timing control chip 201 obtains a 5.1V voltage value, which is inconsistent with the 5V voltage value stored in the second storage unit 202 in the pre-storage stage, the timing control chip 201 inputs a 5.1V voltage value to the gamma chip 203.

[0058] It should be noted that the system-level chip 40 is provided with a debugging component 204, which can be a connection port of the system-level chip 40, which is connected to the debugging device 30 to receive the debugging instructions of the debugging device 30, which is more conducive to the debugging device 30 to modify the voltage value entering the gamma chip 203 online, and store it in the second storage unit 202 through the IIC bus 70. The debugging component 204 is connected through a serial bus. As mentioned above, the serial bus can be connected to the timing control chip 201 and the gamma chip 203 and between the timing control chip 201 and the second storage unit 202 using the IIC bus 70. Among them, when the IIC bus 70 is connected between the timing control chip 201 and the gamma chip 203, the debugging device 30 can debug the voltage value before entering the gamma chip 203, so as to determine the target voltage of the display panel to achieve the best display effect, and store the target voltage in the second storage unit 202 through the IIC bus 70 located between the timing control chip 201 and the second storage unit 202. In this way, different IIC buses 70 can be used to adjust the voltage value entering the gamma chip 203 and to transmit the target voltage to the second storage unit 202 for storage.

[0059] Furthermore, the first circuit board 10 may be a whole independent circuit board, or may be a plurality of circuit sub-boards arranged in parallel.

[0060] For example, the first circuit board 10 uses two circuit sub-boards, which are arranged on one side of the display panel 2 along the horizontal direction; each circuit sub-board corresponds to a system-level chip 40; the timing control chip 201 in the system-level chip 40 obtains the voltage value in the corresponding circuit sub-board, and adjusts the optimal voltage value through the external debugging device 30, and stores the adjusted target voltage in the second storage unit 202 in the corresponding system-level chip 40; so that when the timing control chip 201 obtains the voltage value in the first storage unit 101 again, it can directly call the optimal voltage value from the second storage unit 202, so that the display panel can achieve the best display effect, and thus the display effect can be improved in this way, and it can ensure that the horizontal circuit board can correspond to different system-level chips 40, reducing the difference between the horizontal circuit board and the system-level chip 40.

[0061] It is worth mentioning that the timing control chip 201 is connected to a power supply for detecting a power-on signal.

[0062] That is, in the pre-storage stage, the timing control chip 201 obtains the voltage value in the first storage unit 101 through the serial peripheral interface 60 (SPI), and transmits it to the second storage unit 202 through the IIC bus 70 to store the voltage value; and in the pre-storage stage, the external debugging device 30 controls the voltage value entering the gamma chip 203 through the debugging device 204, so that the display device is in the best display effect, and the target voltage corresponding to the best display effect is transmitted to the second storage unit 202 for storage. In the verification stage, the timing control chip 201 obtains the voltage value in the first storage unit 101 again, and automatically compares the voltage value stored in the second storage unit 202 in the pre-storage stage to perform CRC verification. If the comparison results are consistent, the timing control chip 201 inputs the target voltage to the gamma chip 203 to achieve the optimized display effect.

[0063] When the comparison result is inconsistent, the timing control chip 201 can input the voltage value obtained by the timing control chip 201 in the verification stage to the gamma chip 203; it can also debug the voltage value entering the gamma chip 203 through the external debugging device 30, so that the display device can achieve the best display effect, and store the debugged voltage value in the second storage unit 202, so that when the timing control chip 201 obtains the voltage value in the first storage unit 101 as the voltage value obtained in the verification stage, it can control the input of the best voltage value to the gamma chip 203, thereby achieving an optimized display effect. In addition, through this method, the difference between the horizontal circuit board and the system-level chip 40 can be reduced, and the required voltage can be adjusted more easily, thereby improving the display effect.

[0064] It is understandable that, in the pre-storage stage, the target voltage of the display panel is stored by using the second storage unit 202 in the system-level chip 40, so that in the verification stage, the timing control chip 201 can output the target voltage according to the voltage value in the first storage unit 101, thereby achieving an optimized display effect. In addition, the voltage value input by the gamma chip 203 can be debugged online through the debugging device 30 and the debugging component 204, reducing the difference between the first circuit board 10 and the second circuit board 20.

[0065] Embodiment 2

[0066] This embodiment 2 provides a control method for the display control device in embodiment 1. Figure 2 As shown, it includes the following steps:

[0067] Step S100, in the pre-storage stage, obtaining the voltage value stored in the first storage unit 101 in the first circuit board 10, and storing the obtained voltage value in the second storage unit 202 in the second circuit board 20, and in the pre-storage stage, also used to respond to the debugging instruction of the debugging component 204, so that the voltage to be output is debugged to the target voltage corresponding to the debugging instruction, and the target voltage is stored in the second storage unit 202 in the second circuit board 20;

[0068] See also Figure 1 , Figure 2 and Figure 3 As shown, in the pre-storage stage, the timing control chip 201 in the system-level chip 40 reads the voltage value in the first storage unit 101 through the serial peripheral interface 60 (SPI). In addition, by using the debugging device 204 of the system-level chip 40 to connect the debugging device 30, the debugging device 30 inputs the debugging instruction to the debugging device 204, and the voltage value before entering the gamma chip 203 can be debugged, so as to obtain the target voltage corresponding to the debugging instruction. In this embodiment, the target voltage can be a voltage that enables the display panel 2 to obtain the best display effect.

[0069] The voltage value obtained by the timing control chip 201 is transmitted to the second storage unit 202 through the IIC bus 70. In addition, the target voltage is stored in the second storage unit 202 through the IIC bus 70 to prevent the voltage value obtained by the timing control chip 201 from overwriting the target voltage when the display panel is powered on next time. By storing the target voltage in the second storage unit 202, the target voltage can be output to the gamma chip 203 when the display panel is powered on next time, thereby achieving an optimized display effect.

[0070] Step S200, in the verification phase, the voltage value stored in the first circuit board 10 is obtained again, and compared with the voltage value stored in the second storage unit 202 in the pre-storage phase;

[0071] In the verification phase, which can also be called the second or second power-on phase, the timing control chip 201 is connected to the first storage unit 101 through the serial peripheral interface 60 to obtain the voltage value stored in the first storage unit 101; at the same time, the timing control chip 201 can obtain the voltage value stored in the second storage unit 202 during the pre-storage phase from the second storage unit 202, and compare the voltage value obtained in the verification phase with the voltage value obtained in the pre-storage phase. According to the comparison result, the timing control chip 201 inputs the corresponding voltage value to the gamma chip 203.

[0072] When the comparison results are consistent, the timing control chip 201 inputs the target voltage to the gamma chip 203. In this way, the difference between the horizontal circuit board and the system-level chip 40 is reduced, which can ensure that the display panel 2 obtains the best display effect, thereby achieving an optimized display effect.

[0073] In addition, when the comparison results are inconsistent, the timing control chip 201 inputs the voltage value obtained in the verification phase to the gamma chip 203 .

[0074] It should be noted that when the comparison results are inconsistent, the debugging device 30 can debug the voltage value entering the gamma chip 203 again so that the display panel 2 can obtain the best display effect, and then store the debugged voltage value in the second storage unit 202; in this way, when the timing control chip 201 obtains the same voltage value as the voltage value obtained in the verification stage, the target voltage corresponding to the voltage value in the verification stage can be obtained from the second storage unit 202, thereby achieving the optimized display effect again.

[0075] In this way, by obtaining different voltage values ​​from the first storage unit 101, a voltage value corresponding to it can be obtained which enables the display panel 2 to obtain the best display effect, which can reduce the difference between the horizontal circuit board (first circuit board 10) and the system-level chip 40 and improve the display effect.

[0076] In addition, the control method also includes that during the verification phase, the timing control chip 201 can automatically obtain the voltage value stored in the second storage unit 202 during the pre-storage phase, which is more conducive to the comparison of the voltage value during the verification phase and the response is faster.

[0077] Embodiment 3

[0078] See also Figure 3 As shown, the third embodiment provides a display device, which includes a display panel 2 and the display control device 1 in the first embodiment, wherein the display panel 2 is electrically connected to the display control device 1 .

[0079] The data lines of the display panel 2 can be electrically connected to the first circuit board 10 through the source driver chip; the gamma chip 203 can be connected to the scan lines of the display panel 2 to control the opening and closing of the thin film transistors inside the display panel 2.

[0080] The display control device 11 is connected to the display panel 2 through a plurality of chip-on-chip films evenly arranged on the side of the display panel 2. The chip-on-chip films are provided with many connecting lines to transmit various data signals from the display device to the display panel 2 to drive the display of the display panel 2 and control its display effect.

[0081] The display device may specifically be a liquid crystal display device, electronic paper, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator, or any other product or component with a display function.

[0082] See also Figure 1 and Figure 2 As shown, when the display control device 11 of the third embodiment is in the pre-storage stage of the display device, the timing control chip 201 in the system-level chip 40 will obtain the voltage value in the first storage unit 101 located on the horizontal circuit board (the first circuit board 10), and store the obtained voltage value in the second storage unit 202 of the system-level chip 40; in the verification stage, the timing control chip 201 obtains the voltage value in the first storage unit 101, and compares the voltage value obtained in the verification stage with the voltage value obtained in the pre-storage stage. If the comparison results are consistent, the target voltage stored in the second storage unit 202 is output to achieve an optimized display effect.

[0083] In the description of this specification, the description with reference to the terms "some embodiments", "exemplarily", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0084] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application. Therefore, any changes or modifications made in accordance with the claims and description of the present application should fall within the scope of the patent of this application.

Claims

1. A display control device, characterized in that: include: A first circuit board, wherein a first storage unit is provided on the first circuit board, and the first storage unit is capable of storing a voltage value; a second circuit board, the second circuit board comprising a timing control chip, a second storage unit, a gamma chip and a debugging component, the timing control chip being electrically connected to the first storage unit and the second storage unit, and the timing control chip being electrically connected to the gamma chip; In the pre-storage stage, the timing control chip can obtain the voltage value in the first storage unit, and store the obtained voltage value in the second storage unit, and the debugging component can debug the voltage to be output by the timing control chip based on the debugging instruction, adjust the voltage to be output to a target voltage corresponding to the debugging instruction, and store the target voltage in the second storage unit; During the verification phase, the timing control chip can obtain the voltage value in the first storage unit again and compare it with the voltage value stored in the second storage unit in the pre-storage phase; when the comparison results are the same, the timing control chip inputs the target voltage to the gamma chip; when the comparison results are different, the timing control chip inputs the voltage value obtained by the timing control chip during the verification phase to the gamma chip.

2. The display control device according to claim 1, characterized in that: The timing control chip, the second storage unit, the gamma chip and the debugging component are integrated on the same system-level chip.

3. The display control device according to claim 2, characterized in that: The debugging component is a connection port of the second circuit board, which is connected to a debugging device. The connection port can receive debugging instructions transmitted by the debugging device in the pre-storage stage, and debug the voltage to be output by the timing control chip according to the debugging instructions.

4. The display control device according to claim 2, characterized in that: The timing control chip obtains the preset voltage value in the first storage unit through a serial peripheral interface.

5. The display control device according to claim 2, characterized in that: The system-level chip corresponds to the first circuit board in a one-to-one manner.

6. The display control device according to claim 2, characterized in that: The system-level chip is connected to the first circuit board through a flexible circuit board.

7. The display control device according to claim 1, characterized in that: The timing control chip is connected to a power supply to detect a power-on signal.

8. A control method for a display control device, characterized in that: include: In the pre-storage stage, a voltage value stored in a first storage unit in the first circuit board is obtained, and the obtained voltage value is stored in a second storage unit in the second circuit board. In the pre-storage stage, the device is also used to respond to a debugging instruction of a debugging component, so that the voltage to be output is debugged to a target voltage corresponding to the debugging instruction, and the target voltage is stored in the second storage unit in the second circuit board; In the verification stage, the voltage value stored in the first circuit board is obtained again, and compared with the voltage value stored in the second storage unit in the pre-storage stage; If the comparison results are the same, inputting the target voltage into the gamma chip; If the comparison results are different, the voltage value obtained during the verification phase is input into the gamma chip.

9. The control method according to claim 8, characterized in that: During the verification phase, comparing the voltage value stored in the pre-storage phase with the voltage value acquired in the verification phase includes: The voltage value stored in the second storage unit during the pre-storage stage is automatically acquired.

10. A display device, characterized in that: It comprises a display panel and the display control device according to any one of claims 1 to 7, wherein the display panel is electrically connected to the display control device.

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