Magnetic storage device

Abstract

Embodiments provide a magnetic storage device capable of performing accurate readout operation. The magnetic storage device of the embodiments includes a first wiring extending in a first direction, a second wiring extending in a second direction intersecting the first direction, and a first storage unit connected between the first wiring and the second wiring, in which a first magnetoresistance effect element having a low resistance state and a high resistance state, a first switching element, and a first resistance element are connected in series, the first resistance element has a current-voltage characteristic that is asymmetric in a case where a forward voltage is applied and in a case where a reverse voltage is applied, and the first storage unit stores data corresponding to the resistance state of the first magnetoresistance effect element. When reading out the data corresponding to the resistance state of the first magnetoresistance effect element from the first storage unit, the reverse first voltage is applied to the first resistance element, and the resistance value of the first resistance element when the reverse first voltage is applied is greater than the resistance value of the first resistance element when the forward second voltage having the same absolute value as that of the first voltage is applied.

Description

[0001] This application enjoys priority based on Japanese Patent Application No. 2021-151512 (filed on September 16, 2021) and U.S. Patent Application No. 17 / 692785 (filed on March 11, 2022). This application incorporates the entire contents of the basic applications by reference. Technical Field

[0002] Embodiments of the present invention relate to magnetic storage devices. Background Technology

[0003] A magnetic storage device is proposed that integrates a magnetoresistive effect element and a selector (switching element) on a semiconductor substrate. Summary of the Invention

[0004] The problem to be solved by the present invention is to provide a magnetic storage device capable of performing accurate readout operations.

[0005] The magnetic storage device of the embodiment includes: a first wiring extending in a first direction; a second wiring extending in a second direction intersecting the first direction; and a first storage cell connected between the first wiring and the second wiring, wherein a first magnetoresistive element having a low resistance state and a high resistance state, a first switching element, and a first resistive element are connected in series, and data corresponding to the resistance state of the first magnetoresistive element is stored. The first resistive element has an asymmetrical current-voltage characteristic when a positive voltage is applied and when a reverse voltage is applied. When reading data corresponding to the resistance state of the first magnetoresistive element from the first storage cell, a reverse first voltage is applied to the first resistive element, and the resistance value of the first resistive element when the reverse first voltage is applied is greater than the resistance value of the first resistive element when a positive second voltage having the same absolute value as the absolute value of the first voltage is applied. Attached Figure Description

[0006] Figure 1 This is a perspective view schematically showing the structure of the magnetic storage device according to the first embodiment.

[0007] Figure 2 This is a cross-sectional view schematically showing the structure of the first wiring, the second wiring, and the storage cell according to the first embodiment.

[0008] Figure 3 This is a cross-sectional view schematically showing the structure of the magnetoresistive effect element according to the first embodiment.

[0009] Figure 4AThis is a cross-sectional view schematically showing the structure of the selector according to the first embodiment.

[0010] Figure 4B This is a diagram schematically illustrating the characteristics of the selector according to the first embodiment.

[0011] Figure 5 This is a diagram schematically illustrating the current-voltage characteristics of the selector according to the first embodiment.

[0012] Figure 6 This is a cross-sectional view schematically showing the structure of the resistive element according to the first embodiment.

[0013] Figure 7 This is a diagram schematically illustrating the current-voltage characteristics of the resistive element according to the first embodiment.

[0014] Figure 8 This is a diagram schematically illustrating the current-voltage characteristics of the memory cell according to the first embodiment.

[0015] Figure 9 This is a diagram schematically showing the voltage applied to the resistive element and the current flowing in the resistive element when reading and writing to the memory cell according to the first embodiment.

[0016] Figure 10A , Figure 10B as well as Figure 10C This is a cross-sectional view schematically illustrating a method for manufacturing a magnetic storage device according to the first embodiment.

[0017] Figure 11 This is a cross-sectional view schematically illustrating the structure of the first wiring, the second wiring, and the storage cell in a first variation of the first embodiment.

[0018] Figure 12 This is a cross-sectional view schematically illustrating the structure of the first wiring, the second wiring, and the storage cell involved in the second modification of the first embodiment.

[0019] Figure 13 This is a cross-sectional view schematically illustrating the structure of the first wiring, the second wiring, and the storage cell according to the second embodiment.

[0020] Figure 14 This is a diagram schematically illustrating the current-voltage characteristics of the tunnel barrier element according to the second embodiment.

[0021] Figure 15 This is a cross-sectional view schematically illustrating the structure of the first wiring, the second wiring, and the storage cell involved in a variation of the second embodiment.

[0022] Figure 16A , Figure 16B , Figure 16C as well as Figure 16D This is a cross-sectional view schematically illustrating a method for manufacturing a magnetic storage device according to the second embodiment.

[0023] Figure 17 This is a cross-sectional view schematically showing the structure of the magnetic storage device according to the third embodiment.

[0024] Figure 18 This is a cross-sectional view schematically illustrating the structure of a magnetic storage device according to a variation of the third embodiment.

[0025] Label Explanation

[0026] 10 First wiring, 20 Second wiring, 30 Memory cell, 31 Magnetoresistive effect element, 32 Selector (switching element), 33 Resistive element, 34 Upper electrode, 35 Tunnel barrier element, 40 Interlayer insulating layer, 50 Third wiring, 60 Memory cell, 61 Magnetoresistive effect element, 62 Selector (switching element), 63 Resistive element, 64 Upper electrode, 65 Tunnel barrier element, 100 Semiconductor substrate. Detailed Implementation

[0027] The embodiments will now be described with reference to the accompanying drawings.

[0028] (First Embodiment)

[0029] Figure 1 This is a perspective view schematically showing the structure of the magnetic storage device according to the first embodiment.

[0030] like Figure 1 As shown, the magnetic storage device includes a first wiring 10 extending in the X direction (first direction), a second wiring 20 extending in the Y direction (second direction), and a storage cell 30 connecting the first wiring 10 and the second wiring 20. One of the first wiring 10 and the second wiring 20 corresponds to a word line, and the other corresponds to a bit line. Furthermore, the X, Y, and Z directions are intersecting directions. Specifically, the X, Y, and Z directions are orthogonal directions.

[0031] Figure 2 It is a cross-sectional view schematically showing the structure of the first wiring 10, the second wiring 20 and the storage unit 30.

[0032] like Figure 2 As shown, the first wiring 10, the second wiring 20, and the storage unit 30 are disposed above the semiconductor substrate 100.

[0033] Storage unit 30 is connected between the first wiring 10 and the second wiring 20, and includes a magnetoresistive element 31, a selector (switching element) 32, a resistive element 33, and a top electrode 34, storing data corresponding to the resistance state of the magnetoresistive element 31. For example, according to... Figure 2 As can be seen, the magnetoresistive element 31, the selector 32, and the resistive element 33 are connected in series. Figure 2 In the example shown, selector 32 and resistor 33 are adjacent to each other, and selector 32 is disposed between magnetoresistive element 31 and resistor 33.

[0034] Figure 3 This is a cross-sectional view schematically showing the structure of the magnetoresistive element 31.

[0035] The magnetoresistive element 31 is an MTJ (Magnetic Tunnel Junction) element, including a storage layer (first magnetic layer) 31a, a reference layer (second magnetic layer) 31b, and a tunnel barrier layer (nonmagnetic layer) 31c.

[0036] Storage layer 31a is a ferromagnetic layer with a variable magnetization direction. A variable magnetization direction means that the magnetization direction changes relative to a predetermined write current. Reference layer 31b is a ferromagnetic layer with a fixed magnetization direction. A fixed magnetization direction means that the magnetization direction does not change relative to a predetermined write current. Tunnel barrier layer 31c is an insulating layer disposed between storage layer 31a and reference layer 31b.

[0037] The magnetoresistive element 31 is an STT (Spin Transfer Torque) type magnetoresistive element with perpendicular magnetization. That is, the magnetization direction of the storage layer 31a is perpendicular to its film surface, and the magnetization direction of the reference layer 31b is perpendicular to its film surface.

[0038] The magnetoresistive element 31 may also include a shift canceling layer that cancels the magnetic field applied from the reference layer 31b to the storage layer 31a.

[0039] When the magnetization direction of the storage layer 31a is parallel to the magnetization direction of the reference layer 31b, the magnetoresistive element 31 is in a relatively low resistance state. When the magnetization direction of the storage layer 31a is antiparallel to the magnetization direction of the reference layer 31b, the magnetoresistive element 31 is in a relatively high resistance state. Therefore, the magnetoresistive element 31 can store binary data based on its resistance state. Furthermore, the resistance state of the magnetoresistive element 31 can be set according to the direction of the current flowing in the magnetoresistive element 31.

[0040] Furthermore, in this embodiment, when data corresponding to the resistance state of the magnetoresistive element 31 is read from the storage unit 30, the direction of the current flowing in the magnetoresistive element 31 is the same as the direction of the current flowing in the magnetoresistive element 31 when the magnetoresistive element 31 is set to a low resistance state.

[0041] Figure 4A This is a cross-sectional view schematically showing the structure of selector 32.

[0042] Selector 32 is a two-terminal switching element with nonlinear current-voltage characteristics, including an upper electrode 32a, a lower electrode 32b, and a selector material layer 32c disposed between the upper electrode 32a and the lower electrode 32b.

[0043] Furthermore, in this embodiment, as selector 32, such as Figure 4B As shown, a switching element with the following characteristics will be used as an example: the resistance value drops sharply at voltage V1, and simultaneously, the applied voltage drops sharply to V2, while the current increases (snapback). The materials and composition used in a switching element with such characteristics should be appropriately selected based on the characteristics of the memory cell.

[0044] Figure 5 This is a schematic diagram illustrating the current-voltage characteristics of selector 32 based on a current sweep.

[0045] like Figure 5 As shown, selector 32 has the following characteristics: when the current applied between the two terminals increases to reach the threshold current Ith, it transitions from the off (OFF) state to the on (ON) state; when the voltage applied between the two terminals decreases to reach a holding voltage Vhold lower than the threshold voltage Vth, it transitions from the on state to the off state. That is, when the current applied between the two terminals decreases to reach the holding current Ihold, selector 32 transitions to the off state via path P2, not along path P1. Furthermore, as... Figure 5 As shown, selector 32 has symmetrical current-voltage characteristics in both the positive and negative directions. Furthermore, the holding current of selector 32 is related to the nearby external resistance; when the external resistance becomes high, the holding current can be reduced.

[0046] Figure 6 This is a schematic cross-sectional view showing the structure of the resistive element 33.

[0047] A pn junction diode formed by semiconductor layers 33a and 33b is used for the resistive element 33. One of semiconductor layers 33a and 33b is a p-type semiconductor layer, and the other is an n-type semiconductor layer. Semiconductor layers 33a and 33b are formed of polycrystalline silicon.

[0048] Figure 7 This is a diagram schematically representing the current-voltage characteristic of the resistive element 33.

[0049] Resistive element 33 is a pn junction diode, exhibiting asymmetrical current-voltage characteristics when a forward voltage is applied and when a reverse voltage is applied. However, the resistive element (pn junction diode) 33 in this embodiment is formed using polysilicon, and therefore does not possess good reverse characteristics compared to an ideal pn junction diode. That is, the reverse resistance of the pn junction diode in this embodiment is lower than that of an ideal pn junction diode.

[0050] In addition, when reading data from the storage cell 30, a reverse voltage is applied to the resistor element (pn junction diode) 33, and a reverse current flows in the resistor element 33.

[0051] As described above, the storage cell 30 of this embodiment has a structure in which a magnetoresistive element 31, a selector 32, and a resistive element 33 are connected in series. With this structure, in this embodiment, a magnetic storage device that can suppress read interference, reduce power consumption, and perform accurate read operations can be obtained. This will be explained below.

[0052] Figure 8 The diagram schematically shows the current-voltage characteristics (a) of the memory cell 30 when it is composed of a magnetoresistive element 31, a selector 32 and a resistor 33 connected in series, and the current-voltage characteristics (b) of the memory cell 30 when it is composed of a magnetoresistive element 31 and a selector 32 connected in series (excluding the resistor 33).

[0053] Figure 9 This is a schematic diagram illustrating the voltage applied to the resistor element 33 and the current flowing in the resistor element 33 during reading and writing to the memory cell 30, and... Figure 7 The current-voltage characteristics shown are essentially the same.

[0054] exist Figure 8 and Figure 9 In this context, Iw(PAP) represents the write current to the memory cell 30 when the magnetoresistive element 31 is set from a parallel state (a low-resistance state where the magnetization direction of the storage layer 31a is parallel to the magnetization direction of the reference layer 31b) to an antiparallel state (a high-resistance state where the magnetization direction of the storage layer 31a is antiparallel to the magnetization direction of the reference layer 31b). Iw(APP) represents the write current to the memory cell 30 when the magnetoresistive element 31 is set from an antiparallel state to a parallel state. Iread represents the minimum read current required to read data from the memory cell 30 based on the resistance state set for the magnetoresistive element 31.

[0055] Resistive element 33 exhibits diode characteristics. Therefore, during the reading and writing operations of memory cell 30, the reverse resistance of resistive element 33 is greater than its forward resistance. That is, as... Figure 9 As shown, when data corresponding to the resistance state of the magnetoresistive element 31 is read from the storage cell 30, the reverse voltage applied to the resistor element 33 is set as the first voltage V1. The resistance value of the resistor element 33 when the first voltage V1 is applied to the resistor element 33 is greater than the resistance value of the resistor element 33 when the positive second voltage V2, which has the same absolute value as the first voltage V1, is applied to the resistor element 33.

[0056] Furthermore, the resistance value of the resistive element 33 when the first voltage V1 is applied is lower than the resistance value of the magnetoresistive element 33 in its low-resistance state. Additionally, the resistance value of the resistive element 33 when the first voltage V1 is applied is higher than the resistance value of the selector 32 in its on state, and lower than the resistance value of the selector 32 in its off state.

[0057] like Figure 8 As shown, the current-voltage characteristics of storage cell 30 significantly reflect... Figure 5 The current-voltage characteristics of the selector 32 shown are illustrated. As per... Figure 9 As can be seen, the forward resistance of resistor 33 is sufficiently smaller than its reverse resistance, and also sufficiently smaller than the combined resistance of magnetoresistive element 31 (resistance in the low-resistance state and resistance in the high-resistance state) and the on-resistance of selector 32. Therefore, in Figure 8The characteristics (a) of the memory cell 30 including the resistor element 33 are substantially the same as those of the memory cell 30 excluding the resistor element 33 in the positive region, i.e., the region where the resistor element 33 is operating in the positive direction.

[0058] On the other hand, Figure 8 In the negative region, i.e., the region where resistive element 33 operates in reverse, the reverse resistance of resistive element 33 becomes a non-negligible value compared to the combined resistance of magnetoresistive element 31 (resistance in low resistance state and resistance in high resistance state) and the on-resistance of selector 32. Therefore, in Figure 8 In the negative region, the characteristics (a) of the memory cell 30 including the resistor element 33 are significantly different from the characteristics (b) of the memory cell 30 not including the resistor element 33.

[0059] First, consider the case where the memory cell 30 does not include the resistor element 33. Figure 8 (in case (b)). Figure 8 In this process, when the voltage applied to the storage cell 30 decreases to be less than the current Ihold', the current-voltage characteristic shifts from path P1 to path P2. Therefore, the read current cannot be set to the minimum value Iread, and the read current needs to be set for the region along path P3. This results in an increase in read current and read interference.

[0060] On the other hand, when the memory cell 30 includes a resistive element 33 ( Figure 8 In case (a), the read current can be set to a minimum value Iread. Therefore, in this embodiment, the read current can be reduced, and the generation of read interference can be suppressed.

[0061] Furthermore, in this embodiment, the resistive element 33 has diode characteristics. If the resistive element 33 were not to have diode characteristics and had the same current-voltage characteristics in both the positive and negative directions, the resistance value of the series circuit of the memory cell 30 would increase during both the positive-direction write operation (the write operation used to set the magnetoresistive element 31 to a high-resistance state) and the negative-direction write operation (the write operation used to set the magnetoresistive element 31 to a low-resistance state), leading to increased power consumption. In this embodiment, the resistance value of the series circuit of the memory cell 30 can be reduced during the positive-direction write operation, thus suppressing the increase in power consumption.

[0062] As described above, in this embodiment, it is possible to suppress read interference and reduce power consumption, and to perform accurate readout operations.

[0063] Next, refer to Figures 10A to 10CThe cross-sectional view shown illustrates the manufacturing method of the magnetic storage device according to this embodiment.

[0064] First, such as Figure 10A As shown, a first wiring layer 10L, a resistor element layer 33L, a selector layer 32L, a magnetoresistive effect element layer 31L, and an upper electrode layer 34L are formed.

[0065] Next, as Figure 10B As shown, the first wiring layer 10L, the resistor element layer 33L, the selector layer 32L, the magnetoresistive effect element layer 31L, and the upper electrode layer 34L are patterned to form a pattern of the first wiring 10, the resistor element 33, the selector 32, the magnetoresistive effect element 31, and the upper electrode 34. Further, an interlayer insulating layer 40 is formed.

[0066] Next, as Figure 10C As shown, in passing Figure 10B The process results in the formation of the second wiring pattern 20 on the structure.

[0067] As described above, a magnetic storage device is obtained, including a first wiring 10, a resistive element 33, a selector 32, a magnetoresistive element 31, an upper electrode 34, and a second wiring 20.

[0068] Figure 11 This is a cross-sectional view schematically illustrating the structure of the first wiring 10, the second wiring 20, and the storage unit 30 in the first variation of this embodiment.

[0069] In this modified example, the magnetoresistive element 31, the selector 32, and the resistor element 33 are also connected in series, and the selector 32 and the resistor element 33 are adjacent to each other. In addition, in this modified example, the resistor element 33 is disposed between the magnetoresistive element 31 and the selector 32.

[0070] Figure 12 This is a cross-sectional view schematically illustrating the structure of the first wiring 10, the second wiring 20, and the storage unit 30 in the second variation of this embodiment.

[0071] In this modified example, the magnetoresistive element 31, the selector 32, and the resistor element 33 are also connected in series. However, in this modified example, the selector 32 and the resistor element 33 are not adjacent, and the magnetoresistive element 31 is disposed between the selector 32 and the resistor element 33. In addition, in this modified example, the resistor element 33 is disposed between the second wiring 20 and the upper electrode 34.

[0072] In the first and second modifications, the same effects as those described in the above embodiments can also be obtained.

[0073] (Second Implementation)

[0074] Next, the second embodiment will be described. Furthermore, the basic details are the same as in the first embodiment described above, and the descriptions of details already described in the first embodiment will be omitted.

[0075] Figure 13 It is a cross-sectional view schematically showing the structure of the first wiring 10, the second wiring 20 and the storage unit 30.

[0076] In this embodiment, the storage unit 30 further includes a tunnel barrier element 35, a magnetoresistive effect element 31, a selector 32, a resistor element 33, and the tunnel barrier element 35 connected in series. Figure 13 In the example shown, a tunnel barrier element 35 is provided between the magnetoresistive effect element 31 and the upper electrode 34, but the position of the tunnel barrier element 35 in the series connection of the memory cell is not particularly limited.

[0077] The tunnel barrier element 35 is formed by a tunnel barrier layer and has nonlinear current-voltage characteristics. The tunnel barrier layer contains insulating materials such as silicon nitride and silicon oxide.

[0078] Figure 14 This is a schematic diagram illustrating the current-voltage characteristics of the tunnel barrier element (tunnel barrier layer) 35. (See diagram for example.) Figure 14 As shown, the tunnel barrier element 35 has symmetrical current-voltage characteristics in both the positive and negative directions. Furthermore, the tunnel barrier element 35 exhibits a current-voltage characteristic where the current increases sharply as the applied voltage increases, and a resistance value decreases sharply as the applied voltage increases.

[0079] In this embodiment, a tunnel barrier element 35, as described above, is connected in series with the magnetoresistive element 31, the selector 32, and the resistive element 33. Therefore, the resistance value of the series connection during readout can be further increased. Consequently, the readout current can be further reduced, and the generation of read interference and the increase in power consumption can be suppressed.

[0080] Figure 15 This is a cross-sectional view schematically illustrating the structure of the first wiring 10, the second wiring 20, and the storage unit 30 involved in a variation of this embodiment.

[0081] In this modified example, the magnetoresistive element 31, the selector 32, the resistor element 33, and the tunnel barrier element 35 are also connected in series. Furthermore, in this modified example, the resistor element 33 is disposed between the second wiring 20 and the upper electrode 34, and the tunnel barrier element 35 is disposed between the resistor element 33 and the upper electrode 34.

[0082] In this modified example, the same effect as the above-described embodiment can also be achieved by setting the tunnel barrier element 35.

[0083] Next, refer to Figures 16A to 16D The cross-sectional view shown illustrates the manufacturing method of the magnetic storage device involved in this modified example.

[0084] First, such as Figure 16A As shown, a pattern is formed of the first wiring 10, the selector 32, the magnetoresistive effect element 31, and the upper electrode 34. An interlayer insulating layer 40 is further formed.

[0085] Next, as Figure 16B As shown, the upper electrode 34 is recessed, and a silicon nitride layer is formed along the surface of the recessed upper electrode 34 and the surface of the interlayer insulating layer 40 to serve as a tunnel barrier layer 35L.

[0086] Next, as Figure 16C As shown, a portion of the tunnel barrier layer 35L formed on the upper surface of the interlayer insulating layer 40 is removed, and a polysilicon layer is formed on the remaining tunnel barrier layer 35L. Further, ion implantation of impurity elements is performed on the polysilicon layer to form a pn junction diode. Thus, a resistor element 33 and a tunnel barrier element 35 are obtained.

[0087] Next, as Figure 16D As shown, in passing Figure 16C The process results in the formation of the second wiring pattern 20 on the structure.

[0088] As described above, a magnetic storage device is obtained comprising a first wiring 10, a magnetoresistive effect element 31, a selector 32, a resistor element 33, an upper electrode 34, a tunnel barrier element 35, and a second wiring 20.

[0089] (Third Implementation)

[0090] Next, the third embodiment will be described. Furthermore, the basic matters are the same as those in the first and second embodiments described above, and the descriptions of matters already described in the first and second embodiments are omitted.

[0091] Figure 17 This is a cross-sectional view schematically illustrating the structure of the magnetic storage device according to this embodiment.

[0092] In this embodiment, a third wiring 50 and a storage unit 60 are provided in addition to the first wiring 10, the second wiring 20 and the storage unit 30 described in the first embodiment.

[0093] The third wiring 50 extends in the same direction as the first wiring 10, i.e., the X direction. The first wiring 10 and the third wiring 50 function as word lines, and the second wiring 20 functions as a bit line.

[0094] Storage unit 60 is connected between second wiring 20 and third wiring 50, and includes a magnetoresistive element 61, a selector (switching element) 62, a resistive element 63, and an upper electrode 64, storing data corresponding to the resistance state of the magnetoresistive element 61. The magnetoresistive element 61, selector 62, and resistive element 63 are connected in series. The basic structure of the magnetoresistive element 61, selector 62, and resistive element 63 is the same as that of the magnetoresistive element 31, selector 32, and resistive element 33.

[0095] However, in this embodiment, word lines (first wiring 10 and third wiring 50) are provided on both sides of a common bit line (second wiring 20). Therefore, the directions of the resistor element (pn junction diode) 33 and the resistor element (pn junction diode) 63 are opposite to each other. That is, when the direction from the first wiring 10 to the second wiring 20 corresponds to the positive direction of the resistor element 33, the direction from the third wiring 50 to the second wiring 20 corresponds to the positive direction of the resistor element 63; when the direction from the first wiring 10 to the second wiring 20 corresponds to the negative direction of the resistor element 33, the direction from the third wiring 50 to the second wiring 20 corresponds to the negative direction of the resistor element 63.

[0096] The basic write and read operations of storage unit 60 are the same as those of storage unit 30.

[0097] In this embodiment, similar to the first embodiment, the readout current can be reduced, and the generation of read interference and the increase in power consumption can be suppressed.

[0098] Figure 18 This is a cross-sectional view schematically illustrating the structure of a magnetic storage device according to a variation of this embodiment.

[0099] In this variation, similar to the second embodiment, the storage cell 30 includes a tunnel barrier element 35, a magnetoresistive effect element 31, a selector 32, a resistor element 33, and the tunnel barrier element 35 connected in series. Additionally, the storage cell 60 includes a tunnel barrier element 65, a magnetoresistive effect element 61, a selector 62, a resistor element 63, and the tunnel barrier element 65 connected in series. The basic structure and characteristics of the tunnel barrier element 65 are the same as those of the tunnel barrier element 35 described in the second embodiment.

[0100] In this modified example, tunnel barrier element 35 and tunnel barrier element 65 are respectively provided in storage cell 30 and storage cell 60. Therefore, the same effect as that described in the second embodiment can be obtained.

[0101] Several embodiments of the present invention have been described above, but these embodiments are merely illustrative and not intended to limit the scope of the invention. These new embodiments can be implemented in a wide variety of other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and / or variations thereof are included within the scope and spirit of the invention, and are included within the scope of the invention as described in the claims and its equivalents.

Claims

1. A magnetic storage device comprising: The first wiring extends in the first direction; The second wiring extends in a second direction that intersects the first direction; and The first storage unit, connected between the first wiring and the second wiring, includes a first magnetoresistive element, a first switching element, and a first resistive element connected in series, each capable of having a low-resistance state or a high-resistance state, and stores data corresponding to the resistance state of the first magnetoresistive element. The first resistive element has asymmetrical current-voltage characteristics when a positive voltage is applied and when a reverse voltage is applied. When reading data corresponding to the resistance state of the first magnetoresistive element from the first storage cell, the first reverse voltage is applied to the first resistive element. The resistance value of the first resistive element when the first reverse voltage is applied is greater than the resistance value of the first resistive element when the second positive voltage with the same absolute value as the first voltage is applied.

2. The magnetic storage device according to claim 1, The resistance value of the first resistive element when the first voltage is applied is lower than the resistance value of the first magnetoresistive element in its low-resistance state.

3. The magnetic storage device according to claim 1, When the first voltage is applied, the resistance value of the first resistive element is higher than the resistance value of the first switching element in the on state and lower than the resistance value in the off state.

4. The magnetic storage device according to claim 1, The first resistive element is a diode.

5. The magnetic storage device according to claim 1, The first switching element has the following characteristics: when the voltage applied between its terminals increases during current scanning to reach a threshold voltage, it changes from the off state to the on state; when the voltage applied between its terminals decreases to reach a holding voltage lower than the threshold voltage, it changes from the on state to the off state.

6. The magnetic storage device according to claim 1, The first storage cell further includes a first tunnel barrier element, which is connected in series with the first magnetoresistive effect element, the first switching element, and the first resistive element, and has nonlinear current-voltage characteristics.

7. The magnetic storage device according to claim 1, The first magnetoresistive element includes a first magnetic layer with a variable magnetization direction, a second magnetic layer with a fixed magnetization direction, and a non-magnetic layer disposed between the first magnetic layer and the second magnetic layer.

8. The magnetic storage device according to claim 1, The resistance state of the first magnetoresistive element is set according to the direction of the current flowing in the first magnetoresistive element. The direction of the current flowing in the first magnetoresistive element when reading data corresponding to the resistance state of the first magnetoresistive element from the first storage unit is the same as the direction of the current flowing in the first magnetoresistive element when setting the low resistance state of the first magnetoresistive element.

9. The magnetic storage device according to claim 1, The first switching element and the first resistive element are adjacent to each other.

10. The magnetic storage device according to claim 1, The first switching element is disposed between the first magnetoresistive effect element and the first resistive element.

11. The magnetic storage device according to claim 1, The first resistive element is disposed between the first magnetoresistive effect element and the first switching element.

12. The magnetic storage device according to claim 1, The first magnetoresistive effect element is disposed between the first switching element and the first resistive element.

13. The magnetic storage device according to claim 1, further comprising: The third wiring extends in the first direction; and The second storage unit, connected between the second wiring and the third wiring, includes a second magnetoresistive element, a second switching element, and a second resistive element connected in series, each having a low-resistance state and a high-resistance state. It stores data corresponding to the resistance state of the second magnetoresistive element. The second resistive element has asymmetrical current-voltage characteristics when a positive voltage is applied and when a reverse voltage is applied. When reading data corresponding to the resistance state of the second magnetoresistive element from the second storage cell, the second resistive element is subjected to a reverse third voltage. The resistance value of the second resistive element when the reverse third voltage is applied is greater than the resistance value of the second resistive element when a positive fourth voltage with the same absolute value as the third voltage is applied.

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